hpsa.c 146 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "2.0.2-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920},
  96. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
  97. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
  98. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
  99. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
  100. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
  101. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
  102. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
  103. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334d},
  104. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
  105. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
  106. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
  107. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
  108. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
  109. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
  110. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
  111. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
  112. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
  113. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
  114. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
  115. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
  116. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
  117. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  118. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  119. {0,}
  120. };
  121. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  122. /* board_id = Subsystem Device ID & Vendor ID
  123. * product = Marketing Name for the board
  124. * access = Address of the struct of function pointers
  125. */
  126. static struct board_type products[] = {
  127. {0x3241103C, "Smart Array P212", &SA5_access},
  128. {0x3243103C, "Smart Array P410", &SA5_access},
  129. {0x3245103C, "Smart Array P410i", &SA5_access},
  130. {0x3247103C, "Smart Array P411", &SA5_access},
  131. {0x3249103C, "Smart Array P812", &SA5_access},
  132. {0x324a103C, "Smart Array P712m", &SA5_access},
  133. {0x324b103C, "Smart Array P711m", &SA5_access},
  134. {0x3350103C, "Smart Array P222", &SA5_access},
  135. {0x3351103C, "Smart Array P420", &SA5_access},
  136. {0x3352103C, "Smart Array P421", &SA5_access},
  137. {0x3353103C, "Smart Array P822", &SA5_access},
  138. {0x3354103C, "Smart Array P420i", &SA5_access},
  139. {0x3355103C, "Smart Array P220i", &SA5_access},
  140. {0x3356103C, "Smart Array P721m", &SA5_access},
  141. {0x1920103C, "Smart Array", &SA5_access},
  142. {0x1921103C, "Smart Array", &SA5_access},
  143. {0x1922103C, "Smart Array", &SA5_access},
  144. {0x1923103C, "Smart Array", &SA5_access},
  145. {0x1924103C, "Smart Array", &SA5_access},
  146. {0x1925103C, "Smart Array", &SA5_access},
  147. {0x1926103C, "Smart Array", &SA5_access},
  148. {0x1928103C, "Smart Array", &SA5_access},
  149. {0x334d103C, "Smart Array P822se", &SA5_access},
  150. {0x21BD103C, "Smart Array", &SA5_access},
  151. {0x21BE103C, "Smart Array", &SA5_access},
  152. {0x21BF103C, "Smart Array", &SA5_access},
  153. {0x21C0103C, "Smart Array", &SA5_access},
  154. {0x21C1103C, "Smart Array", &SA5_access},
  155. {0x21C2103C, "Smart Array", &SA5_access},
  156. {0x21C3103C, "Smart Array", &SA5_access},
  157. {0x21C4103C, "Smart Array", &SA5_access},
  158. {0x21C5103C, "Smart Array", &SA5_access},
  159. {0x21C7103C, "Smart Array", &SA5_access},
  160. {0x21C8103C, "Smart Array", &SA5_access},
  161. {0x21C9103C, "Smart Array", &SA5_access},
  162. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  163. };
  164. static int number_of_controllers;
  165. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  166. static spinlock_t lockup_detector_lock;
  167. static struct task_struct *hpsa_lockup_detector;
  168. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  169. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  170. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  171. static void start_io(struct ctlr_info *h);
  172. #ifdef CONFIG_COMPAT
  173. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  174. #endif
  175. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  176. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  177. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  178. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  179. static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  180. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  181. int cmd_type);
  182. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  183. static void hpsa_scan_start(struct Scsi_Host *);
  184. static int hpsa_scan_finished(struct Scsi_Host *sh,
  185. unsigned long elapsed_time);
  186. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  187. int qdepth, int reason);
  188. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  189. static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
  190. static int hpsa_slave_alloc(struct scsi_device *sdev);
  191. static void hpsa_slave_destroy(struct scsi_device *sdev);
  192. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  193. static int check_for_unit_attention(struct ctlr_info *h,
  194. struct CommandList *c);
  195. static void check_ioctl_unit_attention(struct ctlr_info *h,
  196. struct CommandList *c);
  197. /* performant mode helper functions */
  198. static void calc_bucket_map(int *bucket, int num_buckets,
  199. int nsgs, int *bucket_map);
  200. static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  201. static inline u32 next_command(struct ctlr_info *h, u8 q);
  202. static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
  203. u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  204. u64 *cfg_offset);
  205. static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  206. unsigned long *memory_bar);
  207. static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  208. static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
  209. int wait_for_ready);
  210. static inline void finish_cmd(struct CommandList *c);
  211. #define BOARD_NOT_READY 0
  212. #define BOARD_READY 1
  213. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  214. {
  215. unsigned long *priv = shost_priv(sdev->host);
  216. return (struct ctlr_info *) *priv;
  217. }
  218. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  219. {
  220. unsigned long *priv = shost_priv(sh);
  221. return (struct ctlr_info *) *priv;
  222. }
  223. static int check_for_unit_attention(struct ctlr_info *h,
  224. struct CommandList *c)
  225. {
  226. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  227. return 0;
  228. switch (c->err_info->SenseInfo[12]) {
  229. case STATE_CHANGED:
  230. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  231. "detected, command retried\n", h->ctlr);
  232. break;
  233. case LUN_FAILED:
  234. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  235. "detected, action required\n", h->ctlr);
  236. break;
  237. case REPORT_LUNS_CHANGED:
  238. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  239. "changed, action required\n", h->ctlr);
  240. /*
  241. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  242. * target (array) devices.
  243. */
  244. break;
  245. case POWER_OR_RESET:
  246. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  247. "or device reset detected\n", h->ctlr);
  248. break;
  249. case UNIT_ATTENTION_CLEARED:
  250. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  251. "cleared by another initiator\n", h->ctlr);
  252. break;
  253. default:
  254. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  255. "unit attention detected\n", h->ctlr);
  256. break;
  257. }
  258. return 1;
  259. }
  260. static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
  261. {
  262. if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
  263. (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
  264. c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
  265. return 0;
  266. dev_warn(&h->pdev->dev, HPSA "device busy");
  267. return 1;
  268. }
  269. static ssize_t host_store_rescan(struct device *dev,
  270. struct device_attribute *attr,
  271. const char *buf, size_t count)
  272. {
  273. struct ctlr_info *h;
  274. struct Scsi_Host *shost = class_to_shost(dev);
  275. h = shost_to_hba(shost);
  276. hpsa_scan_start(h->scsi_host);
  277. return count;
  278. }
  279. static ssize_t host_show_firmware_revision(struct device *dev,
  280. struct device_attribute *attr, char *buf)
  281. {
  282. struct ctlr_info *h;
  283. struct Scsi_Host *shost = class_to_shost(dev);
  284. unsigned char *fwrev;
  285. h = shost_to_hba(shost);
  286. if (!h->hba_inquiry_data)
  287. return 0;
  288. fwrev = &h->hba_inquiry_data[32];
  289. return snprintf(buf, 20, "%c%c%c%c\n",
  290. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  291. }
  292. static ssize_t host_show_commands_outstanding(struct device *dev,
  293. struct device_attribute *attr, char *buf)
  294. {
  295. struct Scsi_Host *shost = class_to_shost(dev);
  296. struct ctlr_info *h = shost_to_hba(shost);
  297. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  298. }
  299. static ssize_t host_show_transport_mode(struct device *dev,
  300. struct device_attribute *attr, char *buf)
  301. {
  302. struct ctlr_info *h;
  303. struct Scsi_Host *shost = class_to_shost(dev);
  304. h = shost_to_hba(shost);
  305. return snprintf(buf, 20, "%s\n",
  306. h->transMethod & CFGTBL_Trans_Performant ?
  307. "performant" : "simple");
  308. }
  309. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  310. static u32 unresettable_controller[] = {
  311. 0x324a103C, /* Smart Array P712m */
  312. 0x324b103C, /* SmartArray P711m */
  313. 0x3223103C, /* Smart Array P800 */
  314. 0x3234103C, /* Smart Array P400 */
  315. 0x3235103C, /* Smart Array P400i */
  316. 0x3211103C, /* Smart Array E200i */
  317. 0x3212103C, /* Smart Array E200 */
  318. 0x3213103C, /* Smart Array E200i */
  319. 0x3214103C, /* Smart Array E200i */
  320. 0x3215103C, /* Smart Array E200i */
  321. 0x3237103C, /* Smart Array E500 */
  322. 0x323D103C, /* Smart Array P700m */
  323. 0x40800E11, /* Smart Array 5i */
  324. 0x409C0E11, /* Smart Array 6400 */
  325. 0x409D0E11, /* Smart Array 6400 EM */
  326. 0x40700E11, /* Smart Array 5300 */
  327. 0x40820E11, /* Smart Array 532 */
  328. 0x40830E11, /* Smart Array 5312 */
  329. 0x409A0E11, /* Smart Array 641 */
  330. 0x409B0E11, /* Smart Array 642 */
  331. 0x40910E11, /* Smart Array 6i */
  332. };
  333. /* List of controllers which cannot even be soft reset */
  334. static u32 soft_unresettable_controller[] = {
  335. 0x40800E11, /* Smart Array 5i */
  336. 0x40700E11, /* Smart Array 5300 */
  337. 0x40820E11, /* Smart Array 532 */
  338. 0x40830E11, /* Smart Array 5312 */
  339. 0x409A0E11, /* Smart Array 641 */
  340. 0x409B0E11, /* Smart Array 642 */
  341. 0x40910E11, /* Smart Array 6i */
  342. /* Exclude 640x boards. These are two pci devices in one slot
  343. * which share a battery backed cache module. One controls the
  344. * cache, the other accesses the cache through the one that controls
  345. * it. If we reset the one controlling the cache, the other will
  346. * likely not be happy. Just forbid resetting this conjoined mess.
  347. * The 640x isn't really supported by hpsa anyway.
  348. */
  349. 0x409C0E11, /* Smart Array 6400 */
  350. 0x409D0E11, /* Smart Array 6400 EM */
  351. };
  352. static int ctlr_is_hard_resettable(u32 board_id)
  353. {
  354. int i;
  355. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  356. if (unresettable_controller[i] == board_id)
  357. return 0;
  358. return 1;
  359. }
  360. static int ctlr_is_soft_resettable(u32 board_id)
  361. {
  362. int i;
  363. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  364. if (soft_unresettable_controller[i] == board_id)
  365. return 0;
  366. return 1;
  367. }
  368. static int ctlr_is_resettable(u32 board_id)
  369. {
  370. return ctlr_is_hard_resettable(board_id) ||
  371. ctlr_is_soft_resettable(board_id);
  372. }
  373. static ssize_t host_show_resettable(struct device *dev,
  374. struct device_attribute *attr, char *buf)
  375. {
  376. struct ctlr_info *h;
  377. struct Scsi_Host *shost = class_to_shost(dev);
  378. h = shost_to_hba(shost);
  379. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  380. }
  381. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  382. {
  383. return (scsi3addr[3] & 0xC0) == 0x40;
  384. }
  385. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  386. "1(ADM)", "UNKNOWN"
  387. };
  388. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  389. static ssize_t raid_level_show(struct device *dev,
  390. struct device_attribute *attr, char *buf)
  391. {
  392. ssize_t l = 0;
  393. unsigned char rlevel;
  394. struct ctlr_info *h;
  395. struct scsi_device *sdev;
  396. struct hpsa_scsi_dev_t *hdev;
  397. unsigned long flags;
  398. sdev = to_scsi_device(dev);
  399. h = sdev_to_hba(sdev);
  400. spin_lock_irqsave(&h->lock, flags);
  401. hdev = sdev->hostdata;
  402. if (!hdev) {
  403. spin_unlock_irqrestore(&h->lock, flags);
  404. return -ENODEV;
  405. }
  406. /* Is this even a logical drive? */
  407. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  408. spin_unlock_irqrestore(&h->lock, flags);
  409. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  410. return l;
  411. }
  412. rlevel = hdev->raid_level;
  413. spin_unlock_irqrestore(&h->lock, flags);
  414. if (rlevel > RAID_UNKNOWN)
  415. rlevel = RAID_UNKNOWN;
  416. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  417. return l;
  418. }
  419. static ssize_t lunid_show(struct device *dev,
  420. struct device_attribute *attr, char *buf)
  421. {
  422. struct ctlr_info *h;
  423. struct scsi_device *sdev;
  424. struct hpsa_scsi_dev_t *hdev;
  425. unsigned long flags;
  426. unsigned char lunid[8];
  427. sdev = to_scsi_device(dev);
  428. h = sdev_to_hba(sdev);
  429. spin_lock_irqsave(&h->lock, flags);
  430. hdev = sdev->hostdata;
  431. if (!hdev) {
  432. spin_unlock_irqrestore(&h->lock, flags);
  433. return -ENODEV;
  434. }
  435. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  436. spin_unlock_irqrestore(&h->lock, flags);
  437. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  438. lunid[0], lunid[1], lunid[2], lunid[3],
  439. lunid[4], lunid[5], lunid[6], lunid[7]);
  440. }
  441. static ssize_t unique_id_show(struct device *dev,
  442. struct device_attribute *attr, char *buf)
  443. {
  444. struct ctlr_info *h;
  445. struct scsi_device *sdev;
  446. struct hpsa_scsi_dev_t *hdev;
  447. unsigned long flags;
  448. unsigned char sn[16];
  449. sdev = to_scsi_device(dev);
  450. h = sdev_to_hba(sdev);
  451. spin_lock_irqsave(&h->lock, flags);
  452. hdev = sdev->hostdata;
  453. if (!hdev) {
  454. spin_unlock_irqrestore(&h->lock, flags);
  455. return -ENODEV;
  456. }
  457. memcpy(sn, hdev->device_id, sizeof(sn));
  458. spin_unlock_irqrestore(&h->lock, flags);
  459. return snprintf(buf, 16 * 2 + 2,
  460. "%02X%02X%02X%02X%02X%02X%02X%02X"
  461. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  462. sn[0], sn[1], sn[2], sn[3],
  463. sn[4], sn[5], sn[6], sn[7],
  464. sn[8], sn[9], sn[10], sn[11],
  465. sn[12], sn[13], sn[14], sn[15]);
  466. }
  467. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  468. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  469. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  470. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  471. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  472. host_show_firmware_revision, NULL);
  473. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  474. host_show_commands_outstanding, NULL);
  475. static DEVICE_ATTR(transport_mode, S_IRUGO,
  476. host_show_transport_mode, NULL);
  477. static DEVICE_ATTR(resettable, S_IRUGO,
  478. host_show_resettable, NULL);
  479. static struct device_attribute *hpsa_sdev_attrs[] = {
  480. &dev_attr_raid_level,
  481. &dev_attr_lunid,
  482. &dev_attr_unique_id,
  483. NULL,
  484. };
  485. static struct device_attribute *hpsa_shost_attrs[] = {
  486. &dev_attr_rescan,
  487. &dev_attr_firmware_revision,
  488. &dev_attr_commands_outstanding,
  489. &dev_attr_transport_mode,
  490. &dev_attr_resettable,
  491. NULL,
  492. };
  493. static struct scsi_host_template hpsa_driver_template = {
  494. .module = THIS_MODULE,
  495. .name = HPSA,
  496. .proc_name = HPSA,
  497. .queuecommand = hpsa_scsi_queue_command,
  498. .scan_start = hpsa_scan_start,
  499. .scan_finished = hpsa_scan_finished,
  500. .change_queue_depth = hpsa_change_queue_depth,
  501. .this_id = -1,
  502. .use_clustering = ENABLE_CLUSTERING,
  503. .eh_abort_handler = hpsa_eh_abort_handler,
  504. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  505. .ioctl = hpsa_ioctl,
  506. .slave_alloc = hpsa_slave_alloc,
  507. .slave_destroy = hpsa_slave_destroy,
  508. #ifdef CONFIG_COMPAT
  509. .compat_ioctl = hpsa_compat_ioctl,
  510. #endif
  511. .sdev_attrs = hpsa_sdev_attrs,
  512. .shost_attrs = hpsa_shost_attrs,
  513. .max_sectors = 8192,
  514. };
  515. /* Enqueuing and dequeuing functions for cmdlists. */
  516. static inline void addQ(struct list_head *list, struct CommandList *c)
  517. {
  518. list_add_tail(&c->list, list);
  519. }
  520. static inline u32 next_command(struct ctlr_info *h, u8 q)
  521. {
  522. u32 a;
  523. struct reply_pool *rq = &h->reply_queue[q];
  524. unsigned long flags;
  525. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  526. return h->access.command_completed(h, q);
  527. if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
  528. a = rq->head[rq->current_entry];
  529. rq->current_entry++;
  530. spin_lock_irqsave(&h->lock, flags);
  531. h->commands_outstanding--;
  532. spin_unlock_irqrestore(&h->lock, flags);
  533. } else {
  534. a = FIFO_EMPTY;
  535. }
  536. /* Check for wraparound */
  537. if (rq->current_entry == h->max_commands) {
  538. rq->current_entry = 0;
  539. rq->wraparound ^= 1;
  540. }
  541. return a;
  542. }
  543. /* set_performant_mode: Modify the tag for cciss performant
  544. * set bit 0 for pull model, bits 3-1 for block fetch
  545. * register number
  546. */
  547. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  548. {
  549. if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
  550. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  551. if (likely(h->msix_vector))
  552. c->Header.ReplyQueue =
  553. raw_smp_processor_id() % h->nreply_queues;
  554. }
  555. }
  556. static int is_firmware_flash_cmd(u8 *cdb)
  557. {
  558. return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
  559. }
  560. /*
  561. * During firmware flash, the heartbeat register may not update as frequently
  562. * as it should. So we dial down lockup detection during firmware flash. and
  563. * dial it back up when firmware flash completes.
  564. */
  565. #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
  566. #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
  567. static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
  568. struct CommandList *c)
  569. {
  570. if (!is_firmware_flash_cmd(c->Request.CDB))
  571. return;
  572. atomic_inc(&h->firmware_flash_in_progress);
  573. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
  574. }
  575. static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
  576. struct CommandList *c)
  577. {
  578. if (is_firmware_flash_cmd(c->Request.CDB) &&
  579. atomic_dec_and_test(&h->firmware_flash_in_progress))
  580. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  581. }
  582. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  583. struct CommandList *c)
  584. {
  585. unsigned long flags;
  586. set_performant_mode(h, c);
  587. dial_down_lockup_detection_during_fw_flash(h, c);
  588. spin_lock_irqsave(&h->lock, flags);
  589. addQ(&h->reqQ, c);
  590. h->Qdepth++;
  591. spin_unlock_irqrestore(&h->lock, flags);
  592. start_io(h);
  593. }
  594. static inline void removeQ(struct CommandList *c)
  595. {
  596. if (WARN_ON(list_empty(&c->list)))
  597. return;
  598. list_del_init(&c->list);
  599. }
  600. static inline int is_hba_lunid(unsigned char scsi3addr[])
  601. {
  602. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  603. }
  604. static inline int is_scsi_rev_5(struct ctlr_info *h)
  605. {
  606. if (!h->hba_inquiry_data)
  607. return 0;
  608. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  609. return 1;
  610. return 0;
  611. }
  612. static int hpsa_find_target_lun(struct ctlr_info *h,
  613. unsigned char scsi3addr[], int bus, int *target, int *lun)
  614. {
  615. /* finds an unused bus, target, lun for a new physical device
  616. * assumes h->devlock is held
  617. */
  618. int i, found = 0;
  619. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  620. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  621. for (i = 0; i < h->ndevices; i++) {
  622. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  623. __set_bit(h->dev[i]->target, lun_taken);
  624. }
  625. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  626. if (i < HPSA_MAX_DEVICES) {
  627. /* *bus = 1; */
  628. *target = i;
  629. *lun = 0;
  630. found = 1;
  631. }
  632. return !found;
  633. }
  634. /* Add an entry into h->dev[] array. */
  635. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  636. struct hpsa_scsi_dev_t *device,
  637. struct hpsa_scsi_dev_t *added[], int *nadded)
  638. {
  639. /* assumes h->devlock is held */
  640. int n = h->ndevices;
  641. int i;
  642. unsigned char addr1[8], addr2[8];
  643. struct hpsa_scsi_dev_t *sd;
  644. if (n >= HPSA_MAX_DEVICES) {
  645. dev_err(&h->pdev->dev, "too many devices, some will be "
  646. "inaccessible.\n");
  647. return -1;
  648. }
  649. /* physical devices do not have lun or target assigned until now. */
  650. if (device->lun != -1)
  651. /* Logical device, lun is already assigned. */
  652. goto lun_assigned;
  653. /* If this device a non-zero lun of a multi-lun device
  654. * byte 4 of the 8-byte LUN addr will contain the logical
  655. * unit no, zero otherise.
  656. */
  657. if (device->scsi3addr[4] == 0) {
  658. /* This is not a non-zero lun of a multi-lun device */
  659. if (hpsa_find_target_lun(h, device->scsi3addr,
  660. device->bus, &device->target, &device->lun) != 0)
  661. return -1;
  662. goto lun_assigned;
  663. }
  664. /* This is a non-zero lun of a multi-lun device.
  665. * Search through our list and find the device which
  666. * has the same 8 byte LUN address, excepting byte 4.
  667. * Assign the same bus and target for this new LUN.
  668. * Use the logical unit number from the firmware.
  669. */
  670. memcpy(addr1, device->scsi3addr, 8);
  671. addr1[4] = 0;
  672. for (i = 0; i < n; i++) {
  673. sd = h->dev[i];
  674. memcpy(addr2, sd->scsi3addr, 8);
  675. addr2[4] = 0;
  676. /* differ only in byte 4? */
  677. if (memcmp(addr1, addr2, 8) == 0) {
  678. device->bus = sd->bus;
  679. device->target = sd->target;
  680. device->lun = device->scsi3addr[4];
  681. break;
  682. }
  683. }
  684. if (device->lun == -1) {
  685. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  686. " suspect firmware bug or unsupported hardware "
  687. "configuration.\n");
  688. return -1;
  689. }
  690. lun_assigned:
  691. h->dev[n] = device;
  692. h->ndevices++;
  693. added[*nadded] = device;
  694. (*nadded)++;
  695. /* initially, (before registering with scsi layer) we don't
  696. * know our hostno and we don't want to print anything first
  697. * time anyway (the scsi layer's inquiries will show that info)
  698. */
  699. /* if (hostno != -1) */
  700. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  701. scsi_device_type(device->devtype), hostno,
  702. device->bus, device->target, device->lun);
  703. return 0;
  704. }
  705. /* Update an entry in h->dev[] array. */
  706. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  707. int entry, struct hpsa_scsi_dev_t *new_entry)
  708. {
  709. /* assumes h->devlock is held */
  710. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  711. /* Raid level changed. */
  712. h->dev[entry]->raid_level = new_entry->raid_level;
  713. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  714. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  715. new_entry->target, new_entry->lun);
  716. }
  717. /* Replace an entry from h->dev[] array. */
  718. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  719. int entry, struct hpsa_scsi_dev_t *new_entry,
  720. struct hpsa_scsi_dev_t *added[], int *nadded,
  721. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  722. {
  723. /* assumes h->devlock is held */
  724. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  725. removed[*nremoved] = h->dev[entry];
  726. (*nremoved)++;
  727. /*
  728. * New physical devices won't have target/lun assigned yet
  729. * so we need to preserve the values in the slot we are replacing.
  730. */
  731. if (new_entry->target == -1) {
  732. new_entry->target = h->dev[entry]->target;
  733. new_entry->lun = h->dev[entry]->lun;
  734. }
  735. h->dev[entry] = new_entry;
  736. added[*nadded] = new_entry;
  737. (*nadded)++;
  738. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  739. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  740. new_entry->target, new_entry->lun);
  741. }
  742. /* Remove an entry from h->dev[] array. */
  743. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  744. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  745. {
  746. /* assumes h->devlock is held */
  747. int i;
  748. struct hpsa_scsi_dev_t *sd;
  749. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  750. sd = h->dev[entry];
  751. removed[*nremoved] = h->dev[entry];
  752. (*nremoved)++;
  753. for (i = entry; i < h->ndevices-1; i++)
  754. h->dev[i] = h->dev[i+1];
  755. h->ndevices--;
  756. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  757. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  758. sd->lun);
  759. }
  760. #define SCSI3ADDR_EQ(a, b) ( \
  761. (a)[7] == (b)[7] && \
  762. (a)[6] == (b)[6] && \
  763. (a)[5] == (b)[5] && \
  764. (a)[4] == (b)[4] && \
  765. (a)[3] == (b)[3] && \
  766. (a)[2] == (b)[2] && \
  767. (a)[1] == (b)[1] && \
  768. (a)[0] == (b)[0])
  769. static void fixup_botched_add(struct ctlr_info *h,
  770. struct hpsa_scsi_dev_t *added)
  771. {
  772. /* called when scsi_add_device fails in order to re-adjust
  773. * h->dev[] to match the mid layer's view.
  774. */
  775. unsigned long flags;
  776. int i, j;
  777. spin_lock_irqsave(&h->lock, flags);
  778. for (i = 0; i < h->ndevices; i++) {
  779. if (h->dev[i] == added) {
  780. for (j = i; j < h->ndevices-1; j++)
  781. h->dev[j] = h->dev[j+1];
  782. h->ndevices--;
  783. break;
  784. }
  785. }
  786. spin_unlock_irqrestore(&h->lock, flags);
  787. kfree(added);
  788. }
  789. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  790. struct hpsa_scsi_dev_t *dev2)
  791. {
  792. /* we compare everything except lun and target as these
  793. * are not yet assigned. Compare parts likely
  794. * to differ first
  795. */
  796. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  797. sizeof(dev1->scsi3addr)) != 0)
  798. return 0;
  799. if (memcmp(dev1->device_id, dev2->device_id,
  800. sizeof(dev1->device_id)) != 0)
  801. return 0;
  802. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  803. return 0;
  804. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  805. return 0;
  806. if (dev1->devtype != dev2->devtype)
  807. return 0;
  808. if (dev1->bus != dev2->bus)
  809. return 0;
  810. return 1;
  811. }
  812. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  813. struct hpsa_scsi_dev_t *dev2)
  814. {
  815. /* Device attributes that can change, but don't mean
  816. * that the device is a different device, nor that the OS
  817. * needs to be told anything about the change.
  818. */
  819. if (dev1->raid_level != dev2->raid_level)
  820. return 1;
  821. return 0;
  822. }
  823. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  824. * and return needle location in *index. If scsi3addr matches, but not
  825. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  826. * location in *index.
  827. * In the case of a minor device attribute change, such as RAID level, just
  828. * return DEVICE_UPDATED, along with the updated device's location in index.
  829. * If needle not found, return DEVICE_NOT_FOUND.
  830. */
  831. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  832. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  833. int *index)
  834. {
  835. int i;
  836. #define DEVICE_NOT_FOUND 0
  837. #define DEVICE_CHANGED 1
  838. #define DEVICE_SAME 2
  839. #define DEVICE_UPDATED 3
  840. for (i = 0; i < haystack_size; i++) {
  841. if (haystack[i] == NULL) /* previously removed. */
  842. continue;
  843. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  844. *index = i;
  845. if (device_is_the_same(needle, haystack[i])) {
  846. if (device_updated(needle, haystack[i]))
  847. return DEVICE_UPDATED;
  848. return DEVICE_SAME;
  849. } else {
  850. return DEVICE_CHANGED;
  851. }
  852. }
  853. }
  854. *index = -1;
  855. return DEVICE_NOT_FOUND;
  856. }
  857. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  858. struct hpsa_scsi_dev_t *sd[], int nsds)
  859. {
  860. /* sd contains scsi3 addresses and devtypes, and inquiry
  861. * data. This function takes what's in sd to be the current
  862. * reality and updates h->dev[] to reflect that reality.
  863. */
  864. int i, entry, device_change, changes = 0;
  865. struct hpsa_scsi_dev_t *csd;
  866. unsigned long flags;
  867. struct hpsa_scsi_dev_t **added, **removed;
  868. int nadded, nremoved;
  869. struct Scsi_Host *sh = NULL;
  870. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  871. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  872. if (!added || !removed) {
  873. dev_warn(&h->pdev->dev, "out of memory in "
  874. "adjust_hpsa_scsi_table\n");
  875. goto free_and_out;
  876. }
  877. spin_lock_irqsave(&h->devlock, flags);
  878. /* find any devices in h->dev[] that are not in
  879. * sd[] and remove them from h->dev[], and for any
  880. * devices which have changed, remove the old device
  881. * info and add the new device info.
  882. * If minor device attributes change, just update
  883. * the existing device structure.
  884. */
  885. i = 0;
  886. nremoved = 0;
  887. nadded = 0;
  888. while (i < h->ndevices) {
  889. csd = h->dev[i];
  890. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  891. if (device_change == DEVICE_NOT_FOUND) {
  892. changes++;
  893. hpsa_scsi_remove_entry(h, hostno, i,
  894. removed, &nremoved);
  895. continue; /* remove ^^^, hence i not incremented */
  896. } else if (device_change == DEVICE_CHANGED) {
  897. changes++;
  898. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  899. added, &nadded, removed, &nremoved);
  900. /* Set it to NULL to prevent it from being freed
  901. * at the bottom of hpsa_update_scsi_devices()
  902. */
  903. sd[entry] = NULL;
  904. } else if (device_change == DEVICE_UPDATED) {
  905. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  906. }
  907. i++;
  908. }
  909. /* Now, make sure every device listed in sd[] is also
  910. * listed in h->dev[], adding them if they aren't found
  911. */
  912. for (i = 0; i < nsds; i++) {
  913. if (!sd[i]) /* if already added above. */
  914. continue;
  915. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  916. h->ndevices, &entry);
  917. if (device_change == DEVICE_NOT_FOUND) {
  918. changes++;
  919. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  920. added, &nadded) != 0)
  921. break;
  922. sd[i] = NULL; /* prevent from being freed later. */
  923. } else if (device_change == DEVICE_CHANGED) {
  924. /* should never happen... */
  925. changes++;
  926. dev_warn(&h->pdev->dev,
  927. "device unexpectedly changed.\n");
  928. /* but if it does happen, we just ignore that device */
  929. }
  930. }
  931. spin_unlock_irqrestore(&h->devlock, flags);
  932. /* Don't notify scsi mid layer of any changes the first time through
  933. * (or if there are no changes) scsi_scan_host will do it later the
  934. * first time through.
  935. */
  936. if (hostno == -1 || !changes)
  937. goto free_and_out;
  938. sh = h->scsi_host;
  939. /* Notify scsi mid layer of any removed devices */
  940. for (i = 0; i < nremoved; i++) {
  941. struct scsi_device *sdev =
  942. scsi_device_lookup(sh, removed[i]->bus,
  943. removed[i]->target, removed[i]->lun);
  944. if (sdev != NULL) {
  945. scsi_remove_device(sdev);
  946. scsi_device_put(sdev);
  947. } else {
  948. /* We don't expect to get here.
  949. * future cmds to this device will get selection
  950. * timeout as if the device was gone.
  951. */
  952. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  953. " for removal.", hostno, removed[i]->bus,
  954. removed[i]->target, removed[i]->lun);
  955. }
  956. kfree(removed[i]);
  957. removed[i] = NULL;
  958. }
  959. /* Notify scsi mid layer of any added devices */
  960. for (i = 0; i < nadded; i++) {
  961. if (scsi_add_device(sh, added[i]->bus,
  962. added[i]->target, added[i]->lun) == 0)
  963. continue;
  964. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  965. "device not added.\n", hostno, added[i]->bus,
  966. added[i]->target, added[i]->lun);
  967. /* now we have to remove it from h->dev,
  968. * since it didn't get added to scsi mid layer
  969. */
  970. fixup_botched_add(h, added[i]);
  971. }
  972. free_and_out:
  973. kfree(added);
  974. kfree(removed);
  975. }
  976. /*
  977. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  978. * Assume's h->devlock is held.
  979. */
  980. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  981. int bus, int target, int lun)
  982. {
  983. int i;
  984. struct hpsa_scsi_dev_t *sd;
  985. for (i = 0; i < h->ndevices; i++) {
  986. sd = h->dev[i];
  987. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  988. return sd;
  989. }
  990. return NULL;
  991. }
  992. /* link sdev->hostdata to our per-device structure. */
  993. static int hpsa_slave_alloc(struct scsi_device *sdev)
  994. {
  995. struct hpsa_scsi_dev_t *sd;
  996. unsigned long flags;
  997. struct ctlr_info *h;
  998. h = sdev_to_hba(sdev);
  999. spin_lock_irqsave(&h->devlock, flags);
  1000. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  1001. sdev_id(sdev), sdev->lun);
  1002. if (sd != NULL)
  1003. sdev->hostdata = sd;
  1004. spin_unlock_irqrestore(&h->devlock, flags);
  1005. return 0;
  1006. }
  1007. static void hpsa_slave_destroy(struct scsi_device *sdev)
  1008. {
  1009. /* nothing to do. */
  1010. }
  1011. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  1012. {
  1013. int i;
  1014. if (!h->cmd_sg_list)
  1015. return;
  1016. for (i = 0; i < h->nr_cmds; i++) {
  1017. kfree(h->cmd_sg_list[i]);
  1018. h->cmd_sg_list[i] = NULL;
  1019. }
  1020. kfree(h->cmd_sg_list);
  1021. h->cmd_sg_list = NULL;
  1022. }
  1023. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  1024. {
  1025. int i;
  1026. if (h->chainsize <= 0)
  1027. return 0;
  1028. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  1029. GFP_KERNEL);
  1030. if (!h->cmd_sg_list)
  1031. return -ENOMEM;
  1032. for (i = 0; i < h->nr_cmds; i++) {
  1033. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  1034. h->chainsize, GFP_KERNEL);
  1035. if (!h->cmd_sg_list[i])
  1036. goto clean;
  1037. }
  1038. return 0;
  1039. clean:
  1040. hpsa_free_sg_chain_blocks(h);
  1041. return -ENOMEM;
  1042. }
  1043. static int hpsa_map_sg_chain_block(struct ctlr_info *h,
  1044. struct CommandList *c)
  1045. {
  1046. struct SGDescriptor *chain_sg, *chain_block;
  1047. u64 temp64;
  1048. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1049. chain_block = h->cmd_sg_list[c->cmdindex];
  1050. chain_sg->Ext = HPSA_SG_CHAIN;
  1051. chain_sg->Len = sizeof(*chain_sg) *
  1052. (c->Header.SGTotal - h->max_cmd_sg_entries);
  1053. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  1054. PCI_DMA_TODEVICE);
  1055. if (dma_mapping_error(&h->pdev->dev, temp64)) {
  1056. /* prevent subsequent unmapping */
  1057. chain_sg->Addr.lower = 0;
  1058. chain_sg->Addr.upper = 0;
  1059. return -1;
  1060. }
  1061. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  1062. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  1063. return 0;
  1064. }
  1065. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  1066. struct CommandList *c)
  1067. {
  1068. struct SGDescriptor *chain_sg;
  1069. union u64bit temp64;
  1070. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  1071. return;
  1072. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1073. temp64.val32.lower = chain_sg->Addr.lower;
  1074. temp64.val32.upper = chain_sg->Addr.upper;
  1075. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  1076. }
  1077. static void complete_scsi_command(struct CommandList *cp)
  1078. {
  1079. struct scsi_cmnd *cmd;
  1080. struct ctlr_info *h;
  1081. struct ErrorInfo *ei;
  1082. unsigned char sense_key;
  1083. unsigned char asc; /* additional sense code */
  1084. unsigned char ascq; /* additional sense code qualifier */
  1085. unsigned long sense_data_size;
  1086. ei = cp->err_info;
  1087. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1088. h = cp->h;
  1089. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1090. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1091. hpsa_unmap_sg_chain_block(h, cp);
  1092. cmd->result = (DID_OK << 16); /* host byte */
  1093. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1094. cmd->result |= ei->ScsiStatus;
  1095. /* copy the sense data whether we need to or not. */
  1096. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1097. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1098. else
  1099. sense_data_size = sizeof(ei->SenseInfo);
  1100. if (ei->SenseLen < sense_data_size)
  1101. sense_data_size = ei->SenseLen;
  1102. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1103. scsi_set_resid(cmd, ei->ResidualCnt);
  1104. if (ei->CommandStatus == 0) {
  1105. cmd_free(h, cp);
  1106. cmd->scsi_done(cmd);
  1107. return;
  1108. }
  1109. /* an error has occurred */
  1110. switch (ei->CommandStatus) {
  1111. case CMD_TARGET_STATUS:
  1112. if (ei->ScsiStatus) {
  1113. /* Get sense key */
  1114. sense_key = 0xf & ei->SenseInfo[2];
  1115. /* Get additional sense code */
  1116. asc = ei->SenseInfo[12];
  1117. /* Get addition sense code qualifier */
  1118. ascq = ei->SenseInfo[13];
  1119. }
  1120. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1121. if (check_for_unit_attention(h, cp)) {
  1122. cmd->result = DID_SOFT_ERROR << 16;
  1123. break;
  1124. }
  1125. if (sense_key == ILLEGAL_REQUEST) {
  1126. /*
  1127. * SCSI REPORT_LUNS is commonly unsupported on
  1128. * Smart Array. Suppress noisy complaint.
  1129. */
  1130. if (cp->Request.CDB[0] == REPORT_LUNS)
  1131. break;
  1132. /* If ASC/ASCQ indicate Logical Unit
  1133. * Not Supported condition,
  1134. */
  1135. if ((asc == 0x25) && (ascq == 0x0)) {
  1136. dev_warn(&h->pdev->dev, "cp %p "
  1137. "has check condition\n", cp);
  1138. break;
  1139. }
  1140. }
  1141. if (sense_key == NOT_READY) {
  1142. /* If Sense is Not Ready, Logical Unit
  1143. * Not ready, Manual Intervention
  1144. * required
  1145. */
  1146. if ((asc == 0x04) && (ascq == 0x03)) {
  1147. dev_warn(&h->pdev->dev, "cp %p "
  1148. "has check condition: unit "
  1149. "not ready, manual "
  1150. "intervention required\n", cp);
  1151. break;
  1152. }
  1153. }
  1154. if (sense_key == ABORTED_COMMAND) {
  1155. /* Aborted command is retryable */
  1156. dev_warn(&h->pdev->dev, "cp %p "
  1157. "has check condition: aborted command: "
  1158. "ASC: 0x%x, ASCQ: 0x%x\n",
  1159. cp, asc, ascq);
  1160. cmd->result = DID_SOFT_ERROR << 16;
  1161. break;
  1162. }
  1163. /* Must be some other type of check condition */
  1164. dev_dbg(&h->pdev->dev, "cp %p has check condition: "
  1165. "unknown type: "
  1166. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1167. "Returning result: 0x%x, "
  1168. "cmd=[%02x %02x %02x %02x %02x "
  1169. "%02x %02x %02x %02x %02x %02x "
  1170. "%02x %02x %02x %02x %02x]\n",
  1171. cp, sense_key, asc, ascq,
  1172. cmd->result,
  1173. cmd->cmnd[0], cmd->cmnd[1],
  1174. cmd->cmnd[2], cmd->cmnd[3],
  1175. cmd->cmnd[4], cmd->cmnd[5],
  1176. cmd->cmnd[6], cmd->cmnd[7],
  1177. cmd->cmnd[8], cmd->cmnd[9],
  1178. cmd->cmnd[10], cmd->cmnd[11],
  1179. cmd->cmnd[12], cmd->cmnd[13],
  1180. cmd->cmnd[14], cmd->cmnd[15]);
  1181. break;
  1182. }
  1183. /* Problem was not a check condition
  1184. * Pass it up to the upper layers...
  1185. */
  1186. if (ei->ScsiStatus) {
  1187. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1188. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1189. "Returning result: 0x%x\n",
  1190. cp, ei->ScsiStatus,
  1191. sense_key, asc, ascq,
  1192. cmd->result);
  1193. } else { /* scsi status is zero??? How??? */
  1194. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1195. "Returning no connection.\n", cp),
  1196. /* Ordinarily, this case should never happen,
  1197. * but there is a bug in some released firmware
  1198. * revisions that allows it to happen if, for
  1199. * example, a 4100 backplane loses power and
  1200. * the tape drive is in it. We assume that
  1201. * it's a fatal error of some kind because we
  1202. * can't show that it wasn't. We will make it
  1203. * look like selection timeout since that is
  1204. * the most common reason for this to occur,
  1205. * and it's severe enough.
  1206. */
  1207. cmd->result = DID_NO_CONNECT << 16;
  1208. }
  1209. break;
  1210. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1211. break;
  1212. case CMD_DATA_OVERRUN:
  1213. dev_warn(&h->pdev->dev, "cp %p has"
  1214. " completed with data overrun "
  1215. "reported\n", cp);
  1216. break;
  1217. case CMD_INVALID: {
  1218. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1219. print_cmd(cp); */
  1220. /* We get CMD_INVALID if you address a non-existent device
  1221. * instead of a selection timeout (no response). You will
  1222. * see this if you yank out a drive, then try to access it.
  1223. * This is kind of a shame because it means that any other
  1224. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1225. * missing target. */
  1226. cmd->result = DID_NO_CONNECT << 16;
  1227. }
  1228. break;
  1229. case CMD_PROTOCOL_ERR:
  1230. cmd->result = DID_ERROR << 16;
  1231. dev_warn(&h->pdev->dev, "cp %p has "
  1232. "protocol error\n", cp);
  1233. break;
  1234. case CMD_HARDWARE_ERR:
  1235. cmd->result = DID_ERROR << 16;
  1236. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1237. break;
  1238. case CMD_CONNECTION_LOST:
  1239. cmd->result = DID_ERROR << 16;
  1240. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1241. break;
  1242. case CMD_ABORTED:
  1243. cmd->result = DID_ABORT << 16;
  1244. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1245. cp, ei->ScsiStatus);
  1246. break;
  1247. case CMD_ABORT_FAILED:
  1248. cmd->result = DID_ERROR << 16;
  1249. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1250. break;
  1251. case CMD_UNSOLICITED_ABORT:
  1252. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1253. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1254. "abort\n", cp);
  1255. break;
  1256. case CMD_TIMEOUT:
  1257. cmd->result = DID_TIME_OUT << 16;
  1258. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1259. break;
  1260. case CMD_UNABORTABLE:
  1261. cmd->result = DID_ERROR << 16;
  1262. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1263. break;
  1264. default:
  1265. cmd->result = DID_ERROR << 16;
  1266. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1267. cp, ei->CommandStatus);
  1268. }
  1269. cmd_free(h, cp);
  1270. cmd->scsi_done(cmd);
  1271. }
  1272. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1273. struct CommandList *c, int sg_used, int data_direction)
  1274. {
  1275. int i;
  1276. union u64bit addr64;
  1277. for (i = 0; i < sg_used; i++) {
  1278. addr64.val32.lower = c->SG[i].Addr.lower;
  1279. addr64.val32.upper = c->SG[i].Addr.upper;
  1280. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1281. data_direction);
  1282. }
  1283. }
  1284. static int hpsa_map_one(struct pci_dev *pdev,
  1285. struct CommandList *cp,
  1286. unsigned char *buf,
  1287. size_t buflen,
  1288. int data_direction)
  1289. {
  1290. u64 addr64;
  1291. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1292. cp->Header.SGList = 0;
  1293. cp->Header.SGTotal = 0;
  1294. return 0;
  1295. }
  1296. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1297. if (dma_mapping_error(&pdev->dev, addr64)) {
  1298. /* Prevent subsequent unmap of something never mapped */
  1299. cp->Header.SGList = 0;
  1300. cp->Header.SGTotal = 0;
  1301. return -1;
  1302. }
  1303. cp->SG[0].Addr.lower =
  1304. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1305. cp->SG[0].Addr.upper =
  1306. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1307. cp->SG[0].Len = buflen;
  1308. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1309. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1310. return 0;
  1311. }
  1312. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1313. struct CommandList *c)
  1314. {
  1315. DECLARE_COMPLETION_ONSTACK(wait);
  1316. c->waiting = &wait;
  1317. enqueue_cmd_and_start_io(h, c);
  1318. wait_for_completion(&wait);
  1319. }
  1320. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1321. struct CommandList *c)
  1322. {
  1323. unsigned long flags;
  1324. /* If controller lockup detected, fake a hardware error. */
  1325. spin_lock_irqsave(&h->lock, flags);
  1326. if (unlikely(h->lockup_detected)) {
  1327. spin_unlock_irqrestore(&h->lock, flags);
  1328. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1329. } else {
  1330. spin_unlock_irqrestore(&h->lock, flags);
  1331. hpsa_scsi_do_simple_cmd_core(h, c);
  1332. }
  1333. }
  1334. #define MAX_DRIVER_CMD_RETRIES 25
  1335. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1336. struct CommandList *c, int data_direction)
  1337. {
  1338. int backoff_time = 10, retry_count = 0;
  1339. do {
  1340. memset(c->err_info, 0, sizeof(*c->err_info));
  1341. hpsa_scsi_do_simple_cmd_core(h, c);
  1342. retry_count++;
  1343. if (retry_count > 3) {
  1344. msleep(backoff_time);
  1345. if (backoff_time < 1000)
  1346. backoff_time *= 2;
  1347. }
  1348. } while ((check_for_unit_attention(h, c) ||
  1349. check_for_busy(h, c)) &&
  1350. retry_count <= MAX_DRIVER_CMD_RETRIES);
  1351. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1352. }
  1353. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1354. {
  1355. struct ErrorInfo *ei;
  1356. struct device *d = &cp->h->pdev->dev;
  1357. ei = cp->err_info;
  1358. switch (ei->CommandStatus) {
  1359. case CMD_TARGET_STATUS:
  1360. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1361. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1362. ei->ScsiStatus);
  1363. if (ei->ScsiStatus == 0)
  1364. dev_warn(d, "SCSI status is abnormally zero. "
  1365. "(probably indicates selection timeout "
  1366. "reported incorrectly due to a known "
  1367. "firmware bug, circa July, 2001.)\n");
  1368. break;
  1369. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1370. dev_info(d, "UNDERRUN\n");
  1371. break;
  1372. case CMD_DATA_OVERRUN:
  1373. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1374. break;
  1375. case CMD_INVALID: {
  1376. /* controller unfortunately reports SCSI passthru's
  1377. * to non-existent targets as invalid commands.
  1378. */
  1379. dev_warn(d, "cp %p is reported invalid (probably means "
  1380. "target device no longer present)\n", cp);
  1381. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1382. print_cmd(cp); */
  1383. }
  1384. break;
  1385. case CMD_PROTOCOL_ERR:
  1386. dev_warn(d, "cp %p has protocol error \n", cp);
  1387. break;
  1388. case CMD_HARDWARE_ERR:
  1389. /* cmd->result = DID_ERROR << 16; */
  1390. dev_warn(d, "cp %p had hardware error\n", cp);
  1391. break;
  1392. case CMD_CONNECTION_LOST:
  1393. dev_warn(d, "cp %p had connection lost\n", cp);
  1394. break;
  1395. case CMD_ABORTED:
  1396. dev_warn(d, "cp %p was aborted\n", cp);
  1397. break;
  1398. case CMD_ABORT_FAILED:
  1399. dev_warn(d, "cp %p reports abort failed\n", cp);
  1400. break;
  1401. case CMD_UNSOLICITED_ABORT:
  1402. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1403. break;
  1404. case CMD_TIMEOUT:
  1405. dev_warn(d, "cp %p timed out\n", cp);
  1406. break;
  1407. case CMD_UNABORTABLE:
  1408. dev_warn(d, "Command unabortable\n");
  1409. break;
  1410. default:
  1411. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1412. ei->CommandStatus);
  1413. }
  1414. }
  1415. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1416. unsigned char page, unsigned char *buf,
  1417. unsigned char bufsize)
  1418. {
  1419. int rc = IO_OK;
  1420. struct CommandList *c;
  1421. struct ErrorInfo *ei;
  1422. c = cmd_special_alloc(h);
  1423. if (c == NULL) { /* trouble... */
  1424. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1425. return -ENOMEM;
  1426. }
  1427. if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
  1428. page, scsi3addr, TYPE_CMD)) {
  1429. rc = -1;
  1430. goto out;
  1431. }
  1432. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1433. ei = c->err_info;
  1434. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1435. hpsa_scsi_interpret_error(c);
  1436. rc = -1;
  1437. }
  1438. out:
  1439. cmd_special_free(h, c);
  1440. return rc;
  1441. }
  1442. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1443. {
  1444. int rc = IO_OK;
  1445. struct CommandList *c;
  1446. struct ErrorInfo *ei;
  1447. c = cmd_special_alloc(h);
  1448. if (c == NULL) { /* trouble... */
  1449. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1450. return -ENOMEM;
  1451. }
  1452. /* fill_cmd can't fail here, no data buffer to map. */
  1453. (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
  1454. NULL, 0, 0, scsi3addr, TYPE_MSG);
  1455. hpsa_scsi_do_simple_cmd_core(h, c);
  1456. /* no unmap needed here because no data xfer. */
  1457. ei = c->err_info;
  1458. if (ei->CommandStatus != 0) {
  1459. hpsa_scsi_interpret_error(c);
  1460. rc = -1;
  1461. }
  1462. cmd_special_free(h, c);
  1463. return rc;
  1464. }
  1465. static void hpsa_get_raid_level(struct ctlr_info *h,
  1466. unsigned char *scsi3addr, unsigned char *raid_level)
  1467. {
  1468. int rc;
  1469. unsigned char *buf;
  1470. *raid_level = RAID_UNKNOWN;
  1471. buf = kzalloc(64, GFP_KERNEL);
  1472. if (!buf)
  1473. return;
  1474. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1475. if (rc == 0)
  1476. *raid_level = buf[8];
  1477. if (*raid_level > RAID_UNKNOWN)
  1478. *raid_level = RAID_UNKNOWN;
  1479. kfree(buf);
  1480. return;
  1481. }
  1482. /* Get the device id from inquiry page 0x83 */
  1483. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1484. unsigned char *device_id, int buflen)
  1485. {
  1486. int rc;
  1487. unsigned char *buf;
  1488. if (buflen > 16)
  1489. buflen = 16;
  1490. buf = kzalloc(64, GFP_KERNEL);
  1491. if (!buf)
  1492. return -1;
  1493. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1494. if (rc == 0)
  1495. memcpy(device_id, &buf[8], buflen);
  1496. kfree(buf);
  1497. return rc != 0;
  1498. }
  1499. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1500. struct ReportLUNdata *buf, int bufsize,
  1501. int extended_response)
  1502. {
  1503. int rc = IO_OK;
  1504. struct CommandList *c;
  1505. unsigned char scsi3addr[8];
  1506. struct ErrorInfo *ei;
  1507. c = cmd_special_alloc(h);
  1508. if (c == NULL) { /* trouble... */
  1509. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1510. return -1;
  1511. }
  1512. /* address the controller */
  1513. memset(scsi3addr, 0, sizeof(scsi3addr));
  1514. if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1515. buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
  1516. rc = -1;
  1517. goto out;
  1518. }
  1519. if (extended_response)
  1520. c->Request.CDB[1] = extended_response;
  1521. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1522. ei = c->err_info;
  1523. if (ei->CommandStatus != 0 &&
  1524. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1525. hpsa_scsi_interpret_error(c);
  1526. rc = -1;
  1527. }
  1528. out:
  1529. cmd_special_free(h, c);
  1530. return rc;
  1531. }
  1532. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1533. struct ReportLUNdata *buf,
  1534. int bufsize, int extended_response)
  1535. {
  1536. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1537. }
  1538. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1539. struct ReportLUNdata *buf, int bufsize)
  1540. {
  1541. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1542. }
  1543. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1544. int bus, int target, int lun)
  1545. {
  1546. device->bus = bus;
  1547. device->target = target;
  1548. device->lun = lun;
  1549. }
  1550. static int hpsa_update_device_info(struct ctlr_info *h,
  1551. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1552. unsigned char *is_OBDR_device)
  1553. {
  1554. #define OBDR_SIG_OFFSET 43
  1555. #define OBDR_TAPE_SIG "$DR-10"
  1556. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1557. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1558. unsigned char *inq_buff;
  1559. unsigned char *obdr_sig;
  1560. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1561. if (!inq_buff)
  1562. goto bail_out;
  1563. /* Do an inquiry to the device to see what it is. */
  1564. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1565. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1566. /* Inquiry failed (msg printed already) */
  1567. dev_err(&h->pdev->dev,
  1568. "hpsa_update_device_info: inquiry failed\n");
  1569. goto bail_out;
  1570. }
  1571. this_device->devtype = (inq_buff[0] & 0x1f);
  1572. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1573. memcpy(this_device->vendor, &inq_buff[8],
  1574. sizeof(this_device->vendor));
  1575. memcpy(this_device->model, &inq_buff[16],
  1576. sizeof(this_device->model));
  1577. memset(this_device->device_id, 0,
  1578. sizeof(this_device->device_id));
  1579. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1580. sizeof(this_device->device_id));
  1581. if (this_device->devtype == TYPE_DISK &&
  1582. is_logical_dev_addr_mode(scsi3addr))
  1583. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1584. else
  1585. this_device->raid_level = RAID_UNKNOWN;
  1586. if (is_OBDR_device) {
  1587. /* See if this is a One-Button-Disaster-Recovery device
  1588. * by looking for "$DR-10" at offset 43 in inquiry data.
  1589. */
  1590. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1591. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1592. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1593. OBDR_SIG_LEN) == 0);
  1594. }
  1595. kfree(inq_buff);
  1596. return 0;
  1597. bail_out:
  1598. kfree(inq_buff);
  1599. return 1;
  1600. }
  1601. static unsigned char *ext_target_model[] = {
  1602. "MSA2012",
  1603. "MSA2024",
  1604. "MSA2312",
  1605. "MSA2324",
  1606. "P2000 G3 SAS",
  1607. NULL,
  1608. };
  1609. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1610. {
  1611. int i;
  1612. for (i = 0; ext_target_model[i]; i++)
  1613. if (strncmp(device->model, ext_target_model[i],
  1614. strlen(ext_target_model[i])) == 0)
  1615. return 1;
  1616. return 0;
  1617. }
  1618. /* Helper function to assign bus, target, lun mapping of devices.
  1619. * Puts non-external target logical volumes on bus 0, external target logical
  1620. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1621. * Logical drive target and lun are assigned at this time, but
  1622. * physical device lun and target assignment are deferred (assigned
  1623. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1624. */
  1625. static void figure_bus_target_lun(struct ctlr_info *h,
  1626. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1627. {
  1628. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1629. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1630. /* physical device, target and lun filled in later */
  1631. if (is_hba_lunid(lunaddrbytes))
  1632. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1633. else
  1634. /* defer target, lun assignment for physical devices */
  1635. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1636. return;
  1637. }
  1638. /* It's a logical device */
  1639. if (is_ext_target(h, device)) {
  1640. /* external target way, put logicals on bus 1
  1641. * and match target/lun numbers box
  1642. * reports, other smart array, bus 0, target 0, match lunid
  1643. */
  1644. hpsa_set_bus_target_lun(device,
  1645. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1646. return;
  1647. }
  1648. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1649. }
  1650. /*
  1651. * If there is no lun 0 on a target, linux won't find any devices.
  1652. * For the external targets (arrays), we have to manually detect the enclosure
  1653. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1654. * it for some reason. *tmpdevice is the target we're adding,
  1655. * this_device is a pointer into the current element of currentsd[]
  1656. * that we're building up in update_scsi_devices(), below.
  1657. * lunzerobits is a bitmap that tracks which targets already have a
  1658. * lun 0 assigned.
  1659. * Returns 1 if an enclosure was added, 0 if not.
  1660. */
  1661. static int add_ext_target_dev(struct ctlr_info *h,
  1662. struct hpsa_scsi_dev_t *tmpdevice,
  1663. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1664. unsigned long lunzerobits[], int *n_ext_target_devs)
  1665. {
  1666. unsigned char scsi3addr[8];
  1667. if (test_bit(tmpdevice->target, lunzerobits))
  1668. return 0; /* There is already a lun 0 on this target. */
  1669. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1670. return 0; /* It's the logical targets that may lack lun 0. */
  1671. if (!is_ext_target(h, tmpdevice))
  1672. return 0; /* Only external target devices have this problem. */
  1673. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1674. return 0;
  1675. memset(scsi3addr, 0, 8);
  1676. scsi3addr[3] = tmpdevice->target;
  1677. if (is_hba_lunid(scsi3addr))
  1678. return 0; /* Don't add the RAID controller here. */
  1679. if (is_scsi_rev_5(h))
  1680. return 0; /* p1210m doesn't need to do this. */
  1681. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1682. dev_warn(&h->pdev->dev, "Maximum number of external "
  1683. "target devices exceeded. Check your hardware "
  1684. "configuration.");
  1685. return 0;
  1686. }
  1687. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1688. return 0;
  1689. (*n_ext_target_devs)++;
  1690. hpsa_set_bus_target_lun(this_device,
  1691. tmpdevice->bus, tmpdevice->target, 0);
  1692. set_bit(tmpdevice->target, lunzerobits);
  1693. return 1;
  1694. }
  1695. /*
  1696. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1697. * logdev. The number of luns in physdev and logdev are returned in
  1698. * *nphysicals and *nlogicals, respectively.
  1699. * Returns 0 on success, -1 otherwise.
  1700. */
  1701. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1702. int reportlunsize,
  1703. struct ReportLUNdata *physdev, u32 *nphysicals,
  1704. struct ReportLUNdata *logdev, u32 *nlogicals)
  1705. {
  1706. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1707. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1708. return -1;
  1709. }
  1710. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1711. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1712. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1713. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1714. *nphysicals - HPSA_MAX_PHYS_LUN);
  1715. *nphysicals = HPSA_MAX_PHYS_LUN;
  1716. }
  1717. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1718. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1719. return -1;
  1720. }
  1721. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1722. /* Reject Logicals in excess of our max capability. */
  1723. if (*nlogicals > HPSA_MAX_LUN) {
  1724. dev_warn(&h->pdev->dev,
  1725. "maximum logical LUNs (%d) exceeded. "
  1726. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1727. *nlogicals - HPSA_MAX_LUN);
  1728. *nlogicals = HPSA_MAX_LUN;
  1729. }
  1730. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1731. dev_warn(&h->pdev->dev,
  1732. "maximum logical + physical LUNs (%d) exceeded. "
  1733. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1734. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1735. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1736. }
  1737. return 0;
  1738. }
  1739. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1740. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1741. struct ReportLUNdata *logdev_list)
  1742. {
  1743. /* Helper function, figure out where the LUN ID info is coming from
  1744. * given index i, lists of physical and logical devices, where in
  1745. * the list the raid controller is supposed to appear (first or last)
  1746. */
  1747. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1748. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1749. if (i == raid_ctlr_position)
  1750. return RAID_CTLR_LUNID;
  1751. if (i < logicals_start)
  1752. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1753. if (i < last_device)
  1754. return &logdev_list->LUN[i - nphysicals -
  1755. (raid_ctlr_position == 0)][0];
  1756. BUG();
  1757. return NULL;
  1758. }
  1759. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1760. {
  1761. /* the idea here is we could get notified
  1762. * that some devices have changed, so we do a report
  1763. * physical luns and report logical luns cmd, and adjust
  1764. * our list of devices accordingly.
  1765. *
  1766. * The scsi3addr's of devices won't change so long as the
  1767. * adapter is not reset. That means we can rescan and
  1768. * tell which devices we already know about, vs. new
  1769. * devices, vs. disappearing devices.
  1770. */
  1771. struct ReportLUNdata *physdev_list = NULL;
  1772. struct ReportLUNdata *logdev_list = NULL;
  1773. u32 nphysicals = 0;
  1774. u32 nlogicals = 0;
  1775. u32 ndev_allocated = 0;
  1776. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1777. int ncurrent = 0;
  1778. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1779. int i, n_ext_target_devs, ndevs_to_allocate;
  1780. int raid_ctlr_position;
  1781. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1782. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1783. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1784. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1785. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1786. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1787. dev_err(&h->pdev->dev, "out of memory\n");
  1788. goto out;
  1789. }
  1790. memset(lunzerobits, 0, sizeof(lunzerobits));
  1791. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1792. logdev_list, &nlogicals))
  1793. goto out;
  1794. /* We might see up to the maximum number of logical and physical disks
  1795. * plus external target devices, and a device for the local RAID
  1796. * controller.
  1797. */
  1798. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1799. /* Allocate the per device structures */
  1800. for (i = 0; i < ndevs_to_allocate; i++) {
  1801. if (i >= HPSA_MAX_DEVICES) {
  1802. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1803. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1804. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1805. break;
  1806. }
  1807. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1808. if (!currentsd[i]) {
  1809. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1810. __FILE__, __LINE__);
  1811. goto out;
  1812. }
  1813. ndev_allocated++;
  1814. }
  1815. if (unlikely(is_scsi_rev_5(h)))
  1816. raid_ctlr_position = 0;
  1817. else
  1818. raid_ctlr_position = nphysicals + nlogicals;
  1819. /* adjust our table of devices */
  1820. n_ext_target_devs = 0;
  1821. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1822. u8 *lunaddrbytes, is_OBDR = 0;
  1823. /* Figure out where the LUN ID info is coming from */
  1824. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1825. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1826. /* skip masked physical devices. */
  1827. if (lunaddrbytes[3] & 0xC0 &&
  1828. i < nphysicals + (raid_ctlr_position == 0))
  1829. continue;
  1830. /* Get device type, vendor, model, device id */
  1831. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1832. &is_OBDR))
  1833. continue; /* skip it if we can't talk to it. */
  1834. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1835. this_device = currentsd[ncurrent];
  1836. /*
  1837. * For external target devices, we have to insert a LUN 0 which
  1838. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1839. * is nonetheless an enclosure device there. We have to
  1840. * present that otherwise linux won't find anything if
  1841. * there is no lun 0.
  1842. */
  1843. if (add_ext_target_dev(h, tmpdevice, this_device,
  1844. lunaddrbytes, lunzerobits,
  1845. &n_ext_target_devs)) {
  1846. ncurrent++;
  1847. this_device = currentsd[ncurrent];
  1848. }
  1849. *this_device = *tmpdevice;
  1850. switch (this_device->devtype) {
  1851. case TYPE_ROM:
  1852. /* We don't *really* support actual CD-ROM devices,
  1853. * just "One Button Disaster Recovery" tape drive
  1854. * which temporarily pretends to be a CD-ROM drive.
  1855. * So we check that the device is really an OBDR tape
  1856. * device by checking for "$DR-10" in bytes 43-48 of
  1857. * the inquiry data.
  1858. */
  1859. if (is_OBDR)
  1860. ncurrent++;
  1861. break;
  1862. case TYPE_DISK:
  1863. if (i < nphysicals)
  1864. break;
  1865. ncurrent++;
  1866. break;
  1867. case TYPE_TAPE:
  1868. case TYPE_MEDIUM_CHANGER:
  1869. ncurrent++;
  1870. break;
  1871. case TYPE_RAID:
  1872. /* Only present the Smartarray HBA as a RAID controller.
  1873. * If it's a RAID controller other than the HBA itself
  1874. * (an external RAID controller, MSA500 or similar)
  1875. * don't present it.
  1876. */
  1877. if (!is_hba_lunid(lunaddrbytes))
  1878. break;
  1879. ncurrent++;
  1880. break;
  1881. default:
  1882. break;
  1883. }
  1884. if (ncurrent >= HPSA_MAX_DEVICES)
  1885. break;
  1886. }
  1887. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1888. out:
  1889. kfree(tmpdevice);
  1890. for (i = 0; i < ndev_allocated; i++)
  1891. kfree(currentsd[i]);
  1892. kfree(currentsd);
  1893. kfree(physdev_list);
  1894. kfree(logdev_list);
  1895. }
  1896. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1897. * dma mapping and fills in the scatter gather entries of the
  1898. * hpsa command, cp.
  1899. */
  1900. static int hpsa_scatter_gather(struct ctlr_info *h,
  1901. struct CommandList *cp,
  1902. struct scsi_cmnd *cmd)
  1903. {
  1904. unsigned int len;
  1905. struct scatterlist *sg;
  1906. u64 addr64;
  1907. int use_sg, i, sg_index, chained;
  1908. struct SGDescriptor *curr_sg;
  1909. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1910. use_sg = scsi_dma_map(cmd);
  1911. if (use_sg < 0)
  1912. return use_sg;
  1913. if (!use_sg)
  1914. goto sglist_finished;
  1915. curr_sg = cp->SG;
  1916. chained = 0;
  1917. sg_index = 0;
  1918. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1919. if (i == h->max_cmd_sg_entries - 1 &&
  1920. use_sg > h->max_cmd_sg_entries) {
  1921. chained = 1;
  1922. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1923. sg_index = 0;
  1924. }
  1925. addr64 = (u64) sg_dma_address(sg);
  1926. len = sg_dma_len(sg);
  1927. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1928. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1929. curr_sg->Len = len;
  1930. curr_sg->Ext = 0; /* we are not chaining */
  1931. curr_sg++;
  1932. }
  1933. if (use_sg + chained > h->maxSG)
  1934. h->maxSG = use_sg + chained;
  1935. if (chained) {
  1936. cp->Header.SGList = h->max_cmd_sg_entries;
  1937. cp->Header.SGTotal = (u16) (use_sg + 1);
  1938. if (hpsa_map_sg_chain_block(h, cp)) {
  1939. scsi_dma_unmap(cmd);
  1940. return -1;
  1941. }
  1942. return 0;
  1943. }
  1944. sglist_finished:
  1945. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1946. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1947. return 0;
  1948. }
  1949. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1950. void (*done)(struct scsi_cmnd *))
  1951. {
  1952. struct ctlr_info *h;
  1953. struct hpsa_scsi_dev_t *dev;
  1954. unsigned char scsi3addr[8];
  1955. struct CommandList *c;
  1956. unsigned long flags;
  1957. /* Get the ptr to our adapter structure out of cmd->host. */
  1958. h = sdev_to_hba(cmd->device);
  1959. dev = cmd->device->hostdata;
  1960. if (!dev) {
  1961. cmd->result = DID_NO_CONNECT << 16;
  1962. done(cmd);
  1963. return 0;
  1964. }
  1965. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1966. spin_lock_irqsave(&h->lock, flags);
  1967. if (unlikely(h->lockup_detected)) {
  1968. spin_unlock_irqrestore(&h->lock, flags);
  1969. cmd->result = DID_ERROR << 16;
  1970. done(cmd);
  1971. return 0;
  1972. }
  1973. spin_unlock_irqrestore(&h->lock, flags);
  1974. c = cmd_alloc(h);
  1975. if (c == NULL) { /* trouble... */
  1976. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1977. return SCSI_MLQUEUE_HOST_BUSY;
  1978. }
  1979. /* Fill in the command list header */
  1980. cmd->scsi_done = done; /* save this for use by completion code */
  1981. /* save c in case we have to abort it */
  1982. cmd->host_scribble = (unsigned char *) c;
  1983. c->cmd_type = CMD_SCSI;
  1984. c->scsi_cmd = cmd;
  1985. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1986. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1987. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1988. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1989. /* Fill in the request block... */
  1990. c->Request.Timeout = 0;
  1991. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1992. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1993. c->Request.CDBLen = cmd->cmd_len;
  1994. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1995. c->Request.Type.Type = TYPE_CMD;
  1996. c->Request.Type.Attribute = ATTR_SIMPLE;
  1997. switch (cmd->sc_data_direction) {
  1998. case DMA_TO_DEVICE:
  1999. c->Request.Type.Direction = XFER_WRITE;
  2000. break;
  2001. case DMA_FROM_DEVICE:
  2002. c->Request.Type.Direction = XFER_READ;
  2003. break;
  2004. case DMA_NONE:
  2005. c->Request.Type.Direction = XFER_NONE;
  2006. break;
  2007. case DMA_BIDIRECTIONAL:
  2008. /* This can happen if a buggy application does a scsi passthru
  2009. * and sets both inlen and outlen to non-zero. ( see
  2010. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  2011. */
  2012. c->Request.Type.Direction = XFER_RSVD;
  2013. /* This is technically wrong, and hpsa controllers should
  2014. * reject it with CMD_INVALID, which is the most correct
  2015. * response, but non-fibre backends appear to let it
  2016. * slide by, and give the same results as if this field
  2017. * were set correctly. Either way is acceptable for
  2018. * our purposes here.
  2019. */
  2020. break;
  2021. default:
  2022. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  2023. cmd->sc_data_direction);
  2024. BUG();
  2025. break;
  2026. }
  2027. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  2028. cmd_free(h, c);
  2029. return SCSI_MLQUEUE_HOST_BUSY;
  2030. }
  2031. enqueue_cmd_and_start_io(h, c);
  2032. /* the cmd'll come back via intr handler in complete_scsi_command() */
  2033. return 0;
  2034. }
  2035. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  2036. static void hpsa_scan_start(struct Scsi_Host *sh)
  2037. {
  2038. struct ctlr_info *h = shost_to_hba(sh);
  2039. unsigned long flags;
  2040. /* wait until any scan already in progress is finished. */
  2041. while (1) {
  2042. spin_lock_irqsave(&h->scan_lock, flags);
  2043. if (h->scan_finished)
  2044. break;
  2045. spin_unlock_irqrestore(&h->scan_lock, flags);
  2046. wait_event(h->scan_wait_queue, h->scan_finished);
  2047. /* Note: We don't need to worry about a race between this
  2048. * thread and driver unload because the midlayer will
  2049. * have incremented the reference count, so unload won't
  2050. * happen if we're in here.
  2051. */
  2052. }
  2053. h->scan_finished = 0; /* mark scan as in progress */
  2054. spin_unlock_irqrestore(&h->scan_lock, flags);
  2055. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  2056. spin_lock_irqsave(&h->scan_lock, flags);
  2057. h->scan_finished = 1; /* mark scan as finished. */
  2058. wake_up_all(&h->scan_wait_queue);
  2059. spin_unlock_irqrestore(&h->scan_lock, flags);
  2060. }
  2061. static int hpsa_scan_finished(struct Scsi_Host *sh,
  2062. unsigned long elapsed_time)
  2063. {
  2064. struct ctlr_info *h = shost_to_hba(sh);
  2065. unsigned long flags;
  2066. int finished;
  2067. spin_lock_irqsave(&h->scan_lock, flags);
  2068. finished = h->scan_finished;
  2069. spin_unlock_irqrestore(&h->scan_lock, flags);
  2070. return finished;
  2071. }
  2072. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  2073. int qdepth, int reason)
  2074. {
  2075. struct ctlr_info *h = sdev_to_hba(sdev);
  2076. if (reason != SCSI_QDEPTH_DEFAULT)
  2077. return -ENOTSUPP;
  2078. if (qdepth < 1)
  2079. qdepth = 1;
  2080. else
  2081. if (qdepth > h->nr_cmds)
  2082. qdepth = h->nr_cmds;
  2083. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  2084. return sdev->queue_depth;
  2085. }
  2086. static void hpsa_unregister_scsi(struct ctlr_info *h)
  2087. {
  2088. /* we are being forcibly unloaded, and may not refuse. */
  2089. scsi_remove_host(h->scsi_host);
  2090. scsi_host_put(h->scsi_host);
  2091. h->scsi_host = NULL;
  2092. }
  2093. static int hpsa_register_scsi(struct ctlr_info *h)
  2094. {
  2095. struct Scsi_Host *sh;
  2096. int error;
  2097. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  2098. if (sh == NULL)
  2099. goto fail;
  2100. sh->io_port = 0;
  2101. sh->n_io_port = 0;
  2102. sh->this_id = -1;
  2103. sh->max_channel = 3;
  2104. sh->max_cmd_len = MAX_COMMAND_SIZE;
  2105. sh->max_lun = HPSA_MAX_LUN;
  2106. sh->max_id = HPSA_MAX_LUN;
  2107. sh->can_queue = h->nr_cmds;
  2108. sh->cmd_per_lun = h->nr_cmds;
  2109. sh->sg_tablesize = h->maxsgentries;
  2110. h->scsi_host = sh;
  2111. sh->hostdata[0] = (unsigned long) h;
  2112. sh->irq = h->intr[h->intr_mode];
  2113. sh->unique_id = sh->irq;
  2114. error = scsi_add_host(sh, &h->pdev->dev);
  2115. if (error)
  2116. goto fail_host_put;
  2117. scsi_scan_host(sh);
  2118. return 0;
  2119. fail_host_put:
  2120. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2121. " failed for controller %d\n", __func__, h->ctlr);
  2122. scsi_host_put(sh);
  2123. return error;
  2124. fail:
  2125. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2126. " failed for controller %d\n", __func__, h->ctlr);
  2127. return -ENOMEM;
  2128. }
  2129. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2130. unsigned char lunaddr[])
  2131. {
  2132. int rc = 0;
  2133. int count = 0;
  2134. int waittime = 1; /* seconds */
  2135. struct CommandList *c;
  2136. c = cmd_special_alloc(h);
  2137. if (!c) {
  2138. dev_warn(&h->pdev->dev, "out of memory in "
  2139. "wait_for_device_to_become_ready.\n");
  2140. return IO_ERROR;
  2141. }
  2142. /* Send test unit ready until device ready, or give up. */
  2143. while (count < HPSA_TUR_RETRY_LIMIT) {
  2144. /* Wait for a bit. do this first, because if we send
  2145. * the TUR right away, the reset will just abort it.
  2146. */
  2147. msleep(1000 * waittime);
  2148. count++;
  2149. /* Increase wait time with each try, up to a point. */
  2150. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2151. waittime = waittime * 2;
  2152. /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
  2153. (void) fill_cmd(c, TEST_UNIT_READY, h,
  2154. NULL, 0, 0, lunaddr, TYPE_CMD);
  2155. hpsa_scsi_do_simple_cmd_core(h, c);
  2156. /* no unmap needed here because no data xfer. */
  2157. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2158. break;
  2159. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2160. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2161. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2162. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2163. break;
  2164. dev_warn(&h->pdev->dev, "waiting %d secs "
  2165. "for device to become ready.\n", waittime);
  2166. rc = 1; /* device not ready. */
  2167. }
  2168. if (rc)
  2169. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2170. else
  2171. dev_warn(&h->pdev->dev, "device is ready.\n");
  2172. cmd_special_free(h, c);
  2173. return rc;
  2174. }
  2175. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2176. * complaining. Doing a host- or bus-reset can't do anything good here.
  2177. */
  2178. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2179. {
  2180. int rc;
  2181. struct ctlr_info *h;
  2182. struct hpsa_scsi_dev_t *dev;
  2183. /* find the controller to which the command to be aborted was sent */
  2184. h = sdev_to_hba(scsicmd->device);
  2185. if (h == NULL) /* paranoia */
  2186. return FAILED;
  2187. dev = scsicmd->device->hostdata;
  2188. if (!dev) {
  2189. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2190. "device lookup failed.\n");
  2191. return FAILED;
  2192. }
  2193. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2194. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2195. /* send a reset to the SCSI LUN which the command was sent to */
  2196. rc = hpsa_send_reset(h, dev->scsi3addr);
  2197. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2198. return SUCCESS;
  2199. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2200. return FAILED;
  2201. }
  2202. static void swizzle_abort_tag(u8 *tag)
  2203. {
  2204. u8 original_tag[8];
  2205. memcpy(original_tag, tag, 8);
  2206. tag[0] = original_tag[3];
  2207. tag[1] = original_tag[2];
  2208. tag[2] = original_tag[1];
  2209. tag[3] = original_tag[0];
  2210. tag[4] = original_tag[7];
  2211. tag[5] = original_tag[6];
  2212. tag[6] = original_tag[5];
  2213. tag[7] = original_tag[4];
  2214. }
  2215. static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
  2216. struct CommandList *abort, int swizzle)
  2217. {
  2218. int rc = IO_OK;
  2219. struct CommandList *c;
  2220. struct ErrorInfo *ei;
  2221. c = cmd_special_alloc(h);
  2222. if (c == NULL) { /* trouble... */
  2223. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  2224. return -ENOMEM;
  2225. }
  2226. /* fill_cmd can't fail here, no buffer to map */
  2227. (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
  2228. 0, 0, scsi3addr, TYPE_MSG);
  2229. if (swizzle)
  2230. swizzle_abort_tag(&c->Request.CDB[4]);
  2231. hpsa_scsi_do_simple_cmd_core(h, c);
  2232. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
  2233. __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
  2234. /* no unmap needed here because no data xfer. */
  2235. ei = c->err_info;
  2236. switch (ei->CommandStatus) {
  2237. case CMD_SUCCESS:
  2238. break;
  2239. case CMD_UNABORTABLE: /* Very common, don't make noise. */
  2240. rc = -1;
  2241. break;
  2242. default:
  2243. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
  2244. __func__, abort->Header.Tag.upper,
  2245. abort->Header.Tag.lower);
  2246. hpsa_scsi_interpret_error(c);
  2247. rc = -1;
  2248. break;
  2249. }
  2250. cmd_special_free(h, c);
  2251. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
  2252. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2253. return rc;
  2254. }
  2255. /*
  2256. * hpsa_find_cmd_in_queue
  2257. *
  2258. * Used to determine whether a command (find) is still present
  2259. * in queue_head. Optionally excludes the last element of queue_head.
  2260. *
  2261. * This is used to avoid unnecessary aborts. Commands in h->reqQ have
  2262. * not yet been submitted, and so can be aborted by the driver without
  2263. * sending an abort to the hardware.
  2264. *
  2265. * Returns pointer to command if found in queue, NULL otherwise.
  2266. */
  2267. static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
  2268. struct scsi_cmnd *find, struct list_head *queue_head)
  2269. {
  2270. unsigned long flags;
  2271. struct CommandList *c = NULL; /* ptr into cmpQ */
  2272. if (!find)
  2273. return 0;
  2274. spin_lock_irqsave(&h->lock, flags);
  2275. list_for_each_entry(c, queue_head, list) {
  2276. if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
  2277. continue;
  2278. if (c->scsi_cmd == find) {
  2279. spin_unlock_irqrestore(&h->lock, flags);
  2280. return c;
  2281. }
  2282. }
  2283. spin_unlock_irqrestore(&h->lock, flags);
  2284. return NULL;
  2285. }
  2286. static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
  2287. u8 *tag, struct list_head *queue_head)
  2288. {
  2289. unsigned long flags;
  2290. struct CommandList *c;
  2291. spin_lock_irqsave(&h->lock, flags);
  2292. list_for_each_entry(c, queue_head, list) {
  2293. if (memcmp(&c->Header.Tag, tag, 8) != 0)
  2294. continue;
  2295. spin_unlock_irqrestore(&h->lock, flags);
  2296. return c;
  2297. }
  2298. spin_unlock_irqrestore(&h->lock, flags);
  2299. return NULL;
  2300. }
  2301. /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
  2302. * tell which kind we're dealing with, so we send the abort both ways. There
  2303. * shouldn't be any collisions between swizzled and unswizzled tags due to the
  2304. * way we construct our tags but we check anyway in case the assumptions which
  2305. * make this true someday become false.
  2306. */
  2307. static int hpsa_send_abort_both_ways(struct ctlr_info *h,
  2308. unsigned char *scsi3addr, struct CommandList *abort)
  2309. {
  2310. u8 swizzled_tag[8];
  2311. struct CommandList *c;
  2312. int rc = 0, rc2 = 0;
  2313. /* we do not expect to find the swizzled tag in our queue, but
  2314. * check anyway just to be sure the assumptions which make this
  2315. * the case haven't become wrong.
  2316. */
  2317. memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
  2318. swizzle_abort_tag(swizzled_tag);
  2319. c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
  2320. if (c != NULL) {
  2321. dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
  2322. return hpsa_send_abort(h, scsi3addr, abort, 0);
  2323. }
  2324. rc = hpsa_send_abort(h, scsi3addr, abort, 0);
  2325. /* if the command is still in our queue, we can't conclude that it was
  2326. * aborted (it might have just completed normally) but in any case
  2327. * we don't need to try to abort it another way.
  2328. */
  2329. c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
  2330. if (c)
  2331. rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
  2332. return rc && rc2;
  2333. }
  2334. /* Send an abort for the specified command.
  2335. * If the device and controller support it,
  2336. * send a task abort request.
  2337. */
  2338. static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
  2339. {
  2340. int i, rc;
  2341. struct ctlr_info *h;
  2342. struct hpsa_scsi_dev_t *dev;
  2343. struct CommandList *abort; /* pointer to command to be aborted */
  2344. struct CommandList *found;
  2345. struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
  2346. char msg[256]; /* For debug messaging. */
  2347. int ml = 0;
  2348. /* Find the controller of the command to be aborted */
  2349. h = sdev_to_hba(sc->device);
  2350. if (WARN(h == NULL,
  2351. "ABORT REQUEST FAILED, Controller lookup failed.\n"))
  2352. return FAILED;
  2353. /* Check that controller supports some kind of task abort */
  2354. if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
  2355. !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
  2356. return FAILED;
  2357. memset(msg, 0, sizeof(msg));
  2358. ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
  2359. h->scsi_host->host_no, sc->device->channel,
  2360. sc->device->id, sc->device->lun);
  2361. /* Find the device of the command to be aborted */
  2362. dev = sc->device->hostdata;
  2363. if (!dev) {
  2364. dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
  2365. msg);
  2366. return FAILED;
  2367. }
  2368. /* Get SCSI command to be aborted */
  2369. abort = (struct CommandList *) sc->host_scribble;
  2370. if (abort == NULL) {
  2371. dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
  2372. msg);
  2373. return FAILED;
  2374. }
  2375. ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
  2376. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2377. as = (struct scsi_cmnd *) abort->scsi_cmd;
  2378. if (as != NULL)
  2379. ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
  2380. as->cmnd[0], as->serial_number);
  2381. dev_dbg(&h->pdev->dev, "%s\n", msg);
  2382. dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
  2383. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2384. /* Search reqQ to See if command is queued but not submitted,
  2385. * if so, complete the command with aborted status and remove
  2386. * it from the reqQ.
  2387. */
  2388. found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
  2389. if (found) {
  2390. found->err_info->CommandStatus = CMD_ABORTED;
  2391. finish_cmd(found);
  2392. dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
  2393. msg);
  2394. return SUCCESS;
  2395. }
  2396. /* not in reqQ, if also not in cmpQ, must have already completed */
  2397. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2398. if (!found) {
  2399. dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
  2400. msg);
  2401. return SUCCESS;
  2402. }
  2403. /*
  2404. * Command is in flight, or possibly already completed
  2405. * by the firmware (but not to the scsi mid layer) but we can't
  2406. * distinguish which. Send the abort down.
  2407. */
  2408. rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
  2409. if (rc != 0) {
  2410. dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
  2411. dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
  2412. h->scsi_host->host_no,
  2413. dev->bus, dev->target, dev->lun);
  2414. return FAILED;
  2415. }
  2416. dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
  2417. /* If the abort(s) above completed and actually aborted the
  2418. * command, then the command to be aborted should already be
  2419. * completed. If not, wait around a bit more to see if they
  2420. * manage to complete normally.
  2421. */
  2422. #define ABORT_COMPLETE_WAIT_SECS 30
  2423. for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
  2424. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2425. if (!found)
  2426. return SUCCESS;
  2427. msleep(100);
  2428. }
  2429. dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
  2430. msg, ABORT_COMPLETE_WAIT_SECS);
  2431. return FAILED;
  2432. }
  2433. /*
  2434. * For operations that cannot sleep, a command block is allocated at init,
  2435. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2436. * which ones are free or in use. Lock must be held when calling this.
  2437. * cmd_free() is the complement.
  2438. */
  2439. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2440. {
  2441. struct CommandList *c;
  2442. int i;
  2443. union u64bit temp64;
  2444. dma_addr_t cmd_dma_handle, err_dma_handle;
  2445. unsigned long flags;
  2446. spin_lock_irqsave(&h->lock, flags);
  2447. do {
  2448. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2449. if (i == h->nr_cmds) {
  2450. spin_unlock_irqrestore(&h->lock, flags);
  2451. return NULL;
  2452. }
  2453. } while (test_and_set_bit
  2454. (i & (BITS_PER_LONG - 1),
  2455. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2456. spin_unlock_irqrestore(&h->lock, flags);
  2457. c = h->cmd_pool + i;
  2458. memset(c, 0, sizeof(*c));
  2459. cmd_dma_handle = h->cmd_pool_dhandle
  2460. + i * sizeof(*c);
  2461. c->err_info = h->errinfo_pool + i;
  2462. memset(c->err_info, 0, sizeof(*c->err_info));
  2463. err_dma_handle = h->errinfo_pool_dhandle
  2464. + i * sizeof(*c->err_info);
  2465. c->cmdindex = i;
  2466. INIT_LIST_HEAD(&c->list);
  2467. c->busaddr = (u32) cmd_dma_handle;
  2468. temp64.val = (u64) err_dma_handle;
  2469. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2470. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2471. c->ErrDesc.Len = sizeof(*c->err_info);
  2472. c->h = h;
  2473. return c;
  2474. }
  2475. /* For operations that can wait for kmalloc to possibly sleep,
  2476. * this routine can be called. Lock need not be held to call
  2477. * cmd_special_alloc. cmd_special_free() is the complement.
  2478. */
  2479. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2480. {
  2481. struct CommandList *c;
  2482. union u64bit temp64;
  2483. dma_addr_t cmd_dma_handle, err_dma_handle;
  2484. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2485. if (c == NULL)
  2486. return NULL;
  2487. memset(c, 0, sizeof(*c));
  2488. c->cmdindex = -1;
  2489. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2490. &err_dma_handle);
  2491. if (c->err_info == NULL) {
  2492. pci_free_consistent(h->pdev,
  2493. sizeof(*c), c, cmd_dma_handle);
  2494. return NULL;
  2495. }
  2496. memset(c->err_info, 0, sizeof(*c->err_info));
  2497. INIT_LIST_HEAD(&c->list);
  2498. c->busaddr = (u32) cmd_dma_handle;
  2499. temp64.val = (u64) err_dma_handle;
  2500. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2501. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2502. c->ErrDesc.Len = sizeof(*c->err_info);
  2503. c->h = h;
  2504. return c;
  2505. }
  2506. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2507. {
  2508. int i;
  2509. unsigned long flags;
  2510. i = c - h->cmd_pool;
  2511. spin_lock_irqsave(&h->lock, flags);
  2512. clear_bit(i & (BITS_PER_LONG - 1),
  2513. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2514. spin_unlock_irqrestore(&h->lock, flags);
  2515. }
  2516. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2517. {
  2518. union u64bit temp64;
  2519. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2520. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2521. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2522. c->err_info, (dma_addr_t) temp64.val);
  2523. pci_free_consistent(h->pdev, sizeof(*c),
  2524. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2525. }
  2526. #ifdef CONFIG_COMPAT
  2527. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2528. {
  2529. IOCTL32_Command_struct __user *arg32 =
  2530. (IOCTL32_Command_struct __user *) arg;
  2531. IOCTL_Command_struct arg64;
  2532. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2533. int err;
  2534. u32 cp;
  2535. memset(&arg64, 0, sizeof(arg64));
  2536. err = 0;
  2537. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2538. sizeof(arg64.LUN_info));
  2539. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2540. sizeof(arg64.Request));
  2541. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2542. sizeof(arg64.error_info));
  2543. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2544. err |= get_user(cp, &arg32->buf);
  2545. arg64.buf = compat_ptr(cp);
  2546. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2547. if (err)
  2548. return -EFAULT;
  2549. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2550. if (err)
  2551. return err;
  2552. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2553. sizeof(arg32->error_info));
  2554. if (err)
  2555. return -EFAULT;
  2556. return err;
  2557. }
  2558. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2559. int cmd, void *arg)
  2560. {
  2561. BIG_IOCTL32_Command_struct __user *arg32 =
  2562. (BIG_IOCTL32_Command_struct __user *) arg;
  2563. BIG_IOCTL_Command_struct arg64;
  2564. BIG_IOCTL_Command_struct __user *p =
  2565. compat_alloc_user_space(sizeof(arg64));
  2566. int err;
  2567. u32 cp;
  2568. memset(&arg64, 0, sizeof(arg64));
  2569. err = 0;
  2570. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2571. sizeof(arg64.LUN_info));
  2572. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2573. sizeof(arg64.Request));
  2574. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2575. sizeof(arg64.error_info));
  2576. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2577. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2578. err |= get_user(cp, &arg32->buf);
  2579. arg64.buf = compat_ptr(cp);
  2580. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2581. if (err)
  2582. return -EFAULT;
  2583. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2584. if (err)
  2585. return err;
  2586. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2587. sizeof(arg32->error_info));
  2588. if (err)
  2589. return -EFAULT;
  2590. return err;
  2591. }
  2592. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2593. {
  2594. switch (cmd) {
  2595. case CCISS_GETPCIINFO:
  2596. case CCISS_GETINTINFO:
  2597. case CCISS_SETINTINFO:
  2598. case CCISS_GETNODENAME:
  2599. case CCISS_SETNODENAME:
  2600. case CCISS_GETHEARTBEAT:
  2601. case CCISS_GETBUSTYPES:
  2602. case CCISS_GETFIRMVER:
  2603. case CCISS_GETDRIVVER:
  2604. case CCISS_REVALIDVOLS:
  2605. case CCISS_DEREGDISK:
  2606. case CCISS_REGNEWDISK:
  2607. case CCISS_REGNEWD:
  2608. case CCISS_RESCANDISK:
  2609. case CCISS_GETLUNINFO:
  2610. return hpsa_ioctl(dev, cmd, arg);
  2611. case CCISS_PASSTHRU32:
  2612. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2613. case CCISS_BIG_PASSTHRU32:
  2614. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2615. default:
  2616. return -ENOIOCTLCMD;
  2617. }
  2618. }
  2619. #endif
  2620. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2621. {
  2622. struct hpsa_pci_info pciinfo;
  2623. if (!argp)
  2624. return -EINVAL;
  2625. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2626. pciinfo.bus = h->pdev->bus->number;
  2627. pciinfo.dev_fn = h->pdev->devfn;
  2628. pciinfo.board_id = h->board_id;
  2629. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2630. return -EFAULT;
  2631. return 0;
  2632. }
  2633. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2634. {
  2635. DriverVer_type DriverVer;
  2636. unsigned char vmaj, vmin, vsubmin;
  2637. int rc;
  2638. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2639. &vmaj, &vmin, &vsubmin);
  2640. if (rc != 3) {
  2641. dev_info(&h->pdev->dev, "driver version string '%s' "
  2642. "unrecognized.", HPSA_DRIVER_VERSION);
  2643. vmaj = 0;
  2644. vmin = 0;
  2645. vsubmin = 0;
  2646. }
  2647. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2648. if (!argp)
  2649. return -EINVAL;
  2650. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2651. return -EFAULT;
  2652. return 0;
  2653. }
  2654. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2655. {
  2656. IOCTL_Command_struct iocommand;
  2657. struct CommandList *c;
  2658. char *buff = NULL;
  2659. union u64bit temp64;
  2660. int rc = 0;
  2661. if (!argp)
  2662. return -EINVAL;
  2663. if (!capable(CAP_SYS_RAWIO))
  2664. return -EPERM;
  2665. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2666. return -EFAULT;
  2667. if ((iocommand.buf_size < 1) &&
  2668. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2669. return -EINVAL;
  2670. }
  2671. if (iocommand.buf_size > 0) {
  2672. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2673. if (buff == NULL)
  2674. return -EFAULT;
  2675. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2676. /* Copy the data into the buffer we created */
  2677. if (copy_from_user(buff, iocommand.buf,
  2678. iocommand.buf_size)) {
  2679. rc = -EFAULT;
  2680. goto out_kfree;
  2681. }
  2682. } else {
  2683. memset(buff, 0, iocommand.buf_size);
  2684. }
  2685. }
  2686. c = cmd_special_alloc(h);
  2687. if (c == NULL) {
  2688. rc = -ENOMEM;
  2689. goto out_kfree;
  2690. }
  2691. /* Fill in the command type */
  2692. c->cmd_type = CMD_IOCTL_PEND;
  2693. /* Fill in Command Header */
  2694. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2695. if (iocommand.buf_size > 0) { /* buffer to fill */
  2696. c->Header.SGList = 1;
  2697. c->Header.SGTotal = 1;
  2698. } else { /* no buffers to fill */
  2699. c->Header.SGList = 0;
  2700. c->Header.SGTotal = 0;
  2701. }
  2702. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2703. /* use the kernel address the cmd block for tag */
  2704. c->Header.Tag.lower = c->busaddr;
  2705. /* Fill in Request block */
  2706. memcpy(&c->Request, &iocommand.Request,
  2707. sizeof(c->Request));
  2708. /* Fill in the scatter gather information */
  2709. if (iocommand.buf_size > 0) {
  2710. temp64.val = pci_map_single(h->pdev, buff,
  2711. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2712. if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
  2713. c->SG[0].Addr.lower = 0;
  2714. c->SG[0].Addr.upper = 0;
  2715. c->SG[0].Len = 0;
  2716. rc = -ENOMEM;
  2717. goto out;
  2718. }
  2719. c->SG[0].Addr.lower = temp64.val32.lower;
  2720. c->SG[0].Addr.upper = temp64.val32.upper;
  2721. c->SG[0].Len = iocommand.buf_size;
  2722. c->SG[0].Ext = 0; /* we are not chaining*/
  2723. }
  2724. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2725. if (iocommand.buf_size > 0)
  2726. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2727. check_ioctl_unit_attention(h, c);
  2728. /* Copy the error information out */
  2729. memcpy(&iocommand.error_info, c->err_info,
  2730. sizeof(iocommand.error_info));
  2731. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2732. rc = -EFAULT;
  2733. goto out;
  2734. }
  2735. if (iocommand.Request.Type.Direction == XFER_READ &&
  2736. iocommand.buf_size > 0) {
  2737. /* Copy the data out of the buffer we created */
  2738. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2739. rc = -EFAULT;
  2740. goto out;
  2741. }
  2742. }
  2743. out:
  2744. cmd_special_free(h, c);
  2745. out_kfree:
  2746. kfree(buff);
  2747. return rc;
  2748. }
  2749. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2750. {
  2751. BIG_IOCTL_Command_struct *ioc;
  2752. struct CommandList *c;
  2753. unsigned char **buff = NULL;
  2754. int *buff_size = NULL;
  2755. union u64bit temp64;
  2756. BYTE sg_used = 0;
  2757. int status = 0;
  2758. int i;
  2759. u32 left;
  2760. u32 sz;
  2761. BYTE __user *data_ptr;
  2762. if (!argp)
  2763. return -EINVAL;
  2764. if (!capable(CAP_SYS_RAWIO))
  2765. return -EPERM;
  2766. ioc = (BIG_IOCTL_Command_struct *)
  2767. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2768. if (!ioc) {
  2769. status = -ENOMEM;
  2770. goto cleanup1;
  2771. }
  2772. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2773. status = -EFAULT;
  2774. goto cleanup1;
  2775. }
  2776. if ((ioc->buf_size < 1) &&
  2777. (ioc->Request.Type.Direction != XFER_NONE)) {
  2778. status = -EINVAL;
  2779. goto cleanup1;
  2780. }
  2781. /* Check kmalloc limits using all SGs */
  2782. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2783. status = -EINVAL;
  2784. goto cleanup1;
  2785. }
  2786. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2787. status = -EINVAL;
  2788. goto cleanup1;
  2789. }
  2790. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2791. if (!buff) {
  2792. status = -ENOMEM;
  2793. goto cleanup1;
  2794. }
  2795. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2796. if (!buff_size) {
  2797. status = -ENOMEM;
  2798. goto cleanup1;
  2799. }
  2800. left = ioc->buf_size;
  2801. data_ptr = ioc->buf;
  2802. while (left) {
  2803. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2804. buff_size[sg_used] = sz;
  2805. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2806. if (buff[sg_used] == NULL) {
  2807. status = -ENOMEM;
  2808. goto cleanup1;
  2809. }
  2810. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2811. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2812. status = -ENOMEM;
  2813. goto cleanup1;
  2814. }
  2815. } else
  2816. memset(buff[sg_used], 0, sz);
  2817. left -= sz;
  2818. data_ptr += sz;
  2819. sg_used++;
  2820. }
  2821. c = cmd_special_alloc(h);
  2822. if (c == NULL) {
  2823. status = -ENOMEM;
  2824. goto cleanup1;
  2825. }
  2826. c->cmd_type = CMD_IOCTL_PEND;
  2827. c->Header.ReplyQueue = 0;
  2828. c->Header.SGList = c->Header.SGTotal = sg_used;
  2829. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2830. c->Header.Tag.lower = c->busaddr;
  2831. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2832. if (ioc->buf_size > 0) {
  2833. int i;
  2834. for (i = 0; i < sg_used; i++) {
  2835. temp64.val = pci_map_single(h->pdev, buff[i],
  2836. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2837. if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
  2838. c->SG[i].Addr.lower = 0;
  2839. c->SG[i].Addr.upper = 0;
  2840. c->SG[i].Len = 0;
  2841. hpsa_pci_unmap(h->pdev, c, i,
  2842. PCI_DMA_BIDIRECTIONAL);
  2843. status = -ENOMEM;
  2844. goto cleanup1;
  2845. }
  2846. c->SG[i].Addr.lower = temp64.val32.lower;
  2847. c->SG[i].Addr.upper = temp64.val32.upper;
  2848. c->SG[i].Len = buff_size[i];
  2849. /* we are not chaining */
  2850. c->SG[i].Ext = 0;
  2851. }
  2852. }
  2853. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2854. if (sg_used)
  2855. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2856. check_ioctl_unit_attention(h, c);
  2857. /* Copy the error information out */
  2858. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2859. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2860. cmd_special_free(h, c);
  2861. status = -EFAULT;
  2862. goto cleanup1;
  2863. }
  2864. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2865. /* Copy the data out of the buffer we created */
  2866. BYTE __user *ptr = ioc->buf;
  2867. for (i = 0; i < sg_used; i++) {
  2868. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2869. cmd_special_free(h, c);
  2870. status = -EFAULT;
  2871. goto cleanup1;
  2872. }
  2873. ptr += buff_size[i];
  2874. }
  2875. }
  2876. cmd_special_free(h, c);
  2877. status = 0;
  2878. cleanup1:
  2879. if (buff) {
  2880. for (i = 0; i < sg_used; i++)
  2881. kfree(buff[i]);
  2882. kfree(buff);
  2883. }
  2884. kfree(buff_size);
  2885. kfree(ioc);
  2886. return status;
  2887. }
  2888. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2889. struct CommandList *c)
  2890. {
  2891. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2892. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2893. (void) check_for_unit_attention(h, c);
  2894. }
  2895. /*
  2896. * ioctl
  2897. */
  2898. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2899. {
  2900. struct ctlr_info *h;
  2901. void __user *argp = (void __user *)arg;
  2902. h = sdev_to_hba(dev);
  2903. switch (cmd) {
  2904. case CCISS_DEREGDISK:
  2905. case CCISS_REGNEWDISK:
  2906. case CCISS_REGNEWD:
  2907. hpsa_scan_start(h->scsi_host);
  2908. return 0;
  2909. case CCISS_GETPCIINFO:
  2910. return hpsa_getpciinfo_ioctl(h, argp);
  2911. case CCISS_GETDRIVVER:
  2912. return hpsa_getdrivver_ioctl(h, argp);
  2913. case CCISS_PASSTHRU:
  2914. return hpsa_passthru_ioctl(h, argp);
  2915. case CCISS_BIG_PASSTHRU:
  2916. return hpsa_big_passthru_ioctl(h, argp);
  2917. default:
  2918. return -ENOTTY;
  2919. }
  2920. }
  2921. static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
  2922. u8 reset_type)
  2923. {
  2924. struct CommandList *c;
  2925. c = cmd_alloc(h);
  2926. if (!c)
  2927. return -ENOMEM;
  2928. /* fill_cmd can't fail here, no data buffer to map */
  2929. (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2930. RAID_CTLR_LUNID, TYPE_MSG);
  2931. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2932. c->waiting = NULL;
  2933. enqueue_cmd_and_start_io(h, c);
  2934. /* Don't wait for completion, the reset won't complete. Don't free
  2935. * the command either. This is the last command we will send before
  2936. * re-initializing everything, so it doesn't matter and won't leak.
  2937. */
  2938. return 0;
  2939. }
  2940. static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2941. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2942. int cmd_type)
  2943. {
  2944. int pci_dir = XFER_NONE;
  2945. struct CommandList *a; /* for commands to be aborted */
  2946. c->cmd_type = CMD_IOCTL_PEND;
  2947. c->Header.ReplyQueue = 0;
  2948. if (buff != NULL && size > 0) {
  2949. c->Header.SGList = 1;
  2950. c->Header.SGTotal = 1;
  2951. } else {
  2952. c->Header.SGList = 0;
  2953. c->Header.SGTotal = 0;
  2954. }
  2955. c->Header.Tag.lower = c->busaddr;
  2956. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2957. c->Request.Type.Type = cmd_type;
  2958. if (cmd_type == TYPE_CMD) {
  2959. switch (cmd) {
  2960. case HPSA_INQUIRY:
  2961. /* are we trying to read a vital product page */
  2962. if (page_code != 0) {
  2963. c->Request.CDB[1] = 0x01;
  2964. c->Request.CDB[2] = page_code;
  2965. }
  2966. c->Request.CDBLen = 6;
  2967. c->Request.Type.Attribute = ATTR_SIMPLE;
  2968. c->Request.Type.Direction = XFER_READ;
  2969. c->Request.Timeout = 0;
  2970. c->Request.CDB[0] = HPSA_INQUIRY;
  2971. c->Request.CDB[4] = size & 0xFF;
  2972. break;
  2973. case HPSA_REPORT_LOG:
  2974. case HPSA_REPORT_PHYS:
  2975. /* Talking to controller so It's a physical command
  2976. mode = 00 target = 0. Nothing to write.
  2977. */
  2978. c->Request.CDBLen = 12;
  2979. c->Request.Type.Attribute = ATTR_SIMPLE;
  2980. c->Request.Type.Direction = XFER_READ;
  2981. c->Request.Timeout = 0;
  2982. c->Request.CDB[0] = cmd;
  2983. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2984. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2985. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2986. c->Request.CDB[9] = size & 0xFF;
  2987. break;
  2988. case HPSA_CACHE_FLUSH:
  2989. c->Request.CDBLen = 12;
  2990. c->Request.Type.Attribute = ATTR_SIMPLE;
  2991. c->Request.Type.Direction = XFER_WRITE;
  2992. c->Request.Timeout = 0;
  2993. c->Request.CDB[0] = BMIC_WRITE;
  2994. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2995. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2996. c->Request.CDB[8] = size & 0xFF;
  2997. break;
  2998. case TEST_UNIT_READY:
  2999. c->Request.CDBLen = 6;
  3000. c->Request.Type.Attribute = ATTR_SIMPLE;
  3001. c->Request.Type.Direction = XFER_NONE;
  3002. c->Request.Timeout = 0;
  3003. break;
  3004. default:
  3005. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  3006. BUG();
  3007. return -1;
  3008. }
  3009. } else if (cmd_type == TYPE_MSG) {
  3010. switch (cmd) {
  3011. case HPSA_DEVICE_RESET_MSG:
  3012. c->Request.CDBLen = 16;
  3013. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  3014. c->Request.Type.Attribute = ATTR_SIMPLE;
  3015. c->Request.Type.Direction = XFER_NONE;
  3016. c->Request.Timeout = 0; /* Don't time out */
  3017. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  3018. c->Request.CDB[0] = cmd;
  3019. c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
  3020. /* If bytes 4-7 are zero, it means reset the */
  3021. /* LunID device */
  3022. c->Request.CDB[4] = 0x00;
  3023. c->Request.CDB[5] = 0x00;
  3024. c->Request.CDB[6] = 0x00;
  3025. c->Request.CDB[7] = 0x00;
  3026. break;
  3027. case HPSA_ABORT_MSG:
  3028. a = buff; /* point to command to be aborted */
  3029. dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
  3030. a->Header.Tag.upper, a->Header.Tag.lower,
  3031. c->Header.Tag.upper, c->Header.Tag.lower);
  3032. c->Request.CDBLen = 16;
  3033. c->Request.Type.Type = TYPE_MSG;
  3034. c->Request.Type.Attribute = ATTR_SIMPLE;
  3035. c->Request.Type.Direction = XFER_WRITE;
  3036. c->Request.Timeout = 0; /* Don't time out */
  3037. c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
  3038. c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
  3039. c->Request.CDB[2] = 0x00; /* reserved */
  3040. c->Request.CDB[3] = 0x00; /* reserved */
  3041. /* Tag to abort goes in CDB[4]-CDB[11] */
  3042. c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
  3043. c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
  3044. c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
  3045. c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
  3046. c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
  3047. c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
  3048. c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
  3049. c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
  3050. c->Request.CDB[12] = 0x00; /* reserved */
  3051. c->Request.CDB[13] = 0x00; /* reserved */
  3052. c->Request.CDB[14] = 0x00; /* reserved */
  3053. c->Request.CDB[15] = 0x00; /* reserved */
  3054. break;
  3055. default:
  3056. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  3057. cmd);
  3058. BUG();
  3059. }
  3060. } else {
  3061. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  3062. BUG();
  3063. }
  3064. switch (c->Request.Type.Direction) {
  3065. case XFER_READ:
  3066. pci_dir = PCI_DMA_FROMDEVICE;
  3067. break;
  3068. case XFER_WRITE:
  3069. pci_dir = PCI_DMA_TODEVICE;
  3070. break;
  3071. case XFER_NONE:
  3072. pci_dir = PCI_DMA_NONE;
  3073. break;
  3074. default:
  3075. pci_dir = PCI_DMA_BIDIRECTIONAL;
  3076. }
  3077. if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
  3078. return -1;
  3079. return 0;
  3080. }
  3081. /*
  3082. * Map (physical) PCI mem into (virtual) kernel space
  3083. */
  3084. static void __iomem *remap_pci_mem(ulong base, ulong size)
  3085. {
  3086. ulong page_base = ((ulong) base) & PAGE_MASK;
  3087. ulong page_offs = ((ulong) base) - page_base;
  3088. void __iomem *page_remapped = ioremap_nocache(page_base,
  3089. page_offs + size);
  3090. return page_remapped ? (page_remapped + page_offs) : NULL;
  3091. }
  3092. /* Takes cmds off the submission queue and sends them to the hardware,
  3093. * then puts them on the queue of cmds waiting for completion.
  3094. */
  3095. static void start_io(struct ctlr_info *h)
  3096. {
  3097. struct CommandList *c;
  3098. unsigned long flags;
  3099. spin_lock_irqsave(&h->lock, flags);
  3100. while (!list_empty(&h->reqQ)) {
  3101. c = list_entry(h->reqQ.next, struct CommandList, list);
  3102. /* can't do anything if fifo is full */
  3103. if ((h->access.fifo_full(h))) {
  3104. dev_warn(&h->pdev->dev, "fifo full\n");
  3105. break;
  3106. }
  3107. /* Get the first entry from the Request Q */
  3108. removeQ(c);
  3109. h->Qdepth--;
  3110. /* Put job onto the completed Q */
  3111. addQ(&h->cmpQ, c);
  3112. /* Must increment commands_outstanding before unlocking
  3113. * and submitting to avoid race checking for fifo full
  3114. * condition.
  3115. */
  3116. h->commands_outstanding++;
  3117. if (h->commands_outstanding > h->max_outstanding)
  3118. h->max_outstanding = h->commands_outstanding;
  3119. /* Tell the controller execute command */
  3120. spin_unlock_irqrestore(&h->lock, flags);
  3121. h->access.submit_command(h, c);
  3122. spin_lock_irqsave(&h->lock, flags);
  3123. }
  3124. spin_unlock_irqrestore(&h->lock, flags);
  3125. }
  3126. static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
  3127. {
  3128. return h->access.command_completed(h, q);
  3129. }
  3130. static inline bool interrupt_pending(struct ctlr_info *h)
  3131. {
  3132. return h->access.intr_pending(h);
  3133. }
  3134. static inline long interrupt_not_for_us(struct ctlr_info *h)
  3135. {
  3136. return (h->access.intr_pending(h) == 0) ||
  3137. (h->interrupts_enabled == 0);
  3138. }
  3139. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  3140. u32 raw_tag)
  3141. {
  3142. if (unlikely(tag_index >= h->nr_cmds)) {
  3143. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3144. return 1;
  3145. }
  3146. return 0;
  3147. }
  3148. static inline void finish_cmd(struct CommandList *c)
  3149. {
  3150. unsigned long flags;
  3151. spin_lock_irqsave(&c->h->lock, flags);
  3152. removeQ(c);
  3153. spin_unlock_irqrestore(&c->h->lock, flags);
  3154. dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
  3155. if (likely(c->cmd_type == CMD_SCSI))
  3156. complete_scsi_command(c);
  3157. else if (c->cmd_type == CMD_IOCTL_PEND)
  3158. complete(c->waiting);
  3159. }
  3160. static inline u32 hpsa_tag_contains_index(u32 tag)
  3161. {
  3162. return tag & DIRECT_LOOKUP_BIT;
  3163. }
  3164. static inline u32 hpsa_tag_to_index(u32 tag)
  3165. {
  3166. return tag >> DIRECT_LOOKUP_SHIFT;
  3167. }
  3168. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  3169. {
  3170. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  3171. #define HPSA_SIMPLE_ERROR_BITS 0x03
  3172. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3173. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  3174. return tag & ~HPSA_PERF_ERROR_BITS;
  3175. }
  3176. /* process completion of an indexed ("direct lookup") command */
  3177. static inline void process_indexed_cmd(struct ctlr_info *h,
  3178. u32 raw_tag)
  3179. {
  3180. u32 tag_index;
  3181. struct CommandList *c;
  3182. tag_index = hpsa_tag_to_index(raw_tag);
  3183. if (!bad_tag(h, tag_index, raw_tag)) {
  3184. c = h->cmd_pool + tag_index;
  3185. finish_cmd(c);
  3186. }
  3187. }
  3188. /* process completion of a non-indexed command */
  3189. static inline void process_nonindexed_cmd(struct ctlr_info *h,
  3190. u32 raw_tag)
  3191. {
  3192. u32 tag;
  3193. struct CommandList *c = NULL;
  3194. unsigned long flags;
  3195. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  3196. spin_lock_irqsave(&h->lock, flags);
  3197. list_for_each_entry(c, &h->cmpQ, list) {
  3198. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  3199. spin_unlock_irqrestore(&h->lock, flags);
  3200. finish_cmd(c);
  3201. return;
  3202. }
  3203. }
  3204. spin_unlock_irqrestore(&h->lock, flags);
  3205. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3206. }
  3207. /* Some controllers, like p400, will give us one interrupt
  3208. * after a soft reset, even if we turned interrupts off.
  3209. * Only need to check for this in the hpsa_xxx_discard_completions
  3210. * functions.
  3211. */
  3212. static int ignore_bogus_interrupt(struct ctlr_info *h)
  3213. {
  3214. if (likely(!reset_devices))
  3215. return 0;
  3216. if (likely(h->interrupts_enabled))
  3217. return 0;
  3218. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  3219. "(known firmware bug.) Ignoring.\n");
  3220. return 1;
  3221. }
  3222. /*
  3223. * Convert &h->q[x] (passed to interrupt handlers) back to h.
  3224. * Relies on (h-q[x] == x) being true for x such that
  3225. * 0 <= x < MAX_REPLY_QUEUES.
  3226. */
  3227. static struct ctlr_info *queue_to_hba(u8 *queue)
  3228. {
  3229. return container_of((queue - *queue), struct ctlr_info, q[0]);
  3230. }
  3231. static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
  3232. {
  3233. struct ctlr_info *h = queue_to_hba(queue);
  3234. u8 q = *(u8 *) queue;
  3235. u32 raw_tag;
  3236. if (ignore_bogus_interrupt(h))
  3237. return IRQ_NONE;
  3238. if (interrupt_not_for_us(h))
  3239. return IRQ_NONE;
  3240. h->last_intr_timestamp = get_jiffies_64();
  3241. while (interrupt_pending(h)) {
  3242. raw_tag = get_next_completion(h, q);
  3243. while (raw_tag != FIFO_EMPTY)
  3244. raw_tag = next_command(h, q);
  3245. }
  3246. return IRQ_HANDLED;
  3247. }
  3248. static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
  3249. {
  3250. struct ctlr_info *h = queue_to_hba(queue);
  3251. u32 raw_tag;
  3252. u8 q = *(u8 *) queue;
  3253. if (ignore_bogus_interrupt(h))
  3254. return IRQ_NONE;
  3255. h->last_intr_timestamp = get_jiffies_64();
  3256. raw_tag = get_next_completion(h, q);
  3257. while (raw_tag != FIFO_EMPTY)
  3258. raw_tag = next_command(h, q);
  3259. return IRQ_HANDLED;
  3260. }
  3261. static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
  3262. {
  3263. struct ctlr_info *h = queue_to_hba((u8 *) queue);
  3264. u32 raw_tag;
  3265. u8 q = *(u8 *) queue;
  3266. if (interrupt_not_for_us(h))
  3267. return IRQ_NONE;
  3268. h->last_intr_timestamp = get_jiffies_64();
  3269. while (interrupt_pending(h)) {
  3270. raw_tag = get_next_completion(h, q);
  3271. while (raw_tag != FIFO_EMPTY) {
  3272. if (likely(hpsa_tag_contains_index(raw_tag)))
  3273. process_indexed_cmd(h, raw_tag);
  3274. else
  3275. process_nonindexed_cmd(h, raw_tag);
  3276. raw_tag = next_command(h, q);
  3277. }
  3278. }
  3279. return IRQ_HANDLED;
  3280. }
  3281. static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
  3282. {
  3283. struct ctlr_info *h = queue_to_hba(queue);
  3284. u32 raw_tag;
  3285. u8 q = *(u8 *) queue;
  3286. h->last_intr_timestamp = get_jiffies_64();
  3287. raw_tag = get_next_completion(h, q);
  3288. while (raw_tag != FIFO_EMPTY) {
  3289. if (likely(hpsa_tag_contains_index(raw_tag)))
  3290. process_indexed_cmd(h, raw_tag);
  3291. else
  3292. process_nonindexed_cmd(h, raw_tag);
  3293. raw_tag = next_command(h, q);
  3294. }
  3295. return IRQ_HANDLED;
  3296. }
  3297. /* Send a message CDB to the firmware. Careful, this only works
  3298. * in simple mode, not performant mode due to the tag lookup.
  3299. * We only ever use this immediately after a controller reset.
  3300. */
  3301. static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  3302. unsigned char type)
  3303. {
  3304. struct Command {
  3305. struct CommandListHeader CommandHeader;
  3306. struct RequestBlock Request;
  3307. struct ErrDescriptor ErrorDescriptor;
  3308. };
  3309. struct Command *cmd;
  3310. static const size_t cmd_sz = sizeof(*cmd) +
  3311. sizeof(cmd->ErrorDescriptor);
  3312. dma_addr_t paddr64;
  3313. uint32_t paddr32, tag;
  3314. void __iomem *vaddr;
  3315. int i, err;
  3316. vaddr = pci_ioremap_bar(pdev, 0);
  3317. if (vaddr == NULL)
  3318. return -ENOMEM;
  3319. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3320. * CCISS commands, so they must be allocated from the lower 4GiB of
  3321. * memory.
  3322. */
  3323. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3324. if (err) {
  3325. iounmap(vaddr);
  3326. return -ENOMEM;
  3327. }
  3328. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3329. if (cmd == NULL) {
  3330. iounmap(vaddr);
  3331. return -ENOMEM;
  3332. }
  3333. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3334. * although there's no guarantee, we assume that the address is at
  3335. * least 4-byte aligned (most likely, it's page-aligned).
  3336. */
  3337. paddr32 = paddr64;
  3338. cmd->CommandHeader.ReplyQueue = 0;
  3339. cmd->CommandHeader.SGList = 0;
  3340. cmd->CommandHeader.SGTotal = 0;
  3341. cmd->CommandHeader.Tag.lower = paddr32;
  3342. cmd->CommandHeader.Tag.upper = 0;
  3343. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3344. cmd->Request.CDBLen = 16;
  3345. cmd->Request.Type.Type = TYPE_MSG;
  3346. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3347. cmd->Request.Type.Direction = XFER_NONE;
  3348. cmd->Request.Timeout = 0; /* Don't time out */
  3349. cmd->Request.CDB[0] = opcode;
  3350. cmd->Request.CDB[1] = type;
  3351. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  3352. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  3353. cmd->ErrorDescriptor.Addr.upper = 0;
  3354. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  3355. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3356. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  3357. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3358. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  3359. break;
  3360. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  3361. }
  3362. iounmap(vaddr);
  3363. /* we leak the DMA buffer here ... no choice since the controller could
  3364. * still complete the command.
  3365. */
  3366. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  3367. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  3368. opcode, type);
  3369. return -ETIMEDOUT;
  3370. }
  3371. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3372. if (tag & HPSA_ERROR_BIT) {
  3373. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3374. opcode, type);
  3375. return -EIO;
  3376. }
  3377. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3378. opcode, type);
  3379. return 0;
  3380. }
  3381. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  3382. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  3383. void * __iomem vaddr, u32 use_doorbell)
  3384. {
  3385. u16 pmcsr;
  3386. int pos;
  3387. if (use_doorbell) {
  3388. /* For everything after the P600, the PCI power state method
  3389. * of resetting the controller doesn't work, so we have this
  3390. * other way using the doorbell register.
  3391. */
  3392. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3393. writel(use_doorbell, vaddr + SA5_DOORBELL);
  3394. } else { /* Try to do it the PCI power state way */
  3395. /* Quoting from the Open CISS Specification: "The Power
  3396. * Management Control/Status Register (CSR) controls the power
  3397. * state of the device. The normal operating state is D0,
  3398. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3399. * the controller, place the interface device in D3 then to D0,
  3400. * this causes a secondary PCI reset which will reset the
  3401. * controller." */
  3402. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3403. if (pos == 0) {
  3404. dev_err(&pdev->dev,
  3405. "hpsa_reset_controller: "
  3406. "PCI PM not supported\n");
  3407. return -ENODEV;
  3408. }
  3409. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3410. /* enter the D3hot power management state */
  3411. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3412. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3413. pmcsr |= PCI_D3hot;
  3414. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3415. msleep(500);
  3416. /* enter the D0 power management state */
  3417. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3418. pmcsr |= PCI_D0;
  3419. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3420. /*
  3421. * The P600 requires a small delay when changing states.
  3422. * Otherwise we may think the board did not reset and we bail.
  3423. * This for kdump only and is particular to the P600.
  3424. */
  3425. msleep(500);
  3426. }
  3427. return 0;
  3428. }
  3429. static void init_driver_version(char *driver_version, int len)
  3430. {
  3431. memset(driver_version, 0, len);
  3432. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3433. }
  3434. static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
  3435. {
  3436. char *driver_version;
  3437. int i, size = sizeof(cfgtable->driver_version);
  3438. driver_version = kmalloc(size, GFP_KERNEL);
  3439. if (!driver_version)
  3440. return -ENOMEM;
  3441. init_driver_version(driver_version, size);
  3442. for (i = 0; i < size; i++)
  3443. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3444. kfree(driver_version);
  3445. return 0;
  3446. }
  3447. static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
  3448. unsigned char *driver_ver)
  3449. {
  3450. int i;
  3451. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3452. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3453. }
  3454. static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
  3455. {
  3456. char *driver_ver, *old_driver_ver;
  3457. int rc, size = sizeof(cfgtable->driver_version);
  3458. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3459. if (!old_driver_ver)
  3460. return -ENOMEM;
  3461. driver_ver = old_driver_ver + size;
  3462. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3463. * should have been changed, otherwise we know the reset failed.
  3464. */
  3465. init_driver_version(old_driver_ver, size);
  3466. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3467. rc = !memcmp(driver_ver, old_driver_ver, size);
  3468. kfree(old_driver_ver);
  3469. return rc;
  3470. }
  3471. /* This does a hard reset of the controller using PCI power management
  3472. * states or the using the doorbell register.
  3473. */
  3474. static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3475. {
  3476. u64 cfg_offset;
  3477. u32 cfg_base_addr;
  3478. u64 cfg_base_addr_index;
  3479. void __iomem *vaddr;
  3480. unsigned long paddr;
  3481. u32 misc_fw_support;
  3482. int rc;
  3483. struct CfgTable __iomem *cfgtable;
  3484. u32 use_doorbell;
  3485. u32 board_id;
  3486. u16 command_register;
  3487. /* For controllers as old as the P600, this is very nearly
  3488. * the same thing as
  3489. *
  3490. * pci_save_state(pci_dev);
  3491. * pci_set_power_state(pci_dev, PCI_D3hot);
  3492. * pci_set_power_state(pci_dev, PCI_D0);
  3493. * pci_restore_state(pci_dev);
  3494. *
  3495. * For controllers newer than the P600, the pci power state
  3496. * method of resetting doesn't work so we have another way
  3497. * using the doorbell register.
  3498. */
  3499. rc = hpsa_lookup_board_id(pdev, &board_id);
  3500. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3501. dev_warn(&pdev->dev, "Not resetting device.\n");
  3502. return -ENODEV;
  3503. }
  3504. /* if controller is soft- but not hard resettable... */
  3505. if (!ctlr_is_hard_resettable(board_id))
  3506. return -ENOTSUPP; /* try soft reset later. */
  3507. /* Save the PCI command register */
  3508. pci_read_config_word(pdev, 4, &command_register);
  3509. /* Turn the board off. This is so that later pci_restore_state()
  3510. * won't turn the board on before the rest of config space is ready.
  3511. */
  3512. pci_disable_device(pdev);
  3513. pci_save_state(pdev);
  3514. /* find the first memory BAR, so we can find the cfg table */
  3515. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3516. if (rc)
  3517. return rc;
  3518. vaddr = remap_pci_mem(paddr, 0x250);
  3519. if (!vaddr)
  3520. return -ENOMEM;
  3521. /* find cfgtable in order to check if reset via doorbell is supported */
  3522. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3523. &cfg_base_addr_index, &cfg_offset);
  3524. if (rc)
  3525. goto unmap_vaddr;
  3526. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3527. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3528. if (!cfgtable) {
  3529. rc = -ENOMEM;
  3530. goto unmap_vaddr;
  3531. }
  3532. rc = write_driver_ver_to_cfgtable(cfgtable);
  3533. if (rc)
  3534. goto unmap_vaddr;
  3535. /* If reset via doorbell register is supported, use that.
  3536. * There are two such methods. Favor the newest method.
  3537. */
  3538. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3539. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3540. if (use_doorbell) {
  3541. use_doorbell = DOORBELL_CTLR_RESET2;
  3542. } else {
  3543. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3544. if (use_doorbell) {
  3545. dev_warn(&pdev->dev, "Soft reset not supported. "
  3546. "Firmware update is required.\n");
  3547. rc = -ENOTSUPP; /* try soft reset */
  3548. goto unmap_cfgtable;
  3549. }
  3550. }
  3551. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3552. if (rc)
  3553. goto unmap_cfgtable;
  3554. pci_restore_state(pdev);
  3555. rc = pci_enable_device(pdev);
  3556. if (rc) {
  3557. dev_warn(&pdev->dev, "failed to enable device.\n");
  3558. goto unmap_cfgtable;
  3559. }
  3560. pci_write_config_word(pdev, 4, command_register);
  3561. /* Some devices (notably the HP Smart Array 5i Controller)
  3562. need a little pause here */
  3563. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3564. /* Wait for board to become not ready, then ready. */
  3565. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3566. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3567. if (rc) {
  3568. dev_warn(&pdev->dev,
  3569. "failed waiting for board to reset."
  3570. " Will try soft reset.\n");
  3571. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3572. goto unmap_cfgtable;
  3573. }
  3574. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3575. if (rc) {
  3576. dev_warn(&pdev->dev,
  3577. "failed waiting for board to become ready "
  3578. "after hard reset\n");
  3579. goto unmap_cfgtable;
  3580. }
  3581. rc = controller_reset_failed(vaddr);
  3582. if (rc < 0)
  3583. goto unmap_cfgtable;
  3584. if (rc) {
  3585. dev_warn(&pdev->dev, "Unable to successfully reset "
  3586. "controller. Will try soft reset.\n");
  3587. rc = -ENOTSUPP;
  3588. } else {
  3589. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3590. }
  3591. unmap_cfgtable:
  3592. iounmap(cfgtable);
  3593. unmap_vaddr:
  3594. iounmap(vaddr);
  3595. return rc;
  3596. }
  3597. /*
  3598. * We cannot read the structure directly, for portability we must use
  3599. * the io functions.
  3600. * This is for debug only.
  3601. */
  3602. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3603. {
  3604. #ifdef HPSA_DEBUG
  3605. int i;
  3606. char temp_name[17];
  3607. dev_info(dev, "Controller Configuration information\n");
  3608. dev_info(dev, "------------------------------------\n");
  3609. for (i = 0; i < 4; i++)
  3610. temp_name[i] = readb(&(tb->Signature[i]));
  3611. temp_name[4] = '\0';
  3612. dev_info(dev, " Signature = %s\n", temp_name);
  3613. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3614. dev_info(dev, " Transport methods supported = 0x%x\n",
  3615. readl(&(tb->TransportSupport)));
  3616. dev_info(dev, " Transport methods active = 0x%x\n",
  3617. readl(&(tb->TransportActive)));
  3618. dev_info(dev, " Requested transport Method = 0x%x\n",
  3619. readl(&(tb->HostWrite.TransportRequest)));
  3620. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3621. readl(&(tb->HostWrite.CoalIntDelay)));
  3622. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3623. readl(&(tb->HostWrite.CoalIntCount)));
  3624. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3625. readl(&(tb->CmdsOutMax)));
  3626. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3627. for (i = 0; i < 16; i++)
  3628. temp_name[i] = readb(&(tb->ServerName[i]));
  3629. temp_name[16] = '\0';
  3630. dev_info(dev, " Server Name = %s\n", temp_name);
  3631. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3632. readl(&(tb->HeartBeat)));
  3633. #endif /* HPSA_DEBUG */
  3634. }
  3635. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3636. {
  3637. int i, offset, mem_type, bar_type;
  3638. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3639. return 0;
  3640. offset = 0;
  3641. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3642. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3643. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3644. offset += 4;
  3645. else {
  3646. mem_type = pci_resource_flags(pdev, i) &
  3647. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3648. switch (mem_type) {
  3649. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3650. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3651. offset += 4; /* 32 bit */
  3652. break;
  3653. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3654. offset += 8;
  3655. break;
  3656. default: /* reserved in PCI 2.2 */
  3657. dev_warn(&pdev->dev,
  3658. "base address is invalid\n");
  3659. return -1;
  3660. break;
  3661. }
  3662. }
  3663. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3664. return i + 1;
  3665. }
  3666. return -1;
  3667. }
  3668. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3669. * controllers that are capable. If not, we use IO-APIC mode.
  3670. */
  3671. static void hpsa_interrupt_mode(struct ctlr_info *h)
  3672. {
  3673. #ifdef CONFIG_PCI_MSI
  3674. int err, i;
  3675. struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
  3676. for (i = 0; i < MAX_REPLY_QUEUES; i++) {
  3677. hpsa_msix_entries[i].vector = 0;
  3678. hpsa_msix_entries[i].entry = i;
  3679. }
  3680. /* Some boards advertise MSI but don't really support it */
  3681. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3682. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3683. goto default_int_mode;
  3684. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3685. dev_info(&h->pdev->dev, "MSIX\n");
  3686. err = pci_enable_msix(h->pdev, hpsa_msix_entries,
  3687. MAX_REPLY_QUEUES);
  3688. if (!err) {
  3689. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3690. h->intr[i] = hpsa_msix_entries[i].vector;
  3691. h->msix_vector = 1;
  3692. return;
  3693. }
  3694. if (err > 0) {
  3695. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3696. "available\n", err);
  3697. goto default_int_mode;
  3698. } else {
  3699. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3700. err);
  3701. goto default_int_mode;
  3702. }
  3703. }
  3704. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3705. dev_info(&h->pdev->dev, "MSI\n");
  3706. if (!pci_enable_msi(h->pdev))
  3707. h->msi_vector = 1;
  3708. else
  3709. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3710. }
  3711. default_int_mode:
  3712. #endif /* CONFIG_PCI_MSI */
  3713. /* if we get here we're going to use the default interrupt mode */
  3714. h->intr[h->intr_mode] = h->pdev->irq;
  3715. }
  3716. static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3717. {
  3718. int i;
  3719. u32 subsystem_vendor_id, subsystem_device_id;
  3720. subsystem_vendor_id = pdev->subsystem_vendor;
  3721. subsystem_device_id = pdev->subsystem_device;
  3722. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3723. subsystem_vendor_id;
  3724. for (i = 0; i < ARRAY_SIZE(products); i++)
  3725. if (*board_id == products[i].board_id)
  3726. return i;
  3727. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3728. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3729. !hpsa_allow_any) {
  3730. dev_warn(&pdev->dev, "unrecognized board ID: "
  3731. "0x%08x, ignoring.\n", *board_id);
  3732. return -ENODEV;
  3733. }
  3734. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3735. }
  3736. static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3737. unsigned long *memory_bar)
  3738. {
  3739. int i;
  3740. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3741. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3742. /* addressing mode bits already removed */
  3743. *memory_bar = pci_resource_start(pdev, i);
  3744. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3745. *memory_bar);
  3746. return 0;
  3747. }
  3748. dev_warn(&pdev->dev, "no memory BAR found\n");
  3749. return -ENODEV;
  3750. }
  3751. static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
  3752. int wait_for_ready)
  3753. {
  3754. int i, iterations;
  3755. u32 scratchpad;
  3756. if (wait_for_ready)
  3757. iterations = HPSA_BOARD_READY_ITERATIONS;
  3758. else
  3759. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3760. for (i = 0; i < iterations; i++) {
  3761. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3762. if (wait_for_ready) {
  3763. if (scratchpad == HPSA_FIRMWARE_READY)
  3764. return 0;
  3765. } else {
  3766. if (scratchpad != HPSA_FIRMWARE_READY)
  3767. return 0;
  3768. }
  3769. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3770. }
  3771. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3772. return -ENODEV;
  3773. }
  3774. static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
  3775. u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3776. u64 *cfg_offset)
  3777. {
  3778. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3779. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3780. *cfg_base_addr &= (u32) 0x0000ffff;
  3781. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3782. if (*cfg_base_addr_index == -1) {
  3783. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3784. return -ENODEV;
  3785. }
  3786. return 0;
  3787. }
  3788. static int hpsa_find_cfgtables(struct ctlr_info *h)
  3789. {
  3790. u64 cfg_offset;
  3791. u32 cfg_base_addr;
  3792. u64 cfg_base_addr_index;
  3793. u32 trans_offset;
  3794. int rc;
  3795. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3796. &cfg_base_addr_index, &cfg_offset);
  3797. if (rc)
  3798. return rc;
  3799. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3800. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3801. if (!h->cfgtable)
  3802. return -ENOMEM;
  3803. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3804. if (rc)
  3805. return rc;
  3806. /* Find performant mode table. */
  3807. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3808. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3809. cfg_base_addr_index)+cfg_offset+trans_offset,
  3810. sizeof(*h->transtable));
  3811. if (!h->transtable)
  3812. return -ENOMEM;
  3813. return 0;
  3814. }
  3815. static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3816. {
  3817. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3818. /* Limit commands in memory limited kdump scenario. */
  3819. if (reset_devices && h->max_commands > 32)
  3820. h->max_commands = 32;
  3821. if (h->max_commands < 16) {
  3822. dev_warn(&h->pdev->dev, "Controller reports "
  3823. "max supported commands of %d, an obvious lie. "
  3824. "Using 16. Ensure that firmware is up to date.\n",
  3825. h->max_commands);
  3826. h->max_commands = 16;
  3827. }
  3828. }
  3829. /* Interrogate the hardware for some limits:
  3830. * max commands, max SG elements without chaining, and with chaining,
  3831. * SG chain block size, etc.
  3832. */
  3833. static void hpsa_find_board_params(struct ctlr_info *h)
  3834. {
  3835. hpsa_get_max_perf_mode_cmds(h);
  3836. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3837. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3838. /*
  3839. * Limit in-command s/g elements to 32 save dma'able memory.
  3840. * Howvever spec says if 0, use 31
  3841. */
  3842. h->max_cmd_sg_entries = 31;
  3843. if (h->maxsgentries > 512) {
  3844. h->max_cmd_sg_entries = 32;
  3845. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3846. h->maxsgentries--; /* save one for chain pointer */
  3847. } else {
  3848. h->maxsgentries = 31; /* default to traditional values */
  3849. h->chainsize = 0;
  3850. }
  3851. /* Find out what task management functions are supported and cache */
  3852. h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
  3853. }
  3854. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3855. {
  3856. if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
  3857. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3858. return false;
  3859. }
  3860. return true;
  3861. }
  3862. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3863. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3864. {
  3865. #ifdef CONFIG_X86
  3866. u32 prefetch;
  3867. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3868. prefetch |= 0x100;
  3869. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3870. #endif
  3871. }
  3872. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3873. * in a prefetch beyond physical memory.
  3874. */
  3875. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3876. {
  3877. u32 dma_prefetch;
  3878. if (h->board_id != 0x3225103C)
  3879. return;
  3880. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3881. dma_prefetch |= 0x8000;
  3882. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3883. }
  3884. static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3885. {
  3886. int i;
  3887. u32 doorbell_value;
  3888. unsigned long flags;
  3889. /* under certain very rare conditions, this can take awhile.
  3890. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3891. * as we enter this code.)
  3892. */
  3893. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3894. spin_lock_irqsave(&h->lock, flags);
  3895. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3896. spin_unlock_irqrestore(&h->lock, flags);
  3897. if (!(doorbell_value & CFGTBL_ChangeReq))
  3898. break;
  3899. /* delay and try again */
  3900. usleep_range(10000, 20000);
  3901. }
  3902. }
  3903. static int hpsa_enter_simple_mode(struct ctlr_info *h)
  3904. {
  3905. u32 trans_support;
  3906. trans_support = readl(&(h->cfgtable->TransportSupport));
  3907. if (!(trans_support & SIMPLE_MODE))
  3908. return -ENOTSUPP;
  3909. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3910. /* Update the field, and then ring the doorbell */
  3911. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3912. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3913. hpsa_wait_for_mode_change_ack(h);
  3914. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3915. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3916. dev_warn(&h->pdev->dev,
  3917. "unable to get board into simple mode\n");
  3918. return -ENODEV;
  3919. }
  3920. h->transMethod = CFGTBL_Trans_Simple;
  3921. return 0;
  3922. }
  3923. static int hpsa_pci_init(struct ctlr_info *h)
  3924. {
  3925. int prod_index, err;
  3926. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3927. if (prod_index < 0)
  3928. return -ENODEV;
  3929. h->product_name = products[prod_index].product_name;
  3930. h->access = *(products[prod_index].access);
  3931. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3932. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3933. err = pci_enable_device(h->pdev);
  3934. if (err) {
  3935. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3936. return err;
  3937. }
  3938. /* Enable bus mastering (pci_disable_device may disable this) */
  3939. pci_set_master(h->pdev);
  3940. err = pci_request_regions(h->pdev, HPSA);
  3941. if (err) {
  3942. dev_err(&h->pdev->dev,
  3943. "cannot obtain PCI resources, aborting\n");
  3944. return err;
  3945. }
  3946. hpsa_interrupt_mode(h);
  3947. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3948. if (err)
  3949. goto err_out_free_res;
  3950. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3951. if (!h->vaddr) {
  3952. err = -ENOMEM;
  3953. goto err_out_free_res;
  3954. }
  3955. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3956. if (err)
  3957. goto err_out_free_res;
  3958. err = hpsa_find_cfgtables(h);
  3959. if (err)
  3960. goto err_out_free_res;
  3961. hpsa_find_board_params(h);
  3962. if (!hpsa_CISS_signature_present(h)) {
  3963. err = -ENODEV;
  3964. goto err_out_free_res;
  3965. }
  3966. hpsa_enable_scsi_prefetch(h);
  3967. hpsa_p600_dma_prefetch_quirk(h);
  3968. err = hpsa_enter_simple_mode(h);
  3969. if (err)
  3970. goto err_out_free_res;
  3971. return 0;
  3972. err_out_free_res:
  3973. if (h->transtable)
  3974. iounmap(h->transtable);
  3975. if (h->cfgtable)
  3976. iounmap(h->cfgtable);
  3977. if (h->vaddr)
  3978. iounmap(h->vaddr);
  3979. pci_disable_device(h->pdev);
  3980. pci_release_regions(h->pdev);
  3981. return err;
  3982. }
  3983. static void hpsa_hba_inquiry(struct ctlr_info *h)
  3984. {
  3985. int rc;
  3986. #define HBA_INQUIRY_BYTE_COUNT 64
  3987. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3988. if (!h->hba_inquiry_data)
  3989. return;
  3990. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3991. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3992. if (rc != 0) {
  3993. kfree(h->hba_inquiry_data);
  3994. h->hba_inquiry_data = NULL;
  3995. }
  3996. }
  3997. static int hpsa_init_reset_devices(struct pci_dev *pdev)
  3998. {
  3999. int rc, i;
  4000. if (!reset_devices)
  4001. return 0;
  4002. /* Reset the controller with a PCI power-cycle or via doorbell */
  4003. rc = hpsa_kdump_hard_reset_controller(pdev);
  4004. /* -ENOTSUPP here means we cannot reset the controller
  4005. * but it's already (and still) up and running in
  4006. * "performant mode". Or, it might be 640x, which can't reset
  4007. * due to concerns about shared bbwc between 6402/6404 pair.
  4008. */
  4009. if (rc == -ENOTSUPP)
  4010. return rc; /* just try to do the kdump anyhow. */
  4011. if (rc)
  4012. return -ENODEV;
  4013. /* Now try to get the controller to respond to a no-op */
  4014. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  4015. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  4016. if (hpsa_noop(pdev) == 0)
  4017. break;
  4018. else
  4019. dev_warn(&pdev->dev, "no-op failed%s\n",
  4020. (i < 11 ? "; re-trying" : ""));
  4021. }
  4022. return 0;
  4023. }
  4024. static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  4025. {
  4026. h->cmd_pool_bits = kzalloc(
  4027. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  4028. sizeof(unsigned long), GFP_KERNEL);
  4029. h->cmd_pool = pci_alloc_consistent(h->pdev,
  4030. h->nr_cmds * sizeof(*h->cmd_pool),
  4031. &(h->cmd_pool_dhandle));
  4032. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  4033. h->nr_cmds * sizeof(*h->errinfo_pool),
  4034. &(h->errinfo_pool_dhandle));
  4035. if ((h->cmd_pool_bits == NULL)
  4036. || (h->cmd_pool == NULL)
  4037. || (h->errinfo_pool == NULL)) {
  4038. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  4039. return -ENOMEM;
  4040. }
  4041. return 0;
  4042. }
  4043. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  4044. {
  4045. kfree(h->cmd_pool_bits);
  4046. if (h->cmd_pool)
  4047. pci_free_consistent(h->pdev,
  4048. h->nr_cmds * sizeof(struct CommandList),
  4049. h->cmd_pool, h->cmd_pool_dhandle);
  4050. if (h->errinfo_pool)
  4051. pci_free_consistent(h->pdev,
  4052. h->nr_cmds * sizeof(struct ErrorInfo),
  4053. h->errinfo_pool,
  4054. h->errinfo_pool_dhandle);
  4055. }
  4056. static int hpsa_request_irq(struct ctlr_info *h,
  4057. irqreturn_t (*msixhandler)(int, void *),
  4058. irqreturn_t (*intxhandler)(int, void *))
  4059. {
  4060. int rc, i;
  4061. /*
  4062. * initialize h->q[x] = x so that interrupt handlers know which
  4063. * queue to process.
  4064. */
  4065. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4066. h->q[i] = (u8) i;
  4067. if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
  4068. /* If performant mode and MSI-X, use multiple reply queues */
  4069. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4070. rc = request_irq(h->intr[i], msixhandler,
  4071. 0, h->devname,
  4072. &h->q[i]);
  4073. } else {
  4074. /* Use single reply pool */
  4075. if (h->msix_vector || h->msi_vector) {
  4076. rc = request_irq(h->intr[h->intr_mode],
  4077. msixhandler, 0, h->devname,
  4078. &h->q[h->intr_mode]);
  4079. } else {
  4080. rc = request_irq(h->intr[h->intr_mode],
  4081. intxhandler, IRQF_SHARED, h->devname,
  4082. &h->q[h->intr_mode]);
  4083. }
  4084. }
  4085. if (rc) {
  4086. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  4087. h->intr[h->intr_mode], h->devname);
  4088. return -ENODEV;
  4089. }
  4090. return 0;
  4091. }
  4092. static int hpsa_kdump_soft_reset(struct ctlr_info *h)
  4093. {
  4094. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  4095. HPSA_RESET_TYPE_CONTROLLER)) {
  4096. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  4097. return -EIO;
  4098. }
  4099. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  4100. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  4101. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  4102. return -1;
  4103. }
  4104. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  4105. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  4106. dev_warn(&h->pdev->dev, "Board failed to become ready "
  4107. "after soft reset.\n");
  4108. return -1;
  4109. }
  4110. return 0;
  4111. }
  4112. static void free_irqs(struct ctlr_info *h)
  4113. {
  4114. int i;
  4115. if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
  4116. /* Single reply queue, only one irq to free */
  4117. i = h->intr_mode;
  4118. free_irq(h->intr[i], &h->q[i]);
  4119. return;
  4120. }
  4121. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4122. free_irq(h->intr[i], &h->q[i]);
  4123. }
  4124. static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
  4125. {
  4126. free_irqs(h);
  4127. #ifdef CONFIG_PCI_MSI
  4128. if (h->msix_vector) {
  4129. if (h->pdev->msix_enabled)
  4130. pci_disable_msix(h->pdev);
  4131. } else if (h->msi_vector) {
  4132. if (h->pdev->msi_enabled)
  4133. pci_disable_msi(h->pdev);
  4134. }
  4135. #endif /* CONFIG_PCI_MSI */
  4136. }
  4137. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  4138. {
  4139. hpsa_free_irqs_and_disable_msix(h);
  4140. hpsa_free_sg_chain_blocks(h);
  4141. hpsa_free_cmd_pool(h);
  4142. kfree(h->blockFetchTable);
  4143. pci_free_consistent(h->pdev, h->reply_pool_size,
  4144. h->reply_pool, h->reply_pool_dhandle);
  4145. if (h->vaddr)
  4146. iounmap(h->vaddr);
  4147. if (h->transtable)
  4148. iounmap(h->transtable);
  4149. if (h->cfgtable)
  4150. iounmap(h->cfgtable);
  4151. pci_release_regions(h->pdev);
  4152. kfree(h);
  4153. }
  4154. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  4155. {
  4156. assert_spin_locked(&lockup_detector_lock);
  4157. if (!hpsa_lockup_detector)
  4158. return;
  4159. if (h->lockup_detected)
  4160. return; /* already stopped the lockup detector */
  4161. list_del(&h->lockup_list);
  4162. }
  4163. /* Called when controller lockup detected. */
  4164. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  4165. {
  4166. struct CommandList *c = NULL;
  4167. assert_spin_locked(&h->lock);
  4168. /* Mark all outstanding commands as failed and complete them. */
  4169. while (!list_empty(list)) {
  4170. c = list_entry(list->next, struct CommandList, list);
  4171. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  4172. finish_cmd(c);
  4173. }
  4174. }
  4175. static void controller_lockup_detected(struct ctlr_info *h)
  4176. {
  4177. unsigned long flags;
  4178. assert_spin_locked(&lockup_detector_lock);
  4179. remove_ctlr_from_lockup_detector_list(h);
  4180. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4181. spin_lock_irqsave(&h->lock, flags);
  4182. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  4183. spin_unlock_irqrestore(&h->lock, flags);
  4184. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  4185. h->lockup_detected);
  4186. pci_disable_device(h->pdev);
  4187. spin_lock_irqsave(&h->lock, flags);
  4188. fail_all_cmds_on_list(h, &h->cmpQ);
  4189. fail_all_cmds_on_list(h, &h->reqQ);
  4190. spin_unlock_irqrestore(&h->lock, flags);
  4191. }
  4192. static void detect_controller_lockup(struct ctlr_info *h)
  4193. {
  4194. u64 now;
  4195. u32 heartbeat;
  4196. unsigned long flags;
  4197. assert_spin_locked(&lockup_detector_lock);
  4198. now = get_jiffies_64();
  4199. /* If we've received an interrupt recently, we're ok. */
  4200. if (time_after64(h->last_intr_timestamp +
  4201. (h->heartbeat_sample_interval), now))
  4202. return;
  4203. /*
  4204. * If we've already checked the heartbeat recently, we're ok.
  4205. * This could happen if someone sends us a signal. We
  4206. * otherwise don't care about signals in this thread.
  4207. */
  4208. if (time_after64(h->last_heartbeat_timestamp +
  4209. (h->heartbeat_sample_interval), now))
  4210. return;
  4211. /* If heartbeat has not changed since we last looked, we're not ok. */
  4212. spin_lock_irqsave(&h->lock, flags);
  4213. heartbeat = readl(&h->cfgtable->HeartBeat);
  4214. spin_unlock_irqrestore(&h->lock, flags);
  4215. if (h->last_heartbeat == heartbeat) {
  4216. controller_lockup_detected(h);
  4217. return;
  4218. }
  4219. /* We're ok. */
  4220. h->last_heartbeat = heartbeat;
  4221. h->last_heartbeat_timestamp = now;
  4222. }
  4223. static int detect_controller_lockup_thread(void *notused)
  4224. {
  4225. struct ctlr_info *h;
  4226. unsigned long flags;
  4227. while (1) {
  4228. struct list_head *this, *tmp;
  4229. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  4230. if (kthread_should_stop())
  4231. break;
  4232. spin_lock_irqsave(&lockup_detector_lock, flags);
  4233. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  4234. h = list_entry(this, struct ctlr_info, lockup_list);
  4235. detect_controller_lockup(h);
  4236. }
  4237. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4238. }
  4239. return 0;
  4240. }
  4241. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  4242. {
  4243. unsigned long flags;
  4244. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  4245. spin_lock_irqsave(&lockup_detector_lock, flags);
  4246. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  4247. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4248. }
  4249. static void start_controller_lockup_detector(struct ctlr_info *h)
  4250. {
  4251. /* Start the lockup detector thread if not already started */
  4252. if (!hpsa_lockup_detector) {
  4253. spin_lock_init(&lockup_detector_lock);
  4254. hpsa_lockup_detector =
  4255. kthread_run(detect_controller_lockup_thread,
  4256. NULL, HPSA);
  4257. }
  4258. if (!hpsa_lockup_detector) {
  4259. dev_warn(&h->pdev->dev,
  4260. "Could not start lockup detector thread\n");
  4261. return;
  4262. }
  4263. add_ctlr_to_lockup_detector_list(h);
  4264. }
  4265. static void stop_controller_lockup_detector(struct ctlr_info *h)
  4266. {
  4267. unsigned long flags;
  4268. spin_lock_irqsave(&lockup_detector_lock, flags);
  4269. remove_ctlr_from_lockup_detector_list(h);
  4270. /* If the list of ctlr's to monitor is empty, stop the thread */
  4271. if (list_empty(&hpsa_ctlr_list)) {
  4272. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4273. kthread_stop(hpsa_lockup_detector);
  4274. spin_lock_irqsave(&lockup_detector_lock, flags);
  4275. hpsa_lockup_detector = NULL;
  4276. }
  4277. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4278. }
  4279. static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  4280. {
  4281. int dac, rc;
  4282. struct ctlr_info *h;
  4283. int try_soft_reset = 0;
  4284. unsigned long flags;
  4285. if (number_of_controllers == 0)
  4286. printk(KERN_INFO DRIVER_NAME "\n");
  4287. rc = hpsa_init_reset_devices(pdev);
  4288. if (rc) {
  4289. if (rc != -ENOTSUPP)
  4290. return rc;
  4291. /* If the reset fails in a particular way (it has no way to do
  4292. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  4293. * a soft reset once we get the controller configured up to the
  4294. * point that it can accept a command.
  4295. */
  4296. try_soft_reset = 1;
  4297. rc = 0;
  4298. }
  4299. reinit_after_soft_reset:
  4300. /* Command structures must be aligned on a 32-byte boundary because
  4301. * the 5 lower bits of the address are used by the hardware. and by
  4302. * the driver. See comments in hpsa.h for more info.
  4303. */
  4304. #define COMMANDLIST_ALIGNMENT 32
  4305. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  4306. h = kzalloc(sizeof(*h), GFP_KERNEL);
  4307. if (!h)
  4308. return -ENOMEM;
  4309. h->pdev = pdev;
  4310. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  4311. INIT_LIST_HEAD(&h->cmpQ);
  4312. INIT_LIST_HEAD(&h->reqQ);
  4313. spin_lock_init(&h->lock);
  4314. spin_lock_init(&h->scan_lock);
  4315. rc = hpsa_pci_init(h);
  4316. if (rc != 0)
  4317. goto clean1;
  4318. sprintf(h->devname, HPSA "%d", number_of_controllers);
  4319. h->ctlr = number_of_controllers;
  4320. number_of_controllers++;
  4321. /* configure PCI DMA stuff */
  4322. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  4323. if (rc == 0) {
  4324. dac = 1;
  4325. } else {
  4326. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4327. if (rc == 0) {
  4328. dac = 0;
  4329. } else {
  4330. dev_err(&pdev->dev, "no suitable DMA available\n");
  4331. goto clean1;
  4332. }
  4333. }
  4334. /* make sure the board interrupts are off */
  4335. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4336. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  4337. goto clean2;
  4338. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  4339. h->devname, pdev->device,
  4340. h->intr[h->intr_mode], dac ? "" : " not");
  4341. if (hpsa_allocate_cmd_pool(h))
  4342. goto clean4;
  4343. if (hpsa_allocate_sg_chain_blocks(h))
  4344. goto clean4;
  4345. init_waitqueue_head(&h->scan_wait_queue);
  4346. h->scan_finished = 1; /* no scan currently in progress */
  4347. pci_set_drvdata(pdev, h);
  4348. h->ndevices = 0;
  4349. h->scsi_host = NULL;
  4350. spin_lock_init(&h->devlock);
  4351. hpsa_put_ctlr_into_performant_mode(h);
  4352. /* At this point, the controller is ready to take commands.
  4353. * Now, if reset_devices and the hard reset didn't work, try
  4354. * the soft reset and see if that works.
  4355. */
  4356. if (try_soft_reset) {
  4357. /* This is kind of gross. We may or may not get a completion
  4358. * from the soft reset command, and if we do, then the value
  4359. * from the fifo may or may not be valid. So, we wait 10 secs
  4360. * after the reset throwing away any completions we get during
  4361. * that time. Unregister the interrupt handler and register
  4362. * fake ones to scoop up any residual completions.
  4363. */
  4364. spin_lock_irqsave(&h->lock, flags);
  4365. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4366. spin_unlock_irqrestore(&h->lock, flags);
  4367. free_irqs(h);
  4368. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  4369. hpsa_intx_discard_completions);
  4370. if (rc) {
  4371. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  4372. "soft reset.\n");
  4373. goto clean4;
  4374. }
  4375. rc = hpsa_kdump_soft_reset(h);
  4376. if (rc)
  4377. /* Neither hard nor soft reset worked, we're hosed. */
  4378. goto clean4;
  4379. dev_info(&h->pdev->dev, "Board READY.\n");
  4380. dev_info(&h->pdev->dev,
  4381. "Waiting for stale completions to drain.\n");
  4382. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4383. msleep(10000);
  4384. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4385. rc = controller_reset_failed(h->cfgtable);
  4386. if (rc)
  4387. dev_info(&h->pdev->dev,
  4388. "Soft reset appears to have failed.\n");
  4389. /* since the controller's reset, we have to go back and re-init
  4390. * everything. Easiest to just forget what we've done and do it
  4391. * all over again.
  4392. */
  4393. hpsa_undo_allocations_after_kdump_soft_reset(h);
  4394. try_soft_reset = 0;
  4395. if (rc)
  4396. /* don't go to clean4, we already unallocated */
  4397. return -ENODEV;
  4398. goto reinit_after_soft_reset;
  4399. }
  4400. /* Turn the interrupts on so we can service requests */
  4401. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4402. hpsa_hba_inquiry(h);
  4403. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  4404. start_controller_lockup_detector(h);
  4405. return 1;
  4406. clean4:
  4407. hpsa_free_sg_chain_blocks(h);
  4408. hpsa_free_cmd_pool(h);
  4409. free_irqs(h);
  4410. clean2:
  4411. clean1:
  4412. kfree(h);
  4413. return rc;
  4414. }
  4415. static void hpsa_flush_cache(struct ctlr_info *h)
  4416. {
  4417. char *flush_buf;
  4418. struct CommandList *c;
  4419. flush_buf = kzalloc(4, GFP_KERNEL);
  4420. if (!flush_buf)
  4421. return;
  4422. c = cmd_special_alloc(h);
  4423. if (!c) {
  4424. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  4425. goto out_of_memory;
  4426. }
  4427. if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  4428. RAID_CTLR_LUNID, TYPE_CMD)) {
  4429. goto out;
  4430. }
  4431. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  4432. if (c->err_info->CommandStatus != 0)
  4433. out:
  4434. dev_warn(&h->pdev->dev,
  4435. "error flushing cache on controller\n");
  4436. cmd_special_free(h, c);
  4437. out_of_memory:
  4438. kfree(flush_buf);
  4439. }
  4440. static void hpsa_shutdown(struct pci_dev *pdev)
  4441. {
  4442. struct ctlr_info *h;
  4443. h = pci_get_drvdata(pdev);
  4444. /* Turn board interrupts off and send the flush cache command
  4445. * sendcmd will turn off interrupt, and send the flush...
  4446. * To write all data in the battery backed cache to disks
  4447. */
  4448. hpsa_flush_cache(h);
  4449. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4450. hpsa_free_irqs_and_disable_msix(h);
  4451. }
  4452. static void hpsa_free_device_info(struct ctlr_info *h)
  4453. {
  4454. int i;
  4455. for (i = 0; i < h->ndevices; i++)
  4456. kfree(h->dev[i]);
  4457. }
  4458. static void hpsa_remove_one(struct pci_dev *pdev)
  4459. {
  4460. struct ctlr_info *h;
  4461. if (pci_get_drvdata(pdev) == NULL) {
  4462. dev_err(&pdev->dev, "unable to remove device\n");
  4463. return;
  4464. }
  4465. h = pci_get_drvdata(pdev);
  4466. stop_controller_lockup_detector(h);
  4467. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4468. hpsa_shutdown(pdev);
  4469. iounmap(h->vaddr);
  4470. iounmap(h->transtable);
  4471. iounmap(h->cfgtable);
  4472. hpsa_free_device_info(h);
  4473. hpsa_free_sg_chain_blocks(h);
  4474. pci_free_consistent(h->pdev,
  4475. h->nr_cmds * sizeof(struct CommandList),
  4476. h->cmd_pool, h->cmd_pool_dhandle);
  4477. pci_free_consistent(h->pdev,
  4478. h->nr_cmds * sizeof(struct ErrorInfo),
  4479. h->errinfo_pool, h->errinfo_pool_dhandle);
  4480. pci_free_consistent(h->pdev, h->reply_pool_size,
  4481. h->reply_pool, h->reply_pool_dhandle);
  4482. kfree(h->cmd_pool_bits);
  4483. kfree(h->blockFetchTable);
  4484. kfree(h->hba_inquiry_data);
  4485. pci_disable_device(pdev);
  4486. pci_release_regions(pdev);
  4487. pci_set_drvdata(pdev, NULL);
  4488. kfree(h);
  4489. }
  4490. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4491. __attribute__((unused)) pm_message_t state)
  4492. {
  4493. return -ENOSYS;
  4494. }
  4495. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4496. {
  4497. return -ENOSYS;
  4498. }
  4499. static struct pci_driver hpsa_pci_driver = {
  4500. .name = HPSA,
  4501. .probe = hpsa_init_one,
  4502. .remove = hpsa_remove_one,
  4503. .id_table = hpsa_pci_device_id, /* id_table */
  4504. .shutdown = hpsa_shutdown,
  4505. .suspend = hpsa_suspend,
  4506. .resume = hpsa_resume,
  4507. };
  4508. /* Fill in bucket_map[], given nsgs (the max number of
  4509. * scatter gather elements supported) and bucket[],
  4510. * which is an array of 8 integers. The bucket[] array
  4511. * contains 8 different DMA transfer sizes (in 16
  4512. * byte increments) which the controller uses to fetch
  4513. * commands. This function fills in bucket_map[], which
  4514. * maps a given number of scatter gather elements to one of
  4515. * the 8 DMA transfer sizes. The point of it is to allow the
  4516. * controller to only do as much DMA as needed to fetch the
  4517. * command, with the DMA transfer size encoded in the lower
  4518. * bits of the command address.
  4519. */
  4520. static void calc_bucket_map(int bucket[], int num_buckets,
  4521. int nsgs, int *bucket_map)
  4522. {
  4523. int i, j, b, size;
  4524. /* even a command with 0 SGs requires 4 blocks */
  4525. #define MINIMUM_TRANSFER_BLOCKS 4
  4526. #define NUM_BUCKETS 8
  4527. /* Note, bucket_map must have nsgs+1 entries. */
  4528. for (i = 0; i <= nsgs; i++) {
  4529. /* Compute size of a command with i SG entries */
  4530. size = i + MINIMUM_TRANSFER_BLOCKS;
  4531. b = num_buckets; /* Assume the biggest bucket */
  4532. /* Find the bucket that is just big enough */
  4533. for (j = 0; j < 8; j++) {
  4534. if (bucket[j] >= size) {
  4535. b = j;
  4536. break;
  4537. }
  4538. }
  4539. /* for a command with i SG entries, use bucket b. */
  4540. bucket_map[i] = b;
  4541. }
  4542. }
  4543. static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
  4544. {
  4545. int i;
  4546. unsigned long register_value;
  4547. /* This is a bit complicated. There are 8 registers on
  4548. * the controller which we write to to tell it 8 different
  4549. * sizes of commands which there may be. It's a way of
  4550. * reducing the DMA done to fetch each command. Encoded into
  4551. * each command's tag are 3 bits which communicate to the controller
  4552. * which of the eight sizes that command fits within. The size of
  4553. * each command depends on how many scatter gather entries there are.
  4554. * Each SG entry requires 16 bytes. The eight registers are programmed
  4555. * with the number of 16-byte blocks a command of that size requires.
  4556. * The smallest command possible requires 5 such 16 byte blocks.
  4557. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4558. * blocks. Note, this only extends to the SG entries contained
  4559. * within the command block, and does not extend to chained blocks
  4560. * of SG elements. bft[] contains the eight values we write to
  4561. * the registers. They are not evenly distributed, but have more
  4562. * sizes for small commands, and fewer sizes for larger commands.
  4563. */
  4564. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4565. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4566. /* 5 = 1 s/g entry or 4k
  4567. * 6 = 2 s/g entry or 8k
  4568. * 8 = 4 s/g entry or 16k
  4569. * 10 = 6 s/g entry or 24k
  4570. */
  4571. /* Controller spec: zero out this buffer. */
  4572. memset(h->reply_pool, 0, h->reply_pool_size);
  4573. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4574. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4575. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4576. for (i = 0; i < 8; i++)
  4577. writel(bft[i], &h->transtable->BlockFetch[i]);
  4578. /* size of controller ring buffer */
  4579. writel(h->max_commands, &h->transtable->RepQSize);
  4580. writel(h->nreply_queues, &h->transtable->RepQCount);
  4581. writel(0, &h->transtable->RepQCtrAddrLow32);
  4582. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4583. for (i = 0; i < h->nreply_queues; i++) {
  4584. writel(0, &h->transtable->RepQAddr[i].upper);
  4585. writel(h->reply_pool_dhandle +
  4586. (h->max_commands * sizeof(u64) * i),
  4587. &h->transtable->RepQAddr[i].lower);
  4588. }
  4589. writel(CFGTBL_Trans_Performant | use_short_tags |
  4590. CFGTBL_Trans_enable_directed_msix,
  4591. &(h->cfgtable->HostWrite.TransportRequest));
  4592. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4593. hpsa_wait_for_mode_change_ack(h);
  4594. register_value = readl(&(h->cfgtable->TransportActive));
  4595. if (!(register_value & CFGTBL_Trans_Performant)) {
  4596. dev_warn(&h->pdev->dev, "unable to get board into"
  4597. " performant mode\n");
  4598. return;
  4599. }
  4600. /* Change the access methods to the performant access methods */
  4601. h->access = SA5_performant_access;
  4602. h->transMethod = CFGTBL_Trans_Performant;
  4603. }
  4604. static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4605. {
  4606. u32 trans_support;
  4607. int i;
  4608. if (hpsa_simple_mode)
  4609. return;
  4610. trans_support = readl(&(h->cfgtable->TransportSupport));
  4611. if (!(trans_support & PERFORMANT_MODE))
  4612. return;
  4613. h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
  4614. hpsa_get_max_perf_mode_cmds(h);
  4615. /* Performant mode ring buffer and supporting data structures */
  4616. h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
  4617. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4618. &(h->reply_pool_dhandle));
  4619. for (i = 0; i < h->nreply_queues; i++) {
  4620. h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
  4621. h->reply_queue[i].size = h->max_commands;
  4622. h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
  4623. h->reply_queue[i].current_entry = 0;
  4624. }
  4625. /* Need a block fetch table for performant mode */
  4626. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4627. sizeof(u32)), GFP_KERNEL);
  4628. if ((h->reply_pool == NULL)
  4629. || (h->blockFetchTable == NULL))
  4630. goto clean_up;
  4631. hpsa_enter_performant_mode(h,
  4632. trans_support & CFGTBL_Trans_use_short_tags);
  4633. return;
  4634. clean_up:
  4635. if (h->reply_pool)
  4636. pci_free_consistent(h->pdev, h->reply_pool_size,
  4637. h->reply_pool, h->reply_pool_dhandle);
  4638. kfree(h->blockFetchTable);
  4639. }
  4640. /*
  4641. * This is it. Register the PCI driver information for the cards we control
  4642. * the OS will call our registered routines when it finds one of our cards.
  4643. */
  4644. static int __init hpsa_init(void)
  4645. {
  4646. return pci_register_driver(&hpsa_pci_driver);
  4647. }
  4648. static void __exit hpsa_cleanup(void)
  4649. {
  4650. pci_unregister_driver(&hpsa_pci_driver);
  4651. }
  4652. module_init(hpsa_init);
  4653. module_exit(hpsa_cleanup);