dma-default.c 8.4 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
  7. * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
  8. * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/mm.h>
  13. #include <linux/module.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/string.h>
  16. #include <asm/cache.h>
  17. #include <asm/io.h>
  18. #include <dma-coherence.h>
  19. static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
  20. {
  21. unsigned long addr = plat_dma_addr_to_phys(dma_addr);
  22. return (unsigned long)phys_to_virt(addr);
  23. }
  24. /*
  25. * Warning on the terminology - Linux calls an uncached area coherent;
  26. * MIPS terminology calls memory areas with hardware maintained coherency
  27. * coherent.
  28. */
  29. static inline int cpu_is_noncoherent_r10000(struct device *dev)
  30. {
  31. return !plat_device_is_coherent(dev) &&
  32. (current_cpu_type() == CPU_R10000 ||
  33. current_cpu_type() == CPU_R12000);
  34. }
  35. void *dma_alloc_noncoherent(struct device *dev, size_t size,
  36. dma_addr_t * dma_handle, gfp_t gfp)
  37. {
  38. void *ret;
  39. /* ignore region specifiers */
  40. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  41. if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
  42. gfp |= GFP_DMA;
  43. ret = (void *) __get_free_pages(gfp, get_order(size));
  44. if (ret != NULL) {
  45. memset(ret, 0, size);
  46. *dma_handle = plat_map_dma_mem(dev, ret, size);
  47. }
  48. return ret;
  49. }
  50. EXPORT_SYMBOL(dma_alloc_noncoherent);
  51. void *dma_alloc_coherent(struct device *dev, size_t size,
  52. dma_addr_t * dma_handle, gfp_t gfp)
  53. {
  54. void *ret;
  55. /* ignore region specifiers */
  56. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  57. if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
  58. gfp |= GFP_DMA;
  59. ret = (void *) __get_free_pages(gfp, get_order(size));
  60. if (ret) {
  61. memset(ret, 0, size);
  62. *dma_handle = plat_map_dma_mem(dev, ret, size);
  63. if (!plat_device_is_coherent(dev)) {
  64. dma_cache_wback_inv((unsigned long) ret, size);
  65. ret = UNCAC_ADDR(ret);
  66. }
  67. }
  68. return ret;
  69. }
  70. EXPORT_SYMBOL(dma_alloc_coherent);
  71. void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
  72. dma_addr_t dma_handle)
  73. {
  74. free_pages((unsigned long) vaddr, get_order(size));
  75. }
  76. EXPORT_SYMBOL(dma_free_noncoherent);
  77. void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  78. dma_addr_t dma_handle)
  79. {
  80. unsigned long addr = (unsigned long) vaddr;
  81. if (!plat_device_is_coherent(dev))
  82. addr = CAC_ADDR(addr);
  83. free_pages(addr, get_order(size));
  84. }
  85. EXPORT_SYMBOL(dma_free_coherent);
  86. static inline void __dma_sync(unsigned long addr, size_t size,
  87. enum dma_data_direction direction)
  88. {
  89. switch (direction) {
  90. case DMA_TO_DEVICE:
  91. dma_cache_wback(addr, size);
  92. break;
  93. case DMA_FROM_DEVICE:
  94. dma_cache_inv(addr, size);
  95. break;
  96. case DMA_BIDIRECTIONAL:
  97. dma_cache_wback_inv(addr, size);
  98. break;
  99. default:
  100. BUG();
  101. }
  102. }
  103. dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
  104. enum dma_data_direction direction)
  105. {
  106. unsigned long addr = (unsigned long) ptr;
  107. if (!plat_device_is_coherent(dev))
  108. __dma_sync(addr, size, direction);
  109. return plat_map_dma_mem(dev, ptr, size);
  110. }
  111. EXPORT_SYMBOL(dma_map_single);
  112. void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  113. enum dma_data_direction direction)
  114. {
  115. if (cpu_is_noncoherent_r10000(dev))
  116. __dma_sync(dma_addr_to_virt(dma_addr), size,
  117. direction);
  118. plat_unmap_dma_mem(dma_addr);
  119. }
  120. EXPORT_SYMBOL(dma_unmap_single);
  121. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  122. enum dma_data_direction direction)
  123. {
  124. int i;
  125. BUG_ON(direction == DMA_NONE);
  126. for (i = 0; i < nents; i++, sg++) {
  127. unsigned long addr;
  128. addr = (unsigned long) sg_virt(sg);
  129. if (!plat_device_is_coherent(dev) && addr)
  130. __dma_sync(addr, sg->length, direction);
  131. sg->dma_address = plat_map_dma_mem(dev,
  132. (void *)addr, sg->length);
  133. }
  134. return nents;
  135. }
  136. EXPORT_SYMBOL(dma_map_sg);
  137. dma_addr_t dma_map_page(struct device *dev, struct page *page,
  138. unsigned long offset, size_t size, enum dma_data_direction direction)
  139. {
  140. BUG_ON(direction == DMA_NONE);
  141. if (!plat_device_is_coherent(dev)) {
  142. unsigned long addr;
  143. addr = (unsigned long) page_address(page) + offset;
  144. dma_cache_wback_inv(addr, size);
  145. }
  146. return plat_map_dma_mem_page(dev, page) + offset;
  147. }
  148. EXPORT_SYMBOL(dma_map_page);
  149. void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  150. enum dma_data_direction direction)
  151. {
  152. BUG_ON(direction == DMA_NONE);
  153. if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
  154. unsigned long addr;
  155. addr = plat_dma_addr_to_phys(dma_address);
  156. dma_cache_wback_inv(addr, size);
  157. }
  158. plat_unmap_dma_mem(dma_address);
  159. }
  160. EXPORT_SYMBOL(dma_unmap_page);
  161. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
  162. enum dma_data_direction direction)
  163. {
  164. unsigned long addr;
  165. int i;
  166. BUG_ON(direction == DMA_NONE);
  167. for (i = 0; i < nhwentries; i++, sg++) {
  168. if (!plat_device_is_coherent(dev) &&
  169. direction != DMA_TO_DEVICE) {
  170. addr = (unsigned long) sg_virt(sg);
  171. if (addr)
  172. __dma_sync(addr, sg->length, direction);
  173. }
  174. plat_unmap_dma_mem(sg->dma_address);
  175. }
  176. }
  177. EXPORT_SYMBOL(dma_unmap_sg);
  178. void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
  179. size_t size, enum dma_data_direction direction)
  180. {
  181. BUG_ON(direction == DMA_NONE);
  182. if (cpu_is_noncoherent_r10000(dev)) {
  183. unsigned long addr;
  184. addr = dma_addr_to_virt(dma_handle);
  185. __dma_sync(addr, size, direction);
  186. }
  187. }
  188. EXPORT_SYMBOL(dma_sync_single_for_cpu);
  189. void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
  190. size_t size, enum dma_data_direction direction)
  191. {
  192. BUG_ON(direction == DMA_NONE);
  193. if (!plat_device_is_coherent(dev)) {
  194. unsigned long addr;
  195. addr = dma_addr_to_virt(dma_handle);
  196. __dma_sync(addr, size, direction);
  197. }
  198. }
  199. EXPORT_SYMBOL(dma_sync_single_for_device);
  200. void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
  201. unsigned long offset, size_t size, enum dma_data_direction direction)
  202. {
  203. BUG_ON(direction == DMA_NONE);
  204. if (cpu_is_noncoherent_r10000(dev)) {
  205. unsigned long addr;
  206. addr = dma_addr_to_virt(dma_handle);
  207. __dma_sync(addr + offset, size, direction);
  208. }
  209. }
  210. EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
  211. void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
  212. unsigned long offset, size_t size, enum dma_data_direction direction)
  213. {
  214. BUG_ON(direction == DMA_NONE);
  215. if (!plat_device_is_coherent(dev)) {
  216. unsigned long addr;
  217. addr = dma_addr_to_virt(dma_handle);
  218. __dma_sync(addr + offset, size, direction);
  219. }
  220. }
  221. EXPORT_SYMBOL(dma_sync_single_range_for_device);
  222. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  223. enum dma_data_direction direction)
  224. {
  225. int i;
  226. BUG_ON(direction == DMA_NONE);
  227. /* Make sure that gcc doesn't leave the empty loop body. */
  228. for (i = 0; i < nelems; i++, sg++) {
  229. if (cpu_is_noncoherent_r10000(dev))
  230. __dma_sync((unsigned long)page_address(sg_page(sg)),
  231. sg->length, direction);
  232. plat_unmap_dma_mem(sg->dma_address);
  233. }
  234. }
  235. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  236. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  237. enum dma_data_direction direction)
  238. {
  239. int i;
  240. BUG_ON(direction == DMA_NONE);
  241. /* Make sure that gcc doesn't leave the empty loop body. */
  242. for (i = 0; i < nelems; i++, sg++) {
  243. if (!plat_device_is_coherent(dev))
  244. __dma_sync((unsigned long)page_address(sg_page(sg)),
  245. sg->length, direction);
  246. plat_unmap_dma_mem(sg->dma_address);
  247. }
  248. }
  249. EXPORT_SYMBOL(dma_sync_sg_for_device);
  250. int dma_mapping_error(dma_addr_t dma_addr)
  251. {
  252. return 0;
  253. }
  254. EXPORT_SYMBOL(dma_mapping_error);
  255. int dma_supported(struct device *dev, u64 mask)
  256. {
  257. /*
  258. * we fall back to GFP_DMA when the mask isn't all 1s,
  259. * so we can't guarantee allocations that must be
  260. * within a tighter range than GFP_DMA..
  261. */
  262. if (mask < 0x00ffffff)
  263. return 0;
  264. return 1;
  265. }
  266. EXPORT_SYMBOL(dma_supported);
  267. int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
  268. {
  269. return plat_device_is_coherent(dev);
  270. }
  271. EXPORT_SYMBOL(dma_is_consistent);
  272. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  273. enum dma_data_direction direction)
  274. {
  275. BUG_ON(direction == DMA_NONE);
  276. if (!plat_device_is_coherent(dev))
  277. dma_cache_wback_inv((unsigned long)vaddr, size);
  278. }
  279. EXPORT_SYMBOL(dma_cache_sync);