synclink_cs.c 114 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504
  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/slab.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/vmalloc.h>
  54. #include <linux/init.h>
  55. #include <linux/delay.h>
  56. #include <linux/ioctl.h>
  57. #include <linux/synclink.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  73. #define SYNCLINK_GENERIC_HDLC 1
  74. #else
  75. #define SYNCLINK_GENERIC_HDLC 0
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. static MGSL_PARAMS default_params = {
  83. MGSL_MODE_HDLC, /* unsigned long mode */
  84. 0, /* unsigned char loopback; */
  85. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  86. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  87. 0, /* unsigned long clock_speed; */
  88. 0xff, /* unsigned char addr_filter; */
  89. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  90. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  91. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  92. 9600, /* unsigned long data_rate; */
  93. 8, /* unsigned char data_bits; */
  94. 1, /* unsigned char stop_bits; */
  95. ASYNC_PARITY_NONE /* unsigned char parity; */
  96. };
  97. typedef struct
  98. {
  99. int count;
  100. unsigned char status;
  101. char data[1];
  102. } RXBUF;
  103. /* The queue of BH actions to be performed */
  104. #define BH_RECEIVE 1
  105. #define BH_TRANSMIT 2
  106. #define BH_STATUS 4
  107. #define IO_PIN_SHUTDOWN_LIMIT 100
  108. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  109. struct _input_signal_events {
  110. int ri_up;
  111. int ri_down;
  112. int dsr_up;
  113. int dsr_down;
  114. int dcd_up;
  115. int dcd_down;
  116. int cts_up;
  117. int cts_down;
  118. };
  119. /*
  120. * Device instance data structure
  121. */
  122. typedef struct _mgslpc_info {
  123. void *if_ptr; /* General purpose pointer (used by SPPP) */
  124. int magic;
  125. int flags;
  126. int count; /* count of opens */
  127. int line;
  128. unsigned short close_delay;
  129. unsigned short closing_wait; /* time to wait before closing */
  130. struct mgsl_icount icount;
  131. struct tty_struct *tty;
  132. int timeout;
  133. int x_char; /* xon/xoff character */
  134. int blocked_open; /* # of blocked opens */
  135. unsigned char read_status_mask;
  136. unsigned char ignore_status_mask;
  137. unsigned char *tx_buf;
  138. int tx_put;
  139. int tx_get;
  140. int tx_count;
  141. /* circular list of fixed length rx buffers */
  142. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  143. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  144. int rx_put; /* index of next empty rx buffer */
  145. int rx_get; /* index of next full rx buffer */
  146. int rx_buf_size; /* size in bytes of single rx buffer */
  147. int rx_buf_count; /* total number of rx buffers */
  148. int rx_frame_count; /* number of full rx buffers */
  149. wait_queue_head_t open_wait;
  150. wait_queue_head_t close_wait;
  151. wait_queue_head_t status_event_wait_q;
  152. wait_queue_head_t event_wait_q;
  153. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  154. struct _mgslpc_info *next_device; /* device list link */
  155. unsigned short imra_value;
  156. unsigned short imrb_value;
  157. unsigned char pim_value;
  158. spinlock_t lock;
  159. struct work_struct task; /* task structure for scheduling bh */
  160. u32 max_frame_size;
  161. u32 pending_bh;
  162. bool bh_running;
  163. bool bh_requested;
  164. int dcd_chkcount; /* check counts to prevent */
  165. int cts_chkcount; /* too many IRQs if a signal */
  166. int dsr_chkcount; /* is floating */
  167. int ri_chkcount;
  168. bool rx_enabled;
  169. bool rx_overflow;
  170. bool tx_enabled;
  171. bool tx_active;
  172. bool tx_aborting;
  173. u32 idle_mode;
  174. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  175. char device_name[25]; /* device instance name */
  176. unsigned int io_base; /* base I/O address of adapter */
  177. unsigned int irq_level;
  178. MGSL_PARAMS params; /* communications parameters */
  179. unsigned char serial_signals; /* current serial signal states */
  180. bool irq_occurred; /* for diagnostics use */
  181. char testing_irq;
  182. unsigned int init_error; /* startup error (DIAGS) */
  183. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  184. bool drop_rts_on_tx_done;
  185. struct _input_signal_events input_signal_events;
  186. /* PCMCIA support */
  187. struct pcmcia_device *p_dev;
  188. dev_node_t node;
  189. int stop;
  190. /* SPPP/Cisco HDLC device parts */
  191. int netcount;
  192. int dosyncppp;
  193. spinlock_t netlock;
  194. #if SYNCLINK_GENERIC_HDLC
  195. struct net_device *netdev;
  196. #endif
  197. } MGSLPC_INFO;
  198. #define MGSLPC_MAGIC 0x5402
  199. /*
  200. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  201. */
  202. #define TXBUFSIZE 4096
  203. #define CHA 0x00 /* channel A offset */
  204. #define CHB 0x40 /* channel B offset */
  205. /*
  206. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  207. */
  208. #undef PVR
  209. #define RXFIFO 0
  210. #define TXFIFO 0
  211. #define STAR 0x20
  212. #define CMDR 0x20
  213. #define RSTA 0x21
  214. #define PRE 0x21
  215. #define MODE 0x22
  216. #define TIMR 0x23
  217. #define XAD1 0x24
  218. #define XAD2 0x25
  219. #define RAH1 0x26
  220. #define RAH2 0x27
  221. #define DAFO 0x27
  222. #define RAL1 0x28
  223. #define RFC 0x28
  224. #define RHCR 0x29
  225. #define RAL2 0x29
  226. #define RBCL 0x2a
  227. #define XBCL 0x2a
  228. #define RBCH 0x2b
  229. #define XBCH 0x2b
  230. #define CCR0 0x2c
  231. #define CCR1 0x2d
  232. #define CCR2 0x2e
  233. #define CCR3 0x2f
  234. #define VSTR 0x34
  235. #define BGR 0x34
  236. #define RLCR 0x35
  237. #define AML 0x36
  238. #define AMH 0x37
  239. #define GIS 0x38
  240. #define IVA 0x38
  241. #define IPC 0x39
  242. #define ISR 0x3a
  243. #define IMR 0x3a
  244. #define PVR 0x3c
  245. #define PIS 0x3d
  246. #define PIM 0x3d
  247. #define PCR 0x3e
  248. #define CCR4 0x3f
  249. // IMR/ISR
  250. #define IRQ_BREAK_ON BIT15 // rx break detected
  251. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  252. #define IRQ_ALLSENT BIT13 // all sent
  253. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  254. #define IRQ_TIMER BIT11 // timer interrupt
  255. #define IRQ_CTS BIT10 // CTS status change
  256. #define IRQ_TXREPEAT BIT9 // tx message repeat
  257. #define IRQ_TXFIFO BIT8 // transmit pool ready
  258. #define IRQ_RXEOM BIT7 // receive message end
  259. #define IRQ_EXITHUNT BIT6 // receive frame start
  260. #define IRQ_RXTIME BIT6 // rx char timeout
  261. #define IRQ_DCD BIT2 // carrier detect status change
  262. #define IRQ_OVERRUN BIT1 // receive frame overflow
  263. #define IRQ_RXFIFO BIT0 // receive pool full
  264. // STAR
  265. #define XFW BIT6 // transmit FIFO write enable
  266. #define CEC BIT2 // command executing
  267. #define CTS BIT1 // CTS state
  268. #define PVR_DTR BIT0
  269. #define PVR_DSR BIT1
  270. #define PVR_RI BIT2
  271. #define PVR_AUTOCTS BIT3
  272. #define PVR_RS232 0x20 /* 0010b */
  273. #define PVR_V35 0xe0 /* 1110b */
  274. #define PVR_RS422 0x40 /* 0100b */
  275. /* Register access functions */
  276. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  277. #define read_reg(info, reg) inb((info)->io_base + (reg))
  278. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  279. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  280. #define set_reg_bits(info, reg, mask) \
  281. write_reg(info, (reg), \
  282. (unsigned char) (read_reg(info, (reg)) | (mask)))
  283. #define clear_reg_bits(info, reg, mask) \
  284. write_reg(info, (reg), \
  285. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  286. /*
  287. * interrupt enable/disable routines
  288. */
  289. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  290. {
  291. if (channel == CHA) {
  292. info->imra_value |= mask;
  293. write_reg16(info, CHA + IMR, info->imra_value);
  294. } else {
  295. info->imrb_value |= mask;
  296. write_reg16(info, CHB + IMR, info->imrb_value);
  297. }
  298. }
  299. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  300. {
  301. if (channel == CHA) {
  302. info->imra_value &= ~mask;
  303. write_reg16(info, CHA + IMR, info->imra_value);
  304. } else {
  305. info->imrb_value &= ~mask;
  306. write_reg16(info, CHB + IMR, info->imrb_value);
  307. }
  308. }
  309. #define port_irq_disable(info, mask) \
  310. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  311. #define port_irq_enable(info, mask) \
  312. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  313. static void rx_start(MGSLPC_INFO *info);
  314. static void rx_stop(MGSLPC_INFO *info);
  315. static void tx_start(MGSLPC_INFO *info);
  316. static void tx_stop(MGSLPC_INFO *info);
  317. static void tx_set_idle(MGSLPC_INFO *info);
  318. static void get_signals(MGSLPC_INFO *info);
  319. static void set_signals(MGSLPC_INFO *info);
  320. static void reset_device(MGSLPC_INFO *info);
  321. static void hdlc_mode(MGSLPC_INFO *info);
  322. static void async_mode(MGSLPC_INFO *info);
  323. static void tx_timeout(unsigned long context);
  324. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  325. #if SYNCLINK_GENERIC_HDLC
  326. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  327. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  328. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  329. static int hdlcdev_init(MGSLPC_INFO *info);
  330. static void hdlcdev_exit(MGSLPC_INFO *info);
  331. #endif
  332. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  333. static bool register_test(MGSLPC_INFO *info);
  334. static bool irq_test(MGSLPC_INFO *info);
  335. static int adapter_test(MGSLPC_INFO *info);
  336. static int claim_resources(MGSLPC_INFO *info);
  337. static void release_resources(MGSLPC_INFO *info);
  338. static void mgslpc_add_device(MGSLPC_INFO *info);
  339. static void mgslpc_remove_device(MGSLPC_INFO *info);
  340. static bool rx_get_frame(MGSLPC_INFO *info);
  341. static void rx_reset_buffers(MGSLPC_INFO *info);
  342. static int rx_alloc_buffers(MGSLPC_INFO *info);
  343. static void rx_free_buffers(MGSLPC_INFO *info);
  344. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  345. /*
  346. * Bottom half interrupt handlers
  347. */
  348. static void bh_handler(struct work_struct *work);
  349. static void bh_transmit(MGSLPC_INFO *info);
  350. static void bh_status(MGSLPC_INFO *info);
  351. /*
  352. * ioctl handlers
  353. */
  354. static int tiocmget(struct tty_struct *tty, struct file *file);
  355. static int tiocmset(struct tty_struct *tty, struct file *file,
  356. unsigned int set, unsigned int clear);
  357. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  358. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  359. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  360. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  361. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  362. static int set_txenable(MGSLPC_INFO *info, int enable);
  363. static int tx_abort(MGSLPC_INFO *info);
  364. static int set_rxenable(MGSLPC_INFO *info, int enable);
  365. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  366. static MGSLPC_INFO *mgslpc_device_list = NULL;
  367. static int mgslpc_device_count = 0;
  368. /*
  369. * Set this param to non-zero to load eax with the
  370. * .text section address and breakpoint on module load.
  371. * This is useful for use with gdb and add-symbol-file command.
  372. */
  373. static int break_on_load=0;
  374. /*
  375. * Driver major number, defaults to zero to get auto
  376. * assigned major number. May be forced as module parameter.
  377. */
  378. static int ttymajor=0;
  379. static int debug_level = 0;
  380. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  381. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  382. module_param(break_on_load, bool, 0);
  383. module_param(ttymajor, int, 0);
  384. module_param(debug_level, int, 0);
  385. module_param_array(maxframe, int, NULL, 0);
  386. module_param_array(dosyncppp, int, NULL, 0);
  387. MODULE_LICENSE("GPL");
  388. static char *driver_name = "SyncLink PC Card driver";
  389. static char *driver_version = "$Revision: 4.34 $";
  390. static struct tty_driver *serial_driver;
  391. /* number of characters left in xmit buffer before we ask for more */
  392. #define WAKEUP_CHARS 256
  393. static void mgslpc_change_params(MGSLPC_INFO *info);
  394. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  395. /* PCMCIA prototypes */
  396. static int mgslpc_config(struct pcmcia_device *link);
  397. static void mgslpc_release(u_long arg);
  398. static void mgslpc_detach(struct pcmcia_device *p_dev);
  399. /*
  400. * 1st function defined in .text section. Calling this function in
  401. * init_module() followed by a breakpoint allows a remote debugger
  402. * (gdb) to get the .text address for the add-symbol-file command.
  403. * This allows remote debugging of dynamically loadable modules.
  404. */
  405. static void* mgslpc_get_text_ptr(void)
  406. {
  407. return mgslpc_get_text_ptr;
  408. }
  409. /**
  410. * line discipline callback wrappers
  411. *
  412. * The wrappers maintain line discipline references
  413. * while calling into the line discipline.
  414. *
  415. * ldisc_receive_buf - pass receive data to line discipline
  416. */
  417. static void ldisc_receive_buf(struct tty_struct *tty,
  418. const __u8 *data, char *flags, int count)
  419. {
  420. struct tty_ldisc *ld;
  421. if (!tty)
  422. return;
  423. ld = tty_ldisc_ref(tty);
  424. if (ld) {
  425. if (ld->receive_buf)
  426. ld->receive_buf(tty, data, flags, count);
  427. tty_ldisc_deref(ld);
  428. }
  429. }
  430. static int mgslpc_probe(struct pcmcia_device *link)
  431. {
  432. MGSLPC_INFO *info;
  433. int ret;
  434. if (debug_level >= DEBUG_LEVEL_INFO)
  435. printk("mgslpc_attach\n");
  436. info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  437. if (!info) {
  438. printk("Error can't allocate device instance data\n");
  439. return -ENOMEM;
  440. }
  441. info->magic = MGSLPC_MAGIC;
  442. INIT_WORK(&info->task, bh_handler);
  443. info->max_frame_size = 4096;
  444. info->close_delay = 5*HZ/10;
  445. info->closing_wait = 30*HZ;
  446. init_waitqueue_head(&info->open_wait);
  447. init_waitqueue_head(&info->close_wait);
  448. init_waitqueue_head(&info->status_event_wait_q);
  449. init_waitqueue_head(&info->event_wait_q);
  450. spin_lock_init(&info->lock);
  451. spin_lock_init(&info->netlock);
  452. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  453. info->idle_mode = HDLC_TXIDLE_FLAGS;
  454. info->imra_value = 0xffff;
  455. info->imrb_value = 0xffff;
  456. info->pim_value = 0xff;
  457. info->p_dev = link;
  458. link->priv = info;
  459. /* Initialize the struct pcmcia_device structure */
  460. /* Interrupt setup */
  461. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  462. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  463. link->irq.Handler = NULL;
  464. link->conf.Attributes = 0;
  465. link->conf.IntType = INT_MEMORY_AND_IO;
  466. ret = mgslpc_config(link);
  467. if (ret)
  468. return ret;
  469. mgslpc_add_device(info);
  470. return 0;
  471. }
  472. /* Card has been inserted.
  473. */
  474. #define CS_CHECK(fn, ret) \
  475. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  476. static int mgslpc_config(struct pcmcia_device *link)
  477. {
  478. MGSLPC_INFO *info = link->priv;
  479. tuple_t tuple;
  480. cisparse_t parse;
  481. int last_fn, last_ret;
  482. u_char buf[64];
  483. cistpl_cftable_entry_t dflt = { 0 };
  484. cistpl_cftable_entry_t *cfg;
  485. if (debug_level >= DEBUG_LEVEL_INFO)
  486. printk("mgslpc_config(0x%p)\n", link);
  487. tuple.Attributes = 0;
  488. tuple.TupleData = buf;
  489. tuple.TupleDataMax = sizeof(buf);
  490. tuple.TupleOffset = 0;
  491. /* get CIS configuration entry */
  492. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  493. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  494. cfg = &(parse.cftable_entry);
  495. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  496. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  497. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  498. if (cfg->index == 0)
  499. goto cs_failed;
  500. link->conf.ConfigIndex = cfg->index;
  501. link->conf.Attributes |= CONF_ENABLE_IRQ;
  502. /* IO window settings */
  503. link->io.NumPorts1 = 0;
  504. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  505. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  506. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  507. if (!(io->flags & CISTPL_IO_8BIT))
  508. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  509. if (!(io->flags & CISTPL_IO_16BIT))
  510. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  511. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  512. link->io.BasePort1 = io->win[0].base;
  513. link->io.NumPorts1 = io->win[0].len;
  514. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  515. }
  516. link->conf.Attributes = CONF_ENABLE_IRQ;
  517. link->conf.IntType = INT_MEMORY_AND_IO;
  518. link->conf.ConfigIndex = 8;
  519. link->conf.Present = PRESENT_OPTION;
  520. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  521. link->irq.Handler = mgslpc_isr;
  522. link->irq.Instance = info;
  523. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  524. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  525. info->io_base = link->io.BasePort1;
  526. info->irq_level = link->irq.AssignedIRQ;
  527. /* add to linked list of devices */
  528. sprintf(info->node.dev_name, "mgslpc0");
  529. info->node.major = info->node.minor = 0;
  530. link->dev_node = &info->node;
  531. printk(KERN_INFO "%s: index 0x%02x:",
  532. info->node.dev_name, link->conf.ConfigIndex);
  533. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  534. printk(", irq %d", link->irq.AssignedIRQ);
  535. if (link->io.NumPorts1)
  536. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  537. link->io.BasePort1+link->io.NumPorts1-1);
  538. printk("\n");
  539. return 0;
  540. cs_failed:
  541. cs_error(link, last_fn, last_ret);
  542. mgslpc_release((u_long)link);
  543. return -ENODEV;
  544. }
  545. /* Card has been removed.
  546. * Unregister device and release PCMCIA configuration.
  547. * If device is open, postpone until it is closed.
  548. */
  549. static void mgslpc_release(u_long arg)
  550. {
  551. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  552. if (debug_level >= DEBUG_LEVEL_INFO)
  553. printk("mgslpc_release(0x%p)\n", link);
  554. pcmcia_disable_device(link);
  555. }
  556. static void mgslpc_detach(struct pcmcia_device *link)
  557. {
  558. if (debug_level >= DEBUG_LEVEL_INFO)
  559. printk("mgslpc_detach(0x%p)\n", link);
  560. ((MGSLPC_INFO *)link->priv)->stop = 1;
  561. mgslpc_release((u_long)link);
  562. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  563. }
  564. static int mgslpc_suspend(struct pcmcia_device *link)
  565. {
  566. MGSLPC_INFO *info = link->priv;
  567. info->stop = 1;
  568. return 0;
  569. }
  570. static int mgslpc_resume(struct pcmcia_device *link)
  571. {
  572. MGSLPC_INFO *info = link->priv;
  573. info->stop = 0;
  574. return 0;
  575. }
  576. static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
  577. char *name, const char *routine)
  578. {
  579. #ifdef MGSLPC_PARANOIA_CHECK
  580. static const char *badmagic =
  581. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  582. static const char *badinfo =
  583. "Warning: null mgslpc_info for (%s) in %s\n";
  584. if (!info) {
  585. printk(badinfo, name, routine);
  586. return true;
  587. }
  588. if (info->magic != MGSLPC_MAGIC) {
  589. printk(badmagic, name, routine);
  590. return true;
  591. }
  592. #else
  593. if (!info)
  594. return true;
  595. #endif
  596. return false;
  597. }
  598. #define CMD_RXFIFO BIT7 // release current rx FIFO
  599. #define CMD_RXRESET BIT6 // receiver reset
  600. #define CMD_RXFIFO_READ BIT5
  601. #define CMD_START_TIMER BIT4
  602. #define CMD_TXFIFO BIT3 // release current tx FIFO
  603. #define CMD_TXEOM BIT1 // transmit end message
  604. #define CMD_TXRESET BIT0 // transmit reset
  605. static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  606. {
  607. int i = 0;
  608. /* wait for command completion */
  609. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  610. udelay(1);
  611. if (i++ == 1000)
  612. return false;
  613. }
  614. return true;
  615. }
  616. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  617. {
  618. wait_command_complete(info, channel);
  619. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  620. }
  621. static void tx_pause(struct tty_struct *tty)
  622. {
  623. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  624. unsigned long flags;
  625. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  626. return;
  627. if (debug_level >= DEBUG_LEVEL_INFO)
  628. printk("tx_pause(%s)\n",info->device_name);
  629. spin_lock_irqsave(&info->lock,flags);
  630. if (info->tx_enabled)
  631. tx_stop(info);
  632. spin_unlock_irqrestore(&info->lock,flags);
  633. }
  634. static void tx_release(struct tty_struct *tty)
  635. {
  636. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  637. unsigned long flags;
  638. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  639. return;
  640. if (debug_level >= DEBUG_LEVEL_INFO)
  641. printk("tx_release(%s)\n",info->device_name);
  642. spin_lock_irqsave(&info->lock,flags);
  643. if (!info->tx_enabled)
  644. tx_start(info);
  645. spin_unlock_irqrestore(&info->lock,flags);
  646. }
  647. /* Return next bottom half action to perform.
  648. * or 0 if nothing to do.
  649. */
  650. static int bh_action(MGSLPC_INFO *info)
  651. {
  652. unsigned long flags;
  653. int rc = 0;
  654. spin_lock_irqsave(&info->lock,flags);
  655. if (info->pending_bh & BH_RECEIVE) {
  656. info->pending_bh &= ~BH_RECEIVE;
  657. rc = BH_RECEIVE;
  658. } else if (info->pending_bh & BH_TRANSMIT) {
  659. info->pending_bh &= ~BH_TRANSMIT;
  660. rc = BH_TRANSMIT;
  661. } else if (info->pending_bh & BH_STATUS) {
  662. info->pending_bh &= ~BH_STATUS;
  663. rc = BH_STATUS;
  664. }
  665. if (!rc) {
  666. /* Mark BH routine as complete */
  667. info->bh_running = false;
  668. info->bh_requested = false;
  669. }
  670. spin_unlock_irqrestore(&info->lock,flags);
  671. return rc;
  672. }
  673. static void bh_handler(struct work_struct *work)
  674. {
  675. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  676. int action;
  677. if (!info)
  678. return;
  679. if (debug_level >= DEBUG_LEVEL_BH)
  680. printk( "%s(%d):bh_handler(%s) entry\n",
  681. __FILE__,__LINE__,info->device_name);
  682. info->bh_running = true;
  683. while((action = bh_action(info)) != 0) {
  684. /* Process work item */
  685. if ( debug_level >= DEBUG_LEVEL_BH )
  686. printk( "%s(%d):bh_handler() work item action=%d\n",
  687. __FILE__,__LINE__,action);
  688. switch (action) {
  689. case BH_RECEIVE:
  690. while(rx_get_frame(info));
  691. break;
  692. case BH_TRANSMIT:
  693. bh_transmit(info);
  694. break;
  695. case BH_STATUS:
  696. bh_status(info);
  697. break;
  698. default:
  699. /* unknown work item ID */
  700. printk("Unknown work item ID=%08X!\n", action);
  701. break;
  702. }
  703. }
  704. if (debug_level >= DEBUG_LEVEL_BH)
  705. printk( "%s(%d):bh_handler(%s) exit\n",
  706. __FILE__,__LINE__,info->device_name);
  707. }
  708. static void bh_transmit(MGSLPC_INFO *info)
  709. {
  710. struct tty_struct *tty = info->tty;
  711. if (debug_level >= DEBUG_LEVEL_BH)
  712. printk("bh_transmit() entry on %s\n", info->device_name);
  713. if (tty)
  714. tty_wakeup(tty);
  715. }
  716. static void bh_status(MGSLPC_INFO *info)
  717. {
  718. info->ri_chkcount = 0;
  719. info->dsr_chkcount = 0;
  720. info->dcd_chkcount = 0;
  721. info->cts_chkcount = 0;
  722. }
  723. /* eom: non-zero = end of frame */
  724. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  725. {
  726. unsigned char data[2];
  727. unsigned char fifo_count, read_count, i;
  728. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  729. if (debug_level >= DEBUG_LEVEL_ISR)
  730. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  731. if (!info->rx_enabled)
  732. return;
  733. if (info->rx_frame_count >= info->rx_buf_count) {
  734. /* no more free buffers */
  735. issue_command(info, CHA, CMD_RXRESET);
  736. info->pending_bh |= BH_RECEIVE;
  737. info->rx_overflow = true;
  738. info->icount.buf_overrun++;
  739. return;
  740. }
  741. if (eom) {
  742. /* end of frame, get FIFO count from RBCL register */
  743. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  744. fifo_count = 32;
  745. } else
  746. fifo_count = 32;
  747. do {
  748. if (fifo_count == 1) {
  749. read_count = 1;
  750. data[0] = read_reg(info, CHA + RXFIFO);
  751. } else {
  752. read_count = 2;
  753. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  754. }
  755. fifo_count -= read_count;
  756. if (!fifo_count && eom)
  757. buf->status = data[--read_count];
  758. for (i = 0; i < read_count; i++) {
  759. if (buf->count >= info->max_frame_size) {
  760. /* frame too large, reset receiver and reset current buffer */
  761. issue_command(info, CHA, CMD_RXRESET);
  762. buf->count = 0;
  763. return;
  764. }
  765. *(buf->data + buf->count) = data[i];
  766. buf->count++;
  767. }
  768. } while (fifo_count);
  769. if (eom) {
  770. info->pending_bh |= BH_RECEIVE;
  771. info->rx_frame_count++;
  772. info->rx_put++;
  773. if (info->rx_put >= info->rx_buf_count)
  774. info->rx_put = 0;
  775. }
  776. issue_command(info, CHA, CMD_RXFIFO);
  777. }
  778. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  779. {
  780. unsigned char data, status, flag;
  781. int fifo_count;
  782. int work = 0;
  783. struct tty_struct *tty = info->tty;
  784. struct mgsl_icount *icount = &info->icount;
  785. if (tcd) {
  786. /* early termination, get FIFO count from RBCL register */
  787. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  788. /* Zero fifo count could mean 0 or 32 bytes available.
  789. * If BIT5 of STAR is set then at least 1 byte is available.
  790. */
  791. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  792. fifo_count = 32;
  793. } else
  794. fifo_count = 32;
  795. tty_buffer_request_room(tty, fifo_count);
  796. /* Flush received async data to receive data buffer. */
  797. while (fifo_count) {
  798. data = read_reg(info, CHA + RXFIFO);
  799. status = read_reg(info, CHA + RXFIFO);
  800. fifo_count -= 2;
  801. icount->rx++;
  802. flag = TTY_NORMAL;
  803. // if no frameing/crc error then save data
  804. // BIT7:parity error
  805. // BIT6:framing error
  806. if (status & (BIT7 + BIT6)) {
  807. if (status & BIT7)
  808. icount->parity++;
  809. else
  810. icount->frame++;
  811. /* discard char if tty control flags say so */
  812. if (status & info->ignore_status_mask)
  813. continue;
  814. status &= info->read_status_mask;
  815. if (status & BIT7)
  816. flag = TTY_PARITY;
  817. else if (status & BIT6)
  818. flag = TTY_FRAME;
  819. }
  820. work += tty_insert_flip_char(tty, data, flag);
  821. }
  822. issue_command(info, CHA, CMD_RXFIFO);
  823. if (debug_level >= DEBUG_LEVEL_ISR) {
  824. printk("%s(%d):rx_ready_async",
  825. __FILE__,__LINE__);
  826. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  827. __FILE__,__LINE__,icount->rx,icount->brk,
  828. icount->parity,icount->frame,icount->overrun);
  829. }
  830. if (work)
  831. tty_flip_buffer_push(tty);
  832. }
  833. static void tx_done(MGSLPC_INFO *info)
  834. {
  835. if (!info->tx_active)
  836. return;
  837. info->tx_active = false;
  838. info->tx_aborting = false;
  839. if (info->params.mode == MGSL_MODE_ASYNC)
  840. return;
  841. info->tx_count = info->tx_put = info->tx_get = 0;
  842. del_timer(&info->tx_timer);
  843. if (info->drop_rts_on_tx_done) {
  844. get_signals(info);
  845. if (info->serial_signals & SerialSignal_RTS) {
  846. info->serial_signals &= ~SerialSignal_RTS;
  847. set_signals(info);
  848. }
  849. info->drop_rts_on_tx_done = false;
  850. }
  851. #if SYNCLINK_GENERIC_HDLC
  852. if (info->netcount)
  853. hdlcdev_tx_done(info);
  854. else
  855. #endif
  856. {
  857. if (info->tty->stopped || info->tty->hw_stopped) {
  858. tx_stop(info);
  859. return;
  860. }
  861. info->pending_bh |= BH_TRANSMIT;
  862. }
  863. }
  864. static void tx_ready(MGSLPC_INFO *info)
  865. {
  866. unsigned char fifo_count = 32;
  867. int c;
  868. if (debug_level >= DEBUG_LEVEL_ISR)
  869. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  870. if (info->params.mode == MGSL_MODE_HDLC) {
  871. if (!info->tx_active)
  872. return;
  873. } else {
  874. if (info->tty->stopped || info->tty->hw_stopped) {
  875. tx_stop(info);
  876. return;
  877. }
  878. if (!info->tx_count)
  879. info->tx_active = false;
  880. }
  881. if (!info->tx_count)
  882. return;
  883. while (info->tx_count && fifo_count) {
  884. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  885. if (c == 1) {
  886. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  887. } else {
  888. write_reg16(info, CHA + TXFIFO,
  889. *((unsigned short*)(info->tx_buf + info->tx_get)));
  890. }
  891. info->tx_count -= c;
  892. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  893. fifo_count -= c;
  894. }
  895. if (info->params.mode == MGSL_MODE_ASYNC) {
  896. if (info->tx_count < WAKEUP_CHARS)
  897. info->pending_bh |= BH_TRANSMIT;
  898. issue_command(info, CHA, CMD_TXFIFO);
  899. } else {
  900. if (info->tx_count)
  901. issue_command(info, CHA, CMD_TXFIFO);
  902. else
  903. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  904. }
  905. }
  906. static void cts_change(MGSLPC_INFO *info)
  907. {
  908. get_signals(info);
  909. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  910. irq_disable(info, CHB, IRQ_CTS);
  911. info->icount.cts++;
  912. if (info->serial_signals & SerialSignal_CTS)
  913. info->input_signal_events.cts_up++;
  914. else
  915. info->input_signal_events.cts_down++;
  916. wake_up_interruptible(&info->status_event_wait_q);
  917. wake_up_interruptible(&info->event_wait_q);
  918. if (info->flags & ASYNC_CTS_FLOW) {
  919. if (info->tty->hw_stopped) {
  920. if (info->serial_signals & SerialSignal_CTS) {
  921. if (debug_level >= DEBUG_LEVEL_ISR)
  922. printk("CTS tx start...");
  923. if (info->tty)
  924. info->tty->hw_stopped = 0;
  925. tx_start(info);
  926. info->pending_bh |= BH_TRANSMIT;
  927. return;
  928. }
  929. } else {
  930. if (!(info->serial_signals & SerialSignal_CTS)) {
  931. if (debug_level >= DEBUG_LEVEL_ISR)
  932. printk("CTS tx stop...");
  933. if (info->tty)
  934. info->tty->hw_stopped = 1;
  935. tx_stop(info);
  936. }
  937. }
  938. }
  939. info->pending_bh |= BH_STATUS;
  940. }
  941. static void dcd_change(MGSLPC_INFO *info)
  942. {
  943. get_signals(info);
  944. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  945. irq_disable(info, CHB, IRQ_DCD);
  946. info->icount.dcd++;
  947. if (info->serial_signals & SerialSignal_DCD) {
  948. info->input_signal_events.dcd_up++;
  949. }
  950. else
  951. info->input_signal_events.dcd_down++;
  952. #if SYNCLINK_GENERIC_HDLC
  953. if (info->netcount) {
  954. if (info->serial_signals & SerialSignal_DCD)
  955. netif_carrier_on(info->netdev);
  956. else
  957. netif_carrier_off(info->netdev);
  958. }
  959. #endif
  960. wake_up_interruptible(&info->status_event_wait_q);
  961. wake_up_interruptible(&info->event_wait_q);
  962. if (info->flags & ASYNC_CHECK_CD) {
  963. if (debug_level >= DEBUG_LEVEL_ISR)
  964. printk("%s CD now %s...", info->device_name,
  965. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  966. if (info->serial_signals & SerialSignal_DCD)
  967. wake_up_interruptible(&info->open_wait);
  968. else {
  969. if (debug_level >= DEBUG_LEVEL_ISR)
  970. printk("doing serial hangup...");
  971. if (info->tty)
  972. tty_hangup(info->tty);
  973. }
  974. }
  975. info->pending_bh |= BH_STATUS;
  976. }
  977. static void dsr_change(MGSLPC_INFO *info)
  978. {
  979. get_signals(info);
  980. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  981. port_irq_disable(info, PVR_DSR);
  982. info->icount.dsr++;
  983. if (info->serial_signals & SerialSignal_DSR)
  984. info->input_signal_events.dsr_up++;
  985. else
  986. info->input_signal_events.dsr_down++;
  987. wake_up_interruptible(&info->status_event_wait_q);
  988. wake_up_interruptible(&info->event_wait_q);
  989. info->pending_bh |= BH_STATUS;
  990. }
  991. static void ri_change(MGSLPC_INFO *info)
  992. {
  993. get_signals(info);
  994. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  995. port_irq_disable(info, PVR_RI);
  996. info->icount.rng++;
  997. if (info->serial_signals & SerialSignal_RI)
  998. info->input_signal_events.ri_up++;
  999. else
  1000. info->input_signal_events.ri_down++;
  1001. wake_up_interruptible(&info->status_event_wait_q);
  1002. wake_up_interruptible(&info->event_wait_q);
  1003. info->pending_bh |= BH_STATUS;
  1004. }
  1005. /* Interrupt service routine entry point.
  1006. *
  1007. * Arguments:
  1008. *
  1009. * irq interrupt number that caused interrupt
  1010. * dev_id device ID supplied during interrupt registration
  1011. */
  1012. static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
  1013. {
  1014. MGSLPC_INFO *info = dev_id;
  1015. unsigned short isr;
  1016. unsigned char gis, pis;
  1017. int count=0;
  1018. if (debug_level >= DEBUG_LEVEL_ISR)
  1019. printk("mgslpc_isr(%d) entry.\n", info->irq_level);
  1020. if (!(info->p_dev->_locked))
  1021. return IRQ_HANDLED;
  1022. spin_lock(&info->lock);
  1023. while ((gis = read_reg(info, CHA + GIS))) {
  1024. if (debug_level >= DEBUG_LEVEL_ISR)
  1025. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1026. if ((gis & 0x70) || count > 1000) {
  1027. printk("synclink_cs:hardware failed or ejected\n");
  1028. break;
  1029. }
  1030. count++;
  1031. if (gis & (BIT1 + BIT0)) {
  1032. isr = read_reg16(info, CHB + ISR);
  1033. if (isr & IRQ_DCD)
  1034. dcd_change(info);
  1035. if (isr & IRQ_CTS)
  1036. cts_change(info);
  1037. }
  1038. if (gis & (BIT3 + BIT2))
  1039. {
  1040. isr = read_reg16(info, CHA + ISR);
  1041. if (isr & IRQ_TIMER) {
  1042. info->irq_occurred = true;
  1043. irq_disable(info, CHA, IRQ_TIMER);
  1044. }
  1045. /* receive IRQs */
  1046. if (isr & IRQ_EXITHUNT) {
  1047. info->icount.exithunt++;
  1048. wake_up_interruptible(&info->event_wait_q);
  1049. }
  1050. if (isr & IRQ_BREAK_ON) {
  1051. info->icount.brk++;
  1052. if (info->flags & ASYNC_SAK)
  1053. do_SAK(info->tty);
  1054. }
  1055. if (isr & IRQ_RXTIME) {
  1056. issue_command(info, CHA, CMD_RXFIFO_READ);
  1057. }
  1058. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1059. if (info->params.mode == MGSL_MODE_HDLC)
  1060. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1061. else
  1062. rx_ready_async(info, isr & IRQ_RXEOM);
  1063. }
  1064. /* transmit IRQs */
  1065. if (isr & IRQ_UNDERRUN) {
  1066. if (info->tx_aborting)
  1067. info->icount.txabort++;
  1068. else
  1069. info->icount.txunder++;
  1070. tx_done(info);
  1071. }
  1072. else if (isr & IRQ_ALLSENT) {
  1073. info->icount.txok++;
  1074. tx_done(info);
  1075. }
  1076. else if (isr & IRQ_TXFIFO)
  1077. tx_ready(info);
  1078. }
  1079. if (gis & BIT7) {
  1080. pis = read_reg(info, CHA + PIS);
  1081. if (pis & BIT1)
  1082. dsr_change(info);
  1083. if (pis & BIT2)
  1084. ri_change(info);
  1085. }
  1086. }
  1087. /* Request bottom half processing if there's something
  1088. * for it to do and the bh is not already running
  1089. */
  1090. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1091. if ( debug_level >= DEBUG_LEVEL_ISR )
  1092. printk("%s(%d):%s queueing bh task.\n",
  1093. __FILE__,__LINE__,info->device_name);
  1094. schedule_work(&info->task);
  1095. info->bh_requested = true;
  1096. }
  1097. spin_unlock(&info->lock);
  1098. if (debug_level >= DEBUG_LEVEL_ISR)
  1099. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1100. __FILE__, __LINE__, info->irq_level);
  1101. return IRQ_HANDLED;
  1102. }
  1103. /* Initialize and start device.
  1104. */
  1105. static int startup(MGSLPC_INFO * info)
  1106. {
  1107. int retval = 0;
  1108. if (debug_level >= DEBUG_LEVEL_INFO)
  1109. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1110. if (info->flags & ASYNC_INITIALIZED)
  1111. return 0;
  1112. if (!info->tx_buf) {
  1113. /* allocate a page of memory for a transmit buffer */
  1114. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1115. if (!info->tx_buf) {
  1116. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1117. __FILE__,__LINE__,info->device_name);
  1118. return -ENOMEM;
  1119. }
  1120. }
  1121. info->pending_bh = 0;
  1122. memset(&info->icount, 0, sizeof(info->icount));
  1123. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1124. /* Allocate and claim adapter resources */
  1125. retval = claim_resources(info);
  1126. /* perform existance check and diagnostics */
  1127. if ( !retval )
  1128. retval = adapter_test(info);
  1129. if ( retval ) {
  1130. if (capable(CAP_SYS_ADMIN) && info->tty)
  1131. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1132. release_resources(info);
  1133. return retval;
  1134. }
  1135. /* program hardware for current parameters */
  1136. mgslpc_change_params(info);
  1137. if (info->tty)
  1138. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1139. info->flags |= ASYNC_INITIALIZED;
  1140. return 0;
  1141. }
  1142. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1143. */
  1144. static void shutdown(MGSLPC_INFO * info)
  1145. {
  1146. unsigned long flags;
  1147. if (!(info->flags & ASYNC_INITIALIZED))
  1148. return;
  1149. if (debug_level >= DEBUG_LEVEL_INFO)
  1150. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1151. __FILE__,__LINE__, info->device_name );
  1152. /* clear status wait queue because status changes */
  1153. /* can't happen after shutting down the hardware */
  1154. wake_up_interruptible(&info->status_event_wait_q);
  1155. wake_up_interruptible(&info->event_wait_q);
  1156. del_timer_sync(&info->tx_timer);
  1157. if (info->tx_buf) {
  1158. free_page((unsigned long) info->tx_buf);
  1159. info->tx_buf = NULL;
  1160. }
  1161. spin_lock_irqsave(&info->lock,flags);
  1162. rx_stop(info);
  1163. tx_stop(info);
  1164. /* TODO:disable interrupts instead of reset to preserve signal states */
  1165. reset_device(info);
  1166. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1167. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1168. set_signals(info);
  1169. }
  1170. spin_unlock_irqrestore(&info->lock,flags);
  1171. release_resources(info);
  1172. if (info->tty)
  1173. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1174. info->flags &= ~ASYNC_INITIALIZED;
  1175. }
  1176. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1177. {
  1178. unsigned long flags;
  1179. spin_lock_irqsave(&info->lock,flags);
  1180. rx_stop(info);
  1181. tx_stop(info);
  1182. info->tx_count = info->tx_put = info->tx_get = 0;
  1183. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1184. hdlc_mode(info);
  1185. else
  1186. async_mode(info);
  1187. set_signals(info);
  1188. info->dcd_chkcount = 0;
  1189. info->cts_chkcount = 0;
  1190. info->ri_chkcount = 0;
  1191. info->dsr_chkcount = 0;
  1192. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1193. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1194. get_signals(info);
  1195. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1196. rx_start(info);
  1197. spin_unlock_irqrestore(&info->lock,flags);
  1198. }
  1199. /* Reconfigure adapter based on new parameters
  1200. */
  1201. static void mgslpc_change_params(MGSLPC_INFO *info)
  1202. {
  1203. unsigned cflag;
  1204. int bits_per_char;
  1205. if (!info->tty || !info->tty->termios)
  1206. return;
  1207. if (debug_level >= DEBUG_LEVEL_INFO)
  1208. printk("%s(%d):mgslpc_change_params(%s)\n",
  1209. __FILE__,__LINE__, info->device_name );
  1210. cflag = info->tty->termios->c_cflag;
  1211. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1212. /* otherwise assert DTR and RTS */
  1213. if (cflag & CBAUD)
  1214. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1215. else
  1216. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1217. /* byte size and parity */
  1218. switch (cflag & CSIZE) {
  1219. case CS5: info->params.data_bits = 5; break;
  1220. case CS6: info->params.data_bits = 6; break;
  1221. case CS7: info->params.data_bits = 7; break;
  1222. case CS8: info->params.data_bits = 8; break;
  1223. default: info->params.data_bits = 7; break;
  1224. }
  1225. if (cflag & CSTOPB)
  1226. info->params.stop_bits = 2;
  1227. else
  1228. info->params.stop_bits = 1;
  1229. info->params.parity = ASYNC_PARITY_NONE;
  1230. if (cflag & PARENB) {
  1231. if (cflag & PARODD)
  1232. info->params.parity = ASYNC_PARITY_ODD;
  1233. else
  1234. info->params.parity = ASYNC_PARITY_EVEN;
  1235. #ifdef CMSPAR
  1236. if (cflag & CMSPAR)
  1237. info->params.parity = ASYNC_PARITY_SPACE;
  1238. #endif
  1239. }
  1240. /* calculate number of jiffies to transmit a full
  1241. * FIFO (32 bytes) at specified data rate
  1242. */
  1243. bits_per_char = info->params.data_bits +
  1244. info->params.stop_bits + 1;
  1245. /* if port data rate is set to 460800 or less then
  1246. * allow tty settings to override, otherwise keep the
  1247. * current data rate.
  1248. */
  1249. if (info->params.data_rate <= 460800) {
  1250. info->params.data_rate = tty_get_baud_rate(info->tty);
  1251. }
  1252. if ( info->params.data_rate ) {
  1253. info->timeout = (32*HZ*bits_per_char) /
  1254. info->params.data_rate;
  1255. }
  1256. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1257. if (cflag & CRTSCTS)
  1258. info->flags |= ASYNC_CTS_FLOW;
  1259. else
  1260. info->flags &= ~ASYNC_CTS_FLOW;
  1261. if (cflag & CLOCAL)
  1262. info->flags &= ~ASYNC_CHECK_CD;
  1263. else
  1264. info->flags |= ASYNC_CHECK_CD;
  1265. /* process tty input control flags */
  1266. info->read_status_mask = 0;
  1267. if (I_INPCK(info->tty))
  1268. info->read_status_mask |= BIT7 | BIT6;
  1269. if (I_IGNPAR(info->tty))
  1270. info->ignore_status_mask |= BIT7 | BIT6;
  1271. mgslpc_program_hw(info);
  1272. }
  1273. /* Add a character to the transmit buffer
  1274. */
  1275. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1276. {
  1277. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1278. unsigned long flags;
  1279. if (debug_level >= DEBUG_LEVEL_INFO) {
  1280. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1281. __FILE__,__LINE__,ch,info->device_name);
  1282. }
  1283. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1284. return;
  1285. if (!info->tx_buf)
  1286. return;
  1287. spin_lock_irqsave(&info->lock,flags);
  1288. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1289. if (info->tx_count < TXBUFSIZE - 1) {
  1290. info->tx_buf[info->tx_put++] = ch;
  1291. info->tx_put &= TXBUFSIZE-1;
  1292. info->tx_count++;
  1293. }
  1294. }
  1295. spin_unlock_irqrestore(&info->lock,flags);
  1296. }
  1297. /* Enable transmitter so remaining characters in the
  1298. * transmit buffer are sent.
  1299. */
  1300. static void mgslpc_flush_chars(struct tty_struct *tty)
  1301. {
  1302. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1303. unsigned long flags;
  1304. if (debug_level >= DEBUG_LEVEL_INFO)
  1305. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1306. __FILE__,__LINE__,info->device_name,info->tx_count);
  1307. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1308. return;
  1309. if (info->tx_count <= 0 || tty->stopped ||
  1310. tty->hw_stopped || !info->tx_buf)
  1311. return;
  1312. if (debug_level >= DEBUG_LEVEL_INFO)
  1313. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1314. __FILE__,__LINE__,info->device_name);
  1315. spin_lock_irqsave(&info->lock,flags);
  1316. if (!info->tx_active)
  1317. tx_start(info);
  1318. spin_unlock_irqrestore(&info->lock,flags);
  1319. }
  1320. /* Send a block of data
  1321. *
  1322. * Arguments:
  1323. *
  1324. * tty pointer to tty information structure
  1325. * buf pointer to buffer containing send data
  1326. * count size of send data in bytes
  1327. *
  1328. * Returns: number of characters written
  1329. */
  1330. static int mgslpc_write(struct tty_struct * tty,
  1331. const unsigned char *buf, int count)
  1332. {
  1333. int c, ret = 0;
  1334. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1335. unsigned long flags;
  1336. if (debug_level >= DEBUG_LEVEL_INFO)
  1337. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1338. __FILE__,__LINE__,info->device_name,count);
  1339. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1340. !info->tx_buf)
  1341. goto cleanup;
  1342. if (info->params.mode == MGSL_MODE_HDLC) {
  1343. if (count > TXBUFSIZE) {
  1344. ret = -EIO;
  1345. goto cleanup;
  1346. }
  1347. if (info->tx_active)
  1348. goto cleanup;
  1349. else if (info->tx_count)
  1350. goto start;
  1351. }
  1352. for (;;) {
  1353. c = min(count,
  1354. min(TXBUFSIZE - info->tx_count - 1,
  1355. TXBUFSIZE - info->tx_put));
  1356. if (c <= 0)
  1357. break;
  1358. memcpy(info->tx_buf + info->tx_put, buf, c);
  1359. spin_lock_irqsave(&info->lock,flags);
  1360. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1361. info->tx_count += c;
  1362. spin_unlock_irqrestore(&info->lock,flags);
  1363. buf += c;
  1364. count -= c;
  1365. ret += c;
  1366. }
  1367. start:
  1368. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1369. spin_lock_irqsave(&info->lock,flags);
  1370. if (!info->tx_active)
  1371. tx_start(info);
  1372. spin_unlock_irqrestore(&info->lock,flags);
  1373. }
  1374. cleanup:
  1375. if (debug_level >= DEBUG_LEVEL_INFO)
  1376. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1377. __FILE__,__LINE__,info->device_name,ret);
  1378. return ret;
  1379. }
  1380. /* Return the count of free bytes in transmit buffer
  1381. */
  1382. static int mgslpc_write_room(struct tty_struct *tty)
  1383. {
  1384. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1385. int ret;
  1386. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1387. return 0;
  1388. if (info->params.mode == MGSL_MODE_HDLC) {
  1389. /* HDLC (frame oriented) mode */
  1390. if (info->tx_active)
  1391. return 0;
  1392. else
  1393. return HDLC_MAX_FRAME_SIZE;
  1394. } else {
  1395. ret = TXBUFSIZE - info->tx_count - 1;
  1396. if (ret < 0)
  1397. ret = 0;
  1398. }
  1399. if (debug_level >= DEBUG_LEVEL_INFO)
  1400. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1401. __FILE__,__LINE__, info->device_name, ret);
  1402. return ret;
  1403. }
  1404. /* Return the count of bytes in transmit buffer
  1405. */
  1406. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1407. {
  1408. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1409. int rc;
  1410. if (debug_level >= DEBUG_LEVEL_INFO)
  1411. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1412. __FILE__,__LINE__, info->device_name );
  1413. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1414. return 0;
  1415. if (info->params.mode == MGSL_MODE_HDLC)
  1416. rc = info->tx_active ? info->max_frame_size : 0;
  1417. else
  1418. rc = info->tx_count;
  1419. if (debug_level >= DEBUG_LEVEL_INFO)
  1420. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1421. __FILE__,__LINE__, info->device_name, rc);
  1422. return rc;
  1423. }
  1424. /* Discard all data in the send buffer
  1425. */
  1426. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1427. {
  1428. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1429. unsigned long flags;
  1430. if (debug_level >= DEBUG_LEVEL_INFO)
  1431. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1432. __FILE__,__LINE__, info->device_name );
  1433. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1434. return;
  1435. spin_lock_irqsave(&info->lock,flags);
  1436. info->tx_count = info->tx_put = info->tx_get = 0;
  1437. del_timer(&info->tx_timer);
  1438. spin_unlock_irqrestore(&info->lock,flags);
  1439. wake_up_interruptible(&tty->write_wait);
  1440. tty_wakeup(tty);
  1441. }
  1442. /* Send a high-priority XON/XOFF character
  1443. */
  1444. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1445. {
  1446. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1447. unsigned long flags;
  1448. if (debug_level >= DEBUG_LEVEL_INFO)
  1449. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1450. __FILE__,__LINE__, info->device_name, ch );
  1451. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1452. return;
  1453. info->x_char = ch;
  1454. if (ch) {
  1455. spin_lock_irqsave(&info->lock,flags);
  1456. if (!info->tx_enabled)
  1457. tx_start(info);
  1458. spin_unlock_irqrestore(&info->lock,flags);
  1459. }
  1460. }
  1461. /* Signal remote device to throttle send data (our receive data)
  1462. */
  1463. static void mgslpc_throttle(struct tty_struct * tty)
  1464. {
  1465. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1466. unsigned long flags;
  1467. if (debug_level >= DEBUG_LEVEL_INFO)
  1468. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1469. __FILE__,__LINE__, info->device_name );
  1470. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1471. return;
  1472. if (I_IXOFF(tty))
  1473. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1474. if (tty->termios->c_cflag & CRTSCTS) {
  1475. spin_lock_irqsave(&info->lock,flags);
  1476. info->serial_signals &= ~SerialSignal_RTS;
  1477. set_signals(info);
  1478. spin_unlock_irqrestore(&info->lock,flags);
  1479. }
  1480. }
  1481. /* Signal remote device to stop throttling send data (our receive data)
  1482. */
  1483. static void mgslpc_unthrottle(struct tty_struct * tty)
  1484. {
  1485. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1486. unsigned long flags;
  1487. if (debug_level >= DEBUG_LEVEL_INFO)
  1488. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1489. __FILE__,__LINE__, info->device_name );
  1490. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1491. return;
  1492. if (I_IXOFF(tty)) {
  1493. if (info->x_char)
  1494. info->x_char = 0;
  1495. else
  1496. mgslpc_send_xchar(tty, START_CHAR(tty));
  1497. }
  1498. if (tty->termios->c_cflag & CRTSCTS) {
  1499. spin_lock_irqsave(&info->lock,flags);
  1500. info->serial_signals |= SerialSignal_RTS;
  1501. set_signals(info);
  1502. spin_unlock_irqrestore(&info->lock,flags);
  1503. }
  1504. }
  1505. /* get the current serial statistics
  1506. */
  1507. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1508. {
  1509. int err;
  1510. if (debug_level >= DEBUG_LEVEL_INFO)
  1511. printk("get_params(%s)\n", info->device_name);
  1512. if (!user_icount) {
  1513. memset(&info->icount, 0, sizeof(info->icount));
  1514. } else {
  1515. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1516. if (err)
  1517. return -EFAULT;
  1518. }
  1519. return 0;
  1520. }
  1521. /* get the current serial parameters
  1522. */
  1523. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1524. {
  1525. int err;
  1526. if (debug_level >= DEBUG_LEVEL_INFO)
  1527. printk("get_params(%s)\n", info->device_name);
  1528. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1529. if (err)
  1530. return -EFAULT;
  1531. return 0;
  1532. }
  1533. /* set the serial parameters
  1534. *
  1535. * Arguments:
  1536. *
  1537. * info pointer to device instance data
  1538. * new_params user buffer containing new serial params
  1539. *
  1540. * Returns: 0 if success, otherwise error code
  1541. */
  1542. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1543. {
  1544. unsigned long flags;
  1545. MGSL_PARAMS tmp_params;
  1546. int err;
  1547. if (debug_level >= DEBUG_LEVEL_INFO)
  1548. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1549. info->device_name );
  1550. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1551. if (err) {
  1552. if ( debug_level >= DEBUG_LEVEL_INFO )
  1553. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1554. __FILE__,__LINE__,info->device_name);
  1555. return -EFAULT;
  1556. }
  1557. spin_lock_irqsave(&info->lock,flags);
  1558. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1559. spin_unlock_irqrestore(&info->lock,flags);
  1560. mgslpc_change_params(info);
  1561. return 0;
  1562. }
  1563. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1564. {
  1565. int err;
  1566. if (debug_level >= DEBUG_LEVEL_INFO)
  1567. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1568. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1569. if (err)
  1570. return -EFAULT;
  1571. return 0;
  1572. }
  1573. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1574. {
  1575. unsigned long flags;
  1576. if (debug_level >= DEBUG_LEVEL_INFO)
  1577. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1578. spin_lock_irqsave(&info->lock,flags);
  1579. info->idle_mode = idle_mode;
  1580. tx_set_idle(info);
  1581. spin_unlock_irqrestore(&info->lock,flags);
  1582. return 0;
  1583. }
  1584. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1585. {
  1586. int err;
  1587. if (debug_level >= DEBUG_LEVEL_INFO)
  1588. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1589. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1590. if (err)
  1591. return -EFAULT;
  1592. return 0;
  1593. }
  1594. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1595. {
  1596. unsigned long flags;
  1597. unsigned char val;
  1598. if (debug_level >= DEBUG_LEVEL_INFO)
  1599. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1600. spin_lock_irqsave(&info->lock,flags);
  1601. info->if_mode = if_mode;
  1602. val = read_reg(info, PVR) & 0x0f;
  1603. switch (info->if_mode)
  1604. {
  1605. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1606. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1607. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1608. }
  1609. write_reg(info, PVR, val);
  1610. spin_unlock_irqrestore(&info->lock,flags);
  1611. return 0;
  1612. }
  1613. static int set_txenable(MGSLPC_INFO * info, int enable)
  1614. {
  1615. unsigned long flags;
  1616. if (debug_level >= DEBUG_LEVEL_INFO)
  1617. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1618. spin_lock_irqsave(&info->lock,flags);
  1619. if (enable) {
  1620. if (!info->tx_enabled)
  1621. tx_start(info);
  1622. } else {
  1623. if (info->tx_enabled)
  1624. tx_stop(info);
  1625. }
  1626. spin_unlock_irqrestore(&info->lock,flags);
  1627. return 0;
  1628. }
  1629. static int tx_abort(MGSLPC_INFO * info)
  1630. {
  1631. unsigned long flags;
  1632. if (debug_level >= DEBUG_LEVEL_INFO)
  1633. printk("tx_abort(%s)\n", info->device_name);
  1634. spin_lock_irqsave(&info->lock,flags);
  1635. if (info->tx_active && info->tx_count &&
  1636. info->params.mode == MGSL_MODE_HDLC) {
  1637. /* clear data count so FIFO is not filled on next IRQ.
  1638. * This results in underrun and abort transmission.
  1639. */
  1640. info->tx_count = info->tx_put = info->tx_get = 0;
  1641. info->tx_aborting = true;
  1642. }
  1643. spin_unlock_irqrestore(&info->lock,flags);
  1644. return 0;
  1645. }
  1646. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1647. {
  1648. unsigned long flags;
  1649. if (debug_level >= DEBUG_LEVEL_INFO)
  1650. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1651. spin_lock_irqsave(&info->lock,flags);
  1652. if (enable) {
  1653. if (!info->rx_enabled)
  1654. rx_start(info);
  1655. } else {
  1656. if (info->rx_enabled)
  1657. rx_stop(info);
  1658. }
  1659. spin_unlock_irqrestore(&info->lock,flags);
  1660. return 0;
  1661. }
  1662. /* wait for specified event to occur
  1663. *
  1664. * Arguments: info pointer to device instance data
  1665. * mask pointer to bitmask of events to wait for
  1666. * Return Value: 0 if successful and bit mask updated with
  1667. * of events triggerred,
  1668. * otherwise error code
  1669. */
  1670. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1671. {
  1672. unsigned long flags;
  1673. int s;
  1674. int rc=0;
  1675. struct mgsl_icount cprev, cnow;
  1676. int events;
  1677. int mask;
  1678. struct _input_signal_events oldsigs, newsigs;
  1679. DECLARE_WAITQUEUE(wait, current);
  1680. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1681. if (rc)
  1682. return -EFAULT;
  1683. if (debug_level >= DEBUG_LEVEL_INFO)
  1684. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1685. spin_lock_irqsave(&info->lock,flags);
  1686. /* return immediately if state matches requested events */
  1687. get_signals(info);
  1688. s = info->serial_signals;
  1689. events = mask &
  1690. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1691. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1692. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1693. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1694. if (events) {
  1695. spin_unlock_irqrestore(&info->lock,flags);
  1696. goto exit;
  1697. }
  1698. /* save current irq counts */
  1699. cprev = info->icount;
  1700. oldsigs = info->input_signal_events;
  1701. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1702. (mask & MgslEvent_ExitHuntMode))
  1703. irq_enable(info, CHA, IRQ_EXITHUNT);
  1704. set_current_state(TASK_INTERRUPTIBLE);
  1705. add_wait_queue(&info->event_wait_q, &wait);
  1706. spin_unlock_irqrestore(&info->lock,flags);
  1707. for(;;) {
  1708. schedule();
  1709. if (signal_pending(current)) {
  1710. rc = -ERESTARTSYS;
  1711. break;
  1712. }
  1713. /* get current irq counts */
  1714. spin_lock_irqsave(&info->lock,flags);
  1715. cnow = info->icount;
  1716. newsigs = info->input_signal_events;
  1717. set_current_state(TASK_INTERRUPTIBLE);
  1718. spin_unlock_irqrestore(&info->lock,flags);
  1719. /* if no change, wait aborted for some reason */
  1720. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1721. newsigs.dsr_down == oldsigs.dsr_down &&
  1722. newsigs.dcd_up == oldsigs.dcd_up &&
  1723. newsigs.dcd_down == oldsigs.dcd_down &&
  1724. newsigs.cts_up == oldsigs.cts_up &&
  1725. newsigs.cts_down == oldsigs.cts_down &&
  1726. newsigs.ri_up == oldsigs.ri_up &&
  1727. newsigs.ri_down == oldsigs.ri_down &&
  1728. cnow.exithunt == cprev.exithunt &&
  1729. cnow.rxidle == cprev.rxidle) {
  1730. rc = -EIO;
  1731. break;
  1732. }
  1733. events = mask &
  1734. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1735. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1736. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1737. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1738. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1739. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1740. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1741. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1742. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1743. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1744. if (events)
  1745. break;
  1746. cprev = cnow;
  1747. oldsigs = newsigs;
  1748. }
  1749. remove_wait_queue(&info->event_wait_q, &wait);
  1750. set_current_state(TASK_RUNNING);
  1751. if (mask & MgslEvent_ExitHuntMode) {
  1752. spin_lock_irqsave(&info->lock,flags);
  1753. if (!waitqueue_active(&info->event_wait_q))
  1754. irq_disable(info, CHA, IRQ_EXITHUNT);
  1755. spin_unlock_irqrestore(&info->lock,flags);
  1756. }
  1757. exit:
  1758. if (rc == 0)
  1759. PUT_USER(rc, events, mask_ptr);
  1760. return rc;
  1761. }
  1762. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1763. {
  1764. unsigned long flags;
  1765. int rc;
  1766. struct mgsl_icount cprev, cnow;
  1767. DECLARE_WAITQUEUE(wait, current);
  1768. /* save current irq counts */
  1769. spin_lock_irqsave(&info->lock,flags);
  1770. cprev = info->icount;
  1771. add_wait_queue(&info->status_event_wait_q, &wait);
  1772. set_current_state(TASK_INTERRUPTIBLE);
  1773. spin_unlock_irqrestore(&info->lock,flags);
  1774. for(;;) {
  1775. schedule();
  1776. if (signal_pending(current)) {
  1777. rc = -ERESTARTSYS;
  1778. break;
  1779. }
  1780. /* get new irq counts */
  1781. spin_lock_irqsave(&info->lock,flags);
  1782. cnow = info->icount;
  1783. set_current_state(TASK_INTERRUPTIBLE);
  1784. spin_unlock_irqrestore(&info->lock,flags);
  1785. /* if no change, wait aborted for some reason */
  1786. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1787. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1788. rc = -EIO;
  1789. break;
  1790. }
  1791. /* check for change in caller specified modem input */
  1792. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1793. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1794. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1795. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1796. rc = 0;
  1797. break;
  1798. }
  1799. cprev = cnow;
  1800. }
  1801. remove_wait_queue(&info->status_event_wait_q, &wait);
  1802. set_current_state(TASK_RUNNING);
  1803. return rc;
  1804. }
  1805. /* return the state of the serial control and status signals
  1806. */
  1807. static int tiocmget(struct tty_struct *tty, struct file *file)
  1808. {
  1809. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1810. unsigned int result;
  1811. unsigned long flags;
  1812. spin_lock_irqsave(&info->lock,flags);
  1813. get_signals(info);
  1814. spin_unlock_irqrestore(&info->lock,flags);
  1815. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1816. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1817. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1818. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1819. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1820. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1821. if (debug_level >= DEBUG_LEVEL_INFO)
  1822. printk("%s(%d):%s tiocmget() value=%08X\n",
  1823. __FILE__,__LINE__, info->device_name, result );
  1824. return result;
  1825. }
  1826. /* set modem control signals (DTR/RTS)
  1827. */
  1828. static int tiocmset(struct tty_struct *tty, struct file *file,
  1829. unsigned int set, unsigned int clear)
  1830. {
  1831. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1832. unsigned long flags;
  1833. if (debug_level >= DEBUG_LEVEL_INFO)
  1834. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1835. __FILE__,__LINE__,info->device_name, set, clear);
  1836. if (set & TIOCM_RTS)
  1837. info->serial_signals |= SerialSignal_RTS;
  1838. if (set & TIOCM_DTR)
  1839. info->serial_signals |= SerialSignal_DTR;
  1840. if (clear & TIOCM_RTS)
  1841. info->serial_signals &= ~SerialSignal_RTS;
  1842. if (clear & TIOCM_DTR)
  1843. info->serial_signals &= ~SerialSignal_DTR;
  1844. spin_lock_irqsave(&info->lock,flags);
  1845. set_signals(info);
  1846. spin_unlock_irqrestore(&info->lock,flags);
  1847. return 0;
  1848. }
  1849. /* Set or clear transmit break condition
  1850. *
  1851. * Arguments: tty pointer to tty instance data
  1852. * break_state -1=set break condition, 0=clear
  1853. */
  1854. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1855. {
  1856. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1857. unsigned long flags;
  1858. if (debug_level >= DEBUG_LEVEL_INFO)
  1859. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1860. __FILE__,__LINE__, info->device_name, break_state);
  1861. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1862. return;
  1863. spin_lock_irqsave(&info->lock,flags);
  1864. if (break_state == -1)
  1865. set_reg_bits(info, CHA+DAFO, BIT6);
  1866. else
  1867. clear_reg_bits(info, CHA+DAFO, BIT6);
  1868. spin_unlock_irqrestore(&info->lock,flags);
  1869. }
  1870. /* Service an IOCTL request
  1871. *
  1872. * Arguments:
  1873. *
  1874. * tty pointer to tty instance data
  1875. * file pointer to associated file object for device
  1876. * cmd IOCTL command code
  1877. * arg command argument/context
  1878. *
  1879. * Return Value: 0 if success, otherwise error code
  1880. */
  1881. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1882. unsigned int cmd, unsigned long arg)
  1883. {
  1884. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1885. if (debug_level >= DEBUG_LEVEL_INFO)
  1886. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1887. info->device_name, cmd );
  1888. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1889. return -ENODEV;
  1890. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1891. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1892. if (tty->flags & (1 << TTY_IO_ERROR))
  1893. return -EIO;
  1894. }
  1895. return ioctl_common(info, cmd, arg);
  1896. }
  1897. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1898. {
  1899. int error;
  1900. struct mgsl_icount cnow; /* kernel counter temps */
  1901. struct serial_icounter_struct __user *p_cuser; /* user space */
  1902. void __user *argp = (void __user *)arg;
  1903. unsigned long flags;
  1904. switch (cmd) {
  1905. case MGSL_IOCGPARAMS:
  1906. return get_params(info, argp);
  1907. case MGSL_IOCSPARAMS:
  1908. return set_params(info, argp);
  1909. case MGSL_IOCGTXIDLE:
  1910. return get_txidle(info, argp);
  1911. case MGSL_IOCSTXIDLE:
  1912. return set_txidle(info, (int)arg);
  1913. case MGSL_IOCGIF:
  1914. return get_interface(info, argp);
  1915. case MGSL_IOCSIF:
  1916. return set_interface(info,(int)arg);
  1917. case MGSL_IOCTXENABLE:
  1918. return set_txenable(info,(int)arg);
  1919. case MGSL_IOCRXENABLE:
  1920. return set_rxenable(info,(int)arg);
  1921. case MGSL_IOCTXABORT:
  1922. return tx_abort(info);
  1923. case MGSL_IOCGSTATS:
  1924. return get_stats(info, argp);
  1925. case MGSL_IOCWAITEVENT:
  1926. return wait_events(info, argp);
  1927. case TIOCMIWAIT:
  1928. return modem_input_wait(info,(int)arg);
  1929. case TIOCGICOUNT:
  1930. spin_lock_irqsave(&info->lock,flags);
  1931. cnow = info->icount;
  1932. spin_unlock_irqrestore(&info->lock,flags);
  1933. p_cuser = argp;
  1934. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1935. if (error) return error;
  1936. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1937. if (error) return error;
  1938. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1939. if (error) return error;
  1940. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1941. if (error) return error;
  1942. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1943. if (error) return error;
  1944. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1945. if (error) return error;
  1946. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1947. if (error) return error;
  1948. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1949. if (error) return error;
  1950. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1951. if (error) return error;
  1952. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1953. if (error) return error;
  1954. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1955. if (error) return error;
  1956. return 0;
  1957. default:
  1958. return -ENOIOCTLCMD;
  1959. }
  1960. return 0;
  1961. }
  1962. /* Set new termios settings
  1963. *
  1964. * Arguments:
  1965. *
  1966. * tty pointer to tty structure
  1967. * termios pointer to buffer to hold returned old termios
  1968. */
  1969. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1970. {
  1971. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1972. unsigned long flags;
  1973. if (debug_level >= DEBUG_LEVEL_INFO)
  1974. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1975. tty->driver->name );
  1976. /* just return if nothing has changed */
  1977. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1978. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1979. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1980. return;
  1981. mgslpc_change_params(info);
  1982. /* Handle transition to B0 status */
  1983. if (old_termios->c_cflag & CBAUD &&
  1984. !(tty->termios->c_cflag & CBAUD)) {
  1985. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1986. spin_lock_irqsave(&info->lock,flags);
  1987. set_signals(info);
  1988. spin_unlock_irqrestore(&info->lock,flags);
  1989. }
  1990. /* Handle transition away from B0 status */
  1991. if (!(old_termios->c_cflag & CBAUD) &&
  1992. tty->termios->c_cflag & CBAUD) {
  1993. info->serial_signals |= SerialSignal_DTR;
  1994. if (!(tty->termios->c_cflag & CRTSCTS) ||
  1995. !test_bit(TTY_THROTTLED, &tty->flags)) {
  1996. info->serial_signals |= SerialSignal_RTS;
  1997. }
  1998. spin_lock_irqsave(&info->lock,flags);
  1999. set_signals(info);
  2000. spin_unlock_irqrestore(&info->lock,flags);
  2001. }
  2002. /* Handle turning off CRTSCTS */
  2003. if (old_termios->c_cflag & CRTSCTS &&
  2004. !(tty->termios->c_cflag & CRTSCTS)) {
  2005. tty->hw_stopped = 0;
  2006. tx_release(tty);
  2007. }
  2008. }
  2009. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2010. {
  2011. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2012. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2013. return;
  2014. if (debug_level >= DEBUG_LEVEL_INFO)
  2015. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2016. __FILE__,__LINE__, info->device_name, info->count);
  2017. if (!info->count)
  2018. return;
  2019. if (tty_hung_up_p(filp))
  2020. goto cleanup;
  2021. if ((tty->count == 1) && (info->count != 1)) {
  2022. /*
  2023. * tty->count is 1 and the tty structure will be freed.
  2024. * info->count should be one in this case.
  2025. * if it's not, correct it so that the port is shutdown.
  2026. */
  2027. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2028. "info->count is %d\n", info->count);
  2029. info->count = 1;
  2030. }
  2031. info->count--;
  2032. /* if at least one open remaining, leave hardware active */
  2033. if (info->count)
  2034. goto cleanup;
  2035. info->flags |= ASYNC_CLOSING;
  2036. /* set tty->closing to notify line discipline to
  2037. * only process XON/XOFF characters. Only the N_TTY
  2038. * discipline appears to use this (ppp does not).
  2039. */
  2040. tty->closing = 1;
  2041. /* wait for transmit data to clear all layers */
  2042. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2043. if (debug_level >= DEBUG_LEVEL_INFO)
  2044. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2045. __FILE__,__LINE__, info->device_name );
  2046. tty_wait_until_sent(tty, info->closing_wait);
  2047. }
  2048. if (info->flags & ASYNC_INITIALIZED)
  2049. mgslpc_wait_until_sent(tty, info->timeout);
  2050. mgslpc_flush_buffer(tty);
  2051. tty_ldisc_flush(tty);
  2052. shutdown(info);
  2053. tty->closing = 0;
  2054. info->tty = NULL;
  2055. if (info->blocked_open) {
  2056. if (info->close_delay) {
  2057. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2058. }
  2059. wake_up_interruptible(&info->open_wait);
  2060. }
  2061. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2062. wake_up_interruptible(&info->close_wait);
  2063. cleanup:
  2064. if (debug_level >= DEBUG_LEVEL_INFO)
  2065. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2066. tty->driver->name, info->count);
  2067. }
  2068. /* Wait until the transmitter is empty.
  2069. */
  2070. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2071. {
  2072. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2073. unsigned long orig_jiffies, char_time;
  2074. if (!info )
  2075. return;
  2076. if (debug_level >= DEBUG_LEVEL_INFO)
  2077. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2078. __FILE__,__LINE__, info->device_name );
  2079. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2080. return;
  2081. if (!(info->flags & ASYNC_INITIALIZED))
  2082. goto exit;
  2083. orig_jiffies = jiffies;
  2084. /* Set check interval to 1/5 of estimated time to
  2085. * send a character, and make it at least 1. The check
  2086. * interval should also be less than the timeout.
  2087. * Note: use tight timings here to satisfy the NIST-PCTS.
  2088. */
  2089. if ( info->params.data_rate ) {
  2090. char_time = info->timeout/(32 * 5);
  2091. if (!char_time)
  2092. char_time++;
  2093. } else
  2094. char_time = 1;
  2095. if (timeout)
  2096. char_time = min_t(unsigned long, char_time, timeout);
  2097. if (info->params.mode == MGSL_MODE_HDLC) {
  2098. while (info->tx_active) {
  2099. msleep_interruptible(jiffies_to_msecs(char_time));
  2100. if (signal_pending(current))
  2101. break;
  2102. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2103. break;
  2104. }
  2105. } else {
  2106. while ((info->tx_count || info->tx_active) &&
  2107. info->tx_enabled) {
  2108. msleep_interruptible(jiffies_to_msecs(char_time));
  2109. if (signal_pending(current))
  2110. break;
  2111. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2112. break;
  2113. }
  2114. }
  2115. exit:
  2116. if (debug_level >= DEBUG_LEVEL_INFO)
  2117. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2118. __FILE__,__LINE__, info->device_name );
  2119. }
  2120. /* Called by tty_hangup() when a hangup is signaled.
  2121. * This is the same as closing all open files for the port.
  2122. */
  2123. static void mgslpc_hangup(struct tty_struct *tty)
  2124. {
  2125. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2126. if (debug_level >= DEBUG_LEVEL_INFO)
  2127. printk("%s(%d):mgslpc_hangup(%s)\n",
  2128. __FILE__,__LINE__, info->device_name );
  2129. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2130. return;
  2131. mgslpc_flush_buffer(tty);
  2132. shutdown(info);
  2133. info->count = 0;
  2134. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2135. info->tty = NULL;
  2136. wake_up_interruptible(&info->open_wait);
  2137. }
  2138. /* Block the current process until the specified port
  2139. * is ready to be opened.
  2140. */
  2141. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2142. MGSLPC_INFO *info)
  2143. {
  2144. DECLARE_WAITQUEUE(wait, current);
  2145. int retval;
  2146. bool do_clocal = false;
  2147. bool extra_count = false;
  2148. unsigned long flags;
  2149. if (debug_level >= DEBUG_LEVEL_INFO)
  2150. printk("%s(%d):block_til_ready on %s\n",
  2151. __FILE__,__LINE__, tty->driver->name );
  2152. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2153. /* nonblock mode is set or port is not enabled */
  2154. /* just verify that callout device is not active */
  2155. info->flags |= ASYNC_NORMAL_ACTIVE;
  2156. return 0;
  2157. }
  2158. if (tty->termios->c_cflag & CLOCAL)
  2159. do_clocal = true;
  2160. /* Wait for carrier detect and the line to become
  2161. * free (i.e., not in use by the callout). While we are in
  2162. * this loop, info->count is dropped by one, so that
  2163. * mgslpc_close() knows when to free things. We restore it upon
  2164. * exit, either normal or abnormal.
  2165. */
  2166. retval = 0;
  2167. add_wait_queue(&info->open_wait, &wait);
  2168. if (debug_level >= DEBUG_LEVEL_INFO)
  2169. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2170. __FILE__,__LINE__, tty->driver->name, info->count );
  2171. spin_lock_irqsave(&info->lock, flags);
  2172. if (!tty_hung_up_p(filp)) {
  2173. extra_count = true;
  2174. info->count--;
  2175. }
  2176. spin_unlock_irqrestore(&info->lock, flags);
  2177. info->blocked_open++;
  2178. while (1) {
  2179. if ((tty->termios->c_cflag & CBAUD)) {
  2180. spin_lock_irqsave(&info->lock,flags);
  2181. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2182. set_signals(info);
  2183. spin_unlock_irqrestore(&info->lock,flags);
  2184. }
  2185. set_current_state(TASK_INTERRUPTIBLE);
  2186. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2187. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2188. -EAGAIN : -ERESTARTSYS;
  2189. break;
  2190. }
  2191. spin_lock_irqsave(&info->lock,flags);
  2192. get_signals(info);
  2193. spin_unlock_irqrestore(&info->lock,flags);
  2194. if (!(info->flags & ASYNC_CLOSING) &&
  2195. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2196. break;
  2197. }
  2198. if (signal_pending(current)) {
  2199. retval = -ERESTARTSYS;
  2200. break;
  2201. }
  2202. if (debug_level >= DEBUG_LEVEL_INFO)
  2203. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2204. __FILE__,__LINE__, tty->driver->name, info->count );
  2205. schedule();
  2206. }
  2207. set_current_state(TASK_RUNNING);
  2208. remove_wait_queue(&info->open_wait, &wait);
  2209. if (extra_count)
  2210. info->count++;
  2211. info->blocked_open--;
  2212. if (debug_level >= DEBUG_LEVEL_INFO)
  2213. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2214. __FILE__,__LINE__, tty->driver->name, info->count );
  2215. if (!retval)
  2216. info->flags |= ASYNC_NORMAL_ACTIVE;
  2217. return retval;
  2218. }
  2219. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2220. {
  2221. MGSLPC_INFO *info;
  2222. int retval, line;
  2223. unsigned long flags;
  2224. /* verify range of specified line number */
  2225. line = tty->index;
  2226. if ((line < 0) || (line >= mgslpc_device_count)) {
  2227. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2228. __FILE__,__LINE__,line);
  2229. return -ENODEV;
  2230. }
  2231. /* find the info structure for the specified line */
  2232. info = mgslpc_device_list;
  2233. while(info && info->line != line)
  2234. info = info->next_device;
  2235. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2236. return -ENODEV;
  2237. tty->driver_data = info;
  2238. info->tty = tty;
  2239. if (debug_level >= DEBUG_LEVEL_INFO)
  2240. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2241. __FILE__,__LINE__,tty->driver->name, info->count);
  2242. /* If port is closing, signal caller to try again */
  2243. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2244. if (info->flags & ASYNC_CLOSING)
  2245. interruptible_sleep_on(&info->close_wait);
  2246. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2247. -EAGAIN : -ERESTARTSYS);
  2248. goto cleanup;
  2249. }
  2250. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2251. spin_lock_irqsave(&info->netlock, flags);
  2252. if (info->netcount) {
  2253. retval = -EBUSY;
  2254. spin_unlock_irqrestore(&info->netlock, flags);
  2255. goto cleanup;
  2256. }
  2257. info->count++;
  2258. spin_unlock_irqrestore(&info->netlock, flags);
  2259. if (info->count == 1) {
  2260. /* 1st open on this device, init hardware */
  2261. retval = startup(info);
  2262. if (retval < 0)
  2263. goto cleanup;
  2264. }
  2265. retval = block_til_ready(tty, filp, info);
  2266. if (retval) {
  2267. if (debug_level >= DEBUG_LEVEL_INFO)
  2268. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2269. __FILE__,__LINE__, info->device_name, retval);
  2270. goto cleanup;
  2271. }
  2272. if (debug_level >= DEBUG_LEVEL_INFO)
  2273. printk("%s(%d):mgslpc_open(%s) success\n",
  2274. __FILE__,__LINE__, info->device_name);
  2275. retval = 0;
  2276. cleanup:
  2277. if (retval) {
  2278. if (tty->count == 1)
  2279. info->tty = NULL; /* tty layer will release tty struct */
  2280. if(info->count)
  2281. info->count--;
  2282. }
  2283. return retval;
  2284. }
  2285. /*
  2286. * /proc fs routines....
  2287. */
  2288. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2289. {
  2290. char stat_buf[30];
  2291. int ret;
  2292. unsigned long flags;
  2293. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2294. info->device_name, info->io_base, info->irq_level);
  2295. /* output current serial signal states */
  2296. spin_lock_irqsave(&info->lock,flags);
  2297. get_signals(info);
  2298. spin_unlock_irqrestore(&info->lock,flags);
  2299. stat_buf[0] = 0;
  2300. stat_buf[1] = 0;
  2301. if (info->serial_signals & SerialSignal_RTS)
  2302. strcat(stat_buf, "|RTS");
  2303. if (info->serial_signals & SerialSignal_CTS)
  2304. strcat(stat_buf, "|CTS");
  2305. if (info->serial_signals & SerialSignal_DTR)
  2306. strcat(stat_buf, "|DTR");
  2307. if (info->serial_signals & SerialSignal_DSR)
  2308. strcat(stat_buf, "|DSR");
  2309. if (info->serial_signals & SerialSignal_DCD)
  2310. strcat(stat_buf, "|CD");
  2311. if (info->serial_signals & SerialSignal_RI)
  2312. strcat(stat_buf, "|RI");
  2313. if (info->params.mode == MGSL_MODE_HDLC) {
  2314. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2315. info->icount.txok, info->icount.rxok);
  2316. if (info->icount.txunder)
  2317. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2318. if (info->icount.txabort)
  2319. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2320. if (info->icount.rxshort)
  2321. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2322. if (info->icount.rxlong)
  2323. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2324. if (info->icount.rxover)
  2325. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2326. if (info->icount.rxcrc)
  2327. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2328. } else {
  2329. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2330. info->icount.tx, info->icount.rx);
  2331. if (info->icount.frame)
  2332. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2333. if (info->icount.parity)
  2334. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2335. if (info->icount.brk)
  2336. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2337. if (info->icount.overrun)
  2338. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2339. }
  2340. /* Append serial signal status to end */
  2341. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2342. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2343. info->tx_active,info->bh_requested,info->bh_running,
  2344. info->pending_bh);
  2345. return ret;
  2346. }
  2347. /* Called to print information about devices
  2348. */
  2349. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2350. int *eof, void *data)
  2351. {
  2352. int len = 0, l;
  2353. off_t begin = 0;
  2354. MGSLPC_INFO *info;
  2355. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2356. info = mgslpc_device_list;
  2357. while( info ) {
  2358. l = line_info(page + len, info);
  2359. len += l;
  2360. if (len+begin > off+count)
  2361. goto done;
  2362. if (len+begin < off) {
  2363. begin += len;
  2364. len = 0;
  2365. }
  2366. info = info->next_device;
  2367. }
  2368. *eof = 1;
  2369. done:
  2370. if (off >= len+begin)
  2371. return 0;
  2372. *start = page + (off-begin);
  2373. return ((count < begin+len-off) ? count : begin+len-off);
  2374. }
  2375. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2376. {
  2377. /* each buffer has header and data */
  2378. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2379. /* calculate total allocation size for 8 buffers */
  2380. info->rx_buf_total_size = info->rx_buf_size * 8;
  2381. /* limit total allocated memory */
  2382. if (info->rx_buf_total_size > 0x10000)
  2383. info->rx_buf_total_size = 0x10000;
  2384. /* calculate number of buffers */
  2385. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2386. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2387. if (info->rx_buf == NULL)
  2388. return -ENOMEM;
  2389. rx_reset_buffers(info);
  2390. return 0;
  2391. }
  2392. static void rx_free_buffers(MGSLPC_INFO *info)
  2393. {
  2394. kfree(info->rx_buf);
  2395. info->rx_buf = NULL;
  2396. }
  2397. static int claim_resources(MGSLPC_INFO *info)
  2398. {
  2399. if (rx_alloc_buffers(info) < 0 ) {
  2400. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2401. release_resources(info);
  2402. return -ENODEV;
  2403. }
  2404. return 0;
  2405. }
  2406. static void release_resources(MGSLPC_INFO *info)
  2407. {
  2408. if (debug_level >= DEBUG_LEVEL_INFO)
  2409. printk("release_resources(%s)\n", info->device_name);
  2410. rx_free_buffers(info);
  2411. }
  2412. /* Add the specified device instance data structure to the
  2413. * global linked list of devices and increment the device count.
  2414. *
  2415. * Arguments: info pointer to device instance data
  2416. */
  2417. static void mgslpc_add_device(MGSLPC_INFO *info)
  2418. {
  2419. info->next_device = NULL;
  2420. info->line = mgslpc_device_count;
  2421. sprintf(info->device_name,"ttySLP%d",info->line);
  2422. if (info->line < MAX_DEVICE_COUNT) {
  2423. if (maxframe[info->line])
  2424. info->max_frame_size = maxframe[info->line];
  2425. info->dosyncppp = dosyncppp[info->line];
  2426. }
  2427. mgslpc_device_count++;
  2428. if (!mgslpc_device_list)
  2429. mgslpc_device_list = info;
  2430. else {
  2431. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2432. while( current_dev->next_device )
  2433. current_dev = current_dev->next_device;
  2434. current_dev->next_device = info;
  2435. }
  2436. if (info->max_frame_size < 4096)
  2437. info->max_frame_size = 4096;
  2438. else if (info->max_frame_size > 65535)
  2439. info->max_frame_size = 65535;
  2440. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2441. info->device_name, info->io_base, info->irq_level);
  2442. #if SYNCLINK_GENERIC_HDLC
  2443. hdlcdev_init(info);
  2444. #endif
  2445. }
  2446. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2447. {
  2448. MGSLPC_INFO *info = mgslpc_device_list;
  2449. MGSLPC_INFO *last = NULL;
  2450. while(info) {
  2451. if (info == remove_info) {
  2452. if (last)
  2453. last->next_device = info->next_device;
  2454. else
  2455. mgslpc_device_list = info->next_device;
  2456. #if SYNCLINK_GENERIC_HDLC
  2457. hdlcdev_exit(info);
  2458. #endif
  2459. release_resources(info);
  2460. kfree(info);
  2461. mgslpc_device_count--;
  2462. return;
  2463. }
  2464. last = info;
  2465. info = info->next_device;
  2466. }
  2467. }
  2468. static struct pcmcia_device_id mgslpc_ids[] = {
  2469. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2470. PCMCIA_DEVICE_NULL
  2471. };
  2472. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2473. static struct pcmcia_driver mgslpc_driver = {
  2474. .owner = THIS_MODULE,
  2475. .drv = {
  2476. .name = "synclink_cs",
  2477. },
  2478. .probe = mgslpc_probe,
  2479. .remove = mgslpc_detach,
  2480. .id_table = mgslpc_ids,
  2481. .suspend = mgslpc_suspend,
  2482. .resume = mgslpc_resume,
  2483. };
  2484. static const struct tty_operations mgslpc_ops = {
  2485. .open = mgslpc_open,
  2486. .close = mgslpc_close,
  2487. .write = mgslpc_write,
  2488. .put_char = mgslpc_put_char,
  2489. .flush_chars = mgslpc_flush_chars,
  2490. .write_room = mgslpc_write_room,
  2491. .chars_in_buffer = mgslpc_chars_in_buffer,
  2492. .flush_buffer = mgslpc_flush_buffer,
  2493. .ioctl = mgslpc_ioctl,
  2494. .throttle = mgslpc_throttle,
  2495. .unthrottle = mgslpc_unthrottle,
  2496. .send_xchar = mgslpc_send_xchar,
  2497. .break_ctl = mgslpc_break,
  2498. .wait_until_sent = mgslpc_wait_until_sent,
  2499. .read_proc = mgslpc_read_proc,
  2500. .set_termios = mgslpc_set_termios,
  2501. .stop = tx_pause,
  2502. .start = tx_release,
  2503. .hangup = mgslpc_hangup,
  2504. .tiocmget = tiocmget,
  2505. .tiocmset = tiocmset,
  2506. };
  2507. static void synclink_cs_cleanup(void)
  2508. {
  2509. int rc;
  2510. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2511. while(mgslpc_device_list)
  2512. mgslpc_remove_device(mgslpc_device_list);
  2513. if (serial_driver) {
  2514. if ((rc = tty_unregister_driver(serial_driver)))
  2515. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2516. __FILE__,__LINE__,rc);
  2517. put_tty_driver(serial_driver);
  2518. }
  2519. pcmcia_unregister_driver(&mgslpc_driver);
  2520. }
  2521. static int __init synclink_cs_init(void)
  2522. {
  2523. int rc;
  2524. if (break_on_load) {
  2525. mgslpc_get_text_ptr();
  2526. BREAKPOINT();
  2527. }
  2528. printk("%s %s\n", driver_name, driver_version);
  2529. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2530. return rc;
  2531. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2532. if (!serial_driver) {
  2533. rc = -ENOMEM;
  2534. goto error;
  2535. }
  2536. /* Initialize the tty_driver structure */
  2537. serial_driver->owner = THIS_MODULE;
  2538. serial_driver->driver_name = "synclink_cs";
  2539. serial_driver->name = "ttySLP";
  2540. serial_driver->major = ttymajor;
  2541. serial_driver->minor_start = 64;
  2542. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2543. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2544. serial_driver->init_termios = tty_std_termios;
  2545. serial_driver->init_termios.c_cflag =
  2546. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2547. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2548. tty_set_operations(serial_driver, &mgslpc_ops);
  2549. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2550. printk("%s(%d):Couldn't register serial driver\n",
  2551. __FILE__,__LINE__);
  2552. put_tty_driver(serial_driver);
  2553. serial_driver = NULL;
  2554. goto error;
  2555. }
  2556. printk("%s %s, tty major#%d\n",
  2557. driver_name, driver_version,
  2558. serial_driver->major);
  2559. return 0;
  2560. error:
  2561. synclink_cs_cleanup();
  2562. return rc;
  2563. }
  2564. static void __exit synclink_cs_exit(void)
  2565. {
  2566. synclink_cs_cleanup();
  2567. }
  2568. module_init(synclink_cs_init);
  2569. module_exit(synclink_cs_exit);
  2570. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2571. {
  2572. unsigned int M, N;
  2573. unsigned char val;
  2574. /* note:standard BRG mode is broken in V3.2 chip
  2575. * so enhanced mode is always used
  2576. */
  2577. if (rate) {
  2578. N = 3686400 / rate;
  2579. if (!N)
  2580. N = 1;
  2581. N >>= 1;
  2582. for (M = 1; N > 64 && M < 16; M++)
  2583. N >>= 1;
  2584. N--;
  2585. /* BGR[5..0] = N
  2586. * BGR[9..6] = M
  2587. * BGR[7..0] contained in BGR register
  2588. * BGR[9..8] contained in CCR2[7..6]
  2589. * divisor = (N+1)*2^M
  2590. *
  2591. * Note: M *must* not be zero (causes asymetric duty cycle)
  2592. */
  2593. write_reg(info, (unsigned char) (channel + BGR),
  2594. (unsigned char) ((M << 6) + N));
  2595. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2596. val |= ((M << 4) & 0xc0);
  2597. write_reg(info, (unsigned char) (channel + CCR2), val);
  2598. }
  2599. }
  2600. /* Enabled the AUX clock output at the specified frequency.
  2601. */
  2602. static void enable_auxclk(MGSLPC_INFO *info)
  2603. {
  2604. unsigned char val;
  2605. /* MODE
  2606. *
  2607. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2608. * 05 ADM Address Mode, 0 = no addr recognition
  2609. * 04 TMD Timer Mode, 0 = external
  2610. * 03 RAC Receiver Active, 0 = inactive
  2611. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2612. * 01 TRS Timer Resolution, 1=512
  2613. * 00 TLP Test Loop, 0 = no loop
  2614. *
  2615. * 1000 0010
  2616. */
  2617. val = 0x82;
  2618. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2619. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2620. val |= BIT2;
  2621. write_reg(info, CHB + MODE, val);
  2622. /* CCR0
  2623. *
  2624. * 07 PU Power Up, 1=active, 0=power down
  2625. * 06 MCE Master Clock Enable, 1=enabled
  2626. * 05 Reserved, 0
  2627. * 04..02 SC[2..0] Encoding
  2628. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2629. *
  2630. * 11000000
  2631. */
  2632. write_reg(info, CHB + CCR0, 0xc0);
  2633. /* CCR1
  2634. *
  2635. * 07 SFLG Shared Flag, 0 = disable shared flags
  2636. * 06 GALP Go Active On Loop, 0 = not used
  2637. * 05 GLP Go On Loop, 0 = not used
  2638. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2639. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2640. * 02..00 CM[2..0] Clock Mode
  2641. *
  2642. * 0001 0111
  2643. */
  2644. write_reg(info, CHB + CCR1, 0x17);
  2645. /* CCR2 (Channel B)
  2646. *
  2647. * 07..06 BGR[9..8] Baud rate bits 9..8
  2648. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2649. * 04 SSEL Clock source select, 1=submode b
  2650. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2651. * 02 RWX Read/Write Exchange 0=disabled
  2652. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2653. * 00 DIV, data inversion 0=disabled, 1=enabled
  2654. *
  2655. * 0011 1000
  2656. */
  2657. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2658. write_reg(info, CHB + CCR2, 0x38);
  2659. else
  2660. write_reg(info, CHB + CCR2, 0x30);
  2661. /* CCR4
  2662. *
  2663. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2664. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2665. * 05 TST1 Test Pin, 0=normal operation
  2666. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2667. * 03..02 Reserved, must be 0
  2668. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2669. *
  2670. * 0101 0000
  2671. */
  2672. write_reg(info, CHB + CCR4, 0x50);
  2673. /* if auxclk not enabled, set internal BRG so
  2674. * CTS transitions can be detected (requires TxC)
  2675. */
  2676. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2677. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2678. else
  2679. mgslpc_set_rate(info, CHB, 921600);
  2680. }
  2681. static void loopback_enable(MGSLPC_INFO *info)
  2682. {
  2683. unsigned char val;
  2684. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2685. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2686. write_reg(info, CHA + CCR1, val);
  2687. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2688. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2689. write_reg(info, CHA + CCR2, val);
  2690. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2691. if (info->params.clock_speed)
  2692. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2693. else
  2694. mgslpc_set_rate(info, CHA, 1843200);
  2695. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2696. val = read_reg(info, CHA + MODE) | BIT0;
  2697. write_reg(info, CHA + MODE, val);
  2698. }
  2699. static void hdlc_mode(MGSLPC_INFO *info)
  2700. {
  2701. unsigned char val;
  2702. unsigned char clkmode, clksubmode;
  2703. /* disable all interrupts */
  2704. irq_disable(info, CHA, 0xffff);
  2705. irq_disable(info, CHB, 0xffff);
  2706. port_irq_disable(info, 0xff);
  2707. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2708. clkmode = clksubmode = 0;
  2709. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2710. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2711. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2712. clkmode = 7;
  2713. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2714. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2715. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2716. clkmode = 7;
  2717. clksubmode = 1;
  2718. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2719. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2720. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2721. clkmode = 6;
  2722. clksubmode = 1;
  2723. } else {
  2724. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2725. clkmode = 6;
  2726. }
  2727. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2728. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2729. clksubmode = 1;
  2730. }
  2731. /* MODE
  2732. *
  2733. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2734. * 05 ADM Address Mode, 0 = no addr recognition
  2735. * 04 TMD Timer Mode, 0 = external
  2736. * 03 RAC Receiver Active, 0 = inactive
  2737. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2738. * 01 TRS Timer Resolution, 1=512
  2739. * 00 TLP Test Loop, 0 = no loop
  2740. *
  2741. * 1000 0010
  2742. */
  2743. val = 0x82;
  2744. if (info->params.loopback)
  2745. val |= BIT0;
  2746. /* preserve RTS state */
  2747. if (info->serial_signals & SerialSignal_RTS)
  2748. val |= BIT2;
  2749. write_reg(info, CHA + MODE, val);
  2750. /* CCR0
  2751. *
  2752. * 07 PU Power Up, 1=active, 0=power down
  2753. * 06 MCE Master Clock Enable, 1=enabled
  2754. * 05 Reserved, 0
  2755. * 04..02 SC[2..0] Encoding
  2756. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2757. *
  2758. * 11000000
  2759. */
  2760. val = 0xc0;
  2761. switch (info->params.encoding)
  2762. {
  2763. case HDLC_ENCODING_NRZI:
  2764. val |= BIT3;
  2765. break;
  2766. case HDLC_ENCODING_BIPHASE_SPACE:
  2767. val |= BIT4;
  2768. break; // FM0
  2769. case HDLC_ENCODING_BIPHASE_MARK:
  2770. val |= BIT4 + BIT2;
  2771. break; // FM1
  2772. case HDLC_ENCODING_BIPHASE_LEVEL:
  2773. val |= BIT4 + BIT3;
  2774. break; // Manchester
  2775. }
  2776. write_reg(info, CHA + CCR0, val);
  2777. /* CCR1
  2778. *
  2779. * 07 SFLG Shared Flag, 0 = disable shared flags
  2780. * 06 GALP Go Active On Loop, 0 = not used
  2781. * 05 GLP Go On Loop, 0 = not used
  2782. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2783. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2784. * 02..00 CM[2..0] Clock Mode
  2785. *
  2786. * 0001 0000
  2787. */
  2788. val = 0x10 + clkmode;
  2789. write_reg(info, CHA + CCR1, val);
  2790. /* CCR2
  2791. *
  2792. * 07..06 BGR[9..8] Baud rate bits 9..8
  2793. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2794. * 04 SSEL Clock source select, 1=submode b
  2795. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2796. * 02 RWX Read/Write Exchange 0=disabled
  2797. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2798. * 00 DIV, data inversion 0=disabled, 1=enabled
  2799. *
  2800. * 0000 0000
  2801. */
  2802. val = 0x00;
  2803. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2804. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2805. val |= BIT5;
  2806. if (clksubmode)
  2807. val |= BIT4;
  2808. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2809. val |= BIT1;
  2810. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2811. val |= BIT0;
  2812. write_reg(info, CHA + CCR2, val);
  2813. /* CCR3
  2814. *
  2815. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2816. * 05 EPT Enable preamble transmission, 1=enabled
  2817. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2818. * 03 CRL CRC Reset Level, 0=FFFF
  2819. * 02 RCRC Rx CRC 0=On 1=Off
  2820. * 01 TCRC Tx CRC 0=On 1=Off
  2821. * 00 PSD DPLL Phase Shift Disable
  2822. *
  2823. * 0000 0000
  2824. */
  2825. val = 0x00;
  2826. if (info->params.crc_type == HDLC_CRC_NONE)
  2827. val |= BIT2 + BIT1;
  2828. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2829. val |= BIT5;
  2830. switch (info->params.preamble_length)
  2831. {
  2832. case HDLC_PREAMBLE_LENGTH_16BITS:
  2833. val |= BIT6;
  2834. break;
  2835. case HDLC_PREAMBLE_LENGTH_32BITS:
  2836. val |= BIT6;
  2837. break;
  2838. case HDLC_PREAMBLE_LENGTH_64BITS:
  2839. val |= BIT7 + BIT6;
  2840. break;
  2841. }
  2842. write_reg(info, CHA + CCR3, val);
  2843. /* PRE - Preamble pattern */
  2844. val = 0;
  2845. switch (info->params.preamble)
  2846. {
  2847. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2848. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2849. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2850. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2851. }
  2852. write_reg(info, CHA + PRE, val);
  2853. /* CCR4
  2854. *
  2855. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2856. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2857. * 05 TST1 Test Pin, 0=normal operation
  2858. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2859. * 03..02 Reserved, must be 0
  2860. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2861. *
  2862. * 0101 0000
  2863. */
  2864. val = 0x50;
  2865. write_reg(info, CHA + CCR4, val);
  2866. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2867. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2868. else
  2869. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2870. /* RLCR Receive length check register
  2871. *
  2872. * 7 1=enable receive length check
  2873. * 6..0 Max frame length = (RL + 1) * 32
  2874. */
  2875. write_reg(info, CHA + RLCR, 0);
  2876. /* XBCH Transmit Byte Count High
  2877. *
  2878. * 07 DMA mode, 0 = interrupt driven
  2879. * 06 NRM, 0=ABM (ignored)
  2880. * 05 CAS Carrier Auto Start
  2881. * 04 XC Transmit Continuously (ignored)
  2882. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2883. *
  2884. * 0000 0000
  2885. */
  2886. val = 0x00;
  2887. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2888. val |= BIT5;
  2889. write_reg(info, CHA + XBCH, val);
  2890. enable_auxclk(info);
  2891. if (info->params.loopback || info->testing_irq)
  2892. loopback_enable(info);
  2893. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2894. {
  2895. irq_enable(info, CHB, IRQ_CTS);
  2896. /* PVR[3] 1=AUTO CTS active */
  2897. set_reg_bits(info, CHA + PVR, BIT3);
  2898. } else
  2899. clear_reg_bits(info, CHA + PVR, BIT3);
  2900. irq_enable(info, CHA,
  2901. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2902. IRQ_UNDERRUN + IRQ_TXFIFO);
  2903. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2904. wait_command_complete(info, CHA);
  2905. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2906. /* Master clock mode enabled above to allow reset commands
  2907. * to complete even if no data clocks are present.
  2908. *
  2909. * Disable master clock mode for normal communications because
  2910. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2911. * IRQ when in master clock mode.
  2912. *
  2913. * Leave master clock mode enabled for IRQ test because the
  2914. * timer IRQ used by the test can only happen in master clock mode.
  2915. */
  2916. if (!info->testing_irq)
  2917. clear_reg_bits(info, CHA + CCR0, BIT6);
  2918. tx_set_idle(info);
  2919. tx_stop(info);
  2920. rx_stop(info);
  2921. }
  2922. static void rx_stop(MGSLPC_INFO *info)
  2923. {
  2924. if (debug_level >= DEBUG_LEVEL_ISR)
  2925. printk("%s(%d):rx_stop(%s)\n",
  2926. __FILE__,__LINE__, info->device_name );
  2927. /* MODE:03 RAC Receiver Active, 0=inactive */
  2928. clear_reg_bits(info, CHA + MODE, BIT3);
  2929. info->rx_enabled = false;
  2930. info->rx_overflow = false;
  2931. }
  2932. static void rx_start(MGSLPC_INFO *info)
  2933. {
  2934. if (debug_level >= DEBUG_LEVEL_ISR)
  2935. printk("%s(%d):rx_start(%s)\n",
  2936. __FILE__,__LINE__, info->device_name );
  2937. rx_reset_buffers(info);
  2938. info->rx_enabled = false;
  2939. info->rx_overflow = false;
  2940. /* MODE:03 RAC Receiver Active, 1=active */
  2941. set_reg_bits(info, CHA + MODE, BIT3);
  2942. info->rx_enabled = true;
  2943. }
  2944. static void tx_start(MGSLPC_INFO *info)
  2945. {
  2946. if (debug_level >= DEBUG_LEVEL_ISR)
  2947. printk("%s(%d):tx_start(%s)\n",
  2948. __FILE__,__LINE__, info->device_name );
  2949. if (info->tx_count) {
  2950. /* If auto RTS enabled and RTS is inactive, then assert */
  2951. /* RTS and set a flag indicating that the driver should */
  2952. /* negate RTS when the transmission completes. */
  2953. info->drop_rts_on_tx_done = false;
  2954. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2955. get_signals(info);
  2956. if (!(info->serial_signals & SerialSignal_RTS)) {
  2957. info->serial_signals |= SerialSignal_RTS;
  2958. set_signals(info);
  2959. info->drop_rts_on_tx_done = true;
  2960. }
  2961. }
  2962. if (info->params.mode == MGSL_MODE_ASYNC) {
  2963. if (!info->tx_active) {
  2964. info->tx_active = true;
  2965. tx_ready(info);
  2966. }
  2967. } else {
  2968. info->tx_active = true;
  2969. tx_ready(info);
  2970. mod_timer(&info->tx_timer, jiffies +
  2971. msecs_to_jiffies(5000));
  2972. }
  2973. }
  2974. if (!info->tx_enabled)
  2975. info->tx_enabled = true;
  2976. }
  2977. static void tx_stop(MGSLPC_INFO *info)
  2978. {
  2979. if (debug_level >= DEBUG_LEVEL_ISR)
  2980. printk("%s(%d):tx_stop(%s)\n",
  2981. __FILE__,__LINE__, info->device_name );
  2982. del_timer(&info->tx_timer);
  2983. info->tx_enabled = false;
  2984. info->tx_active = false;
  2985. }
  2986. /* Reset the adapter to a known state and prepare it for further use.
  2987. */
  2988. static void reset_device(MGSLPC_INFO *info)
  2989. {
  2990. /* power up both channels (set BIT7) */
  2991. write_reg(info, CHA + CCR0, 0x80);
  2992. write_reg(info, CHB + CCR0, 0x80);
  2993. write_reg(info, CHA + MODE, 0);
  2994. write_reg(info, CHB + MODE, 0);
  2995. /* disable all interrupts */
  2996. irq_disable(info, CHA, 0xffff);
  2997. irq_disable(info, CHB, 0xffff);
  2998. port_irq_disable(info, 0xff);
  2999. /* PCR Port Configuration Register
  3000. *
  3001. * 07..04 DEC[3..0] Serial I/F select outputs
  3002. * 03 output, 1=AUTO CTS control enabled
  3003. * 02 RI Ring Indicator input 0=active
  3004. * 01 DSR input 0=active
  3005. * 00 DTR output 0=active
  3006. *
  3007. * 0000 0110
  3008. */
  3009. write_reg(info, PCR, 0x06);
  3010. /* PVR Port Value Register
  3011. *
  3012. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3013. * 03 AUTO CTS output 1=enabled
  3014. * 02 RI Ring Indicator input
  3015. * 01 DSR input
  3016. * 00 DTR output (1=inactive)
  3017. *
  3018. * 0000 0001
  3019. */
  3020. // write_reg(info, PVR, PVR_DTR);
  3021. /* IPC Interrupt Port Configuration
  3022. *
  3023. * 07 VIS 1=Masked interrupts visible
  3024. * 06..05 Reserved, 0
  3025. * 04..03 SLA Slave address, 00 ignored
  3026. * 02 CASM Cascading Mode, 1=daisy chain
  3027. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3028. *
  3029. * 0000 0101
  3030. */
  3031. write_reg(info, IPC, 0x05);
  3032. }
  3033. static void async_mode(MGSLPC_INFO *info)
  3034. {
  3035. unsigned char val;
  3036. /* disable all interrupts */
  3037. irq_disable(info, CHA, 0xffff);
  3038. irq_disable(info, CHB, 0xffff);
  3039. port_irq_disable(info, 0xff);
  3040. /* MODE
  3041. *
  3042. * 07 Reserved, 0
  3043. * 06 FRTS RTS State, 0=active
  3044. * 05 FCTS Flow Control on CTS
  3045. * 04 FLON Flow Control Enable
  3046. * 03 RAC Receiver Active, 0 = inactive
  3047. * 02 RTS 0=Auto RTS, 1=manual RTS
  3048. * 01 TRS Timer Resolution, 1=512
  3049. * 00 TLP Test Loop, 0 = no loop
  3050. *
  3051. * 0000 0110
  3052. */
  3053. val = 0x06;
  3054. if (info->params.loopback)
  3055. val |= BIT0;
  3056. /* preserve RTS state */
  3057. if (!(info->serial_signals & SerialSignal_RTS))
  3058. val |= BIT6;
  3059. write_reg(info, CHA + MODE, val);
  3060. /* CCR0
  3061. *
  3062. * 07 PU Power Up, 1=active, 0=power down
  3063. * 06 MCE Master Clock Enable, 1=enabled
  3064. * 05 Reserved, 0
  3065. * 04..02 SC[2..0] Encoding, 000=NRZ
  3066. * 01..00 SM[1..0] Serial Mode, 11=Async
  3067. *
  3068. * 1000 0011
  3069. */
  3070. write_reg(info, CHA + CCR0, 0x83);
  3071. /* CCR1
  3072. *
  3073. * 07..05 Reserved, 0
  3074. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3075. * 03 BCR Bit Clock Rate, 1=16x
  3076. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3077. *
  3078. * 0001 1111
  3079. */
  3080. write_reg(info, CHA + CCR1, 0x1f);
  3081. /* CCR2 (channel A)
  3082. *
  3083. * 07..06 BGR[9..8] Baud rate bits 9..8
  3084. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3085. * 04 SSEL Clock source select, 1=submode b
  3086. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3087. * 02 RWX Read/Write Exchange 0=disabled
  3088. * 01 Reserved, 0
  3089. * 00 DIV, data inversion 0=disabled, 1=enabled
  3090. *
  3091. * 0001 0000
  3092. */
  3093. write_reg(info, CHA + CCR2, 0x10);
  3094. /* CCR3
  3095. *
  3096. * 07..01 Reserved, 0
  3097. * 00 PSD DPLL Phase Shift Disable
  3098. *
  3099. * 0000 0000
  3100. */
  3101. write_reg(info, CHA + CCR3, 0);
  3102. /* CCR4
  3103. *
  3104. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3105. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3106. * 05 TST1 Test Pin, 0=normal operation
  3107. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3108. * 03..00 Reserved, must be 0
  3109. *
  3110. * 0101 0000
  3111. */
  3112. write_reg(info, CHA + CCR4, 0x50);
  3113. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3114. /* DAFO Data Format
  3115. *
  3116. * 07 Reserved, 0
  3117. * 06 XBRK transmit break, 0=normal operation
  3118. * 05 Stop bits (0=1, 1=2)
  3119. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3120. * 02 PAREN Parity Enable
  3121. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3122. *
  3123. */
  3124. val = 0x00;
  3125. if (info->params.data_bits != 8)
  3126. val |= BIT0; /* 7 bits */
  3127. if (info->params.stop_bits != 1)
  3128. val |= BIT5;
  3129. if (info->params.parity != ASYNC_PARITY_NONE)
  3130. {
  3131. val |= BIT2; /* Parity enable */
  3132. if (info->params.parity == ASYNC_PARITY_ODD)
  3133. val |= BIT3;
  3134. else
  3135. val |= BIT4;
  3136. }
  3137. write_reg(info, CHA + DAFO, val);
  3138. /* RFC Rx FIFO Control
  3139. *
  3140. * 07 Reserved, 0
  3141. * 06 DPS, 1=parity bit not stored in data byte
  3142. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3143. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3144. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3145. * 01 Reserved, 0
  3146. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3147. *
  3148. * 0101 1100
  3149. */
  3150. write_reg(info, CHA + RFC, 0x5c);
  3151. /* RLCR Receive length check register
  3152. *
  3153. * Max frame length = (RL + 1) * 32
  3154. */
  3155. write_reg(info, CHA + RLCR, 0);
  3156. /* XBCH Transmit Byte Count High
  3157. *
  3158. * 07 DMA mode, 0 = interrupt driven
  3159. * 06 NRM, 0=ABM (ignored)
  3160. * 05 CAS Carrier Auto Start
  3161. * 04 XC Transmit Continuously (ignored)
  3162. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3163. *
  3164. * 0000 0000
  3165. */
  3166. val = 0x00;
  3167. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3168. val |= BIT5;
  3169. write_reg(info, CHA + XBCH, val);
  3170. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3171. irq_enable(info, CHA, IRQ_CTS);
  3172. /* MODE:03 RAC Receiver Active, 1=active */
  3173. set_reg_bits(info, CHA + MODE, BIT3);
  3174. enable_auxclk(info);
  3175. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3176. irq_enable(info, CHB, IRQ_CTS);
  3177. /* PVR[3] 1=AUTO CTS active */
  3178. set_reg_bits(info, CHA + PVR, BIT3);
  3179. } else
  3180. clear_reg_bits(info, CHA + PVR, BIT3);
  3181. irq_enable(info, CHA,
  3182. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3183. IRQ_ALLSENT + IRQ_TXFIFO);
  3184. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3185. wait_command_complete(info, CHA);
  3186. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3187. }
  3188. /* Set the HDLC idle mode for the transmitter.
  3189. */
  3190. static void tx_set_idle(MGSLPC_INFO *info)
  3191. {
  3192. /* Note: ESCC2 only supports flags and one idle modes */
  3193. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3194. set_reg_bits(info, CHA + CCR1, BIT3);
  3195. else
  3196. clear_reg_bits(info, CHA + CCR1, BIT3);
  3197. }
  3198. /* get state of the V24 status (input) signals.
  3199. */
  3200. static void get_signals(MGSLPC_INFO *info)
  3201. {
  3202. unsigned char status = 0;
  3203. /* preserve DTR and RTS */
  3204. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3205. if (read_reg(info, CHB + VSTR) & BIT7)
  3206. info->serial_signals |= SerialSignal_DCD;
  3207. if (read_reg(info, CHB + STAR) & BIT1)
  3208. info->serial_signals |= SerialSignal_CTS;
  3209. status = read_reg(info, CHA + PVR);
  3210. if (!(status & PVR_RI))
  3211. info->serial_signals |= SerialSignal_RI;
  3212. if (!(status & PVR_DSR))
  3213. info->serial_signals |= SerialSignal_DSR;
  3214. }
  3215. /* Set the state of DTR and RTS based on contents of
  3216. * serial_signals member of device extension.
  3217. */
  3218. static void set_signals(MGSLPC_INFO *info)
  3219. {
  3220. unsigned char val;
  3221. val = read_reg(info, CHA + MODE);
  3222. if (info->params.mode == MGSL_MODE_ASYNC) {
  3223. if (info->serial_signals & SerialSignal_RTS)
  3224. val &= ~BIT6;
  3225. else
  3226. val |= BIT6;
  3227. } else {
  3228. if (info->serial_signals & SerialSignal_RTS)
  3229. val |= BIT2;
  3230. else
  3231. val &= ~BIT2;
  3232. }
  3233. write_reg(info, CHA + MODE, val);
  3234. if (info->serial_signals & SerialSignal_DTR)
  3235. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3236. else
  3237. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3238. }
  3239. static void rx_reset_buffers(MGSLPC_INFO *info)
  3240. {
  3241. RXBUF *buf;
  3242. int i;
  3243. info->rx_put = 0;
  3244. info->rx_get = 0;
  3245. info->rx_frame_count = 0;
  3246. for (i=0 ; i < info->rx_buf_count ; i++) {
  3247. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3248. buf->status = buf->count = 0;
  3249. }
  3250. }
  3251. /* Attempt to return a received HDLC frame
  3252. * Only frames received without errors are returned.
  3253. *
  3254. * Returns true if frame returned, otherwise false
  3255. */
  3256. static bool rx_get_frame(MGSLPC_INFO *info)
  3257. {
  3258. unsigned short status;
  3259. RXBUF *buf;
  3260. unsigned int framesize = 0;
  3261. unsigned long flags;
  3262. struct tty_struct *tty = info->tty;
  3263. bool return_frame = false;
  3264. if (info->rx_frame_count == 0)
  3265. return false;
  3266. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3267. status = buf->status;
  3268. /* 07 VFR 1=valid frame
  3269. * 06 RDO 1=data overrun
  3270. * 05 CRC 1=OK, 0=error
  3271. * 04 RAB 1=frame aborted
  3272. */
  3273. if ((status & 0xf0) != 0xA0) {
  3274. if (!(status & BIT7) || (status & BIT4))
  3275. info->icount.rxabort++;
  3276. else if (status & BIT6)
  3277. info->icount.rxover++;
  3278. else if (!(status & BIT5)) {
  3279. info->icount.rxcrc++;
  3280. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3281. return_frame = true;
  3282. }
  3283. framesize = 0;
  3284. #if SYNCLINK_GENERIC_HDLC
  3285. {
  3286. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3287. stats->rx_errors++;
  3288. stats->rx_frame_errors++;
  3289. }
  3290. #endif
  3291. } else
  3292. return_frame = true;
  3293. if (return_frame)
  3294. framesize = buf->count;
  3295. if (debug_level >= DEBUG_LEVEL_BH)
  3296. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3297. __FILE__,__LINE__,info->device_name,status,framesize);
  3298. if (debug_level >= DEBUG_LEVEL_DATA)
  3299. trace_block(info, buf->data, framesize, 0);
  3300. if (framesize) {
  3301. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3302. framesize+1 > info->max_frame_size) ||
  3303. framesize > info->max_frame_size)
  3304. info->icount.rxlong++;
  3305. else {
  3306. if (status & BIT5)
  3307. info->icount.rxok++;
  3308. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3309. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3310. ++framesize;
  3311. }
  3312. #if SYNCLINK_GENERIC_HDLC
  3313. if (info->netcount)
  3314. hdlcdev_rx(info, buf->data, framesize);
  3315. else
  3316. #endif
  3317. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3318. }
  3319. }
  3320. spin_lock_irqsave(&info->lock,flags);
  3321. buf->status = buf->count = 0;
  3322. info->rx_frame_count--;
  3323. info->rx_get++;
  3324. if (info->rx_get >= info->rx_buf_count)
  3325. info->rx_get = 0;
  3326. spin_unlock_irqrestore(&info->lock,flags);
  3327. return true;
  3328. }
  3329. static bool register_test(MGSLPC_INFO *info)
  3330. {
  3331. static unsigned char patterns[] =
  3332. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3333. static unsigned int count = ARRAY_SIZE(patterns);
  3334. unsigned int i;
  3335. bool rc = true;
  3336. unsigned long flags;
  3337. spin_lock_irqsave(&info->lock,flags);
  3338. reset_device(info);
  3339. for (i = 0; i < count; i++) {
  3340. write_reg(info, XAD1, patterns[i]);
  3341. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3342. if ((read_reg(info, XAD1) != patterns[i]) ||
  3343. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3344. rc = false;
  3345. break;
  3346. }
  3347. }
  3348. spin_unlock_irqrestore(&info->lock,flags);
  3349. return rc;
  3350. }
  3351. static bool irq_test(MGSLPC_INFO *info)
  3352. {
  3353. unsigned long end_time;
  3354. unsigned long flags;
  3355. spin_lock_irqsave(&info->lock,flags);
  3356. reset_device(info);
  3357. info->testing_irq = true;
  3358. hdlc_mode(info);
  3359. info->irq_occurred = false;
  3360. /* init hdlc mode */
  3361. irq_enable(info, CHA, IRQ_TIMER);
  3362. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3363. issue_command(info, CHA, CMD_START_TIMER);
  3364. spin_unlock_irqrestore(&info->lock,flags);
  3365. end_time=100;
  3366. while(end_time-- && !info->irq_occurred) {
  3367. msleep_interruptible(10);
  3368. }
  3369. info->testing_irq = false;
  3370. spin_lock_irqsave(&info->lock,flags);
  3371. reset_device(info);
  3372. spin_unlock_irqrestore(&info->lock,flags);
  3373. return info->irq_occurred;
  3374. }
  3375. static int adapter_test(MGSLPC_INFO *info)
  3376. {
  3377. if (!register_test(info)) {
  3378. info->init_error = DiagStatus_AddressFailure;
  3379. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3380. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3381. return -ENODEV;
  3382. }
  3383. if (!irq_test(info)) {
  3384. info->init_error = DiagStatus_IrqFailure;
  3385. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3386. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3387. return -ENODEV;
  3388. }
  3389. if (debug_level >= DEBUG_LEVEL_INFO)
  3390. printk("%s(%d):device %s passed diagnostics\n",
  3391. __FILE__,__LINE__,info->device_name);
  3392. return 0;
  3393. }
  3394. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3395. {
  3396. int i;
  3397. int linecount;
  3398. if (xmit)
  3399. printk("%s tx data:\n",info->device_name);
  3400. else
  3401. printk("%s rx data:\n",info->device_name);
  3402. while(count) {
  3403. if (count > 16)
  3404. linecount = 16;
  3405. else
  3406. linecount = count;
  3407. for(i=0;i<linecount;i++)
  3408. printk("%02X ",(unsigned char)data[i]);
  3409. for(;i<17;i++)
  3410. printk(" ");
  3411. for(i=0;i<linecount;i++) {
  3412. if (data[i]>=040 && data[i]<=0176)
  3413. printk("%c",data[i]);
  3414. else
  3415. printk(".");
  3416. }
  3417. printk("\n");
  3418. data += linecount;
  3419. count -= linecount;
  3420. }
  3421. }
  3422. /* HDLC frame time out
  3423. * update stats and do tx completion processing
  3424. */
  3425. static void tx_timeout(unsigned long context)
  3426. {
  3427. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3428. unsigned long flags;
  3429. if ( debug_level >= DEBUG_LEVEL_INFO )
  3430. printk( "%s(%d):tx_timeout(%s)\n",
  3431. __FILE__,__LINE__,info->device_name);
  3432. if(info->tx_active &&
  3433. info->params.mode == MGSL_MODE_HDLC) {
  3434. info->icount.txtimeout++;
  3435. }
  3436. spin_lock_irqsave(&info->lock,flags);
  3437. info->tx_active = false;
  3438. info->tx_count = info->tx_put = info->tx_get = 0;
  3439. spin_unlock_irqrestore(&info->lock,flags);
  3440. #if SYNCLINK_GENERIC_HDLC
  3441. if (info->netcount)
  3442. hdlcdev_tx_done(info);
  3443. else
  3444. #endif
  3445. bh_transmit(info);
  3446. }
  3447. #if SYNCLINK_GENERIC_HDLC
  3448. /**
  3449. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3450. * set encoding and frame check sequence (FCS) options
  3451. *
  3452. * dev pointer to network device structure
  3453. * encoding serial encoding setting
  3454. * parity FCS setting
  3455. *
  3456. * returns 0 if success, otherwise error code
  3457. */
  3458. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3459. unsigned short parity)
  3460. {
  3461. MGSLPC_INFO *info = dev_to_port(dev);
  3462. unsigned char new_encoding;
  3463. unsigned short new_crctype;
  3464. /* return error if TTY interface open */
  3465. if (info->count)
  3466. return -EBUSY;
  3467. switch (encoding)
  3468. {
  3469. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3470. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3471. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3472. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3473. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3474. default: return -EINVAL;
  3475. }
  3476. switch (parity)
  3477. {
  3478. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3479. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3480. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3481. default: return -EINVAL;
  3482. }
  3483. info->params.encoding = new_encoding;
  3484. info->params.crc_type = new_crctype;
  3485. /* if network interface up, reprogram hardware */
  3486. if (info->netcount)
  3487. mgslpc_program_hw(info);
  3488. return 0;
  3489. }
  3490. /**
  3491. * called by generic HDLC layer to send frame
  3492. *
  3493. * skb socket buffer containing HDLC frame
  3494. * dev pointer to network device structure
  3495. *
  3496. * returns 0 if success, otherwise error code
  3497. */
  3498. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3499. {
  3500. MGSLPC_INFO *info = dev_to_port(dev);
  3501. struct net_device_stats *stats = hdlc_stats(dev);
  3502. unsigned long flags;
  3503. if (debug_level >= DEBUG_LEVEL_INFO)
  3504. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3505. /* stop sending until this frame completes */
  3506. netif_stop_queue(dev);
  3507. /* copy data to device buffers */
  3508. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3509. info->tx_get = 0;
  3510. info->tx_put = info->tx_count = skb->len;
  3511. /* update network statistics */
  3512. stats->tx_packets++;
  3513. stats->tx_bytes += skb->len;
  3514. /* done with socket buffer, so free it */
  3515. dev_kfree_skb(skb);
  3516. /* save start time for transmit timeout detection */
  3517. dev->trans_start = jiffies;
  3518. /* start hardware transmitter if necessary */
  3519. spin_lock_irqsave(&info->lock,flags);
  3520. if (!info->tx_active)
  3521. tx_start(info);
  3522. spin_unlock_irqrestore(&info->lock,flags);
  3523. return 0;
  3524. }
  3525. /**
  3526. * called by network layer when interface enabled
  3527. * claim resources and initialize hardware
  3528. *
  3529. * dev pointer to network device structure
  3530. *
  3531. * returns 0 if success, otherwise error code
  3532. */
  3533. static int hdlcdev_open(struct net_device *dev)
  3534. {
  3535. MGSLPC_INFO *info = dev_to_port(dev);
  3536. int rc;
  3537. unsigned long flags;
  3538. if (debug_level >= DEBUG_LEVEL_INFO)
  3539. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3540. /* generic HDLC layer open processing */
  3541. if ((rc = hdlc_open(dev)))
  3542. return rc;
  3543. /* arbitrate between network and tty opens */
  3544. spin_lock_irqsave(&info->netlock, flags);
  3545. if (info->count != 0 || info->netcount != 0) {
  3546. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3547. spin_unlock_irqrestore(&info->netlock, flags);
  3548. return -EBUSY;
  3549. }
  3550. info->netcount=1;
  3551. spin_unlock_irqrestore(&info->netlock, flags);
  3552. /* claim resources and init adapter */
  3553. if ((rc = startup(info)) != 0) {
  3554. spin_lock_irqsave(&info->netlock, flags);
  3555. info->netcount=0;
  3556. spin_unlock_irqrestore(&info->netlock, flags);
  3557. return rc;
  3558. }
  3559. /* assert DTR and RTS, apply hardware settings */
  3560. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3561. mgslpc_program_hw(info);
  3562. /* enable network layer transmit */
  3563. dev->trans_start = jiffies;
  3564. netif_start_queue(dev);
  3565. /* inform generic HDLC layer of current DCD status */
  3566. spin_lock_irqsave(&info->lock, flags);
  3567. get_signals(info);
  3568. spin_unlock_irqrestore(&info->lock, flags);
  3569. if (info->serial_signals & SerialSignal_DCD)
  3570. netif_carrier_on(dev);
  3571. else
  3572. netif_carrier_off(dev);
  3573. return 0;
  3574. }
  3575. /**
  3576. * called by network layer when interface is disabled
  3577. * shutdown hardware and release resources
  3578. *
  3579. * dev pointer to network device structure
  3580. *
  3581. * returns 0 if success, otherwise error code
  3582. */
  3583. static int hdlcdev_close(struct net_device *dev)
  3584. {
  3585. MGSLPC_INFO *info = dev_to_port(dev);
  3586. unsigned long flags;
  3587. if (debug_level >= DEBUG_LEVEL_INFO)
  3588. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3589. netif_stop_queue(dev);
  3590. /* shutdown adapter and release resources */
  3591. shutdown(info);
  3592. hdlc_close(dev);
  3593. spin_lock_irqsave(&info->netlock, flags);
  3594. info->netcount=0;
  3595. spin_unlock_irqrestore(&info->netlock, flags);
  3596. return 0;
  3597. }
  3598. /**
  3599. * called by network layer to process IOCTL call to network device
  3600. *
  3601. * dev pointer to network device structure
  3602. * ifr pointer to network interface request structure
  3603. * cmd IOCTL command code
  3604. *
  3605. * returns 0 if success, otherwise error code
  3606. */
  3607. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3608. {
  3609. const size_t size = sizeof(sync_serial_settings);
  3610. sync_serial_settings new_line;
  3611. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3612. MGSLPC_INFO *info = dev_to_port(dev);
  3613. unsigned int flags;
  3614. if (debug_level >= DEBUG_LEVEL_INFO)
  3615. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3616. /* return error if TTY interface open */
  3617. if (info->count)
  3618. return -EBUSY;
  3619. if (cmd != SIOCWANDEV)
  3620. return hdlc_ioctl(dev, ifr, cmd);
  3621. switch(ifr->ifr_settings.type) {
  3622. case IF_GET_IFACE: /* return current sync_serial_settings */
  3623. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3624. if (ifr->ifr_settings.size < size) {
  3625. ifr->ifr_settings.size = size; /* data size wanted */
  3626. return -ENOBUFS;
  3627. }
  3628. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3629. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3630. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3631. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3632. switch (flags){
  3633. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3634. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3635. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3636. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3637. default: new_line.clock_type = CLOCK_DEFAULT;
  3638. }
  3639. new_line.clock_rate = info->params.clock_speed;
  3640. new_line.loopback = info->params.loopback ? 1:0;
  3641. if (copy_to_user(line, &new_line, size))
  3642. return -EFAULT;
  3643. return 0;
  3644. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3645. if(!capable(CAP_NET_ADMIN))
  3646. return -EPERM;
  3647. if (copy_from_user(&new_line, line, size))
  3648. return -EFAULT;
  3649. switch (new_line.clock_type)
  3650. {
  3651. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3652. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3653. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3654. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3655. case CLOCK_DEFAULT: flags = info->params.flags &
  3656. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3657. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3658. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3659. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3660. default: return -EINVAL;
  3661. }
  3662. if (new_line.loopback != 0 && new_line.loopback != 1)
  3663. return -EINVAL;
  3664. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3665. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3666. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3667. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3668. info->params.flags |= flags;
  3669. info->params.loopback = new_line.loopback;
  3670. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3671. info->params.clock_speed = new_line.clock_rate;
  3672. else
  3673. info->params.clock_speed = 0;
  3674. /* if network interface up, reprogram hardware */
  3675. if (info->netcount)
  3676. mgslpc_program_hw(info);
  3677. return 0;
  3678. default:
  3679. return hdlc_ioctl(dev, ifr, cmd);
  3680. }
  3681. }
  3682. /**
  3683. * called by network layer when transmit timeout is detected
  3684. *
  3685. * dev pointer to network device structure
  3686. */
  3687. static void hdlcdev_tx_timeout(struct net_device *dev)
  3688. {
  3689. MGSLPC_INFO *info = dev_to_port(dev);
  3690. struct net_device_stats *stats = hdlc_stats(dev);
  3691. unsigned long flags;
  3692. if (debug_level >= DEBUG_LEVEL_INFO)
  3693. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3694. stats->tx_errors++;
  3695. stats->tx_aborted_errors++;
  3696. spin_lock_irqsave(&info->lock,flags);
  3697. tx_stop(info);
  3698. spin_unlock_irqrestore(&info->lock,flags);
  3699. netif_wake_queue(dev);
  3700. }
  3701. /**
  3702. * called by device driver when transmit completes
  3703. * reenable network layer transmit if stopped
  3704. *
  3705. * info pointer to device instance information
  3706. */
  3707. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3708. {
  3709. if (netif_queue_stopped(info->netdev))
  3710. netif_wake_queue(info->netdev);
  3711. }
  3712. /**
  3713. * called by device driver when frame received
  3714. * pass frame to network layer
  3715. *
  3716. * info pointer to device instance information
  3717. * buf pointer to buffer contianing frame data
  3718. * size count of data bytes in buf
  3719. */
  3720. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3721. {
  3722. struct sk_buff *skb = dev_alloc_skb(size);
  3723. struct net_device *dev = info->netdev;
  3724. struct net_device_stats *stats = hdlc_stats(dev);
  3725. if (debug_level >= DEBUG_LEVEL_INFO)
  3726. printk("hdlcdev_rx(%s)\n",dev->name);
  3727. if (skb == NULL) {
  3728. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3729. stats->rx_dropped++;
  3730. return;
  3731. }
  3732. memcpy(skb_put(skb, size),buf,size);
  3733. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3734. stats->rx_packets++;
  3735. stats->rx_bytes += size;
  3736. netif_rx(skb);
  3737. info->netdev->last_rx = jiffies;
  3738. }
  3739. /**
  3740. * called by device driver when adding device instance
  3741. * do generic HDLC initialization
  3742. *
  3743. * info pointer to device instance information
  3744. *
  3745. * returns 0 if success, otherwise error code
  3746. */
  3747. static int hdlcdev_init(MGSLPC_INFO *info)
  3748. {
  3749. int rc;
  3750. struct net_device *dev;
  3751. hdlc_device *hdlc;
  3752. /* allocate and initialize network and HDLC layer objects */
  3753. if (!(dev = alloc_hdlcdev(info))) {
  3754. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3755. return -ENOMEM;
  3756. }
  3757. /* for network layer reporting purposes only */
  3758. dev->base_addr = info->io_base;
  3759. dev->irq = info->irq_level;
  3760. /* network layer callbacks and settings */
  3761. dev->do_ioctl = hdlcdev_ioctl;
  3762. dev->open = hdlcdev_open;
  3763. dev->stop = hdlcdev_close;
  3764. dev->tx_timeout = hdlcdev_tx_timeout;
  3765. dev->watchdog_timeo = 10*HZ;
  3766. dev->tx_queue_len = 50;
  3767. /* generic HDLC layer callbacks and settings */
  3768. hdlc = dev_to_hdlc(dev);
  3769. hdlc->attach = hdlcdev_attach;
  3770. hdlc->xmit = hdlcdev_xmit;
  3771. /* register objects with HDLC layer */
  3772. if ((rc = register_hdlc_device(dev))) {
  3773. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3774. free_netdev(dev);
  3775. return rc;
  3776. }
  3777. info->netdev = dev;
  3778. return 0;
  3779. }
  3780. /**
  3781. * called by device driver when removing device instance
  3782. * do generic HDLC cleanup
  3783. *
  3784. * info pointer to device instance information
  3785. */
  3786. static void hdlcdev_exit(MGSLPC_INFO *info)
  3787. {
  3788. unregister_hdlc_device(info->netdev);
  3789. free_netdev(info->netdev);
  3790. info->netdev = NULL;
  3791. }
  3792. #endif /* CONFIG_HDLC */