iwl4965-base.c 264 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498649965006501650265036504650565066507650865096510651165126513651465156516651765186519652065216522652365246525652665276528652965306531653265336534653565366537653865396540654165426543654465456546654765486549655065516552655365546555655665576558655965606561656265636564656565666567656865696570657165726573657465756576657765786579658065816582658365846585658665876588658965906591659265936594659565966597659865996600660166026603660466056606660766086609661066116612661366146615661666176618661966206621662266236624662566266627662866296630663166326633663466356636663766386639664066416642664366446645664666476648664966506651665266536654665566566657665866596660666166626663666466656666666766686669667066716672667366746675667666776678667966806681668266836684668566866687668866896690669166926693669466956696669766986699670067016702670367046705670667076708670967106711671267136714671567166717671867196720672167226723672467256726672767286729673067316732673367346735673667376738673967406741674267436744674567466747674867496750675167526753675467556756675767586759676067616762676367646765676667676768676967706771677267736774677567766777677867796780678167826783678467856786678767886789679067916792679367946795679667976798679968006801680268036804680568066807680868096810681168126813681468156816681768186819682068216822682368246825682668276828682968306831683268336834683568366837683868396840684168426843684468456846684768486849685068516852685368546855685668576858685968606861686268636864686568666867686868696870687168726873687468756876687768786879688068816882688368846885688668876888688968906891689268936894689568966897689868996900690169026903690469056906690769086909691069116912691369146915691669176918691969206921692269236924692569266927692869296930693169326933693469356936693769386939694069416942694369446945694669476948694969506951695269536954695569566957695869596960696169626963696469656966696769686969697069716972697369746975697669776978697969806981698269836984698569866987698869896990699169926993699469956996699769986999700070017002700370047005700670077008700970107011701270137014701570167017701870197020702170227023702470257026702770287029703070317032703370347035703670377038703970407041704270437044704570467047704870497050705170527053705470557056705770587059706070617062706370647065706670677068706970707071707270737074707570767077707870797080708170827083708470857086708770887089709070917092709370947095709670977098709971007101710271037104710571067107710871097110711171127113711471157116711771187119712071217122712371247125712671277128712971307131713271337134713571367137713871397140714171427143714471457146714771487149715071517152715371547155715671577158715971607161716271637164716571667167716871697170717171727173717471757176717771787179718071817182718371847185718671877188718971907191719271937194719571967197719871997200720172027203720472057206720772087209721072117212721372147215721672177218721972207221722272237224722572267227722872297230723172327233723472357236723772387239724072417242724372447245724672477248724972507251725272537254725572567257725872597260726172627263726472657266726772687269727072717272727372747275727672777278727972807281728272837284728572867287728872897290729172927293729472957296729772987299730073017302730373047305730673077308730973107311731273137314731573167317731873197320732173227323732473257326732773287329733073317332733373347335733673377338733973407341734273437344734573467347734873497350735173527353735473557356735773587359736073617362736373647365736673677368736973707371737273737374737573767377737873797380738173827383738473857386738773887389739073917392739373947395739673977398739974007401740274037404740574067407740874097410741174127413741474157416741774187419742074217422742374247425742674277428742974307431743274337434743574367437743874397440744174427443744474457446744774487449745074517452745374547455745674577458745974607461746274637464746574667467746874697470747174727473747474757476747774787479748074817482748374847485748674877488748974907491749274937494749574967497749874997500750175027503750475057506750775087509751075117512751375147515751675177518751975207521752275237524752575267527752875297530753175327533753475357536753775387539754075417542754375447545754675477548754975507551755275537554755575567557755875597560756175627563756475657566756775687569757075717572757375747575757675777578757975807581758275837584758575867587758875897590759175927593759475957596759775987599760076017602760376047605760676077608760976107611761276137614761576167617761876197620762176227623762476257626762776287629763076317632763376347635763676377638763976407641764276437644764576467647764876497650765176527653765476557656765776587659766076617662766376647665766676677668766976707671767276737674767576767677767876797680768176827683768476857686768776887689769076917692769376947695769676977698769977007701770277037704770577067707770877097710771177127713771477157716771777187719772077217722772377247725772677277728772977307731773277337734773577367737773877397740774177427743774477457746774777487749775077517752775377547755775677577758775977607761776277637764776577667767776877697770777177727773777477757776777777787779778077817782778377847785778677877788778977907791779277937794779577967797779877997800780178027803780478057806780778087809781078117812781378147815781678177818781978207821782278237824782578267827782878297830783178327833783478357836783778387839784078417842784378447845784678477848784978507851785278537854785578567857785878597860786178627863786478657866786778687869787078717872787378747875787678777878787978807881788278837884788578867887788878897890789178927893789478957896789778987899790079017902790379047905790679077908790979107911791279137914791579167917791879197920792179227923792479257926792779287929793079317932793379347935793679377938793979407941794279437944794579467947794879497950795179527953795479557956795779587959796079617962796379647965796679677968796979707971797279737974797579767977797879797980798179827983798479857986798779887989799079917992799379947995799679977998799980008001800280038004800580068007800880098010801180128013801480158016801780188019802080218022802380248025802680278028802980308031803280338034803580368037803880398040804180428043804480458046804780488049805080518052805380548055805680578058805980608061806280638064806580668067806880698070807180728073807480758076807780788079808080818082808380848085808680878088808980908091809280938094809580968097809880998100810181028103810481058106810781088109811081118112811381148115811681178118811981208121812281238124812581268127812881298130813181328133813481358136813781388139814081418142814381448145814681478148814981508151815281538154815581568157815881598160816181628163816481658166816781688169817081718172817381748175817681778178817981808181818281838184818581868187818881898190819181928193819481958196819781988199820082018202820382048205820682078208820982108211821282138214821582168217821882198220822182228223822482258226822782288229823082318232823382348235823682378238823982408241824282438244824582468247824882498250825182528253825482558256825782588259826082618262826382648265826682678268826982708271827282738274827582768277827882798280828182828283828482858286828782888289829082918292829382948295829682978298829983008301830283038304830583068307830883098310831183128313831483158316831783188319832083218322832383248325832683278328832983308331833283338334833583368337833883398340834183428343834483458346834783488349835083518352835383548355835683578358835983608361836283638364836583668367836883698370837183728373837483758376837783788379838083818382838383848385838683878388838983908391839283938394839583968397839883998400840184028403840484058406840784088409841084118412841384148415841684178418841984208421842284238424842584268427842884298430843184328433843484358436843784388439844084418442844384448445844684478448844984508451845284538454845584568457845884598460846184628463846484658466846784688469847084718472847384748475847684778478847984808481848284838484848584868487848884898490849184928493849484958496849784988499850085018502850385048505850685078508850985108511851285138514851585168517851885198520852185228523852485258526852785288529853085318532853385348535853685378538853985408541854285438544854585468547854885498550855185528553855485558556855785588559856085618562856385648565856685678568856985708571857285738574857585768577857885798580858185828583858485858586858785888589859085918592859385948595859685978598859986008601860286038604860586068607860886098610861186128613861486158616861786188619862086218622862386248625862686278628862986308631863286338634863586368637863886398640864186428643864486458646864786488649865086518652865386548655865686578658865986608661866286638664866586668667866886698670867186728673867486758676867786788679868086818682868386848685868686878688868986908691869286938694869586968697869886998700870187028703870487058706870787088709871087118712871387148715871687178718871987208721872287238724872587268727872887298730873187328733873487358736873787388739874087418742874387448745874687478748874987508751875287538754875587568757875887598760876187628763876487658766876787688769877087718772877387748775877687778778877987808781878287838784878587868787878887898790879187928793879487958796879787988799880088018802880388048805880688078808880988108811881288138814881588168817881888198820882188228823882488258826882788288829883088318832883388348835883688378838883988408841884288438844884588468847884888498850885188528853885488558856885788588859886088618862886388648865886688678868886988708871887288738874887588768877887888798880888188828883888488858886888788888889889088918892889388948895889688978898889989008901890289038904890589068907890889098910891189128913891489158916891789188919892089218922892389248925892689278928892989308931893289338934893589368937893889398940894189428943894489458946894789488949895089518952895389548955895689578958895989608961896289638964896589668967896889698970897189728973897489758976897789788979898089818982898389848985898689878988898989908991899289938994899589968997899889999000900190029003900490059006900790089009901090119012901390149015901690179018901990209021902290239024902590269027902890299030903190329033903490359036903790389039904090419042904390449045904690479048904990509051905290539054905590569057905890599060906190629063906490659066906790689069907090719072907390749075907690779078907990809081908290839084908590869087908890899090909190929093909490959096909790989099910091019102910391049105910691079108910991109111911291139114911591169117911891199120912191229123912491259126912791289129913091319132913391349135913691379138913991409141914291439144914591469147914891499150915191529153915491559156915791589159916091619162916391649165916691679168916991709171917291739174917591769177917891799180918191829183918491859186918791889189919091919192919391949195919691979198919992009201920292039204920592069207920892099210921192129213921492159216921792189219922092219222922392249225922692279228922992309231923292339234923592369237923892399240924192429243924492459246924792489249925092519252925392549255925692579258925992609261926292639264926592669267926892699270927192729273927492759276927792789279928092819282928392849285928692879288928992909291929292939294929592969297929892999300930193029303930493059306930793089309931093119312931393149315931693179318931993209321932293239324932593269327932893299330933193329333933493359336933793389339934093419342934393449345934693479348934993509351935293539354935593569357935893599360936193629363936493659366936793689369937093719372937393749375937693779378937993809381938293839384938593869387938893899390939193929393939493959396939793989399940094019402940394049405940694079408940994109411941294139414941594169417941894199420942194229423942494259426942794289429943094319432943394349435943694379438943994409441944294439444
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.23k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, int mode)
  102. {
  103. int i;
  104. for (i = 0; i < 3; i++)
  105. if (priv->modes[i].mode == mode)
  106. return &priv->modes[i];
  107. return NULL;
  108. }
  109. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  110. {
  111. /* Single white space is for Linksys APs */
  112. if (essid_len == 1 && essid[0] == ' ')
  113. return 1;
  114. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  115. while (essid_len) {
  116. essid_len--;
  117. if (essid[essid_len] != '\0')
  118. return 0;
  119. }
  120. return 1;
  121. }
  122. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  123. {
  124. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  125. const char *s = essid;
  126. char *d = escaped;
  127. if (iwl4965_is_empty_essid(essid, essid_len)) {
  128. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  129. return escaped;
  130. }
  131. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  132. while (essid_len--) {
  133. if (*s == '\0') {
  134. *d++ = '\\';
  135. *d++ = '0';
  136. s++;
  137. } else
  138. *d++ = *s++;
  139. }
  140. *d = '\0';
  141. return escaped;
  142. }
  143. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  144. {
  145. #ifdef CONFIG_IWL4965_DEBUG
  146. if (!(iwl4965_debug_level & level))
  147. return;
  148. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  149. p, len, 1);
  150. #endif
  151. }
  152. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  153. * DMA services
  154. *
  155. * Theory of operation
  156. *
  157. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  158. * of buffer descriptors, each of which points to one or more data buffers for
  159. * the device to read from or fill. Driver and device exchange status of each
  160. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  161. * entries in each circular buffer, to protect against confusing empty and full
  162. * queue states.
  163. *
  164. * The device reads or writes the data in the queues via the device's several
  165. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  166. *
  167. * For Tx queue, there are low mark and high mark limits. If, after queuing
  168. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  169. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  170. * Tx queue resumed.
  171. *
  172. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  173. * queue (#4) for sending commands to the device firmware, and 15 other
  174. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  175. *
  176. * See more detailed info in iwl-4965-hw.h.
  177. ***************************************************/
  178. static int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /**
  192. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  193. * @index -- current index
  194. * @n_bd -- total number of entries in queue (must be power of 2)
  195. */
  196. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  197. {
  198. return ++index & (n_bd - 1);
  199. }
  200. /**
  201. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  202. * @index -- current index
  203. * @n_bd -- total number of entries in queue (must be power of 2)
  204. */
  205. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  206. {
  207. return --index & (n_bd - 1);
  208. }
  209. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  210. {
  211. return q->write_ptr > q->read_ptr ?
  212. (i >= q->read_ptr && i < q->write_ptr) :
  213. !(i < q->read_ptr && i >= q->write_ptr);
  214. }
  215. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  216. {
  217. /* This is for scan command, the big buffer at end of command array */
  218. if (is_huge)
  219. return q->n_window; /* must be power of 2 */
  220. /* Otherwise, use normal size buffers */
  221. return index & (q->n_window - 1);
  222. }
  223. /**
  224. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  225. */
  226. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  227. int count, int slots_num, u32 id)
  228. {
  229. q->n_bd = count;
  230. q->n_window = slots_num;
  231. q->id = id;
  232. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  233. * and iwl4965_queue_dec_wrap are broken. */
  234. BUG_ON(!is_power_of_2(count));
  235. /* slots_num must be power-of-two size, otherwise
  236. * get_cmd_index is broken. */
  237. BUG_ON(!is_power_of_2(slots_num));
  238. q->low_mark = q->n_window / 4;
  239. if (q->low_mark < 4)
  240. q->low_mark = 4;
  241. q->high_mark = q->n_window / 8;
  242. if (q->high_mark < 2)
  243. q->high_mark = 2;
  244. q->write_ptr = q->read_ptr = 0;
  245. return 0;
  246. }
  247. /**
  248. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  249. */
  250. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  251. struct iwl4965_tx_queue *txq, u32 id)
  252. {
  253. struct pci_dev *dev = priv->pci_dev;
  254. /* Driver private data, only for Tx (not command) queues,
  255. * not shared with device. */
  256. if (id != IWL_CMD_QUEUE_NUM) {
  257. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  258. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  259. if (!txq->txb) {
  260. IWL_ERROR("kmalloc for auxiliary BD "
  261. "structures failed\n");
  262. goto error;
  263. }
  264. } else
  265. txq->txb = NULL;
  266. /* Circular buffer of transmit frame descriptors (TFDs),
  267. * shared with device */
  268. txq->bd = pci_alloc_consistent(dev,
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  270. &txq->q.dma_addr);
  271. if (!txq->bd) {
  272. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  273. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  274. goto error;
  275. }
  276. txq->q.id = id;
  277. return 0;
  278. error:
  279. if (txq->txb) {
  280. kfree(txq->txb);
  281. txq->txb = NULL;
  282. }
  283. return -ENOMEM;
  284. }
  285. /**
  286. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  287. */
  288. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  289. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  290. {
  291. struct pci_dev *dev = priv->pci_dev;
  292. int len;
  293. int rc = 0;
  294. /*
  295. * Alloc buffer array for commands (Tx or other types of commands).
  296. * For the command queue (#4), allocate command space + one big
  297. * command for scan, since scan command is very huge; the system will
  298. * not have two scans at the same time, so only one is needed.
  299. * For normal Tx queues (all other queues), no super-size command
  300. * space is needed.
  301. */
  302. len = sizeof(struct iwl4965_cmd) * slots_num;
  303. if (txq_id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  306. if (!txq->cmd)
  307. return -ENOMEM;
  308. /* Alloc driver data array and TFD circular buffer */
  309. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  310. if (rc) {
  311. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  312. return -ENOMEM;
  313. }
  314. txq->need_update = 0;
  315. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  316. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  317. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  318. /* Initialize queue's high/low-water marks, and head/tail indexes */
  319. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  320. /* Tell device where to find queue */
  321. iwl4965_hw_tx_queue_init(priv, txq);
  322. return 0;
  323. }
  324. /**
  325. * iwl4965_tx_queue_free - Deallocate DMA queue.
  326. * @txq: Transmit queue to deallocate.
  327. *
  328. * Empty queue by removing and destroying all BD's.
  329. * Free all buffers.
  330. * 0-fill, but do not free "txq" descriptor structure.
  331. */
  332. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  333. {
  334. struct iwl4965_queue *q = &txq->q;
  335. struct pci_dev *dev = priv->pci_dev;
  336. int len;
  337. if (q->n_bd == 0)
  338. return;
  339. /* first, empty all BD's */
  340. for (; q->write_ptr != q->read_ptr;
  341. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  342. iwl4965_hw_txq_free_tfd(priv, txq);
  343. len = sizeof(struct iwl4965_cmd) * q->n_window;
  344. if (q->id == IWL_CMD_QUEUE_NUM)
  345. len += IWL_MAX_SCAN_SIZE;
  346. /* De-alloc array of command/tx buffers */
  347. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  348. /* De-alloc circular buffer of TFDs */
  349. if (txq->q.n_bd)
  350. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  351. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  352. /* De-alloc array of per-TFD driver data */
  353. if (txq->txb) {
  354. kfree(txq->txb);
  355. txq->txb = NULL;
  356. }
  357. /* 0-fill queue descriptor structure */
  358. memset(txq, 0, sizeof(*txq));
  359. }
  360. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  361. /*************** STATION TABLE MANAGEMENT ****
  362. * mac80211 should be examined to determine if sta_info is duplicating
  363. * the functionality provided here
  364. */
  365. /**************************************************************/
  366. #if 0 /* temporary disable till we add real remove station */
  367. /**
  368. * iwl4965_remove_station - Remove driver's knowledge of station.
  369. *
  370. * NOTE: This does not remove station from device's station table.
  371. */
  372. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  373. {
  374. int index = IWL_INVALID_STATION;
  375. int i;
  376. unsigned long flags;
  377. spin_lock_irqsave(&priv->sta_lock, flags);
  378. if (is_ap)
  379. index = IWL_AP_ID;
  380. else if (is_broadcast_ether_addr(addr))
  381. index = priv->hw_setting.bcast_sta_id;
  382. else
  383. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  384. if (priv->stations[i].used &&
  385. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  386. addr)) {
  387. index = i;
  388. break;
  389. }
  390. if (unlikely(index == IWL_INVALID_STATION))
  391. goto out;
  392. if (priv->stations[index].used) {
  393. priv->stations[index].used = 0;
  394. priv->num_stations--;
  395. }
  396. BUG_ON(priv->num_stations < 0);
  397. out:
  398. spin_unlock_irqrestore(&priv->sta_lock, flags);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * iwl4965_clear_stations_table - Clear the driver's station table
  404. *
  405. * NOTE: This does not clear or otherwise alter the device's station table.
  406. */
  407. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  408. {
  409. unsigned long flags;
  410. spin_lock_irqsave(&priv->sta_lock, flags);
  411. priv->num_stations = 0;
  412. memset(priv->stations, 0, sizeof(priv->stations));
  413. spin_unlock_irqrestore(&priv->sta_lock, flags);
  414. }
  415. /**
  416. * iwl4965_add_station_flags - Add station to tables in driver and device
  417. */
  418. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  419. int is_ap, u8 flags, void *ht_data)
  420. {
  421. int i;
  422. int index = IWL_INVALID_STATION;
  423. struct iwl4965_station_entry *station;
  424. unsigned long flags_spin;
  425. DECLARE_MAC_BUF(mac);
  426. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  427. if (is_ap)
  428. index = IWL_AP_ID;
  429. else if (is_broadcast_ether_addr(addr))
  430. index = priv->hw_setting.bcast_sta_id;
  431. else
  432. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  433. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  434. addr)) {
  435. index = i;
  436. break;
  437. }
  438. if (!priv->stations[i].used &&
  439. index == IWL_INVALID_STATION)
  440. index = i;
  441. }
  442. /* These two conditions have the same outcome, but keep them separate
  443. since they have different meanings */
  444. if (unlikely(index == IWL_INVALID_STATION)) {
  445. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  446. return index;
  447. }
  448. if (priv->stations[index].used &&
  449. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  450. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  451. return index;
  452. }
  453. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  454. station = &priv->stations[index];
  455. station->used = 1;
  456. priv->num_stations++;
  457. /* Set up the REPLY_ADD_STA command to send to device */
  458. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  459. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  460. station->sta.mode = 0;
  461. station->sta.sta.sta_id = index;
  462. station->sta.station_flags = 0;
  463. #ifdef CONFIG_IWL4965_HT
  464. /* BCAST station and IBSS stations do not work in HT mode */
  465. if (index != priv->hw_setting.bcast_sta_id &&
  466. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  467. iwl4965_set_ht_add_station(priv, index,
  468. (struct ieee80211_ht_info *) ht_data);
  469. #endif /*CONFIG_IWL4965_HT*/
  470. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  471. /* Add station to device's station table */
  472. iwl4965_send_add_station(priv, &station->sta, flags);
  473. return index;
  474. }
  475. /*************** DRIVER STATUS FUNCTIONS *****/
  476. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  477. {
  478. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  479. * set but EXIT_PENDING is not */
  480. return test_bit(STATUS_READY, &priv->status) &&
  481. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  482. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  483. }
  484. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  485. {
  486. return test_bit(STATUS_ALIVE, &priv->status);
  487. }
  488. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  489. {
  490. return test_bit(STATUS_INIT, &priv->status);
  491. }
  492. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  493. {
  494. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  495. test_bit(STATUS_RF_KILL_SW, &priv->status);
  496. }
  497. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  498. {
  499. if (iwl4965_is_rfkill(priv))
  500. return 0;
  501. return iwl4965_is_ready(priv);
  502. }
  503. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  504. #define IWL_CMD(x) case x : return #x
  505. static const char *get_cmd_string(u8 cmd)
  506. {
  507. switch (cmd) {
  508. IWL_CMD(REPLY_ALIVE);
  509. IWL_CMD(REPLY_ERROR);
  510. IWL_CMD(REPLY_RXON);
  511. IWL_CMD(REPLY_RXON_ASSOC);
  512. IWL_CMD(REPLY_QOS_PARAM);
  513. IWL_CMD(REPLY_RXON_TIMING);
  514. IWL_CMD(REPLY_ADD_STA);
  515. IWL_CMD(REPLY_REMOVE_STA);
  516. IWL_CMD(REPLY_REMOVE_ALL_STA);
  517. IWL_CMD(REPLY_TX);
  518. IWL_CMD(REPLY_RATE_SCALE);
  519. IWL_CMD(REPLY_LEDS_CMD);
  520. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  521. IWL_CMD(RADAR_NOTIFICATION);
  522. IWL_CMD(REPLY_QUIET_CMD);
  523. IWL_CMD(REPLY_CHANNEL_SWITCH);
  524. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  525. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  526. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  527. IWL_CMD(POWER_TABLE_CMD);
  528. IWL_CMD(PM_SLEEP_NOTIFICATION);
  529. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  530. IWL_CMD(REPLY_SCAN_CMD);
  531. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  532. IWL_CMD(SCAN_START_NOTIFICATION);
  533. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  534. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  535. IWL_CMD(BEACON_NOTIFICATION);
  536. IWL_CMD(REPLY_TX_BEACON);
  537. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  538. IWL_CMD(QUIET_NOTIFICATION);
  539. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  540. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  541. IWL_CMD(REPLY_BT_CONFIG);
  542. IWL_CMD(REPLY_STATISTICS_CMD);
  543. IWL_CMD(STATISTICS_NOTIFICATION);
  544. IWL_CMD(REPLY_CARD_STATE_CMD);
  545. IWL_CMD(CARD_STATE_NOTIFICATION);
  546. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  547. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  548. IWL_CMD(SENSITIVITY_CMD);
  549. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  550. IWL_CMD(REPLY_RX_PHY_CMD);
  551. IWL_CMD(REPLY_RX_MPDU_CMD);
  552. IWL_CMD(REPLY_4965_RX);
  553. IWL_CMD(REPLY_COMPRESSED_BA);
  554. default:
  555. return "UNKNOWN";
  556. }
  557. }
  558. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  559. /**
  560. * iwl4965_enqueue_hcmd - enqueue a uCode command
  561. * @priv: device private data point
  562. * @cmd: a point to the ucode command structure
  563. *
  564. * The function returns < 0 values to indicate the operation is
  565. * failed. On success, it turns the index (> 0) of command in the
  566. * command queue.
  567. */
  568. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  569. {
  570. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  571. struct iwl4965_queue *q = &txq->q;
  572. struct iwl4965_tfd_frame *tfd;
  573. u32 *control_flags;
  574. struct iwl4965_cmd *out_cmd;
  575. u32 idx;
  576. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  577. dma_addr_t phys_addr;
  578. int ret;
  579. unsigned long flags;
  580. /* If any of the command structures end up being larger than
  581. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  582. * we will need to increase the size of the TFD entries */
  583. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  584. !(cmd->meta.flags & CMD_SIZE_HUGE));
  585. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  586. IWL_ERROR("No space for Tx\n");
  587. return -ENOSPC;
  588. }
  589. spin_lock_irqsave(&priv->hcmd_lock, flags);
  590. tfd = &txq->bd[q->write_ptr];
  591. memset(tfd, 0, sizeof(*tfd));
  592. control_flags = (u32 *) tfd;
  593. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  594. out_cmd = &txq->cmd[idx];
  595. out_cmd->hdr.cmd = cmd->id;
  596. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  597. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  598. /* At this point, the out_cmd now has all of the incoming cmd
  599. * information */
  600. out_cmd->hdr.flags = 0;
  601. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  602. INDEX_TO_SEQ(q->write_ptr));
  603. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  604. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  605. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  606. offsetof(struct iwl4965_cmd, hdr);
  607. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  608. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  609. "%d bytes at %d[%d]:%d\n",
  610. get_cmd_string(out_cmd->hdr.cmd),
  611. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  612. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  613. txq->need_update = 1;
  614. /* Set up entry in queue's byte count circular buffer */
  615. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  616. /* Increment and update queue's write index */
  617. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  618. iwl4965_tx_queue_update_write_ptr(priv, txq);
  619. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  620. return ret ? ret : idx;
  621. }
  622. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  623. {
  624. int ret;
  625. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  626. /* An asynchronous command can not expect an SKB to be set. */
  627. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  628. /* An asynchronous command MUST have a callback. */
  629. BUG_ON(!cmd->meta.u.callback);
  630. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  631. return -EBUSY;
  632. ret = iwl4965_enqueue_hcmd(priv, cmd);
  633. if (ret < 0) {
  634. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  635. get_cmd_string(cmd->id), ret);
  636. return ret;
  637. }
  638. return 0;
  639. }
  640. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  641. {
  642. int cmd_idx;
  643. int ret;
  644. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  645. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  646. /* A synchronous command can not have a callback set. */
  647. BUG_ON(cmd->meta.u.callback != NULL);
  648. if (atomic_xchg(&entry, 1)) {
  649. IWL_ERROR("Error sending %s: Already sending a host command\n",
  650. get_cmd_string(cmd->id));
  651. return -EBUSY;
  652. }
  653. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  654. if (cmd->meta.flags & CMD_WANT_SKB)
  655. cmd->meta.source = &cmd->meta;
  656. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  657. if (cmd_idx < 0) {
  658. ret = cmd_idx;
  659. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  660. get_cmd_string(cmd->id), ret);
  661. goto out;
  662. }
  663. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  664. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  665. HOST_COMPLETE_TIMEOUT);
  666. if (!ret) {
  667. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  668. IWL_ERROR("Error sending %s: time out after %dms.\n",
  669. get_cmd_string(cmd->id),
  670. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  671. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  672. ret = -ETIMEDOUT;
  673. goto cancel;
  674. }
  675. }
  676. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  677. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  678. get_cmd_string(cmd->id));
  679. ret = -ECANCELED;
  680. goto fail;
  681. }
  682. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  683. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  684. get_cmd_string(cmd->id));
  685. ret = -EIO;
  686. goto fail;
  687. }
  688. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  689. IWL_ERROR("Error: Response NULL in '%s'\n",
  690. get_cmd_string(cmd->id));
  691. ret = -EIO;
  692. goto out;
  693. }
  694. ret = 0;
  695. goto out;
  696. cancel:
  697. if (cmd->meta.flags & CMD_WANT_SKB) {
  698. struct iwl4965_cmd *qcmd;
  699. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  700. * TX cmd queue. Otherwise in case the cmd comes
  701. * in later, it will possibly set an invalid
  702. * address (cmd->meta.source). */
  703. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  704. qcmd->meta.flags &= ~CMD_WANT_SKB;
  705. }
  706. fail:
  707. if (cmd->meta.u.skb) {
  708. dev_kfree_skb_any(cmd->meta.u.skb);
  709. cmd->meta.u.skb = NULL;
  710. }
  711. out:
  712. atomic_set(&entry, 0);
  713. return ret;
  714. }
  715. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  716. {
  717. if (cmd->meta.flags & CMD_ASYNC)
  718. return iwl4965_send_cmd_async(priv, cmd);
  719. return iwl4965_send_cmd_sync(priv, cmd);
  720. }
  721. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  722. {
  723. struct iwl4965_host_cmd cmd = {
  724. .id = id,
  725. .len = len,
  726. .data = data,
  727. };
  728. return iwl4965_send_cmd_sync(priv, &cmd);
  729. }
  730. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  731. {
  732. struct iwl4965_host_cmd cmd = {
  733. .id = id,
  734. .len = sizeof(val),
  735. .data = &val,
  736. };
  737. return iwl4965_send_cmd_sync(priv, &cmd);
  738. }
  739. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  740. {
  741. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  742. }
  743. /**
  744. * iwl4965_rxon_add_station - add station into station table.
  745. *
  746. * there is only one AP station with id= IWL_AP_ID
  747. * NOTE: mutex must be held before calling this fnction
  748. */
  749. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  750. const u8 *addr, int is_ap)
  751. {
  752. u8 sta_id;
  753. /* Add station to device's station table */
  754. #ifdef CONFIG_IWL4965_HT
  755. struct ieee80211_conf *conf = &priv->hw->conf;
  756. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  757. if ((is_ap) &&
  758. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  759. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  760. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  761. 0, cur_ht_config);
  762. else
  763. #endif /* CONFIG_IWL4965_HT */
  764. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  765. 0, NULL);
  766. /* Set up default rate scaling table in device's station table */
  767. iwl4965_add_station(priv, addr, is_ap);
  768. return sta_id;
  769. }
  770. /**
  771. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  772. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  773. * @channel: Any channel valid for the requested phymode
  774. * In addition to setting the staging RXON, priv->phymode is also set.
  775. *
  776. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  777. * in the staging RXON flag structure based on the phymode
  778. */
  779. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
  780. u16 channel)
  781. {
  782. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  783. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  784. channel, phymode);
  785. return -EINVAL;
  786. }
  787. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  788. (priv->phymode == phymode))
  789. return 0;
  790. priv->staging_rxon.channel = cpu_to_le16(channel);
  791. if (phymode == MODE_IEEE80211A)
  792. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  793. else
  794. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  795. priv->phymode = phymode;
  796. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  797. return 0;
  798. }
  799. /**
  800. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  801. *
  802. * NOTE: This is really only useful during development and can eventually
  803. * be #ifdef'd out once the driver is stable and folks aren't actively
  804. * making changes
  805. */
  806. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  807. {
  808. int error = 0;
  809. int counter = 1;
  810. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  811. error |= le32_to_cpu(rxon->flags &
  812. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  813. RXON_FLG_RADAR_DETECT_MSK));
  814. if (error)
  815. IWL_WARNING("check 24G fields %d | %d\n",
  816. counter++, error);
  817. } else {
  818. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  819. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  820. if (error)
  821. IWL_WARNING("check 52 fields %d | %d\n",
  822. counter++, error);
  823. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  824. if (error)
  825. IWL_WARNING("check 52 CCK %d | %d\n",
  826. counter++, error);
  827. }
  828. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  829. if (error)
  830. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  831. /* make sure basic rates 6Mbps and 1Mbps are supported */
  832. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  833. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  834. if (error)
  835. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  836. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  837. if (error)
  838. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  839. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  840. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  841. if (error)
  842. IWL_WARNING("check CCK and short slot %d | %d\n",
  843. counter++, error);
  844. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  845. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  846. if (error)
  847. IWL_WARNING("check CCK & auto detect %d | %d\n",
  848. counter++, error);
  849. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  850. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  851. if (error)
  852. IWL_WARNING("check TGG and auto detect %d | %d\n",
  853. counter++, error);
  854. if (error)
  855. IWL_WARNING("Tuning to channel %d\n",
  856. le16_to_cpu(rxon->channel));
  857. if (error) {
  858. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  859. return -1;
  860. }
  861. return 0;
  862. }
  863. /**
  864. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  865. * @priv: staging_rxon is compared to active_rxon
  866. *
  867. * If the RXON structure is changing enough to require a new tune,
  868. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  869. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  870. */
  871. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  872. {
  873. /* These items are only settable from the full RXON command */
  874. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  875. compare_ether_addr(priv->staging_rxon.bssid_addr,
  876. priv->active_rxon.bssid_addr) ||
  877. compare_ether_addr(priv->staging_rxon.node_addr,
  878. priv->active_rxon.node_addr) ||
  879. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  880. priv->active_rxon.wlap_bssid_addr) ||
  881. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  882. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  883. (priv->staging_rxon.air_propagation !=
  884. priv->active_rxon.air_propagation) ||
  885. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  886. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  887. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  888. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  889. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  890. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  891. return 1;
  892. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  893. * be updated with the RXON_ASSOC command -- however only some
  894. * flag transitions are allowed using RXON_ASSOC */
  895. /* Check if we are not switching bands */
  896. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  897. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  898. return 1;
  899. /* Check if we are switching association toggle */
  900. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  901. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  902. return 1;
  903. return 0;
  904. }
  905. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  906. {
  907. int rc = 0;
  908. struct iwl4965_rx_packet *res = NULL;
  909. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  910. struct iwl4965_host_cmd cmd = {
  911. .id = REPLY_RXON_ASSOC,
  912. .len = sizeof(rxon_assoc),
  913. .meta.flags = CMD_WANT_SKB,
  914. .data = &rxon_assoc,
  915. };
  916. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  917. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  918. if ((rxon1->flags == rxon2->flags) &&
  919. (rxon1->filter_flags == rxon2->filter_flags) &&
  920. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  921. (rxon1->ofdm_ht_single_stream_basic_rates ==
  922. rxon2->ofdm_ht_single_stream_basic_rates) &&
  923. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  924. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  925. (rxon1->rx_chain == rxon2->rx_chain) &&
  926. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  927. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  928. return 0;
  929. }
  930. rxon_assoc.flags = priv->staging_rxon.flags;
  931. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  932. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  933. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  934. rxon_assoc.reserved = 0;
  935. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  936. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  937. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  938. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  939. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  940. rc = iwl4965_send_cmd_sync(priv, &cmd);
  941. if (rc)
  942. return rc;
  943. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  944. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  945. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  946. rc = -EIO;
  947. }
  948. priv->alloc_rxb_skb--;
  949. dev_kfree_skb_any(cmd.meta.u.skb);
  950. return rc;
  951. }
  952. /**
  953. * iwl4965_commit_rxon - commit staging_rxon to hardware
  954. *
  955. * The RXON command in staging_rxon is committed to the hardware and
  956. * the active_rxon structure is updated with the new data. This
  957. * function correctly transitions out of the RXON_ASSOC_MSK state if
  958. * a HW tune is required based on the RXON structure changes.
  959. */
  960. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  961. {
  962. /* cast away the const for active_rxon in this function */
  963. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  964. DECLARE_MAC_BUF(mac);
  965. int rc = 0;
  966. if (!iwl4965_is_alive(priv))
  967. return -1;
  968. /* always get timestamp with Rx frame */
  969. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  970. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  971. if (rc) {
  972. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  973. return -EINVAL;
  974. }
  975. /* If we don't need to send a full RXON, we can use
  976. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  977. * and other flags for the current radio configuration. */
  978. if (!iwl4965_full_rxon_required(priv)) {
  979. rc = iwl4965_send_rxon_assoc(priv);
  980. if (rc) {
  981. IWL_ERROR("Error setting RXON_ASSOC "
  982. "configuration (%d).\n", rc);
  983. return rc;
  984. }
  985. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  986. return 0;
  987. }
  988. /* station table will be cleared */
  989. priv->assoc_station_added = 0;
  990. #ifdef CONFIG_IWL4965_SENSITIVITY
  991. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  992. if (!priv->error_recovering)
  993. priv->start_calib = 0;
  994. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  995. #endif /* CONFIG_IWL4965_SENSITIVITY */
  996. /* If we are currently associated and the new config requires
  997. * an RXON_ASSOC and the new config wants the associated mask enabled,
  998. * we must clear the associated from the active configuration
  999. * before we apply the new config */
  1000. if (iwl4965_is_associated(priv) &&
  1001. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  1002. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  1003. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1004. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1005. sizeof(struct iwl4965_rxon_cmd),
  1006. &priv->active_rxon);
  1007. /* If the mask clearing failed then we set
  1008. * active_rxon back to what it was previously */
  1009. if (rc) {
  1010. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1011. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1012. "configuration (%d).\n", rc);
  1013. return rc;
  1014. }
  1015. }
  1016. IWL_DEBUG_INFO("Sending RXON\n"
  1017. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1018. "* channel = %d\n"
  1019. "* bssid = %s\n",
  1020. ((priv->staging_rxon.filter_flags &
  1021. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1022. le16_to_cpu(priv->staging_rxon.channel),
  1023. print_mac(mac, priv->staging_rxon.bssid_addr));
  1024. /* Apply the new configuration */
  1025. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1026. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1027. if (rc) {
  1028. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1029. return rc;
  1030. }
  1031. iwl4965_clear_stations_table(priv);
  1032. #ifdef CONFIG_IWL4965_SENSITIVITY
  1033. if (!priv->error_recovering)
  1034. priv->start_calib = 0;
  1035. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1036. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1037. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1038. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1039. /* If we issue a new RXON command which required a tune then we must
  1040. * send a new TXPOWER command or we won't be able to Tx any frames */
  1041. rc = iwl4965_hw_reg_send_txpower(priv);
  1042. if (rc) {
  1043. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1044. return rc;
  1045. }
  1046. /* Add the broadcast address so we can send broadcast frames */
  1047. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1048. IWL_INVALID_STATION) {
  1049. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1050. return -EIO;
  1051. }
  1052. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1053. * add the IWL_AP_ID to the station rate table */
  1054. if (iwl4965_is_associated(priv) &&
  1055. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1056. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1057. == IWL_INVALID_STATION) {
  1058. IWL_ERROR("Error adding AP address for transmit.\n");
  1059. return -EIO;
  1060. }
  1061. priv->assoc_station_added = 1;
  1062. }
  1063. return 0;
  1064. }
  1065. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1066. {
  1067. struct iwl4965_bt_cmd bt_cmd = {
  1068. .flags = 3,
  1069. .lead_time = 0xAA,
  1070. .max_kill = 1,
  1071. .kill_ack_mask = 0,
  1072. .kill_cts_mask = 0,
  1073. };
  1074. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1075. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1076. }
  1077. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1078. {
  1079. int rc = 0;
  1080. struct iwl4965_rx_packet *res;
  1081. struct iwl4965_host_cmd cmd = {
  1082. .id = REPLY_SCAN_ABORT_CMD,
  1083. .meta.flags = CMD_WANT_SKB,
  1084. };
  1085. /* If there isn't a scan actively going on in the hardware
  1086. * then we are in between scan bands and not actually
  1087. * actively scanning, so don't send the abort command */
  1088. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1089. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1090. return 0;
  1091. }
  1092. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1093. if (rc) {
  1094. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1095. return rc;
  1096. }
  1097. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1098. if (res->u.status != CAN_ABORT_STATUS) {
  1099. /* The scan abort will return 1 for success or
  1100. * 2 for "failure". A failure condition can be
  1101. * due to simply not being in an active scan which
  1102. * can occur if we send the scan abort before we
  1103. * the microcode has notified us that a scan is
  1104. * completed. */
  1105. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1106. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1107. clear_bit(STATUS_SCAN_HW, &priv->status);
  1108. }
  1109. dev_kfree_skb_any(cmd.meta.u.skb);
  1110. return rc;
  1111. }
  1112. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1113. struct iwl4965_cmd *cmd,
  1114. struct sk_buff *skb)
  1115. {
  1116. return 1;
  1117. }
  1118. /*
  1119. * CARD_STATE_CMD
  1120. *
  1121. * Use: Sets the device's internal card state to enable, disable, or halt
  1122. *
  1123. * When in the 'enable' state the card operates as normal.
  1124. * When in the 'disable' state, the card enters into a low power mode.
  1125. * When in the 'halt' state, the card is shut down and must be fully
  1126. * restarted to come back on.
  1127. */
  1128. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1129. {
  1130. struct iwl4965_host_cmd cmd = {
  1131. .id = REPLY_CARD_STATE_CMD,
  1132. .len = sizeof(u32),
  1133. .data = &flags,
  1134. .meta.flags = meta_flag,
  1135. };
  1136. if (meta_flag & CMD_ASYNC)
  1137. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1138. return iwl4965_send_cmd(priv, &cmd);
  1139. }
  1140. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1141. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1142. {
  1143. struct iwl4965_rx_packet *res = NULL;
  1144. if (!skb) {
  1145. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1146. return 1;
  1147. }
  1148. res = (struct iwl4965_rx_packet *)skb->data;
  1149. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1150. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1151. res->hdr.flags);
  1152. return 1;
  1153. }
  1154. switch (res->u.add_sta.status) {
  1155. case ADD_STA_SUCCESS_MSK:
  1156. break;
  1157. default:
  1158. break;
  1159. }
  1160. /* We didn't cache the SKB; let the caller free it */
  1161. return 1;
  1162. }
  1163. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1164. struct iwl4965_addsta_cmd *sta, u8 flags)
  1165. {
  1166. struct iwl4965_rx_packet *res = NULL;
  1167. int rc = 0;
  1168. struct iwl4965_host_cmd cmd = {
  1169. .id = REPLY_ADD_STA,
  1170. .len = sizeof(struct iwl4965_addsta_cmd),
  1171. .meta.flags = flags,
  1172. .data = sta,
  1173. };
  1174. if (flags & CMD_ASYNC)
  1175. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1176. else
  1177. cmd.meta.flags |= CMD_WANT_SKB;
  1178. rc = iwl4965_send_cmd(priv, &cmd);
  1179. if (rc || (flags & CMD_ASYNC))
  1180. return rc;
  1181. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1182. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1183. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1184. res->hdr.flags);
  1185. rc = -EIO;
  1186. }
  1187. if (rc == 0) {
  1188. switch (res->u.add_sta.status) {
  1189. case ADD_STA_SUCCESS_MSK:
  1190. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1191. break;
  1192. default:
  1193. rc = -EIO;
  1194. IWL_WARNING("REPLY_ADD_STA failed\n");
  1195. break;
  1196. }
  1197. }
  1198. priv->alloc_rxb_skb--;
  1199. dev_kfree_skb_any(cmd.meta.u.skb);
  1200. return rc;
  1201. }
  1202. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1203. struct ieee80211_key_conf *keyconf,
  1204. u8 sta_id)
  1205. {
  1206. unsigned long flags;
  1207. __le16 key_flags = 0;
  1208. switch (keyconf->alg) {
  1209. case ALG_CCMP:
  1210. key_flags |= STA_KEY_FLG_CCMP;
  1211. key_flags |= cpu_to_le16(
  1212. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1213. key_flags &= ~STA_KEY_FLG_INVALID;
  1214. break;
  1215. case ALG_TKIP:
  1216. case ALG_WEP:
  1217. default:
  1218. return -EINVAL;
  1219. }
  1220. spin_lock_irqsave(&priv->sta_lock, flags);
  1221. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1222. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1223. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1224. keyconf->keylen);
  1225. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1226. keyconf->keylen);
  1227. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1228. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1229. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1230. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1231. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1232. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1233. return 0;
  1234. }
  1235. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1236. {
  1237. unsigned long flags;
  1238. spin_lock_irqsave(&priv->sta_lock, flags);
  1239. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1240. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1241. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1242. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1243. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1244. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1245. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1246. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1247. return 0;
  1248. }
  1249. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1250. {
  1251. struct list_head *element;
  1252. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1253. priv->frames_count);
  1254. while (!list_empty(&priv->free_frames)) {
  1255. element = priv->free_frames.next;
  1256. list_del(element);
  1257. kfree(list_entry(element, struct iwl4965_frame, list));
  1258. priv->frames_count--;
  1259. }
  1260. if (priv->frames_count) {
  1261. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1262. priv->frames_count);
  1263. priv->frames_count = 0;
  1264. }
  1265. }
  1266. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1267. {
  1268. struct iwl4965_frame *frame;
  1269. struct list_head *element;
  1270. if (list_empty(&priv->free_frames)) {
  1271. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1272. if (!frame) {
  1273. IWL_ERROR("Could not allocate frame!\n");
  1274. return NULL;
  1275. }
  1276. priv->frames_count++;
  1277. return frame;
  1278. }
  1279. element = priv->free_frames.next;
  1280. list_del(element);
  1281. return list_entry(element, struct iwl4965_frame, list);
  1282. }
  1283. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1284. {
  1285. memset(frame, 0, sizeof(*frame));
  1286. list_add(&frame->list, &priv->free_frames);
  1287. }
  1288. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1289. struct ieee80211_hdr *hdr,
  1290. const u8 *dest, int left)
  1291. {
  1292. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1293. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1294. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1295. return 0;
  1296. if (priv->ibss_beacon->len > left)
  1297. return 0;
  1298. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1299. return priv->ibss_beacon->len;
  1300. }
  1301. int iwl4965_rate_index_from_plcp(int plcp)
  1302. {
  1303. int i = 0;
  1304. /* 4965 HT rate format */
  1305. if (plcp & RATE_MCS_HT_MSK) {
  1306. i = (plcp & 0xff);
  1307. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1308. i = i - IWL_RATE_MIMO_6M_PLCP;
  1309. i += IWL_FIRST_OFDM_RATE;
  1310. /* skip 9M not supported in ht*/
  1311. if (i >= IWL_RATE_9M_INDEX)
  1312. i += 1;
  1313. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1314. (i <= IWL_LAST_OFDM_RATE))
  1315. return i;
  1316. /* 4965 legacy rate format, search for match in table */
  1317. } else {
  1318. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1319. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1320. return i;
  1321. }
  1322. return -1;
  1323. }
  1324. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1325. {
  1326. u8 i;
  1327. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1328. i = iwl4965_rates[i].next_ieee) {
  1329. if (rate_mask & (1 << i))
  1330. return iwl4965_rates[i].plcp;
  1331. }
  1332. return IWL_RATE_INVALID;
  1333. }
  1334. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1335. {
  1336. struct iwl4965_frame *frame;
  1337. unsigned int frame_size;
  1338. int rc;
  1339. u8 rate;
  1340. frame = iwl4965_get_free_frame(priv);
  1341. if (!frame) {
  1342. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1343. "command.\n");
  1344. return -ENOMEM;
  1345. }
  1346. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1347. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1348. 0xFF0);
  1349. if (rate == IWL_INVALID_RATE)
  1350. rate = IWL_RATE_6M_PLCP;
  1351. } else {
  1352. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1353. if (rate == IWL_INVALID_RATE)
  1354. rate = IWL_RATE_1M_PLCP;
  1355. }
  1356. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1357. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1358. &frame->u.cmd[0]);
  1359. iwl4965_free_frame(priv, frame);
  1360. return rc;
  1361. }
  1362. /******************************************************************************
  1363. *
  1364. * EEPROM related functions
  1365. *
  1366. ******************************************************************************/
  1367. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1368. {
  1369. memcpy(mac, priv->eeprom.mac_address, 6);
  1370. }
  1371. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1372. {
  1373. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1374. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1375. }
  1376. /**
  1377. * iwl4965_eeprom_init - read EEPROM contents
  1378. *
  1379. * Load the EEPROM contents from adapter into priv->eeprom
  1380. *
  1381. * NOTE: This routine uses the non-debug IO access functions.
  1382. */
  1383. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1384. {
  1385. __le16 *e = (__le16 *)&priv->eeprom;
  1386. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1387. u32 r;
  1388. int sz = sizeof(priv->eeprom);
  1389. int rc;
  1390. int i;
  1391. u16 addr;
  1392. /* The EEPROM structure has several padding buffers within it
  1393. * and when adding new EEPROM maps is subject to programmer errors
  1394. * which may be very difficult to identify without explicitly
  1395. * checking the resulting size of the eeprom map. */
  1396. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1397. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1398. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1399. return -ENOENT;
  1400. }
  1401. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1402. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1403. if (rc < 0) {
  1404. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1405. return -ENOENT;
  1406. }
  1407. /* eeprom is an array of 16bit values */
  1408. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1409. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1410. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1411. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1412. i += IWL_EEPROM_ACCESS_DELAY) {
  1413. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1414. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1415. break;
  1416. udelay(IWL_EEPROM_ACCESS_DELAY);
  1417. }
  1418. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1419. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1420. rc = -ETIMEDOUT;
  1421. goto done;
  1422. }
  1423. e[addr / 2] = cpu_to_le16(r >> 16);
  1424. }
  1425. rc = 0;
  1426. done:
  1427. iwl4965_eeprom_release_semaphore(priv);
  1428. return rc;
  1429. }
  1430. /******************************************************************************
  1431. *
  1432. * Misc. internal state and helper functions
  1433. *
  1434. ******************************************************************************/
  1435. #ifdef CONFIG_IWL4965_DEBUG
  1436. /**
  1437. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1438. *
  1439. * You may hack this function to show different aspects of received frames,
  1440. * including selective frame dumps.
  1441. * group100 parameter selects whether to show 1 out of 100 good frames.
  1442. *
  1443. * TODO: This was originally written for 3945, need to audit for
  1444. * proper operation with 4965.
  1445. */
  1446. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1447. struct iwl4965_rx_packet *pkt,
  1448. struct ieee80211_hdr *header, int group100)
  1449. {
  1450. u32 to_us;
  1451. u32 print_summary = 0;
  1452. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1453. u32 hundred = 0;
  1454. u32 dataframe = 0;
  1455. u16 fc;
  1456. u16 seq_ctl;
  1457. u16 channel;
  1458. u16 phy_flags;
  1459. int rate_sym;
  1460. u16 length;
  1461. u16 status;
  1462. u16 bcn_tmr;
  1463. u32 tsf_low;
  1464. u64 tsf;
  1465. u8 rssi;
  1466. u8 agc;
  1467. u16 sig_avg;
  1468. u16 noise_diff;
  1469. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1470. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1471. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1472. u8 *data = IWL_RX_DATA(pkt);
  1473. /* MAC header */
  1474. fc = le16_to_cpu(header->frame_control);
  1475. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1476. /* metadata */
  1477. channel = le16_to_cpu(rx_hdr->channel);
  1478. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1479. rate_sym = rx_hdr->rate;
  1480. length = le16_to_cpu(rx_hdr->len);
  1481. /* end-of-frame status and timestamp */
  1482. status = le32_to_cpu(rx_end->status);
  1483. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1484. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1485. tsf = le64_to_cpu(rx_end->timestamp);
  1486. /* signal statistics */
  1487. rssi = rx_stats->rssi;
  1488. agc = rx_stats->agc;
  1489. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1490. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1491. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1492. /* if data frame is to us and all is good,
  1493. * (optionally) print summary for only 1 out of every 100 */
  1494. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1495. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1496. dataframe = 1;
  1497. if (!group100)
  1498. print_summary = 1; /* print each frame */
  1499. else if (priv->framecnt_to_us < 100) {
  1500. priv->framecnt_to_us++;
  1501. print_summary = 0;
  1502. } else {
  1503. priv->framecnt_to_us = 0;
  1504. print_summary = 1;
  1505. hundred = 1;
  1506. }
  1507. } else {
  1508. /* print summary for all other frames */
  1509. print_summary = 1;
  1510. }
  1511. if (print_summary) {
  1512. char *title;
  1513. u32 rate;
  1514. if (hundred)
  1515. title = "100Frames";
  1516. else if (fc & IEEE80211_FCTL_RETRY)
  1517. title = "Retry";
  1518. else if (ieee80211_is_assoc_response(fc))
  1519. title = "AscRsp";
  1520. else if (ieee80211_is_reassoc_response(fc))
  1521. title = "RasRsp";
  1522. else if (ieee80211_is_probe_response(fc)) {
  1523. title = "PrbRsp";
  1524. print_dump = 1; /* dump frame contents */
  1525. } else if (ieee80211_is_beacon(fc)) {
  1526. title = "Beacon";
  1527. print_dump = 1; /* dump frame contents */
  1528. } else if (ieee80211_is_atim(fc))
  1529. title = "ATIM";
  1530. else if (ieee80211_is_auth(fc))
  1531. title = "Auth";
  1532. else if (ieee80211_is_deauth(fc))
  1533. title = "DeAuth";
  1534. else if (ieee80211_is_disassoc(fc))
  1535. title = "DisAssoc";
  1536. else
  1537. title = "Frame";
  1538. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1539. if (rate == -1)
  1540. rate = 0;
  1541. else
  1542. rate = iwl4965_rates[rate].ieee / 2;
  1543. /* print frame summary.
  1544. * MAC addresses show just the last byte (for brevity),
  1545. * but you can hack it to show more, if you'd like to. */
  1546. if (dataframe)
  1547. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1548. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1549. title, fc, header->addr1[5],
  1550. length, rssi, channel, rate);
  1551. else {
  1552. /* src/dst addresses assume managed mode */
  1553. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1554. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1555. "phy=0x%02x, chnl=%d\n",
  1556. title, fc, header->addr1[5],
  1557. header->addr3[5], rssi,
  1558. tsf_low - priv->scan_start_tsf,
  1559. phy_flags, channel);
  1560. }
  1561. }
  1562. if (print_dump)
  1563. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1564. }
  1565. #endif
  1566. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1567. {
  1568. if (priv->hw_setting.shared_virt)
  1569. pci_free_consistent(priv->pci_dev,
  1570. sizeof(struct iwl4965_shared),
  1571. priv->hw_setting.shared_virt,
  1572. priv->hw_setting.shared_phys);
  1573. }
  1574. /**
  1575. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1576. *
  1577. * return : set the bit for each supported rate insert in ie
  1578. */
  1579. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1580. u16 basic_rate, int *left)
  1581. {
  1582. u16 ret_rates = 0, bit;
  1583. int i;
  1584. u8 *cnt = ie;
  1585. u8 *rates = ie + 1;
  1586. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1587. if (bit & supported_rate) {
  1588. ret_rates |= bit;
  1589. rates[*cnt] = iwl4965_rates[i].ieee |
  1590. ((bit & basic_rate) ? 0x80 : 0x00);
  1591. (*cnt)++;
  1592. (*left)--;
  1593. if ((*left <= 0) ||
  1594. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1595. break;
  1596. }
  1597. }
  1598. return ret_rates;
  1599. }
  1600. #ifdef CONFIG_IWL4965_HT
  1601. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1602. struct ieee80211_ht_cap *ht_cap,
  1603. u8 use_current_config);
  1604. #endif
  1605. /**
  1606. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1607. */
  1608. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1609. struct ieee80211_mgmt *frame,
  1610. int left, int is_direct)
  1611. {
  1612. int len = 0;
  1613. u8 *pos = NULL;
  1614. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1615. #ifdef CONFIG_IWL4965_HT
  1616. struct ieee80211_hw_mode *mode;
  1617. #endif /* CONFIG_IWL4965_HT */
  1618. /* Make sure there is enough space for the probe request,
  1619. * two mandatory IEs and the data */
  1620. left -= 24;
  1621. if (left < 0)
  1622. return 0;
  1623. len += 24;
  1624. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1625. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1626. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1627. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1628. frame->seq_ctrl = 0;
  1629. /* fill in our indirect SSID IE */
  1630. /* ...next IE... */
  1631. left -= 2;
  1632. if (left < 0)
  1633. return 0;
  1634. len += 2;
  1635. pos = &(frame->u.probe_req.variable[0]);
  1636. *pos++ = WLAN_EID_SSID;
  1637. *pos++ = 0;
  1638. /* fill in our direct SSID IE... */
  1639. if (is_direct) {
  1640. /* ...next IE... */
  1641. left -= 2 + priv->essid_len;
  1642. if (left < 0)
  1643. return 0;
  1644. /* ... fill it in... */
  1645. *pos++ = WLAN_EID_SSID;
  1646. *pos++ = priv->essid_len;
  1647. memcpy(pos, priv->essid, priv->essid_len);
  1648. pos += priv->essid_len;
  1649. len += 2 + priv->essid_len;
  1650. }
  1651. /* fill in supported rate */
  1652. /* ...next IE... */
  1653. left -= 2;
  1654. if (left < 0)
  1655. return 0;
  1656. /* ... fill it in... */
  1657. *pos++ = WLAN_EID_SUPP_RATES;
  1658. *pos = 0;
  1659. /* exclude 60M rate */
  1660. active_rates = priv->rates_mask;
  1661. active_rates &= ~IWL_RATE_60M_MASK;
  1662. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1663. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1664. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1665. active_rate_basic, &left);
  1666. active_rates &= ~ret_rates;
  1667. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1668. active_rate_basic, &left);
  1669. active_rates &= ~ret_rates;
  1670. len += 2 + *pos;
  1671. pos += (*pos) + 1;
  1672. if (active_rates == 0)
  1673. goto fill_end;
  1674. /* fill in supported extended rate */
  1675. /* ...next IE... */
  1676. left -= 2;
  1677. if (left < 0)
  1678. return 0;
  1679. /* ... fill it in... */
  1680. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1681. *pos = 0;
  1682. iwl4965_supported_rate_to_ie(pos, active_rates,
  1683. active_rate_basic, &left);
  1684. if (*pos > 0)
  1685. len += 2 + *pos;
  1686. #ifdef CONFIG_IWL4965_HT
  1687. mode = priv->hw->conf.mode;
  1688. if (mode->ht_info.ht_supported) {
  1689. pos += (*pos) + 1;
  1690. *pos++ = WLAN_EID_HT_CAPABILITY;
  1691. *pos++ = sizeof(struct ieee80211_ht_cap);
  1692. iwl4965_set_ht_capab(priv->hw,
  1693. (struct ieee80211_ht_cap *)pos, 0);
  1694. len += 2 + sizeof(struct ieee80211_ht_cap);
  1695. }
  1696. #endif /*CONFIG_IWL4965_HT */
  1697. fill_end:
  1698. return (u16)len;
  1699. }
  1700. /*
  1701. * QoS support
  1702. */
  1703. #ifdef CONFIG_IWL4965_QOS
  1704. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1705. struct iwl4965_qosparam_cmd *qos)
  1706. {
  1707. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1708. sizeof(struct iwl4965_qosparam_cmd), qos);
  1709. }
  1710. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1711. {
  1712. u16 cw_min = 15;
  1713. u16 cw_max = 1023;
  1714. u8 aifs = 2;
  1715. u8 is_legacy = 0;
  1716. unsigned long flags;
  1717. int i;
  1718. spin_lock_irqsave(&priv->lock, flags);
  1719. priv->qos_data.qos_active = 0;
  1720. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1721. if (priv->qos_data.qos_enable)
  1722. priv->qos_data.qos_active = 1;
  1723. if (!(priv->active_rate & 0xfff0)) {
  1724. cw_min = 31;
  1725. is_legacy = 1;
  1726. }
  1727. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1728. if (priv->qos_data.qos_enable)
  1729. priv->qos_data.qos_active = 1;
  1730. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1731. cw_min = 31;
  1732. is_legacy = 1;
  1733. }
  1734. if (priv->qos_data.qos_active)
  1735. aifs = 3;
  1736. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1737. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1738. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1739. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1740. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1741. if (priv->qos_data.qos_active) {
  1742. i = 1;
  1743. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1744. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1745. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1746. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1747. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1748. i = 2;
  1749. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1750. cpu_to_le16((cw_min + 1) / 2 - 1);
  1751. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1752. cpu_to_le16(cw_max);
  1753. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1754. if (is_legacy)
  1755. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1756. cpu_to_le16(6016);
  1757. else
  1758. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1759. cpu_to_le16(3008);
  1760. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1761. i = 3;
  1762. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1763. cpu_to_le16((cw_min + 1) / 4 - 1);
  1764. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1765. cpu_to_le16((cw_max + 1) / 2 - 1);
  1766. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1767. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1768. if (is_legacy)
  1769. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1770. cpu_to_le16(3264);
  1771. else
  1772. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1773. cpu_to_le16(1504);
  1774. } else {
  1775. for (i = 1; i < 4; i++) {
  1776. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1777. cpu_to_le16(cw_min);
  1778. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1779. cpu_to_le16(cw_max);
  1780. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1781. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1782. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1783. }
  1784. }
  1785. IWL_DEBUG_QOS("set QoS to default \n");
  1786. spin_unlock_irqrestore(&priv->lock, flags);
  1787. }
  1788. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1789. {
  1790. unsigned long flags;
  1791. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1792. return;
  1793. if (!priv->qos_data.qos_enable)
  1794. return;
  1795. spin_lock_irqsave(&priv->lock, flags);
  1796. priv->qos_data.def_qos_parm.qos_flags = 0;
  1797. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1798. !priv->qos_data.qos_cap.q_AP.txop_request)
  1799. priv->qos_data.def_qos_parm.qos_flags |=
  1800. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1801. if (priv->qos_data.qos_active)
  1802. priv->qos_data.def_qos_parm.qos_flags |=
  1803. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1804. #ifdef CONFIG_IWL4965_HT
  1805. if (priv->current_ht_config.is_ht)
  1806. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1807. #endif /* CONFIG_IWL4965_HT */
  1808. spin_unlock_irqrestore(&priv->lock, flags);
  1809. if (force || iwl4965_is_associated(priv)) {
  1810. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1811. priv->qos_data.qos_active,
  1812. priv->qos_data.def_qos_parm.qos_flags);
  1813. iwl4965_send_qos_params_command(priv,
  1814. &(priv->qos_data.def_qos_parm));
  1815. }
  1816. }
  1817. #endif /* CONFIG_IWL4965_QOS */
  1818. /*
  1819. * Power management (not Tx power!) functions
  1820. */
  1821. #define MSEC_TO_USEC 1024
  1822. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1823. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1824. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1825. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1826. __constant_cpu_to_le32(X1), \
  1827. __constant_cpu_to_le32(X2), \
  1828. __constant_cpu_to_le32(X3), \
  1829. __constant_cpu_to_le32(X4)}
  1830. /* default power management (not Tx power) table values */
  1831. /* for tim 0-10 */
  1832. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1833. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1834. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1835. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1836. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1837. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1838. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1839. };
  1840. /* for tim > 10 */
  1841. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1842. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1843. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1844. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1845. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1846. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1847. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1848. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1849. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1850. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1851. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1852. };
  1853. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1854. {
  1855. int rc = 0, i;
  1856. struct iwl4965_power_mgr *pow_data;
  1857. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1858. u16 pci_pm;
  1859. IWL_DEBUG_POWER("Initialize power \n");
  1860. pow_data = &(priv->power_data);
  1861. memset(pow_data, 0, sizeof(*pow_data));
  1862. pow_data->active_index = IWL_POWER_RANGE_0;
  1863. pow_data->dtim_val = 0xffff;
  1864. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1865. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1866. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1867. if (rc != 0)
  1868. return 0;
  1869. else {
  1870. struct iwl4965_powertable_cmd *cmd;
  1871. IWL_DEBUG_POWER("adjust power command flags\n");
  1872. for (i = 0; i < IWL_POWER_AC; i++) {
  1873. cmd = &pow_data->pwr_range_0[i].cmd;
  1874. if (pci_pm & 0x1)
  1875. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1876. else
  1877. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1878. }
  1879. }
  1880. return rc;
  1881. }
  1882. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1883. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1884. {
  1885. int rc = 0, i;
  1886. u8 skip;
  1887. u32 max_sleep = 0;
  1888. struct iwl4965_power_vec_entry *range;
  1889. u8 period = 0;
  1890. struct iwl4965_power_mgr *pow_data;
  1891. if (mode > IWL_POWER_INDEX_5) {
  1892. IWL_DEBUG_POWER("Error invalid power mode \n");
  1893. return -1;
  1894. }
  1895. pow_data = &(priv->power_data);
  1896. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1897. range = &pow_data->pwr_range_0[0];
  1898. else
  1899. range = &pow_data->pwr_range_1[1];
  1900. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1901. #ifdef IWL_MAC80211_DISABLE
  1902. if (priv->assoc_network != NULL) {
  1903. unsigned long flags;
  1904. period = priv->assoc_network->tim.tim_period;
  1905. }
  1906. #endif /*IWL_MAC80211_DISABLE */
  1907. skip = range[mode].no_dtim;
  1908. if (period == 0) {
  1909. period = 1;
  1910. skip = 0;
  1911. }
  1912. if (skip == 0) {
  1913. max_sleep = period;
  1914. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1915. } else {
  1916. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1917. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1918. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1919. }
  1920. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1921. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1922. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1923. }
  1924. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1925. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1926. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1927. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1928. le32_to_cpu(cmd->sleep_interval[0]),
  1929. le32_to_cpu(cmd->sleep_interval[1]),
  1930. le32_to_cpu(cmd->sleep_interval[2]),
  1931. le32_to_cpu(cmd->sleep_interval[3]),
  1932. le32_to_cpu(cmd->sleep_interval[4]));
  1933. return rc;
  1934. }
  1935. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1936. {
  1937. u32 uninitialized_var(final_mode);
  1938. int rc;
  1939. struct iwl4965_powertable_cmd cmd;
  1940. /* If on battery, set to 3,
  1941. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1942. * else user level */
  1943. switch (mode) {
  1944. case IWL_POWER_BATTERY:
  1945. final_mode = IWL_POWER_INDEX_3;
  1946. break;
  1947. case IWL_POWER_AC:
  1948. final_mode = IWL_POWER_MODE_CAM;
  1949. break;
  1950. default:
  1951. final_mode = mode;
  1952. break;
  1953. }
  1954. cmd.keep_alive_beacons = 0;
  1955. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1956. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1957. if (final_mode == IWL_POWER_MODE_CAM)
  1958. clear_bit(STATUS_POWER_PMI, &priv->status);
  1959. else
  1960. set_bit(STATUS_POWER_PMI, &priv->status);
  1961. return rc;
  1962. }
  1963. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1964. {
  1965. /* Filter incoming packets to determine if they are targeted toward
  1966. * this network, discarding packets coming from ourselves */
  1967. switch (priv->iw_mode) {
  1968. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1969. /* packets from our adapter are dropped (echo) */
  1970. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1971. return 0;
  1972. /* {broad,multi}cast packets to our IBSS go through */
  1973. if (is_multicast_ether_addr(header->addr1))
  1974. return !compare_ether_addr(header->addr3, priv->bssid);
  1975. /* packets to our adapter go through */
  1976. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1977. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1978. /* packets from our adapter are dropped (echo) */
  1979. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1980. return 0;
  1981. /* {broad,multi}cast packets to our BSS go through */
  1982. if (is_multicast_ether_addr(header->addr1))
  1983. return !compare_ether_addr(header->addr2, priv->bssid);
  1984. /* packets to our adapter go through */
  1985. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1986. }
  1987. return 1;
  1988. }
  1989. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1990. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1991. {
  1992. switch (status & TX_STATUS_MSK) {
  1993. case TX_STATUS_SUCCESS:
  1994. return "SUCCESS";
  1995. TX_STATUS_ENTRY(SHORT_LIMIT);
  1996. TX_STATUS_ENTRY(LONG_LIMIT);
  1997. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1998. TX_STATUS_ENTRY(MGMNT_ABORT);
  1999. TX_STATUS_ENTRY(NEXT_FRAG);
  2000. TX_STATUS_ENTRY(LIFE_EXPIRE);
  2001. TX_STATUS_ENTRY(DEST_PS);
  2002. TX_STATUS_ENTRY(ABORTED);
  2003. TX_STATUS_ENTRY(BT_RETRY);
  2004. TX_STATUS_ENTRY(STA_INVALID);
  2005. TX_STATUS_ENTRY(FRAG_DROPPED);
  2006. TX_STATUS_ENTRY(TID_DISABLE);
  2007. TX_STATUS_ENTRY(FRAME_FLUSHED);
  2008. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  2009. TX_STATUS_ENTRY(TX_LOCKED);
  2010. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  2011. }
  2012. return "UNKNOWN";
  2013. }
  2014. /**
  2015. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  2016. *
  2017. * NOTE: priv->mutex is not required before calling this function
  2018. */
  2019. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2020. {
  2021. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2022. clear_bit(STATUS_SCANNING, &priv->status);
  2023. return 0;
  2024. }
  2025. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2026. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2027. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2028. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2029. queue_work(priv->workqueue, &priv->abort_scan);
  2030. } else
  2031. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2032. return test_bit(STATUS_SCANNING, &priv->status);
  2033. }
  2034. return 0;
  2035. }
  2036. /**
  2037. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2038. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2039. *
  2040. * NOTE: priv->mutex must be held before calling this function
  2041. */
  2042. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2043. {
  2044. unsigned long now = jiffies;
  2045. int ret;
  2046. ret = iwl4965_scan_cancel(priv);
  2047. if (ret && ms) {
  2048. mutex_unlock(&priv->mutex);
  2049. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2050. test_bit(STATUS_SCANNING, &priv->status))
  2051. msleep(1);
  2052. mutex_lock(&priv->mutex);
  2053. return test_bit(STATUS_SCANNING, &priv->status);
  2054. }
  2055. return ret;
  2056. }
  2057. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2058. {
  2059. /* Reset ieee stats */
  2060. /* We don't reset the net_device_stats (ieee->stats) on
  2061. * re-association */
  2062. priv->last_seq_num = -1;
  2063. priv->last_frag_num = -1;
  2064. priv->last_packet_time = 0;
  2065. iwl4965_scan_cancel(priv);
  2066. }
  2067. #define MAX_UCODE_BEACON_INTERVAL 4096
  2068. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2069. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2070. {
  2071. u16 new_val = 0;
  2072. u16 beacon_factor = 0;
  2073. beacon_factor =
  2074. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2075. / MAX_UCODE_BEACON_INTERVAL;
  2076. new_val = beacon_val / beacon_factor;
  2077. return cpu_to_le16(new_val);
  2078. }
  2079. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2080. {
  2081. u64 interval_tm_unit;
  2082. u64 tsf, result;
  2083. unsigned long flags;
  2084. struct ieee80211_conf *conf = NULL;
  2085. u16 beacon_int = 0;
  2086. conf = ieee80211_get_hw_conf(priv->hw);
  2087. spin_lock_irqsave(&priv->lock, flags);
  2088. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2089. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2090. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2091. tsf = priv->timestamp1;
  2092. tsf = ((tsf << 32) | priv->timestamp0);
  2093. beacon_int = priv->beacon_int;
  2094. spin_unlock_irqrestore(&priv->lock, flags);
  2095. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2096. if (beacon_int == 0) {
  2097. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2098. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2099. } else {
  2100. priv->rxon_timing.beacon_interval =
  2101. cpu_to_le16(beacon_int);
  2102. priv->rxon_timing.beacon_interval =
  2103. iwl4965_adjust_beacon_interval(
  2104. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2105. }
  2106. priv->rxon_timing.atim_window = 0;
  2107. } else {
  2108. priv->rxon_timing.beacon_interval =
  2109. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2110. /* TODO: we need to get atim_window from upper stack
  2111. * for now we set to 0 */
  2112. priv->rxon_timing.atim_window = 0;
  2113. }
  2114. interval_tm_unit =
  2115. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2116. result = do_div(tsf, interval_tm_unit);
  2117. priv->rxon_timing.beacon_init_val =
  2118. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2119. IWL_DEBUG_ASSOC
  2120. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2121. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2122. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2123. le16_to_cpu(priv->rxon_timing.atim_window));
  2124. }
  2125. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2126. {
  2127. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2128. IWL_ERROR("APs don't scan.\n");
  2129. return 0;
  2130. }
  2131. if (!iwl4965_is_ready_rf(priv)) {
  2132. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2133. return -EIO;
  2134. }
  2135. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2136. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2137. return -EAGAIN;
  2138. }
  2139. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2140. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2141. "Queuing.\n");
  2142. return -EAGAIN;
  2143. }
  2144. IWL_DEBUG_INFO("Starting scan...\n");
  2145. priv->scan_bands = 2;
  2146. set_bit(STATUS_SCANNING, &priv->status);
  2147. priv->scan_start = jiffies;
  2148. priv->scan_pass_start = priv->scan_start;
  2149. queue_work(priv->workqueue, &priv->request_scan);
  2150. return 0;
  2151. }
  2152. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2153. {
  2154. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2155. if (hw_decrypt)
  2156. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2157. else
  2158. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2159. return 0;
  2160. }
  2161. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2162. {
  2163. if (phymode == MODE_IEEE80211A) {
  2164. priv->staging_rxon.flags &=
  2165. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2166. | RXON_FLG_CCK_MSK);
  2167. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2168. } else {
  2169. /* Copied from iwl4965_bg_post_associate() */
  2170. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2171. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2172. else
  2173. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2174. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2175. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2176. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2177. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2178. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2179. }
  2180. }
  2181. /*
  2182. * initialize rxon structure with default values from eeprom
  2183. */
  2184. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2185. {
  2186. const struct iwl4965_channel_info *ch_info;
  2187. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2188. switch (priv->iw_mode) {
  2189. case IEEE80211_IF_TYPE_AP:
  2190. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2191. break;
  2192. case IEEE80211_IF_TYPE_STA:
  2193. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2194. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2195. break;
  2196. case IEEE80211_IF_TYPE_IBSS:
  2197. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2198. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2199. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2200. RXON_FILTER_ACCEPT_GRP_MSK;
  2201. break;
  2202. case IEEE80211_IF_TYPE_MNTR:
  2203. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2204. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2205. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2206. break;
  2207. }
  2208. #if 0
  2209. /* TODO: Figure out when short_preamble would be set and cache from
  2210. * that */
  2211. if (!hw_to_local(priv->hw)->short_preamble)
  2212. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2213. else
  2214. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2215. #endif
  2216. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2217. le16_to_cpu(priv->staging_rxon.channel));
  2218. if (!ch_info)
  2219. ch_info = &priv->channel_info[0];
  2220. /*
  2221. * in some case A channels are all non IBSS
  2222. * in this case force B/G channel
  2223. */
  2224. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2225. !(is_channel_ibss(ch_info)))
  2226. ch_info = &priv->channel_info[0];
  2227. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2228. if (is_channel_a_band(ch_info))
  2229. priv->phymode = MODE_IEEE80211A;
  2230. else
  2231. priv->phymode = MODE_IEEE80211G;
  2232. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2233. priv->staging_rxon.ofdm_basic_rates =
  2234. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2235. priv->staging_rxon.cck_basic_rates =
  2236. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2237. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2238. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2239. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2240. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2241. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2242. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2243. iwl4965_set_rxon_chain(priv);
  2244. }
  2245. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2246. {
  2247. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2248. const struct iwl4965_channel_info *ch_info;
  2249. ch_info = iwl4965_get_channel_info(priv,
  2250. priv->phymode,
  2251. le16_to_cpu(priv->staging_rxon.channel));
  2252. if (!ch_info || !is_channel_ibss(ch_info)) {
  2253. IWL_ERROR("channel %d not IBSS channel\n",
  2254. le16_to_cpu(priv->staging_rxon.channel));
  2255. return -EINVAL;
  2256. }
  2257. }
  2258. priv->iw_mode = mode;
  2259. iwl4965_connection_init_rx_config(priv);
  2260. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2261. iwl4965_clear_stations_table(priv);
  2262. /* dont commit rxon if rf-kill is on*/
  2263. if (!iwl4965_is_ready_rf(priv))
  2264. return -EAGAIN;
  2265. cancel_delayed_work(&priv->scan_check);
  2266. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2267. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2268. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2269. return -EAGAIN;
  2270. }
  2271. iwl4965_commit_rxon(priv);
  2272. return 0;
  2273. }
  2274. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2275. struct ieee80211_tx_control *ctl,
  2276. struct iwl4965_cmd *cmd,
  2277. struct sk_buff *skb_frag,
  2278. int last_frag)
  2279. {
  2280. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2281. switch (keyinfo->alg) {
  2282. case ALG_CCMP:
  2283. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2284. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2285. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2286. break;
  2287. case ALG_TKIP:
  2288. #if 0
  2289. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2290. if (last_frag)
  2291. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2292. 8);
  2293. else
  2294. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2295. #endif
  2296. break;
  2297. case ALG_WEP:
  2298. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2299. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2300. if (keyinfo->keylen == 13)
  2301. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2302. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2303. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2304. "with key %d\n", ctl->key_idx);
  2305. break;
  2306. default:
  2307. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2308. break;
  2309. }
  2310. }
  2311. /*
  2312. * handle build REPLY_TX command notification.
  2313. */
  2314. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2315. struct iwl4965_cmd *cmd,
  2316. struct ieee80211_tx_control *ctrl,
  2317. struct ieee80211_hdr *hdr,
  2318. int is_unicast, u8 std_id)
  2319. {
  2320. __le16 *qc;
  2321. u16 fc = le16_to_cpu(hdr->frame_control);
  2322. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2323. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2324. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2325. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2326. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2327. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2328. if (ieee80211_is_probe_response(fc) &&
  2329. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2330. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2331. } else {
  2332. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2333. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2334. }
  2335. if (ieee80211_is_back_request(fc))
  2336. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2337. cmd->cmd.tx.sta_id = std_id;
  2338. if (ieee80211_get_morefrag(hdr))
  2339. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2340. qc = ieee80211_get_qos_ctrl(hdr);
  2341. if (qc) {
  2342. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2343. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2344. } else
  2345. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2346. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2347. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2348. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2349. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2350. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2351. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2352. }
  2353. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2354. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2355. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2356. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2357. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2358. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2359. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2360. else
  2361. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2362. } else
  2363. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2364. cmd->cmd.tx.driver_txop = 0;
  2365. cmd->cmd.tx.tx_flags = tx_flags;
  2366. cmd->cmd.tx.next_frame_len = 0;
  2367. }
  2368. /**
  2369. * iwl4965_get_sta_id - Find station's index within station table
  2370. *
  2371. * If new IBSS station, create new entry in station table
  2372. */
  2373. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2374. struct ieee80211_hdr *hdr)
  2375. {
  2376. int sta_id;
  2377. u16 fc = le16_to_cpu(hdr->frame_control);
  2378. DECLARE_MAC_BUF(mac);
  2379. /* If this frame is broadcast or management, use broadcast station id */
  2380. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2381. is_multicast_ether_addr(hdr->addr1))
  2382. return priv->hw_setting.bcast_sta_id;
  2383. switch (priv->iw_mode) {
  2384. /* If we are a client station in a BSS network, use the special
  2385. * AP station entry (that's the only station we communicate with) */
  2386. case IEEE80211_IF_TYPE_STA:
  2387. return IWL_AP_ID;
  2388. /* If we are an AP, then find the station, or use BCAST */
  2389. case IEEE80211_IF_TYPE_AP:
  2390. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2391. if (sta_id != IWL_INVALID_STATION)
  2392. return sta_id;
  2393. return priv->hw_setting.bcast_sta_id;
  2394. /* If this frame is going out to an IBSS network, find the station,
  2395. * or create a new station table entry */
  2396. case IEEE80211_IF_TYPE_IBSS:
  2397. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2398. if (sta_id != IWL_INVALID_STATION)
  2399. return sta_id;
  2400. /* Create new station table entry */
  2401. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2402. 0, CMD_ASYNC, NULL);
  2403. if (sta_id != IWL_INVALID_STATION)
  2404. return sta_id;
  2405. IWL_DEBUG_DROP("Station %s not in station map. "
  2406. "Defaulting to broadcast...\n",
  2407. print_mac(mac, hdr->addr1));
  2408. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2409. return priv->hw_setting.bcast_sta_id;
  2410. default:
  2411. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2412. return priv->hw_setting.bcast_sta_id;
  2413. }
  2414. }
  2415. /*
  2416. * start REPLY_TX command process
  2417. */
  2418. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2419. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2420. {
  2421. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2422. struct iwl4965_tfd_frame *tfd;
  2423. u32 *control_flags;
  2424. int txq_id = ctl->queue;
  2425. struct iwl4965_tx_queue *txq = NULL;
  2426. struct iwl4965_queue *q = NULL;
  2427. dma_addr_t phys_addr;
  2428. dma_addr_t txcmd_phys;
  2429. dma_addr_t scratch_phys;
  2430. struct iwl4965_cmd *out_cmd = NULL;
  2431. u16 len, idx, len_org;
  2432. u8 id, hdr_len, unicast;
  2433. u8 sta_id;
  2434. u16 seq_number = 0;
  2435. u16 fc;
  2436. __le16 *qc;
  2437. u8 wait_write_ptr = 0;
  2438. unsigned long flags;
  2439. int rc;
  2440. spin_lock_irqsave(&priv->lock, flags);
  2441. if (iwl4965_is_rfkill(priv)) {
  2442. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2443. goto drop_unlock;
  2444. }
  2445. if (!priv->vif) {
  2446. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2447. goto drop_unlock;
  2448. }
  2449. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2450. IWL_ERROR("ERROR: No TX rate available.\n");
  2451. goto drop_unlock;
  2452. }
  2453. unicast = !is_multicast_ether_addr(hdr->addr1);
  2454. id = 0;
  2455. fc = le16_to_cpu(hdr->frame_control);
  2456. #ifdef CONFIG_IWL4965_DEBUG
  2457. if (ieee80211_is_auth(fc))
  2458. IWL_DEBUG_TX("Sending AUTH frame\n");
  2459. else if (ieee80211_is_assoc_request(fc))
  2460. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2461. else if (ieee80211_is_reassoc_request(fc))
  2462. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2463. #endif
  2464. /* drop all data frame if we are not associated */
  2465. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2466. (!iwl4965_is_associated(priv) ||
  2467. !priv->assoc_id ||
  2468. !priv->assoc_station_added)) {
  2469. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2470. goto drop_unlock;
  2471. }
  2472. spin_unlock_irqrestore(&priv->lock, flags);
  2473. hdr_len = ieee80211_get_hdrlen(fc);
  2474. /* Find (or create) index into station table for destination station */
  2475. sta_id = iwl4965_get_sta_id(priv, hdr);
  2476. if (sta_id == IWL_INVALID_STATION) {
  2477. DECLARE_MAC_BUF(mac);
  2478. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2479. print_mac(mac, hdr->addr1));
  2480. goto drop;
  2481. }
  2482. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2483. qc = ieee80211_get_qos_ctrl(hdr);
  2484. if (qc) {
  2485. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2486. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2487. IEEE80211_SCTL_SEQ;
  2488. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2489. (hdr->seq_ctrl &
  2490. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2491. seq_number += 0x10;
  2492. #ifdef CONFIG_IWL4965_HT
  2493. #ifdef CONFIG_IWL4965_HT_AGG
  2494. /* aggregation is on for this <sta,tid> */
  2495. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2496. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2497. #endif /* CONFIG_IWL4965_HT_AGG */
  2498. #endif /* CONFIG_IWL4965_HT */
  2499. }
  2500. /* Descriptor for chosen Tx queue */
  2501. txq = &priv->txq[txq_id];
  2502. q = &txq->q;
  2503. spin_lock_irqsave(&priv->lock, flags);
  2504. /* Set up first empty TFD within this queue's circular TFD buffer */
  2505. tfd = &txq->bd[q->write_ptr];
  2506. memset(tfd, 0, sizeof(*tfd));
  2507. control_flags = (u32 *) tfd;
  2508. idx = get_cmd_index(q, q->write_ptr, 0);
  2509. /* Set up driver data for this TFD */
  2510. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2511. txq->txb[q->write_ptr].skb[0] = skb;
  2512. memcpy(&(txq->txb[q->write_ptr].status.control),
  2513. ctl, sizeof(struct ieee80211_tx_control));
  2514. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2515. out_cmd = &txq->cmd[idx];
  2516. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2517. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2518. /*
  2519. * Set up the Tx-command (not MAC!) header.
  2520. * Store the chosen Tx queue and TFD index within the sequence field;
  2521. * after Tx, uCode's Tx response will return this value so driver can
  2522. * locate the frame within the tx queue and do post-tx processing.
  2523. */
  2524. out_cmd->hdr.cmd = REPLY_TX;
  2525. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2526. INDEX_TO_SEQ(q->write_ptr)));
  2527. /* Copy MAC header from skb into command buffer */
  2528. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2529. /*
  2530. * Use the first empty entry in this queue's command buffer array
  2531. * to contain the Tx command and MAC header concatenated together
  2532. * (payload data will be in another buffer).
  2533. * Size of this varies, due to varying MAC header length.
  2534. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2535. * of the MAC header (device reads on dword boundaries).
  2536. * We'll tell device about this padding later.
  2537. */
  2538. len = priv->hw_setting.tx_cmd_len +
  2539. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2540. len_org = len;
  2541. len = (len + 3) & ~3;
  2542. if (len_org != len)
  2543. len_org = 1;
  2544. else
  2545. len_org = 0;
  2546. /* Physical address of this Tx command's header (not MAC header!),
  2547. * within command buffer array. */
  2548. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2549. offsetof(struct iwl4965_cmd, hdr);
  2550. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2551. * first entry */
  2552. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2553. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2554. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2555. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2556. * if any (802.11 null frames have no payload). */
  2557. len = skb->len - hdr_len;
  2558. if (len) {
  2559. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2560. len, PCI_DMA_TODEVICE);
  2561. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2562. }
  2563. /* Tell 4965 about any 2-byte padding after MAC header */
  2564. if (len_org)
  2565. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2566. /* Total # bytes to be transmitted */
  2567. len = (u16)skb->len;
  2568. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2569. /* TODO need this for burst mode later on */
  2570. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2571. /* set is_hcca to 0; it probably will never be implemented */
  2572. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2573. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2574. offsetof(struct iwl4965_tx_cmd, scratch);
  2575. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2576. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2577. #ifdef CONFIG_IWL4965_HT_AGG
  2578. #ifdef CONFIG_IWL4965_HT
  2579. /* TODO: move this functionality to rate scaling */
  2580. iwl4965_tl_get_stats(priv, hdr);
  2581. #endif /* CONFIG_IWL4965_HT_AGG */
  2582. #endif /*CONFIG_IWL4965_HT */
  2583. if (!ieee80211_get_morefrag(hdr)) {
  2584. txq->need_update = 1;
  2585. if (qc) {
  2586. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2587. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2588. }
  2589. } else {
  2590. wait_write_ptr = 1;
  2591. txq->need_update = 0;
  2592. }
  2593. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2594. sizeof(out_cmd->cmd.tx));
  2595. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2596. ieee80211_get_hdrlen(fc));
  2597. /* Set up entry for this TFD in Tx byte-count array */
  2598. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2599. /* Tell device the write index *just past* this latest filled TFD */
  2600. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2601. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2602. spin_unlock_irqrestore(&priv->lock, flags);
  2603. if (rc)
  2604. return rc;
  2605. if ((iwl4965_queue_space(q) < q->high_mark)
  2606. && priv->mac80211_registered) {
  2607. if (wait_write_ptr) {
  2608. spin_lock_irqsave(&priv->lock, flags);
  2609. txq->need_update = 1;
  2610. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2611. spin_unlock_irqrestore(&priv->lock, flags);
  2612. }
  2613. ieee80211_stop_queue(priv->hw, ctl->queue);
  2614. }
  2615. return 0;
  2616. drop_unlock:
  2617. spin_unlock_irqrestore(&priv->lock, flags);
  2618. drop:
  2619. return -1;
  2620. }
  2621. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2622. {
  2623. const struct ieee80211_hw_mode *hw = NULL;
  2624. struct ieee80211_rate *rate;
  2625. int i;
  2626. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2627. if (!hw) {
  2628. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2629. return;
  2630. }
  2631. priv->active_rate = 0;
  2632. priv->active_rate_basic = 0;
  2633. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2634. hw->mode == MODE_IEEE80211A ?
  2635. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2636. for (i = 0; i < hw->num_rates; i++) {
  2637. rate = &(hw->rates[i]);
  2638. if ((rate->val < IWL_RATE_COUNT) &&
  2639. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2640. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2641. rate->val, iwl4965_rates[rate->val].plcp,
  2642. (rate->flags & IEEE80211_RATE_BASIC) ?
  2643. "*" : "");
  2644. priv->active_rate |= (1 << rate->val);
  2645. if (rate->flags & IEEE80211_RATE_BASIC)
  2646. priv->active_rate_basic |= (1 << rate->val);
  2647. } else
  2648. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2649. rate->val, iwl4965_rates[rate->val].plcp);
  2650. }
  2651. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2652. priv->active_rate, priv->active_rate_basic);
  2653. /*
  2654. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2655. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2656. * OFDM
  2657. */
  2658. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2659. priv->staging_rxon.cck_basic_rates =
  2660. ((priv->active_rate_basic &
  2661. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2662. else
  2663. priv->staging_rxon.cck_basic_rates =
  2664. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2665. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2666. priv->staging_rxon.ofdm_basic_rates =
  2667. ((priv->active_rate_basic &
  2668. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2669. IWL_FIRST_OFDM_RATE) & 0xFF;
  2670. else
  2671. priv->staging_rxon.ofdm_basic_rates =
  2672. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2673. }
  2674. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2675. {
  2676. unsigned long flags;
  2677. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2678. return;
  2679. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2680. disable_radio ? "OFF" : "ON");
  2681. if (disable_radio) {
  2682. iwl4965_scan_cancel(priv);
  2683. /* FIXME: This is a workaround for AP */
  2684. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2685. spin_lock_irqsave(&priv->lock, flags);
  2686. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2687. CSR_UCODE_SW_BIT_RFKILL);
  2688. spin_unlock_irqrestore(&priv->lock, flags);
  2689. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2690. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2691. }
  2692. return;
  2693. }
  2694. spin_lock_irqsave(&priv->lock, flags);
  2695. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2696. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2697. spin_unlock_irqrestore(&priv->lock, flags);
  2698. /* wake up ucode */
  2699. msleep(10);
  2700. spin_lock_irqsave(&priv->lock, flags);
  2701. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2702. if (!iwl4965_grab_nic_access(priv))
  2703. iwl4965_release_nic_access(priv);
  2704. spin_unlock_irqrestore(&priv->lock, flags);
  2705. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2706. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2707. "disabled by HW switch\n");
  2708. return;
  2709. }
  2710. queue_work(priv->workqueue, &priv->restart);
  2711. return;
  2712. }
  2713. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2714. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2715. {
  2716. u16 fc =
  2717. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2718. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2719. return;
  2720. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2721. return;
  2722. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2723. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2724. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2725. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2726. RX_RES_STATUS_BAD_ICV_MIC)
  2727. stats->flag |= RX_FLAG_MMIC_ERROR;
  2728. case RX_RES_STATUS_SEC_TYPE_WEP:
  2729. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2730. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2731. RX_RES_STATUS_DECRYPT_OK) {
  2732. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2733. stats->flag |= RX_FLAG_DECRYPTED;
  2734. }
  2735. break;
  2736. default:
  2737. break;
  2738. }
  2739. }
  2740. #define IWL_PACKET_RETRY_TIME HZ
  2741. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2742. {
  2743. u16 sc = le16_to_cpu(header->seq_ctrl);
  2744. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2745. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2746. u16 *last_seq, *last_frag;
  2747. unsigned long *last_time;
  2748. switch (priv->iw_mode) {
  2749. case IEEE80211_IF_TYPE_IBSS:{
  2750. struct list_head *p;
  2751. struct iwl4965_ibss_seq *entry = NULL;
  2752. u8 *mac = header->addr2;
  2753. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2754. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2755. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2756. if (!compare_ether_addr(entry->mac, mac))
  2757. break;
  2758. }
  2759. if (p == &priv->ibss_mac_hash[index]) {
  2760. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2761. if (!entry) {
  2762. IWL_ERROR("Cannot malloc new mac entry\n");
  2763. return 0;
  2764. }
  2765. memcpy(entry->mac, mac, ETH_ALEN);
  2766. entry->seq_num = seq;
  2767. entry->frag_num = frag;
  2768. entry->packet_time = jiffies;
  2769. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2770. return 0;
  2771. }
  2772. last_seq = &entry->seq_num;
  2773. last_frag = &entry->frag_num;
  2774. last_time = &entry->packet_time;
  2775. break;
  2776. }
  2777. case IEEE80211_IF_TYPE_STA:
  2778. last_seq = &priv->last_seq_num;
  2779. last_frag = &priv->last_frag_num;
  2780. last_time = &priv->last_packet_time;
  2781. break;
  2782. default:
  2783. return 0;
  2784. }
  2785. if ((*last_seq == seq) &&
  2786. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2787. if (*last_frag == frag)
  2788. goto drop;
  2789. if (*last_frag + 1 != frag)
  2790. /* out-of-order fragment */
  2791. goto drop;
  2792. } else
  2793. *last_seq = seq;
  2794. *last_frag = frag;
  2795. *last_time = jiffies;
  2796. return 0;
  2797. drop:
  2798. return 1;
  2799. }
  2800. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2801. #include "iwl-spectrum.h"
  2802. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2803. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2804. #define TIME_UNIT 1024
  2805. /*
  2806. * extended beacon time format
  2807. * time in usec will be changed into a 32-bit value in 8:24 format
  2808. * the high 1 byte is the beacon counts
  2809. * the lower 3 bytes is the time in usec within one beacon interval
  2810. */
  2811. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2812. {
  2813. u32 quot;
  2814. u32 rem;
  2815. u32 interval = beacon_interval * 1024;
  2816. if (!interval || !usec)
  2817. return 0;
  2818. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2819. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2820. return (quot << 24) + rem;
  2821. }
  2822. /* base is usually what we get from ucode with each received frame,
  2823. * the same as HW timer counter counting down
  2824. */
  2825. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2826. {
  2827. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2828. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2829. u32 interval = beacon_interval * TIME_UNIT;
  2830. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2831. (addon & BEACON_TIME_MASK_HIGH);
  2832. if (base_low > addon_low)
  2833. res += base_low - addon_low;
  2834. else if (base_low < addon_low) {
  2835. res += interval + base_low - addon_low;
  2836. res += (1 << 24);
  2837. } else
  2838. res += (1 << 24);
  2839. return cpu_to_le32(res);
  2840. }
  2841. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2842. struct ieee80211_measurement_params *params,
  2843. u8 type)
  2844. {
  2845. struct iwl4965_spectrum_cmd spectrum;
  2846. struct iwl4965_rx_packet *res;
  2847. struct iwl4965_host_cmd cmd = {
  2848. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2849. .data = (void *)&spectrum,
  2850. .meta.flags = CMD_WANT_SKB,
  2851. };
  2852. u32 add_time = le64_to_cpu(params->start_time);
  2853. int rc;
  2854. int spectrum_resp_status;
  2855. int duration = le16_to_cpu(params->duration);
  2856. if (iwl4965_is_associated(priv))
  2857. add_time =
  2858. iwl4965_usecs_to_beacons(
  2859. le64_to_cpu(params->start_time) - priv->last_tsf,
  2860. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2861. memset(&spectrum, 0, sizeof(spectrum));
  2862. spectrum.channel_count = cpu_to_le16(1);
  2863. spectrum.flags =
  2864. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2865. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2866. cmd.len = sizeof(spectrum);
  2867. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2868. if (iwl4965_is_associated(priv))
  2869. spectrum.start_time =
  2870. iwl4965_add_beacon_time(priv->last_beacon_time,
  2871. add_time,
  2872. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2873. else
  2874. spectrum.start_time = 0;
  2875. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2876. spectrum.channels[0].channel = params->channel;
  2877. spectrum.channels[0].type = type;
  2878. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2879. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2880. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2881. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2882. if (rc)
  2883. return rc;
  2884. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2885. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2886. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2887. rc = -EIO;
  2888. }
  2889. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2890. switch (spectrum_resp_status) {
  2891. case 0: /* Command will be handled */
  2892. if (res->u.spectrum.id != 0xff) {
  2893. IWL_DEBUG_INFO
  2894. ("Replaced existing measurement: %d\n",
  2895. res->u.spectrum.id);
  2896. priv->measurement_status &= ~MEASUREMENT_READY;
  2897. }
  2898. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2899. rc = 0;
  2900. break;
  2901. case 1: /* Command will not be handled */
  2902. rc = -EAGAIN;
  2903. break;
  2904. }
  2905. dev_kfree_skb_any(cmd.meta.u.skb);
  2906. return rc;
  2907. }
  2908. #endif
  2909. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2910. struct iwl4965_tx_info *tx_sta)
  2911. {
  2912. tx_sta->status.ack_signal = 0;
  2913. tx_sta->status.excessive_retries = 0;
  2914. tx_sta->status.queue_length = 0;
  2915. tx_sta->status.queue_number = 0;
  2916. if (in_interrupt())
  2917. ieee80211_tx_status_irqsafe(priv->hw,
  2918. tx_sta->skb[0], &(tx_sta->status));
  2919. else
  2920. ieee80211_tx_status(priv->hw,
  2921. tx_sta->skb[0], &(tx_sta->status));
  2922. tx_sta->skb[0] = NULL;
  2923. }
  2924. /**
  2925. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2926. *
  2927. * When FW advances 'R' index, all entries between old and new 'R' index
  2928. * need to be reclaimed. As result, some free space forms. If there is
  2929. * enough free space (> low mark), wake the stack that feeds us.
  2930. */
  2931. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2932. {
  2933. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2934. struct iwl4965_queue *q = &txq->q;
  2935. int nfreed = 0;
  2936. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2937. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2938. "is out of range [0-%d] %d %d.\n", txq_id,
  2939. index, q->n_bd, q->write_ptr, q->read_ptr);
  2940. return 0;
  2941. }
  2942. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2943. q->read_ptr != index;
  2944. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2945. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2946. iwl4965_txstatus_to_ieee(priv,
  2947. &(txq->txb[txq->q.read_ptr]));
  2948. iwl4965_hw_txq_free_tfd(priv, txq);
  2949. } else if (nfreed > 1) {
  2950. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2951. q->write_ptr, q->read_ptr);
  2952. queue_work(priv->workqueue, &priv->restart);
  2953. }
  2954. nfreed++;
  2955. }
  2956. if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2957. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2958. priv->mac80211_registered)
  2959. ieee80211_wake_queue(priv->hw, txq_id);
  2960. return nfreed;
  2961. }
  2962. static int iwl4965_is_tx_success(u32 status)
  2963. {
  2964. status &= TX_STATUS_MSK;
  2965. return (status == TX_STATUS_SUCCESS)
  2966. || (status == TX_STATUS_DIRECT_DONE);
  2967. }
  2968. /******************************************************************************
  2969. *
  2970. * Generic RX handler implementations
  2971. *
  2972. ******************************************************************************/
  2973. #ifdef CONFIG_IWL4965_HT
  2974. #ifdef CONFIG_IWL4965_HT_AGG
  2975. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2976. struct ieee80211_hdr *hdr)
  2977. {
  2978. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2979. return IWL_AP_ID;
  2980. else {
  2981. u8 *da = ieee80211_get_DA(hdr);
  2982. return iwl4965_hw_find_station(priv, da);
  2983. }
  2984. }
  2985. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2986. struct iwl4965_priv *priv, int txq_id, int idx)
  2987. {
  2988. if (priv->txq[txq_id].txb[idx].skb[0])
  2989. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2990. txb[idx].skb[0]->data;
  2991. return NULL;
  2992. }
  2993. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2994. {
  2995. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2996. tx_resp->frame_count);
  2997. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2998. }
  2999. /**
  3000. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  3001. */
  3002. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  3003. struct iwl4965_ht_agg *agg,
  3004. struct iwl4965_tx_resp *tx_resp,
  3005. u16 start_idx)
  3006. {
  3007. u32 status;
  3008. __le32 *frame_status = &tx_resp->status;
  3009. struct ieee80211_tx_status *tx_status = NULL;
  3010. struct ieee80211_hdr *hdr = NULL;
  3011. int i, sh;
  3012. int txq_id, idx;
  3013. u16 seq;
  3014. if (agg->wait_for_ba)
  3015. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  3016. agg->frame_count = tx_resp->frame_count;
  3017. agg->start_idx = start_idx;
  3018. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3019. agg->bitmap0 = agg->bitmap1 = 0;
  3020. /* # frames attempted by Tx command */
  3021. if (agg->frame_count == 1) {
  3022. /* Only one frame was attempted; no block-ack will arrive */
  3023. struct iwl4965_tx_queue *txq ;
  3024. status = le32_to_cpu(frame_status[0]);
  3025. txq_id = agg->txq_id;
  3026. txq = &priv->txq[txq_id];
  3027. /* FIXME: code repetition */
  3028. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  3029. agg->frame_count, agg->start_idx);
  3030. tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
  3031. tx_status->retry_count = tx_resp->failure_frame;
  3032. tx_status->queue_number = status & 0xff;
  3033. tx_status->queue_length = tx_resp->bt_kill_count;
  3034. tx_status->queue_length |= tx_resp->failure_rts;
  3035. tx_status->flags = iwl4965_is_tx_success(status)?
  3036. IEEE80211_TX_STATUS_ACK : 0;
  3037. tx_status->control.tx_rate =
  3038. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3039. /* FIXME: code repetition end */
  3040. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3041. status & 0xff, tx_resp->failure_frame);
  3042. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3043. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3044. agg->wait_for_ba = 0;
  3045. } else {
  3046. /* Two or more frames were attempted; expect block-ack */
  3047. u64 bitmap = 0;
  3048. int start = agg->start_idx;
  3049. /* Construct bit-map of pending frames within Tx window */
  3050. for (i = 0; i < agg->frame_count; i++) {
  3051. u16 sc;
  3052. status = le32_to_cpu(frame_status[i]);
  3053. seq = status >> 16;
  3054. idx = SEQ_TO_INDEX(seq);
  3055. txq_id = SEQ_TO_QUEUE(seq);
  3056. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3057. AGG_TX_STATE_ABORT_MSK))
  3058. continue;
  3059. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3060. agg->frame_count, txq_id, idx);
  3061. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3062. sc = le16_to_cpu(hdr->seq_ctrl);
  3063. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3064. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3065. " idx=%d, seq_idx=%d, seq=%d\n",
  3066. idx, SEQ_TO_SN(sc),
  3067. hdr->seq_ctrl);
  3068. return -1;
  3069. }
  3070. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3071. i, idx, SEQ_TO_SN(sc));
  3072. sh = idx - start;
  3073. if (sh > 64) {
  3074. sh = (start - idx) + 0xff;
  3075. bitmap = bitmap << sh;
  3076. sh = 0;
  3077. start = idx;
  3078. } else if (sh < -64)
  3079. sh = 0xff - (start - idx);
  3080. else if (sh < 0) {
  3081. sh = start - idx;
  3082. start = idx;
  3083. bitmap = bitmap << sh;
  3084. sh = 0;
  3085. }
  3086. bitmap |= (1 << sh);
  3087. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3088. start, (u32)(bitmap & 0xFFFFFFFF));
  3089. }
  3090. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3091. agg->bitmap1 = bitmap >> 32;
  3092. agg->start_idx = start;
  3093. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3094. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3095. agg->frame_count, agg->start_idx,
  3096. agg->bitmap0);
  3097. if (bitmap)
  3098. agg->wait_for_ba = 1;
  3099. }
  3100. return 0;
  3101. }
  3102. #endif
  3103. #endif
  3104. /**
  3105. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3106. */
  3107. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3108. struct iwl4965_rx_mem_buffer *rxb)
  3109. {
  3110. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3111. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3112. int txq_id = SEQ_TO_QUEUE(sequence);
  3113. int index = SEQ_TO_INDEX(sequence);
  3114. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3115. struct ieee80211_tx_status *tx_status;
  3116. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3117. u32 status = le32_to_cpu(tx_resp->status);
  3118. #ifdef CONFIG_IWL4965_HT
  3119. #ifdef CONFIG_IWL4965_HT_AGG
  3120. int tid, sta_id;
  3121. #endif
  3122. #endif
  3123. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3124. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3125. "is out of range [0-%d] %d %d\n", txq_id,
  3126. index, txq->q.n_bd, txq->q.write_ptr,
  3127. txq->q.read_ptr);
  3128. return;
  3129. }
  3130. #ifdef CONFIG_IWL4965_HT
  3131. #ifdef CONFIG_IWL4965_HT_AGG
  3132. if (txq->sched_retry) {
  3133. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3134. struct ieee80211_hdr *hdr =
  3135. iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3136. struct iwl4965_ht_agg *agg = NULL;
  3137. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3138. if (qc == NULL) {
  3139. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3140. return;
  3141. }
  3142. tid = le16_to_cpu(*qc) & 0xf;
  3143. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3144. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3145. IWL_ERROR("Station not known for\n");
  3146. return;
  3147. }
  3148. agg = &priv->stations[sta_id].tid[tid].agg;
  3149. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3150. if ((tx_resp->frame_count == 1) &&
  3151. !iwl4965_is_tx_success(status)) {
  3152. /* TODO: send BAR */
  3153. }
  3154. if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
  3155. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3156. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3157. "%d index %d\n", scd_ssn , index);
  3158. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3159. }
  3160. } else {
  3161. #endif /* CONFIG_IWL4965_HT_AGG */
  3162. #endif /* CONFIG_IWL4965_HT */
  3163. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3164. tx_status->retry_count = tx_resp->failure_frame;
  3165. tx_status->queue_number = status;
  3166. tx_status->queue_length = tx_resp->bt_kill_count;
  3167. tx_status->queue_length |= tx_resp->failure_rts;
  3168. tx_status->flags =
  3169. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3170. tx_status->control.tx_rate =
  3171. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3172. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3173. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3174. status, le32_to_cpu(tx_resp->rate_n_flags),
  3175. tx_resp->failure_frame);
  3176. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3177. if (index != -1)
  3178. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3179. #ifdef CONFIG_IWL4965_HT
  3180. #ifdef CONFIG_IWL4965_HT_AGG
  3181. }
  3182. #endif /* CONFIG_IWL4965_HT_AGG */
  3183. #endif /* CONFIG_IWL4965_HT */
  3184. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3185. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3186. }
  3187. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3188. struct iwl4965_rx_mem_buffer *rxb)
  3189. {
  3190. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3191. struct iwl4965_alive_resp *palive;
  3192. struct delayed_work *pwork;
  3193. palive = &pkt->u.alive_frame;
  3194. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3195. "0x%01X 0x%01X\n",
  3196. palive->is_valid, palive->ver_type,
  3197. palive->ver_subtype);
  3198. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3199. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3200. memcpy(&priv->card_alive_init,
  3201. &pkt->u.alive_frame,
  3202. sizeof(struct iwl4965_init_alive_resp));
  3203. pwork = &priv->init_alive_start;
  3204. } else {
  3205. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3206. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3207. sizeof(struct iwl4965_alive_resp));
  3208. pwork = &priv->alive_start;
  3209. }
  3210. /* We delay the ALIVE response by 5ms to
  3211. * give the HW RF Kill time to activate... */
  3212. if (palive->is_valid == UCODE_VALID_OK)
  3213. queue_delayed_work(priv->workqueue, pwork,
  3214. msecs_to_jiffies(5));
  3215. else
  3216. IWL_WARNING("uCode did not respond OK.\n");
  3217. }
  3218. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3219. struct iwl4965_rx_mem_buffer *rxb)
  3220. {
  3221. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3222. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3223. return;
  3224. }
  3225. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3226. struct iwl4965_rx_mem_buffer *rxb)
  3227. {
  3228. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3229. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3230. "seq 0x%04X ser 0x%08X\n",
  3231. le32_to_cpu(pkt->u.err_resp.error_type),
  3232. get_cmd_string(pkt->u.err_resp.cmd_id),
  3233. pkt->u.err_resp.cmd_id,
  3234. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3235. le32_to_cpu(pkt->u.err_resp.error_info));
  3236. }
  3237. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3238. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3239. {
  3240. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3241. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3242. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3243. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3244. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3245. rxon->channel = csa->channel;
  3246. priv->staging_rxon.channel = csa->channel;
  3247. }
  3248. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3249. struct iwl4965_rx_mem_buffer *rxb)
  3250. {
  3251. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3252. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3253. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3254. if (!report->state) {
  3255. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3256. "Spectrum Measure Notification: Start\n");
  3257. return;
  3258. }
  3259. memcpy(&priv->measure_report, report, sizeof(*report));
  3260. priv->measurement_status |= MEASUREMENT_READY;
  3261. #endif
  3262. }
  3263. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3264. struct iwl4965_rx_mem_buffer *rxb)
  3265. {
  3266. #ifdef CONFIG_IWL4965_DEBUG
  3267. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3268. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3269. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3270. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3271. #endif
  3272. }
  3273. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3274. struct iwl4965_rx_mem_buffer *rxb)
  3275. {
  3276. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3277. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3278. "notification for %s:\n",
  3279. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3280. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3281. }
  3282. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3283. {
  3284. struct iwl4965_priv *priv =
  3285. container_of(work, struct iwl4965_priv, beacon_update);
  3286. struct sk_buff *beacon;
  3287. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3288. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3289. if (!beacon) {
  3290. IWL_ERROR("update beacon failed\n");
  3291. return;
  3292. }
  3293. mutex_lock(&priv->mutex);
  3294. /* new beacon skb is allocated every time; dispose previous.*/
  3295. if (priv->ibss_beacon)
  3296. dev_kfree_skb(priv->ibss_beacon);
  3297. priv->ibss_beacon = beacon;
  3298. mutex_unlock(&priv->mutex);
  3299. iwl4965_send_beacon_cmd(priv);
  3300. }
  3301. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3302. struct iwl4965_rx_mem_buffer *rxb)
  3303. {
  3304. #ifdef CONFIG_IWL4965_DEBUG
  3305. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3306. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3307. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3308. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3309. "tsf %d %d rate %d\n",
  3310. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3311. beacon->beacon_notify_hdr.failure_frame,
  3312. le32_to_cpu(beacon->ibss_mgr_status),
  3313. le32_to_cpu(beacon->high_tsf),
  3314. le32_to_cpu(beacon->low_tsf), rate);
  3315. #endif
  3316. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3317. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3318. queue_work(priv->workqueue, &priv->beacon_update);
  3319. }
  3320. /* Service response to REPLY_SCAN_CMD (0x80) */
  3321. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3322. struct iwl4965_rx_mem_buffer *rxb)
  3323. {
  3324. #ifdef CONFIG_IWL4965_DEBUG
  3325. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3326. struct iwl4965_scanreq_notification *notif =
  3327. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3328. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3329. #endif
  3330. }
  3331. /* Service SCAN_START_NOTIFICATION (0x82) */
  3332. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3333. struct iwl4965_rx_mem_buffer *rxb)
  3334. {
  3335. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3336. struct iwl4965_scanstart_notification *notif =
  3337. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3338. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3339. IWL_DEBUG_SCAN("Scan start: "
  3340. "%d [802.11%s] "
  3341. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3342. notif->channel,
  3343. notif->band ? "bg" : "a",
  3344. notif->tsf_high,
  3345. notif->tsf_low, notif->status, notif->beacon_timer);
  3346. }
  3347. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3348. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3349. struct iwl4965_rx_mem_buffer *rxb)
  3350. {
  3351. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3352. struct iwl4965_scanresults_notification *notif =
  3353. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3354. IWL_DEBUG_SCAN("Scan ch.res: "
  3355. "%d [802.11%s] "
  3356. "(TSF: 0x%08X:%08X) - %d "
  3357. "elapsed=%lu usec (%dms since last)\n",
  3358. notif->channel,
  3359. notif->band ? "bg" : "a",
  3360. le32_to_cpu(notif->tsf_high),
  3361. le32_to_cpu(notif->tsf_low),
  3362. le32_to_cpu(notif->statistics[0]),
  3363. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3364. jiffies_to_msecs(elapsed_jiffies
  3365. (priv->last_scan_jiffies, jiffies)));
  3366. priv->last_scan_jiffies = jiffies;
  3367. priv->next_scan_jiffies = 0;
  3368. }
  3369. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3370. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3371. struct iwl4965_rx_mem_buffer *rxb)
  3372. {
  3373. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3374. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3375. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3376. scan_notif->scanned_channels,
  3377. scan_notif->tsf_low,
  3378. scan_notif->tsf_high, scan_notif->status);
  3379. /* The HW is no longer scanning */
  3380. clear_bit(STATUS_SCAN_HW, &priv->status);
  3381. /* The scan completion notification came in, so kill that timer... */
  3382. cancel_delayed_work(&priv->scan_check);
  3383. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3384. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3385. jiffies_to_msecs(elapsed_jiffies
  3386. (priv->scan_pass_start, jiffies)));
  3387. /* Remove this scanned band from the list
  3388. * of pending bands to scan */
  3389. priv->scan_bands--;
  3390. /* If a request to abort was given, or the scan did not succeed
  3391. * then we reset the scan state machine and terminate,
  3392. * re-queuing another scan if one has been requested */
  3393. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3394. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3395. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3396. } else {
  3397. /* If there are more bands on this scan pass reschedule */
  3398. if (priv->scan_bands > 0)
  3399. goto reschedule;
  3400. }
  3401. priv->last_scan_jiffies = jiffies;
  3402. priv->next_scan_jiffies = 0;
  3403. IWL_DEBUG_INFO("Setting scan to off\n");
  3404. clear_bit(STATUS_SCANNING, &priv->status);
  3405. IWL_DEBUG_INFO("Scan took %dms\n",
  3406. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3407. queue_work(priv->workqueue, &priv->scan_completed);
  3408. return;
  3409. reschedule:
  3410. priv->scan_pass_start = jiffies;
  3411. queue_work(priv->workqueue, &priv->request_scan);
  3412. }
  3413. /* Handle notification from uCode that card's power state is changing
  3414. * due to software, hardware, or critical temperature RFKILL */
  3415. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3416. struct iwl4965_rx_mem_buffer *rxb)
  3417. {
  3418. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3419. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3420. unsigned long status = priv->status;
  3421. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3422. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3423. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3424. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3425. RF_CARD_DISABLED)) {
  3426. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3427. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3428. if (!iwl4965_grab_nic_access(priv)) {
  3429. iwl4965_write_direct32(
  3430. priv, HBUS_TARG_MBX_C,
  3431. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3432. iwl4965_release_nic_access(priv);
  3433. }
  3434. if (!(flags & RXON_CARD_DISABLED)) {
  3435. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3436. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3437. if (!iwl4965_grab_nic_access(priv)) {
  3438. iwl4965_write_direct32(
  3439. priv, HBUS_TARG_MBX_C,
  3440. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3441. iwl4965_release_nic_access(priv);
  3442. }
  3443. }
  3444. if (flags & RF_CARD_DISABLED) {
  3445. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3446. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3447. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3448. if (!iwl4965_grab_nic_access(priv))
  3449. iwl4965_release_nic_access(priv);
  3450. }
  3451. }
  3452. if (flags & HW_CARD_DISABLED)
  3453. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3454. else
  3455. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3456. if (flags & SW_CARD_DISABLED)
  3457. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3458. else
  3459. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3460. if (!(flags & RXON_CARD_DISABLED))
  3461. iwl4965_scan_cancel(priv);
  3462. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3463. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3464. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3465. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3466. queue_work(priv->workqueue, &priv->rf_kill);
  3467. else
  3468. wake_up_interruptible(&priv->wait_command_queue);
  3469. }
  3470. /**
  3471. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3472. *
  3473. * Setup the RX handlers for each of the reply types sent from the uCode
  3474. * to the host.
  3475. *
  3476. * This function chains into the hardware specific files for them to setup
  3477. * any hardware specific handlers as well.
  3478. */
  3479. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3480. {
  3481. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3482. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3483. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3484. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3485. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3486. iwl4965_rx_spectrum_measure_notif;
  3487. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3488. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3489. iwl4965_rx_pm_debug_statistics_notif;
  3490. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3491. /*
  3492. * The same handler is used for both the REPLY to a discrete
  3493. * statistics request from the host as well as for the periodic
  3494. * statistics notifications (after received beacons) from the uCode.
  3495. */
  3496. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3497. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3498. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3499. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3500. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3501. iwl4965_rx_scan_results_notif;
  3502. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3503. iwl4965_rx_scan_complete_notif;
  3504. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3505. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3506. /* Set up hardware specific Rx handlers */
  3507. iwl4965_hw_rx_handler_setup(priv);
  3508. }
  3509. /**
  3510. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3511. * @rxb: Rx buffer to reclaim
  3512. *
  3513. * If an Rx buffer has an async callback associated with it the callback
  3514. * will be executed. The attached skb (if present) will only be freed
  3515. * if the callback returns 1
  3516. */
  3517. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3518. struct iwl4965_rx_mem_buffer *rxb)
  3519. {
  3520. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3521. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3522. int txq_id = SEQ_TO_QUEUE(sequence);
  3523. int index = SEQ_TO_INDEX(sequence);
  3524. int huge = sequence & SEQ_HUGE_FRAME;
  3525. int cmd_index;
  3526. struct iwl4965_cmd *cmd;
  3527. /* If a Tx command is being handled and it isn't in the actual
  3528. * command queue then there a command routing bug has been introduced
  3529. * in the queue management code. */
  3530. if (txq_id != IWL_CMD_QUEUE_NUM)
  3531. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3532. txq_id, pkt->hdr.cmd);
  3533. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3534. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3535. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3536. /* Input error checking is done when commands are added to queue. */
  3537. if (cmd->meta.flags & CMD_WANT_SKB) {
  3538. cmd->meta.source->u.skb = rxb->skb;
  3539. rxb->skb = NULL;
  3540. } else if (cmd->meta.u.callback &&
  3541. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3542. rxb->skb = NULL;
  3543. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3544. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3545. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3546. wake_up_interruptible(&priv->wait_command_queue);
  3547. }
  3548. }
  3549. /************************** RX-FUNCTIONS ****************************/
  3550. /*
  3551. * Rx theory of operation
  3552. *
  3553. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3554. * each of which point to Receive Buffers to be filled by 4965. These get
  3555. * used not only for Rx frames, but for any command response or notification
  3556. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3557. * of indexes into the circular buffer.
  3558. *
  3559. * Rx Queue Indexes
  3560. * The host/firmware share two index registers for managing the Rx buffers.
  3561. *
  3562. * The READ index maps to the first position that the firmware may be writing
  3563. * to -- the driver can read up to (but not including) this position and get
  3564. * good data.
  3565. * The READ index is managed by the firmware once the card is enabled.
  3566. *
  3567. * The WRITE index maps to the last position the driver has read from -- the
  3568. * position preceding WRITE is the last slot the firmware can place a packet.
  3569. *
  3570. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3571. * WRITE = READ.
  3572. *
  3573. * During initialization, the host sets up the READ queue position to the first
  3574. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3575. *
  3576. * When the firmware places a packet in a buffer, it will advance the READ index
  3577. * and fire the RX interrupt. The driver can then query the READ index and
  3578. * process as many packets as possible, moving the WRITE index forward as it
  3579. * resets the Rx queue buffers with new memory.
  3580. *
  3581. * The management in the driver is as follows:
  3582. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3583. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3584. * to replenish the iwl->rxq->rx_free.
  3585. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3586. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3587. * 'processed' and 'read' driver indexes as well)
  3588. * + A received packet is processed and handed to the kernel network stack,
  3589. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3590. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3591. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3592. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3593. * were enough free buffers and RX_STALLED is set it is cleared.
  3594. *
  3595. *
  3596. * Driver sequence:
  3597. *
  3598. * iwl4965_rx_queue_alloc() Allocates rx_free
  3599. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3600. * iwl4965_rx_queue_restock
  3601. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3602. * queue, updates firmware pointers, and updates
  3603. * the WRITE index. If insufficient rx_free buffers
  3604. * are available, schedules iwl4965_rx_replenish
  3605. *
  3606. * -- enable interrupts --
  3607. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3608. * READ INDEX, detaching the SKB from the pool.
  3609. * Moves the packet buffer from queue to rx_used.
  3610. * Calls iwl4965_rx_queue_restock to refill any empty
  3611. * slots.
  3612. * ...
  3613. *
  3614. */
  3615. /**
  3616. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3617. */
  3618. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3619. {
  3620. int s = q->read - q->write;
  3621. if (s <= 0)
  3622. s += RX_QUEUE_SIZE;
  3623. /* keep some buffer to not confuse full and empty queue */
  3624. s -= 2;
  3625. if (s < 0)
  3626. s = 0;
  3627. return s;
  3628. }
  3629. /**
  3630. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3631. */
  3632. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3633. {
  3634. u32 reg = 0;
  3635. int rc = 0;
  3636. unsigned long flags;
  3637. spin_lock_irqsave(&q->lock, flags);
  3638. if (q->need_update == 0)
  3639. goto exit_unlock;
  3640. /* If power-saving is in use, make sure device is awake */
  3641. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3642. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3643. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3644. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3645. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3646. goto exit_unlock;
  3647. }
  3648. rc = iwl4965_grab_nic_access(priv);
  3649. if (rc)
  3650. goto exit_unlock;
  3651. /* Device expects a multiple of 8 */
  3652. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3653. q->write & ~0x7);
  3654. iwl4965_release_nic_access(priv);
  3655. /* Else device is assumed to be awake */
  3656. } else
  3657. /* Device expects a multiple of 8 */
  3658. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3659. q->need_update = 0;
  3660. exit_unlock:
  3661. spin_unlock_irqrestore(&q->lock, flags);
  3662. return rc;
  3663. }
  3664. /**
  3665. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3666. */
  3667. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3668. dma_addr_t dma_addr)
  3669. {
  3670. return cpu_to_le32((u32)(dma_addr >> 8));
  3671. }
  3672. /**
  3673. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3674. *
  3675. * If there are slots in the RX queue that need to be restocked,
  3676. * and we have free pre-allocated buffers, fill the ranks as much
  3677. * as we can, pulling from rx_free.
  3678. *
  3679. * This moves the 'write' index forward to catch up with 'processed', and
  3680. * also updates the memory address in the firmware to reference the new
  3681. * target buffer.
  3682. */
  3683. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3684. {
  3685. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3686. struct list_head *element;
  3687. struct iwl4965_rx_mem_buffer *rxb;
  3688. unsigned long flags;
  3689. int write, rc;
  3690. spin_lock_irqsave(&rxq->lock, flags);
  3691. write = rxq->write & ~0x7;
  3692. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3693. /* Get next free Rx buffer, remove from free list */
  3694. element = rxq->rx_free.next;
  3695. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3696. list_del(element);
  3697. /* Point to Rx buffer via next RBD in circular buffer */
  3698. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3699. rxq->queue[rxq->write] = rxb;
  3700. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3701. rxq->free_count--;
  3702. }
  3703. spin_unlock_irqrestore(&rxq->lock, flags);
  3704. /* If the pre-allocated buffer pool is dropping low, schedule to
  3705. * refill it */
  3706. if (rxq->free_count <= RX_LOW_WATERMARK)
  3707. queue_work(priv->workqueue, &priv->rx_replenish);
  3708. /* If we've added more space for the firmware to place data, tell it.
  3709. * Increment device's write pointer in multiples of 8. */
  3710. if ((write != (rxq->write & ~0x7))
  3711. || (abs(rxq->write - rxq->read) > 7)) {
  3712. spin_lock_irqsave(&rxq->lock, flags);
  3713. rxq->need_update = 1;
  3714. spin_unlock_irqrestore(&rxq->lock, flags);
  3715. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3716. if (rc)
  3717. return rc;
  3718. }
  3719. return 0;
  3720. }
  3721. /**
  3722. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3723. *
  3724. * When moving to rx_free an SKB is allocated for the slot.
  3725. *
  3726. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3727. * This is called as a scheduled work item (except for during initialization)
  3728. */
  3729. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3730. {
  3731. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3732. struct list_head *element;
  3733. struct iwl4965_rx_mem_buffer *rxb;
  3734. unsigned long flags;
  3735. spin_lock_irqsave(&rxq->lock, flags);
  3736. while (!list_empty(&rxq->rx_used)) {
  3737. element = rxq->rx_used.next;
  3738. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3739. /* Alloc a new receive buffer */
  3740. rxb->skb =
  3741. alloc_skb(priv->hw_setting.rx_buf_size,
  3742. __GFP_NOWARN | GFP_ATOMIC);
  3743. if (!rxb->skb) {
  3744. if (net_ratelimit())
  3745. printk(KERN_CRIT DRV_NAME
  3746. ": Can not allocate SKB buffers\n");
  3747. /* We don't reschedule replenish work here -- we will
  3748. * call the restock method and if it still needs
  3749. * more buffers it will schedule replenish */
  3750. break;
  3751. }
  3752. priv->alloc_rxb_skb++;
  3753. list_del(element);
  3754. /* Get physical address of RB/SKB */
  3755. rxb->dma_addr =
  3756. pci_map_single(priv->pci_dev, rxb->skb->data,
  3757. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3758. list_add_tail(&rxb->list, &rxq->rx_free);
  3759. rxq->free_count++;
  3760. }
  3761. spin_unlock_irqrestore(&rxq->lock, flags);
  3762. }
  3763. /*
  3764. * this should be called while priv->lock is locked
  3765. */
  3766. static void __iwl4965_rx_replenish(void *data)
  3767. {
  3768. struct iwl4965_priv *priv = data;
  3769. iwl4965_rx_allocate(priv);
  3770. iwl4965_rx_queue_restock(priv);
  3771. }
  3772. void iwl4965_rx_replenish(void *data)
  3773. {
  3774. struct iwl4965_priv *priv = data;
  3775. unsigned long flags;
  3776. iwl4965_rx_allocate(priv);
  3777. spin_lock_irqsave(&priv->lock, flags);
  3778. iwl4965_rx_queue_restock(priv);
  3779. spin_unlock_irqrestore(&priv->lock, flags);
  3780. }
  3781. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3782. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3783. * This free routine walks the list of POOL entries and if SKB is set to
  3784. * non NULL it is unmapped and freed
  3785. */
  3786. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3787. {
  3788. int i;
  3789. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3790. if (rxq->pool[i].skb != NULL) {
  3791. pci_unmap_single(priv->pci_dev,
  3792. rxq->pool[i].dma_addr,
  3793. priv->hw_setting.rx_buf_size,
  3794. PCI_DMA_FROMDEVICE);
  3795. dev_kfree_skb(rxq->pool[i].skb);
  3796. }
  3797. }
  3798. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3799. rxq->dma_addr);
  3800. rxq->bd = NULL;
  3801. }
  3802. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3803. {
  3804. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3805. struct pci_dev *dev = priv->pci_dev;
  3806. int i;
  3807. spin_lock_init(&rxq->lock);
  3808. INIT_LIST_HEAD(&rxq->rx_free);
  3809. INIT_LIST_HEAD(&rxq->rx_used);
  3810. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3811. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3812. if (!rxq->bd)
  3813. return -ENOMEM;
  3814. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3815. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3816. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3817. /* Set us so that we have processed and used all buffers, but have
  3818. * not restocked the Rx queue with fresh buffers */
  3819. rxq->read = rxq->write = 0;
  3820. rxq->free_count = 0;
  3821. rxq->need_update = 0;
  3822. return 0;
  3823. }
  3824. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3825. {
  3826. unsigned long flags;
  3827. int i;
  3828. spin_lock_irqsave(&rxq->lock, flags);
  3829. INIT_LIST_HEAD(&rxq->rx_free);
  3830. INIT_LIST_HEAD(&rxq->rx_used);
  3831. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3832. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3833. /* In the reset function, these buffers may have been allocated
  3834. * to an SKB, so we need to unmap and free potential storage */
  3835. if (rxq->pool[i].skb != NULL) {
  3836. pci_unmap_single(priv->pci_dev,
  3837. rxq->pool[i].dma_addr,
  3838. priv->hw_setting.rx_buf_size,
  3839. PCI_DMA_FROMDEVICE);
  3840. priv->alloc_rxb_skb--;
  3841. dev_kfree_skb(rxq->pool[i].skb);
  3842. rxq->pool[i].skb = NULL;
  3843. }
  3844. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3845. }
  3846. /* Set us so that we have processed and used all buffers, but have
  3847. * not restocked the Rx queue with fresh buffers */
  3848. rxq->read = rxq->write = 0;
  3849. rxq->free_count = 0;
  3850. spin_unlock_irqrestore(&rxq->lock, flags);
  3851. }
  3852. /* Convert linear signal-to-noise ratio into dB */
  3853. static u8 ratio2dB[100] = {
  3854. /* 0 1 2 3 4 5 6 7 8 9 */
  3855. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3856. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3857. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3858. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3859. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3860. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3861. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3862. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3863. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3864. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3865. };
  3866. /* Calculates a relative dB value from a ratio of linear
  3867. * (i.e. not dB) signal levels.
  3868. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3869. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3870. {
  3871. /* 1000:1 or higher just report as 60 dB */
  3872. if (sig_ratio >= 1000)
  3873. return 60;
  3874. /* 100:1 or higher, divide by 10 and use table,
  3875. * add 20 dB to make up for divide by 10 */
  3876. if (sig_ratio >= 100)
  3877. return (20 + (int)ratio2dB[sig_ratio/10]);
  3878. /* We shouldn't see this */
  3879. if (sig_ratio < 1)
  3880. return 0;
  3881. /* Use table for ratios 1:1 - 99:1 */
  3882. return (int)ratio2dB[sig_ratio];
  3883. }
  3884. #define PERFECT_RSSI (-20) /* dBm */
  3885. #define WORST_RSSI (-95) /* dBm */
  3886. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3887. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3888. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3889. * about formulas used below. */
  3890. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3891. {
  3892. int sig_qual;
  3893. int degradation = PERFECT_RSSI - rssi_dbm;
  3894. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3895. * as indicator; formula is (signal dbm - noise dbm).
  3896. * SNR at or above 40 is a great signal (100%).
  3897. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3898. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3899. if (noise_dbm) {
  3900. if (rssi_dbm - noise_dbm >= 40)
  3901. return 100;
  3902. else if (rssi_dbm < noise_dbm)
  3903. return 0;
  3904. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3905. /* Else use just the signal level.
  3906. * This formula is a least squares fit of data points collected and
  3907. * compared with a reference system that had a percentage (%) display
  3908. * for signal quality. */
  3909. } else
  3910. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3911. (15 * RSSI_RANGE + 62 * degradation)) /
  3912. (RSSI_RANGE * RSSI_RANGE);
  3913. if (sig_qual > 100)
  3914. sig_qual = 100;
  3915. else if (sig_qual < 1)
  3916. sig_qual = 0;
  3917. return sig_qual;
  3918. }
  3919. /**
  3920. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3921. *
  3922. * Uses the priv->rx_handlers callback function array to invoke
  3923. * the appropriate handlers, including command responses,
  3924. * frame-received notifications, and other notifications.
  3925. */
  3926. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3927. {
  3928. struct iwl4965_rx_mem_buffer *rxb;
  3929. struct iwl4965_rx_packet *pkt;
  3930. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3931. u32 r, i;
  3932. int reclaim;
  3933. unsigned long flags;
  3934. u8 fill_rx = 0;
  3935. u32 count = 0;
  3936. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3937. * buffer that the driver may process (last buffer filled by ucode). */
  3938. r = iwl4965_hw_get_rx_read(priv);
  3939. i = rxq->read;
  3940. /* Rx interrupt, but nothing sent from uCode */
  3941. if (i == r)
  3942. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3943. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3944. fill_rx = 1;
  3945. while (i != r) {
  3946. rxb = rxq->queue[i];
  3947. /* If an RXB doesn't have a Rx queue slot associated with it,
  3948. * then a bug has been introduced in the queue refilling
  3949. * routines -- catch it here */
  3950. BUG_ON(rxb == NULL);
  3951. rxq->queue[i] = NULL;
  3952. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3953. priv->hw_setting.rx_buf_size,
  3954. PCI_DMA_FROMDEVICE);
  3955. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3956. /* Reclaim a command buffer only if this packet is a response
  3957. * to a (driver-originated) command.
  3958. * If the packet (e.g. Rx frame) originated from uCode,
  3959. * there is no command buffer to reclaim.
  3960. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3961. * but apparently a few don't get set; catch them here. */
  3962. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3963. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3964. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3965. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3966. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3967. (pkt->hdr.cmd != REPLY_TX);
  3968. /* Based on type of command response or notification,
  3969. * handle those that need handling via function in
  3970. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3971. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3972. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3973. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3974. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3975. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3976. } else {
  3977. /* No handling needed */
  3978. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3979. "r %d i %d No handler needed for %s, 0x%02x\n",
  3980. r, i, get_cmd_string(pkt->hdr.cmd),
  3981. pkt->hdr.cmd);
  3982. }
  3983. if (reclaim) {
  3984. /* Invoke any callbacks, transfer the skb to caller, and
  3985. * fire off the (possibly) blocking iwl4965_send_cmd()
  3986. * as we reclaim the driver command queue */
  3987. if (rxb && rxb->skb)
  3988. iwl4965_tx_cmd_complete(priv, rxb);
  3989. else
  3990. IWL_WARNING("Claim null rxb?\n");
  3991. }
  3992. /* For now we just don't re-use anything. We can tweak this
  3993. * later to try and re-use notification packets and SKBs that
  3994. * fail to Rx correctly */
  3995. if (rxb->skb != NULL) {
  3996. priv->alloc_rxb_skb--;
  3997. dev_kfree_skb_any(rxb->skb);
  3998. rxb->skb = NULL;
  3999. }
  4000. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  4001. priv->hw_setting.rx_buf_size,
  4002. PCI_DMA_FROMDEVICE);
  4003. spin_lock_irqsave(&rxq->lock, flags);
  4004. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  4005. spin_unlock_irqrestore(&rxq->lock, flags);
  4006. i = (i + 1) & RX_QUEUE_MASK;
  4007. /* If there are a lot of unused frames,
  4008. * restock the Rx queue so ucode wont assert. */
  4009. if (fill_rx) {
  4010. count++;
  4011. if (count >= 8) {
  4012. priv->rxq.read = i;
  4013. __iwl4965_rx_replenish(priv);
  4014. count = 0;
  4015. }
  4016. }
  4017. }
  4018. /* Backtrack one entry */
  4019. priv->rxq.read = i;
  4020. iwl4965_rx_queue_restock(priv);
  4021. }
  4022. /**
  4023. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4024. */
  4025. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4026. struct iwl4965_tx_queue *txq)
  4027. {
  4028. u32 reg = 0;
  4029. int rc = 0;
  4030. int txq_id = txq->q.id;
  4031. if (txq->need_update == 0)
  4032. return rc;
  4033. /* if we're trying to save power */
  4034. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4035. /* wake up nic if it's powered down ...
  4036. * uCode will wake up, and interrupt us again, so next
  4037. * time we'll skip this part. */
  4038. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4039. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4040. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4041. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4042. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4043. return rc;
  4044. }
  4045. /* restore this queue's parameters in nic hardware. */
  4046. rc = iwl4965_grab_nic_access(priv);
  4047. if (rc)
  4048. return rc;
  4049. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4050. txq->q.write_ptr | (txq_id << 8));
  4051. iwl4965_release_nic_access(priv);
  4052. /* else not in power-save mode, uCode will never sleep when we're
  4053. * trying to tx (during RFKILL, we're not trying to tx). */
  4054. } else
  4055. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4056. txq->q.write_ptr | (txq_id << 8));
  4057. txq->need_update = 0;
  4058. return rc;
  4059. }
  4060. #ifdef CONFIG_IWL4965_DEBUG
  4061. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4062. {
  4063. DECLARE_MAC_BUF(mac);
  4064. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4065. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4066. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4067. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4068. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4069. le32_to_cpu(rxon->filter_flags));
  4070. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4071. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4072. rxon->ofdm_basic_rates);
  4073. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4074. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4075. print_mac(mac, rxon->node_addr));
  4076. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4077. print_mac(mac, rxon->bssid_addr));
  4078. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4079. }
  4080. #endif
  4081. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4082. {
  4083. IWL_DEBUG_ISR("Enabling interrupts\n");
  4084. set_bit(STATUS_INT_ENABLED, &priv->status);
  4085. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4086. }
  4087. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4088. {
  4089. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4090. /* disable interrupts from uCode/NIC to host */
  4091. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4092. /* acknowledge/clear/reset any interrupts still pending
  4093. * from uCode or flow handler (Rx/Tx DMA) */
  4094. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4095. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4096. IWL_DEBUG_ISR("Disabled interrupts\n");
  4097. }
  4098. static const char *desc_lookup(int i)
  4099. {
  4100. switch (i) {
  4101. case 1:
  4102. return "FAIL";
  4103. case 2:
  4104. return "BAD_PARAM";
  4105. case 3:
  4106. return "BAD_CHECKSUM";
  4107. case 4:
  4108. return "NMI_INTERRUPT";
  4109. case 5:
  4110. return "SYSASSERT";
  4111. case 6:
  4112. return "FATAL_ERROR";
  4113. }
  4114. return "UNKNOWN";
  4115. }
  4116. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4117. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4118. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4119. {
  4120. u32 data2, line;
  4121. u32 desc, time, count, base, data1;
  4122. u32 blink1, blink2, ilink1, ilink2;
  4123. int rc;
  4124. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4125. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4126. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4127. return;
  4128. }
  4129. rc = iwl4965_grab_nic_access(priv);
  4130. if (rc) {
  4131. IWL_WARNING("Can not read from adapter at this time.\n");
  4132. return;
  4133. }
  4134. count = iwl4965_read_targ_mem(priv, base);
  4135. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4136. IWL_ERROR("Start IWL Error Log Dump:\n");
  4137. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4138. priv->status, priv->config, count);
  4139. }
  4140. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4141. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4142. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4143. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4144. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4145. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4146. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4147. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4148. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4149. IWL_ERROR("Desc Time "
  4150. "data1 data2 line\n");
  4151. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4152. desc_lookup(desc), desc, time, data1, data2, line);
  4153. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4154. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4155. ilink1, ilink2);
  4156. iwl4965_release_nic_access(priv);
  4157. }
  4158. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4159. /**
  4160. * iwl4965_print_event_log - Dump error event log to syslog
  4161. *
  4162. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4163. */
  4164. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4165. u32 num_events, u32 mode)
  4166. {
  4167. u32 i;
  4168. u32 base; /* SRAM byte address of event log header */
  4169. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4170. u32 ptr; /* SRAM byte address of log data */
  4171. u32 ev, time, data; /* event log data */
  4172. if (num_events == 0)
  4173. return;
  4174. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4175. if (mode == 0)
  4176. event_size = 2 * sizeof(u32);
  4177. else
  4178. event_size = 3 * sizeof(u32);
  4179. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4180. /* "time" is actually "data" for mode 0 (no timestamp).
  4181. * place event id # at far right for easier visual parsing. */
  4182. for (i = 0; i < num_events; i++) {
  4183. ev = iwl4965_read_targ_mem(priv, ptr);
  4184. ptr += sizeof(u32);
  4185. time = iwl4965_read_targ_mem(priv, ptr);
  4186. ptr += sizeof(u32);
  4187. if (mode == 0)
  4188. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4189. else {
  4190. data = iwl4965_read_targ_mem(priv, ptr);
  4191. ptr += sizeof(u32);
  4192. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4193. }
  4194. }
  4195. }
  4196. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4197. {
  4198. int rc;
  4199. u32 base; /* SRAM byte address of event log header */
  4200. u32 capacity; /* event log capacity in # entries */
  4201. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4202. u32 num_wraps; /* # times uCode wrapped to top of log */
  4203. u32 next_entry; /* index of next entry to be written by uCode */
  4204. u32 size; /* # entries that we'll print */
  4205. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4206. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4207. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4208. return;
  4209. }
  4210. rc = iwl4965_grab_nic_access(priv);
  4211. if (rc) {
  4212. IWL_WARNING("Can not read from adapter at this time.\n");
  4213. return;
  4214. }
  4215. /* event log header */
  4216. capacity = iwl4965_read_targ_mem(priv, base);
  4217. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4218. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4219. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4220. size = num_wraps ? capacity : next_entry;
  4221. /* bail out if nothing in log */
  4222. if (size == 0) {
  4223. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4224. iwl4965_release_nic_access(priv);
  4225. return;
  4226. }
  4227. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4228. size, num_wraps);
  4229. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4230. * i.e the next one that uCode would fill. */
  4231. if (num_wraps)
  4232. iwl4965_print_event_log(priv, next_entry,
  4233. capacity - next_entry, mode);
  4234. /* (then/else) start at top of log */
  4235. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4236. iwl4965_release_nic_access(priv);
  4237. }
  4238. /**
  4239. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4240. */
  4241. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4242. {
  4243. /* Set the FW error flag -- cleared on iwl4965_down */
  4244. set_bit(STATUS_FW_ERROR, &priv->status);
  4245. /* Cancel currently queued command. */
  4246. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4247. #ifdef CONFIG_IWL4965_DEBUG
  4248. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4249. iwl4965_dump_nic_error_log(priv);
  4250. iwl4965_dump_nic_event_log(priv);
  4251. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4252. }
  4253. #endif
  4254. wake_up_interruptible(&priv->wait_command_queue);
  4255. /* Keep the restart process from trying to send host
  4256. * commands by clearing the INIT status bit */
  4257. clear_bit(STATUS_READY, &priv->status);
  4258. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4259. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4260. "Restarting adapter due to uCode error.\n");
  4261. if (iwl4965_is_associated(priv)) {
  4262. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4263. sizeof(priv->recovery_rxon));
  4264. priv->error_recovering = 1;
  4265. }
  4266. queue_work(priv->workqueue, &priv->restart);
  4267. }
  4268. }
  4269. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4270. {
  4271. unsigned long flags;
  4272. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4273. sizeof(priv->staging_rxon));
  4274. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4275. iwl4965_commit_rxon(priv);
  4276. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4277. spin_lock_irqsave(&priv->lock, flags);
  4278. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4279. priv->error_recovering = 0;
  4280. spin_unlock_irqrestore(&priv->lock, flags);
  4281. }
  4282. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4283. {
  4284. u32 inta, handled = 0;
  4285. u32 inta_fh;
  4286. unsigned long flags;
  4287. #ifdef CONFIG_IWL4965_DEBUG
  4288. u32 inta_mask;
  4289. #endif
  4290. spin_lock_irqsave(&priv->lock, flags);
  4291. /* Ack/clear/reset pending uCode interrupts.
  4292. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4293. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4294. inta = iwl4965_read32(priv, CSR_INT);
  4295. iwl4965_write32(priv, CSR_INT, inta);
  4296. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4297. * Any new interrupts that happen after this, either while we're
  4298. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4299. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4300. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4301. #ifdef CONFIG_IWL4965_DEBUG
  4302. if (iwl4965_debug_level & IWL_DL_ISR) {
  4303. /* just for debug */
  4304. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4305. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4306. inta, inta_mask, inta_fh);
  4307. }
  4308. #endif
  4309. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4310. * atomic, make sure that inta covers all the interrupts that
  4311. * we've discovered, even if FH interrupt came in just after
  4312. * reading CSR_INT. */
  4313. if (inta_fh & CSR_FH_INT_RX_MASK)
  4314. inta |= CSR_INT_BIT_FH_RX;
  4315. if (inta_fh & CSR_FH_INT_TX_MASK)
  4316. inta |= CSR_INT_BIT_FH_TX;
  4317. /* Now service all interrupt bits discovered above. */
  4318. if (inta & CSR_INT_BIT_HW_ERR) {
  4319. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4320. /* Tell the device to stop sending interrupts */
  4321. iwl4965_disable_interrupts(priv);
  4322. iwl4965_irq_handle_error(priv);
  4323. handled |= CSR_INT_BIT_HW_ERR;
  4324. spin_unlock_irqrestore(&priv->lock, flags);
  4325. return;
  4326. }
  4327. #ifdef CONFIG_IWL4965_DEBUG
  4328. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4329. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4330. if (inta & CSR_INT_BIT_SCD)
  4331. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4332. "the frame/frames.\n");
  4333. /* Alive notification via Rx interrupt will do the real work */
  4334. if (inta & CSR_INT_BIT_ALIVE)
  4335. IWL_DEBUG_ISR("Alive interrupt\n");
  4336. }
  4337. #endif
  4338. /* Safely ignore these bits for debug checks below */
  4339. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4340. /* HW RF KILL switch toggled */
  4341. if (inta & CSR_INT_BIT_RF_KILL) {
  4342. int hw_rf_kill = 0;
  4343. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4344. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4345. hw_rf_kill = 1;
  4346. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4347. "RF_KILL bit toggled to %s.\n",
  4348. hw_rf_kill ? "disable radio":"enable radio");
  4349. /* Queue restart only if RF_KILL switch was set to "kill"
  4350. * when we loaded driver, and is now set to "enable".
  4351. * After we're Alive, RF_KILL gets handled by
  4352. * iwl_rx_card_state_notif() */
  4353. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4354. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4355. queue_work(priv->workqueue, &priv->restart);
  4356. }
  4357. handled |= CSR_INT_BIT_RF_KILL;
  4358. }
  4359. /* Chip got too hot and stopped itself */
  4360. if (inta & CSR_INT_BIT_CT_KILL) {
  4361. IWL_ERROR("Microcode CT kill error detected.\n");
  4362. handled |= CSR_INT_BIT_CT_KILL;
  4363. }
  4364. /* Error detected by uCode */
  4365. if (inta & CSR_INT_BIT_SW_ERR) {
  4366. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4367. inta);
  4368. iwl4965_irq_handle_error(priv);
  4369. handled |= CSR_INT_BIT_SW_ERR;
  4370. }
  4371. /* uCode wakes up after power-down sleep */
  4372. if (inta & CSR_INT_BIT_WAKEUP) {
  4373. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4374. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4375. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4376. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4377. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4378. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4379. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4380. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4381. handled |= CSR_INT_BIT_WAKEUP;
  4382. }
  4383. /* All uCode command responses, including Tx command responses,
  4384. * Rx "responses" (frame-received notification), and other
  4385. * notifications from uCode come through here*/
  4386. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4387. iwl4965_rx_handle(priv);
  4388. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4389. }
  4390. if (inta & CSR_INT_BIT_FH_TX) {
  4391. IWL_DEBUG_ISR("Tx interrupt\n");
  4392. handled |= CSR_INT_BIT_FH_TX;
  4393. }
  4394. if (inta & ~handled)
  4395. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4396. if (inta & ~CSR_INI_SET_MASK) {
  4397. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4398. inta & ~CSR_INI_SET_MASK);
  4399. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4400. }
  4401. /* Re-enable all interrupts */
  4402. iwl4965_enable_interrupts(priv);
  4403. #ifdef CONFIG_IWL4965_DEBUG
  4404. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4405. inta = iwl4965_read32(priv, CSR_INT);
  4406. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4407. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4408. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4409. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4410. }
  4411. #endif
  4412. spin_unlock_irqrestore(&priv->lock, flags);
  4413. }
  4414. static irqreturn_t iwl4965_isr(int irq, void *data)
  4415. {
  4416. struct iwl4965_priv *priv = data;
  4417. u32 inta, inta_mask;
  4418. u32 inta_fh;
  4419. if (!priv)
  4420. return IRQ_NONE;
  4421. spin_lock(&priv->lock);
  4422. /* Disable (but don't clear!) interrupts here to avoid
  4423. * back-to-back ISRs and sporadic interrupts from our NIC.
  4424. * If we have something to service, the tasklet will re-enable ints.
  4425. * If we *don't* have something, we'll re-enable before leaving here. */
  4426. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4427. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4428. /* Discover which interrupts are active/pending */
  4429. inta = iwl4965_read32(priv, CSR_INT);
  4430. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4431. /* Ignore interrupt if there's nothing in NIC to service.
  4432. * This may be due to IRQ shared with another device,
  4433. * or due to sporadic interrupts thrown from our NIC. */
  4434. if (!inta && !inta_fh) {
  4435. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4436. goto none;
  4437. }
  4438. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4439. /* Hardware disappeared. It might have already raised
  4440. * an interrupt */
  4441. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4442. goto unplugged;
  4443. }
  4444. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4445. inta, inta_mask, inta_fh);
  4446. inta &= ~CSR_INT_BIT_SCD;
  4447. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4448. if (likely(inta || inta_fh))
  4449. tasklet_schedule(&priv->irq_tasklet);
  4450. unplugged:
  4451. spin_unlock(&priv->lock);
  4452. return IRQ_HANDLED;
  4453. none:
  4454. /* re-enable interrupts here since we don't have anything to service. */
  4455. iwl4965_enable_interrupts(priv);
  4456. spin_unlock(&priv->lock);
  4457. return IRQ_NONE;
  4458. }
  4459. /************************** EEPROM BANDS ****************************
  4460. *
  4461. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4462. * EEPROM contents to the specific channel number supported for each
  4463. * band.
  4464. *
  4465. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4466. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4467. * The specific geography and calibration information for that channel
  4468. * is contained in the eeprom map itself.
  4469. *
  4470. * During init, we copy the eeprom information and channel map
  4471. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4472. *
  4473. * channel_map_24/52 provides the index in the channel_info array for a
  4474. * given channel. We have to have two separate maps as there is channel
  4475. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4476. * band_2
  4477. *
  4478. * A value of 0xff stored in the channel_map indicates that the channel
  4479. * is not supported by the hardware at all.
  4480. *
  4481. * A value of 0xfe in the channel_map indicates that the channel is not
  4482. * valid for Tx with the current hardware. This means that
  4483. * while the system can tune and receive on a given channel, it may not
  4484. * be able to associate or transmit any frames on that
  4485. * channel. There is no corresponding channel information for that
  4486. * entry.
  4487. *
  4488. *********************************************************************/
  4489. /* 2.4 GHz */
  4490. static const u8 iwl4965_eeprom_band_1[14] = {
  4491. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4492. };
  4493. /* 5.2 GHz bands */
  4494. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4495. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4496. };
  4497. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4498. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4499. };
  4500. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4501. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4502. };
  4503. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4504. 145, 149, 153, 157, 161, 165
  4505. };
  4506. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4507. 1, 2, 3, 4, 5, 6, 7
  4508. };
  4509. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4510. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4511. };
  4512. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4513. int band,
  4514. int *eeprom_ch_count,
  4515. const struct iwl4965_eeprom_channel
  4516. **eeprom_ch_info,
  4517. const u8 **eeprom_ch_index)
  4518. {
  4519. switch (band) {
  4520. case 1: /* 2.4GHz band */
  4521. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4522. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4523. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4524. break;
  4525. case 2: /* 4.9GHz band */
  4526. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4527. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4528. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4529. break;
  4530. case 3: /* 5.2GHz band */
  4531. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4532. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4533. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4534. break;
  4535. case 4: /* 5.5GHz band */
  4536. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4537. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4538. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4539. break;
  4540. case 5: /* 5.7GHz band */
  4541. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4542. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4543. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4544. break;
  4545. case 6: /* 2.4GHz FAT channels */
  4546. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4547. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4548. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4549. break;
  4550. case 7: /* 5 GHz FAT channels */
  4551. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4552. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4553. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4554. break;
  4555. default:
  4556. BUG();
  4557. return;
  4558. }
  4559. }
  4560. /**
  4561. * iwl4965_get_channel_info - Find driver's private channel info
  4562. *
  4563. * Based on band and channel number.
  4564. */
  4565. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4566. int phymode, u16 channel)
  4567. {
  4568. int i;
  4569. switch (phymode) {
  4570. case MODE_IEEE80211A:
  4571. for (i = 14; i < priv->channel_count; i++) {
  4572. if (priv->channel_info[i].channel == channel)
  4573. return &priv->channel_info[i];
  4574. }
  4575. break;
  4576. case MODE_IEEE80211B:
  4577. case MODE_IEEE80211G:
  4578. if (channel >= 1 && channel <= 14)
  4579. return &priv->channel_info[channel - 1];
  4580. break;
  4581. }
  4582. return NULL;
  4583. }
  4584. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4585. ? # x " " : "")
  4586. /**
  4587. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4588. */
  4589. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4590. {
  4591. int eeprom_ch_count = 0;
  4592. const u8 *eeprom_ch_index = NULL;
  4593. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4594. int band, ch;
  4595. struct iwl4965_channel_info *ch_info;
  4596. if (priv->channel_count) {
  4597. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4598. return 0;
  4599. }
  4600. if (priv->eeprom.version < 0x2f) {
  4601. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4602. priv->eeprom.version);
  4603. return -EINVAL;
  4604. }
  4605. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4606. priv->channel_count =
  4607. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4608. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4609. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4610. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4611. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4612. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4613. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4614. priv->channel_count, GFP_KERNEL);
  4615. if (!priv->channel_info) {
  4616. IWL_ERROR("Could not allocate channel_info\n");
  4617. priv->channel_count = 0;
  4618. return -ENOMEM;
  4619. }
  4620. ch_info = priv->channel_info;
  4621. /* Loop through the 5 EEPROM bands adding them in order to the
  4622. * channel map we maintain (that contains additional information than
  4623. * what just in the EEPROM) */
  4624. for (band = 1; band <= 5; band++) {
  4625. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4626. &eeprom_ch_info, &eeprom_ch_index);
  4627. /* Loop through each band adding each of the channels */
  4628. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4629. ch_info->channel = eeprom_ch_index[ch];
  4630. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4631. MODE_IEEE80211A;
  4632. /* permanently store EEPROM's channel regulatory flags
  4633. * and max power in channel info database. */
  4634. ch_info->eeprom = eeprom_ch_info[ch];
  4635. /* Copy the run-time flags so they are there even on
  4636. * invalid channels */
  4637. ch_info->flags = eeprom_ch_info[ch].flags;
  4638. if (!(is_channel_valid(ch_info))) {
  4639. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4640. "No traffic\n",
  4641. ch_info->channel,
  4642. ch_info->flags,
  4643. is_channel_a_band(ch_info) ?
  4644. "5.2" : "2.4");
  4645. ch_info++;
  4646. continue;
  4647. }
  4648. /* Initialize regulatory-based run-time data */
  4649. ch_info->max_power_avg = ch_info->curr_txpow =
  4650. eeprom_ch_info[ch].max_power_avg;
  4651. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4652. ch_info->min_power = 0;
  4653. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4654. " %ddBm): Ad-Hoc %ssupported\n",
  4655. ch_info->channel,
  4656. is_channel_a_band(ch_info) ?
  4657. "5.2" : "2.4",
  4658. CHECK_AND_PRINT(IBSS),
  4659. CHECK_AND_PRINT(ACTIVE),
  4660. CHECK_AND_PRINT(RADAR),
  4661. CHECK_AND_PRINT(WIDE),
  4662. CHECK_AND_PRINT(NARROW),
  4663. CHECK_AND_PRINT(DFS),
  4664. eeprom_ch_info[ch].flags,
  4665. eeprom_ch_info[ch].max_power_avg,
  4666. ((eeprom_ch_info[ch].
  4667. flags & EEPROM_CHANNEL_IBSS)
  4668. && !(eeprom_ch_info[ch].
  4669. flags & EEPROM_CHANNEL_RADAR))
  4670. ? "" : "not ");
  4671. /* Set the user_txpower_limit to the highest power
  4672. * supported by any channel */
  4673. if (eeprom_ch_info[ch].max_power_avg >
  4674. priv->user_txpower_limit)
  4675. priv->user_txpower_limit =
  4676. eeprom_ch_info[ch].max_power_avg;
  4677. ch_info++;
  4678. }
  4679. }
  4680. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4681. for (band = 6; band <= 7; band++) {
  4682. int phymode;
  4683. u8 fat_extension_chan;
  4684. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4685. &eeprom_ch_info, &eeprom_ch_index);
  4686. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4687. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4688. /* Loop through each band adding each of the channels */
  4689. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4690. if ((band == 6) &&
  4691. ((eeprom_ch_index[ch] == 5) ||
  4692. (eeprom_ch_index[ch] == 6) ||
  4693. (eeprom_ch_index[ch] == 7)))
  4694. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4695. else
  4696. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4697. /* Set up driver's info for lower half */
  4698. iwl4965_set_fat_chan_info(priv, phymode,
  4699. eeprom_ch_index[ch],
  4700. &(eeprom_ch_info[ch]),
  4701. fat_extension_chan);
  4702. /* Set up driver's info for upper half */
  4703. iwl4965_set_fat_chan_info(priv, phymode,
  4704. (eeprom_ch_index[ch] + 4),
  4705. &(eeprom_ch_info[ch]),
  4706. HT_IE_EXT_CHANNEL_BELOW);
  4707. }
  4708. }
  4709. return 0;
  4710. }
  4711. /*
  4712. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4713. */
  4714. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4715. {
  4716. kfree(priv->channel_info);
  4717. priv->channel_count = 0;
  4718. }
  4719. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4720. * sending probe req. This should be set long enough to hear probe responses
  4721. * from more than one AP. */
  4722. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4723. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4724. /* For faster active scanning, scan will move to the next channel if fewer than
  4725. * PLCP_QUIET_THRESH packets are heard on this channel within
  4726. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4727. * time if it's a quiet channel (nothing responded to our probe, and there's
  4728. * no other traffic).
  4729. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4730. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4731. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4732. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4733. * Must be set longer than active dwell time.
  4734. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4735. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4736. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4737. #define IWL_PASSIVE_DWELL_BASE (100)
  4738. #define IWL_CHANNEL_TUNE_TIME 5
  4739. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4740. {
  4741. if (phymode == MODE_IEEE80211A)
  4742. return IWL_ACTIVE_DWELL_TIME_52;
  4743. else
  4744. return IWL_ACTIVE_DWELL_TIME_24;
  4745. }
  4746. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4747. {
  4748. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4749. u16 passive = (phymode != MODE_IEEE80211A) ?
  4750. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4751. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4752. if (iwl4965_is_associated(priv)) {
  4753. /* If we're associated, we clamp the maximum passive
  4754. * dwell time to be 98% of the beacon interval (minus
  4755. * 2 * channel tune time) */
  4756. passive = priv->beacon_int;
  4757. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4758. passive = IWL_PASSIVE_DWELL_BASE;
  4759. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4760. }
  4761. if (passive <= active)
  4762. passive = active + 1;
  4763. return passive;
  4764. }
  4765. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4766. u8 is_active, u8 direct_mask,
  4767. struct iwl4965_scan_channel *scan_ch)
  4768. {
  4769. const struct ieee80211_channel *channels = NULL;
  4770. const struct ieee80211_hw_mode *hw_mode;
  4771. const struct iwl4965_channel_info *ch_info;
  4772. u16 passive_dwell = 0;
  4773. u16 active_dwell = 0;
  4774. int added, i;
  4775. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4776. if (!hw_mode)
  4777. return 0;
  4778. channels = hw_mode->channels;
  4779. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4780. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4781. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4782. if (channels[i].chan ==
  4783. le16_to_cpu(priv->active_rxon.channel)) {
  4784. if (iwl4965_is_associated(priv)) {
  4785. IWL_DEBUG_SCAN
  4786. ("Skipping current channel %d\n",
  4787. le16_to_cpu(priv->active_rxon.channel));
  4788. continue;
  4789. }
  4790. } else if (priv->only_active_channel)
  4791. continue;
  4792. scan_ch->channel = channels[i].chan;
  4793. ch_info = iwl4965_get_channel_info(priv, phymode,
  4794. scan_ch->channel);
  4795. if (!is_channel_valid(ch_info)) {
  4796. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4797. scan_ch->channel);
  4798. continue;
  4799. }
  4800. if (!is_active || is_channel_passive(ch_info) ||
  4801. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4802. scan_ch->type = 0; /* passive */
  4803. else
  4804. scan_ch->type = 1; /* active */
  4805. if (scan_ch->type & 1)
  4806. scan_ch->type |= (direct_mask << 1);
  4807. if (is_channel_narrow(ch_info))
  4808. scan_ch->type |= (1 << 7);
  4809. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4810. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4811. /* Set txpower levels to defaults */
  4812. scan_ch->tpc.dsp_atten = 110;
  4813. /* scan_pwr_info->tpc.dsp_atten; */
  4814. /*scan_pwr_info->tpc.tx_gain; */
  4815. if (phymode == MODE_IEEE80211A)
  4816. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4817. else {
  4818. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4819. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4820. * power level:
  4821. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4822. */
  4823. }
  4824. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4825. scan_ch->channel,
  4826. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4827. (scan_ch->type & 1) ?
  4828. active_dwell : passive_dwell);
  4829. scan_ch++;
  4830. added++;
  4831. }
  4832. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4833. return added;
  4834. }
  4835. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4836. {
  4837. int i, j;
  4838. for (i = 0; i < 3; i++) {
  4839. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4840. for (j = 0; j < hw_mode->num_channels; j++)
  4841. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4842. }
  4843. }
  4844. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4845. struct ieee80211_rate *rates)
  4846. {
  4847. int i;
  4848. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4849. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4850. rates[i].val = i; /* Rate scaling will work on indexes */
  4851. rates[i].val2 = i;
  4852. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4853. /* Only OFDM have the bits-per-symbol set */
  4854. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4855. rates[i].flags |= IEEE80211_RATE_OFDM;
  4856. else {
  4857. /*
  4858. * If CCK 1M then set rate flag to CCK else CCK_2
  4859. * which is CCK | PREAMBLE2
  4860. */
  4861. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4862. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4863. }
  4864. /* Set up which ones are basic rates... */
  4865. if (IWL_BASIC_RATES_MASK & (1 << i))
  4866. rates[i].flags |= IEEE80211_RATE_BASIC;
  4867. }
  4868. }
  4869. /**
  4870. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4871. */
  4872. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4873. {
  4874. struct iwl4965_channel_info *ch;
  4875. struct ieee80211_hw_mode *modes;
  4876. struct ieee80211_channel *channels;
  4877. struct ieee80211_channel *geo_ch;
  4878. struct ieee80211_rate *rates;
  4879. int i = 0;
  4880. enum {
  4881. A = 0,
  4882. B = 1,
  4883. G = 2,
  4884. };
  4885. int mode_count = 3;
  4886. if (priv->modes) {
  4887. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4888. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4889. return 0;
  4890. }
  4891. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4892. GFP_KERNEL);
  4893. if (!modes)
  4894. return -ENOMEM;
  4895. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4896. priv->channel_count, GFP_KERNEL);
  4897. if (!channels) {
  4898. kfree(modes);
  4899. return -ENOMEM;
  4900. }
  4901. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4902. GFP_KERNEL);
  4903. if (!rates) {
  4904. kfree(modes);
  4905. kfree(channels);
  4906. return -ENOMEM;
  4907. }
  4908. /* 0 = 802.11a
  4909. * 1 = 802.11b
  4910. * 2 = 802.11g
  4911. */
  4912. /* 5.2GHz channels start after the 2.4GHz channels */
  4913. modes[A].mode = MODE_IEEE80211A;
  4914. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4915. modes[A].rates = rates;
  4916. modes[A].num_rates = 8; /* just OFDM */
  4917. modes[A].rates = &rates[4];
  4918. modes[A].num_channels = 0;
  4919. #ifdef CONFIG_IWL4965_HT
  4920. iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
  4921. #endif
  4922. modes[B].mode = MODE_IEEE80211B;
  4923. modes[B].channels = channels;
  4924. modes[B].rates = rates;
  4925. modes[B].num_rates = 4; /* just CCK */
  4926. modes[B].num_channels = 0;
  4927. modes[G].mode = MODE_IEEE80211G;
  4928. modes[G].channels = channels;
  4929. modes[G].rates = rates;
  4930. modes[G].num_rates = 12; /* OFDM & CCK */
  4931. modes[G].num_channels = 0;
  4932. #ifdef CONFIG_IWL4965_HT
  4933. iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
  4934. #endif
  4935. priv->ieee_channels = channels;
  4936. priv->ieee_rates = rates;
  4937. iwl4965_init_hw_rates(priv, rates);
  4938. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4939. ch = &priv->channel_info[i];
  4940. if (!is_channel_valid(ch)) {
  4941. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4942. "skipping.\n",
  4943. ch->channel, is_channel_a_band(ch) ?
  4944. "5.2" : "2.4");
  4945. continue;
  4946. }
  4947. if (is_channel_a_band(ch)) {
  4948. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4949. } else {
  4950. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4951. modes[G].num_channels++;
  4952. }
  4953. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4954. geo_ch->chan = ch->channel;
  4955. geo_ch->power_level = ch->max_power_avg;
  4956. geo_ch->antenna_max = 0xff;
  4957. if (is_channel_valid(ch)) {
  4958. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4959. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4960. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4961. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4962. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4963. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4964. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4965. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4966. priv->max_channel_txpower_limit =
  4967. ch->max_power_avg;
  4968. }
  4969. geo_ch->val = geo_ch->flag;
  4970. }
  4971. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4972. printk(KERN_INFO DRV_NAME
  4973. ": Incorrectly detected BG card as ABG. Please send "
  4974. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4975. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4976. priv->is_abg = 0;
  4977. }
  4978. printk(KERN_INFO DRV_NAME
  4979. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4980. modes[G].num_channels, modes[A].num_channels);
  4981. /*
  4982. * NOTE: We register these in preference of order -- the
  4983. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4984. * a phymode based on rates or AP capabilities but seems to
  4985. * configure it purely on if the channel being configured
  4986. * is supported by a mode -- and the first match is taken
  4987. */
  4988. if (modes[G].num_channels)
  4989. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4990. if (modes[B].num_channels)
  4991. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4992. if (modes[A].num_channels)
  4993. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4994. priv->modes = modes;
  4995. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4996. return 0;
  4997. }
  4998. /*
  4999. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  5000. */
  5001. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  5002. {
  5003. kfree(priv->modes);
  5004. kfree(priv->ieee_channels);
  5005. kfree(priv->ieee_rates);
  5006. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  5007. }
  5008. /******************************************************************************
  5009. *
  5010. * uCode download functions
  5011. *
  5012. ******************************************************************************/
  5013. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  5014. {
  5015. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  5016. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  5017. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5018. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  5019. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5020. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5021. }
  5022. /**
  5023. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  5024. * looking at all data.
  5025. */
  5026. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  5027. u32 len)
  5028. {
  5029. u32 val;
  5030. u32 save_len = len;
  5031. int rc = 0;
  5032. u32 errcnt;
  5033. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5034. rc = iwl4965_grab_nic_access(priv);
  5035. if (rc)
  5036. return rc;
  5037. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  5038. errcnt = 0;
  5039. for (; len > 0; len -= sizeof(u32), image++) {
  5040. /* read data comes through single port, auto-incr addr */
  5041. /* NOTE: Use the debugless read so we don't flood kernel log
  5042. * if IWL_DL_IO is set */
  5043. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5044. if (val != le32_to_cpu(*image)) {
  5045. IWL_ERROR("uCode INST section is invalid at "
  5046. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5047. save_len - len, val, le32_to_cpu(*image));
  5048. rc = -EIO;
  5049. errcnt++;
  5050. if (errcnt >= 20)
  5051. break;
  5052. }
  5053. }
  5054. iwl4965_release_nic_access(priv);
  5055. if (!errcnt)
  5056. IWL_DEBUG_INFO
  5057. ("ucode image in INSTRUCTION memory is good\n");
  5058. return rc;
  5059. }
  5060. /**
  5061. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  5062. * using sample data 100 bytes apart. If these sample points are good,
  5063. * it's a pretty good bet that everything between them is good, too.
  5064. */
  5065. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5066. {
  5067. u32 val;
  5068. int rc = 0;
  5069. u32 errcnt = 0;
  5070. u32 i;
  5071. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5072. rc = iwl4965_grab_nic_access(priv);
  5073. if (rc)
  5074. return rc;
  5075. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5076. /* read data comes through single port, auto-incr addr */
  5077. /* NOTE: Use the debugless read so we don't flood kernel log
  5078. * if IWL_DL_IO is set */
  5079. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5080. i + RTC_INST_LOWER_BOUND);
  5081. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5082. if (val != le32_to_cpu(*image)) {
  5083. #if 0 /* Enable this if you want to see details */
  5084. IWL_ERROR("uCode INST section is invalid at "
  5085. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5086. i, val, *image);
  5087. #endif
  5088. rc = -EIO;
  5089. errcnt++;
  5090. if (errcnt >= 3)
  5091. break;
  5092. }
  5093. }
  5094. iwl4965_release_nic_access(priv);
  5095. return rc;
  5096. }
  5097. /**
  5098. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5099. * and verify its contents
  5100. */
  5101. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5102. {
  5103. __le32 *image;
  5104. u32 len;
  5105. int rc = 0;
  5106. /* Try bootstrap */
  5107. image = (__le32 *)priv->ucode_boot.v_addr;
  5108. len = priv->ucode_boot.len;
  5109. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5110. if (rc == 0) {
  5111. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5112. return 0;
  5113. }
  5114. /* Try initialize */
  5115. image = (__le32 *)priv->ucode_init.v_addr;
  5116. len = priv->ucode_init.len;
  5117. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5118. if (rc == 0) {
  5119. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5120. return 0;
  5121. }
  5122. /* Try runtime/protocol */
  5123. image = (__le32 *)priv->ucode_code.v_addr;
  5124. len = priv->ucode_code.len;
  5125. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5126. if (rc == 0) {
  5127. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5128. return 0;
  5129. }
  5130. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5131. /* Since nothing seems to match, show first several data entries in
  5132. * instruction SRAM, so maybe visual inspection will give a clue.
  5133. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5134. image = (__le32 *)priv->ucode_boot.v_addr;
  5135. len = priv->ucode_boot.len;
  5136. rc = iwl4965_verify_inst_full(priv, image, len);
  5137. return rc;
  5138. }
  5139. /* check contents of special bootstrap uCode SRAM */
  5140. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5141. {
  5142. __le32 *image = priv->ucode_boot.v_addr;
  5143. u32 len = priv->ucode_boot.len;
  5144. u32 reg;
  5145. u32 val;
  5146. IWL_DEBUG_INFO("Begin verify bsm\n");
  5147. /* verify BSM SRAM contents */
  5148. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5149. for (reg = BSM_SRAM_LOWER_BOUND;
  5150. reg < BSM_SRAM_LOWER_BOUND + len;
  5151. reg += sizeof(u32), image ++) {
  5152. val = iwl4965_read_prph(priv, reg);
  5153. if (val != le32_to_cpu(*image)) {
  5154. IWL_ERROR("BSM uCode verification failed at "
  5155. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5156. BSM_SRAM_LOWER_BOUND,
  5157. reg - BSM_SRAM_LOWER_BOUND, len,
  5158. val, le32_to_cpu(*image));
  5159. return -EIO;
  5160. }
  5161. }
  5162. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5163. return 0;
  5164. }
  5165. /**
  5166. * iwl4965_load_bsm - Load bootstrap instructions
  5167. *
  5168. * BSM operation:
  5169. *
  5170. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5171. * in special SRAM that does not power down during RFKILL. When powering back
  5172. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5173. * the bootstrap program into the on-board processor, and starts it.
  5174. *
  5175. * The bootstrap program loads (via DMA) instructions and data for a new
  5176. * program from host DRAM locations indicated by the host driver in the
  5177. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5178. * automatically.
  5179. *
  5180. * When initializing the NIC, the host driver points the BSM to the
  5181. * "initialize" uCode image. This uCode sets up some internal data, then
  5182. * notifies host via "initialize alive" that it is complete.
  5183. *
  5184. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5185. * normal runtime uCode instructions and a backup uCode data cache buffer
  5186. * (filled initially with starting data values for the on-board processor),
  5187. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5188. * which begins normal operation.
  5189. *
  5190. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5191. * the backup data cache in DRAM before SRAM is powered down.
  5192. *
  5193. * When powering back up, the BSM loads the bootstrap program. This reloads
  5194. * the runtime uCode instructions and the backup data cache into SRAM,
  5195. * and re-launches the runtime uCode from where it left off.
  5196. */
  5197. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5198. {
  5199. __le32 *image = priv->ucode_boot.v_addr;
  5200. u32 len = priv->ucode_boot.len;
  5201. dma_addr_t pinst;
  5202. dma_addr_t pdata;
  5203. u32 inst_len;
  5204. u32 data_len;
  5205. int rc;
  5206. int i;
  5207. u32 done;
  5208. u32 reg_offset;
  5209. IWL_DEBUG_INFO("Begin load bsm\n");
  5210. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5211. if (len > IWL_MAX_BSM_SIZE)
  5212. return -EINVAL;
  5213. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5214. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5215. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5216. * after the "initialize" uCode has run, to point to
  5217. * runtime/protocol instructions and backup data cache. */
  5218. pinst = priv->ucode_init.p_addr >> 4;
  5219. pdata = priv->ucode_init_data.p_addr >> 4;
  5220. inst_len = priv->ucode_init.len;
  5221. data_len = priv->ucode_init_data.len;
  5222. rc = iwl4965_grab_nic_access(priv);
  5223. if (rc)
  5224. return rc;
  5225. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5226. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5227. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5228. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5229. /* Fill BSM memory with bootstrap instructions */
  5230. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5231. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5232. reg_offset += sizeof(u32), image++)
  5233. _iwl4965_write_prph(priv, reg_offset,
  5234. le32_to_cpu(*image));
  5235. rc = iwl4965_verify_bsm(priv);
  5236. if (rc) {
  5237. iwl4965_release_nic_access(priv);
  5238. return rc;
  5239. }
  5240. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5241. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5242. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5243. RTC_INST_LOWER_BOUND);
  5244. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5245. /* Load bootstrap code into instruction SRAM now,
  5246. * to prepare to load "initialize" uCode */
  5247. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5248. BSM_WR_CTRL_REG_BIT_START);
  5249. /* Wait for load of bootstrap uCode to finish */
  5250. for (i = 0; i < 100; i++) {
  5251. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5252. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5253. break;
  5254. udelay(10);
  5255. }
  5256. if (i < 100)
  5257. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5258. else {
  5259. IWL_ERROR("BSM write did not complete!\n");
  5260. return -EIO;
  5261. }
  5262. /* Enable future boot loads whenever power management unit triggers it
  5263. * (e.g. when powering back up after power-save shutdown) */
  5264. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5265. BSM_WR_CTRL_REG_BIT_START_EN);
  5266. iwl4965_release_nic_access(priv);
  5267. return 0;
  5268. }
  5269. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5270. {
  5271. /* Remove all resets to allow NIC to operate */
  5272. iwl4965_write32(priv, CSR_RESET, 0);
  5273. }
  5274. /**
  5275. * iwl4965_read_ucode - Read uCode images from disk file.
  5276. *
  5277. * Copy into buffers for card to fetch via bus-mastering
  5278. */
  5279. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5280. {
  5281. struct iwl4965_ucode *ucode;
  5282. int ret;
  5283. const struct firmware *ucode_raw;
  5284. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5285. u8 *src;
  5286. size_t len;
  5287. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5288. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5289. * request_firmware() is synchronous, file is in memory on return. */
  5290. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5291. if (ret < 0) {
  5292. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5293. name, ret);
  5294. goto error;
  5295. }
  5296. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5297. name, ucode_raw->size);
  5298. /* Make sure that we got at least our header! */
  5299. if (ucode_raw->size < sizeof(*ucode)) {
  5300. IWL_ERROR("File size way too small!\n");
  5301. ret = -EINVAL;
  5302. goto err_release;
  5303. }
  5304. /* Data from ucode file: header followed by uCode images */
  5305. ucode = (void *)ucode_raw->data;
  5306. ver = le32_to_cpu(ucode->ver);
  5307. inst_size = le32_to_cpu(ucode->inst_size);
  5308. data_size = le32_to_cpu(ucode->data_size);
  5309. init_size = le32_to_cpu(ucode->init_size);
  5310. init_data_size = le32_to_cpu(ucode->init_data_size);
  5311. boot_size = le32_to_cpu(ucode->boot_size);
  5312. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5313. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5314. inst_size);
  5315. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5316. data_size);
  5317. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5318. init_size);
  5319. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5320. init_data_size);
  5321. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5322. boot_size);
  5323. /* Verify size of file vs. image size info in file's header */
  5324. if (ucode_raw->size < sizeof(*ucode) +
  5325. inst_size + data_size + init_size +
  5326. init_data_size + boot_size) {
  5327. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5328. (int)ucode_raw->size);
  5329. ret = -EINVAL;
  5330. goto err_release;
  5331. }
  5332. /* Verify that uCode images will fit in card's SRAM */
  5333. if (inst_size > IWL_MAX_INST_SIZE) {
  5334. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5335. inst_size);
  5336. ret = -EINVAL;
  5337. goto err_release;
  5338. }
  5339. if (data_size > IWL_MAX_DATA_SIZE) {
  5340. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5341. data_size);
  5342. ret = -EINVAL;
  5343. goto err_release;
  5344. }
  5345. if (init_size > IWL_MAX_INST_SIZE) {
  5346. IWL_DEBUG_INFO
  5347. ("uCode init instr len %d too large to fit in\n",
  5348. init_size);
  5349. ret = -EINVAL;
  5350. goto err_release;
  5351. }
  5352. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5353. IWL_DEBUG_INFO
  5354. ("uCode init data len %d too large to fit in\n",
  5355. init_data_size);
  5356. ret = -EINVAL;
  5357. goto err_release;
  5358. }
  5359. if (boot_size > IWL_MAX_BSM_SIZE) {
  5360. IWL_DEBUG_INFO
  5361. ("uCode boot instr len %d too large to fit in\n",
  5362. boot_size);
  5363. ret = -EINVAL;
  5364. goto err_release;
  5365. }
  5366. /* Allocate ucode buffers for card's bus-master loading ... */
  5367. /* Runtime instructions and 2 copies of data:
  5368. * 1) unmodified from disk
  5369. * 2) backup cache for save/restore during power-downs */
  5370. priv->ucode_code.len = inst_size;
  5371. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5372. priv->ucode_data.len = data_size;
  5373. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5374. priv->ucode_data_backup.len = data_size;
  5375. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5376. /* Initialization instructions and data */
  5377. if (init_size && init_data_size) {
  5378. priv->ucode_init.len = init_size;
  5379. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5380. priv->ucode_init_data.len = init_data_size;
  5381. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5382. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5383. goto err_pci_alloc;
  5384. }
  5385. /* Bootstrap (instructions only, no data) */
  5386. if (boot_size) {
  5387. priv->ucode_boot.len = boot_size;
  5388. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5389. if (!priv->ucode_boot.v_addr)
  5390. goto err_pci_alloc;
  5391. }
  5392. /* Copy images into buffers for card's bus-master reads ... */
  5393. /* Runtime instructions (first block of data in file) */
  5394. src = &ucode->data[0];
  5395. len = priv->ucode_code.len;
  5396. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5397. memcpy(priv->ucode_code.v_addr, src, len);
  5398. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5399. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5400. /* Runtime data (2nd block)
  5401. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5402. src = &ucode->data[inst_size];
  5403. len = priv->ucode_data.len;
  5404. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5405. memcpy(priv->ucode_data.v_addr, src, len);
  5406. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5407. /* Initialization instructions (3rd block) */
  5408. if (init_size) {
  5409. src = &ucode->data[inst_size + data_size];
  5410. len = priv->ucode_init.len;
  5411. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5412. len);
  5413. memcpy(priv->ucode_init.v_addr, src, len);
  5414. }
  5415. /* Initialization data (4th block) */
  5416. if (init_data_size) {
  5417. src = &ucode->data[inst_size + data_size + init_size];
  5418. len = priv->ucode_init_data.len;
  5419. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5420. len);
  5421. memcpy(priv->ucode_init_data.v_addr, src, len);
  5422. }
  5423. /* Bootstrap instructions (5th block) */
  5424. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5425. len = priv->ucode_boot.len;
  5426. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5427. memcpy(priv->ucode_boot.v_addr, src, len);
  5428. /* We have our copies now, allow OS release its copies */
  5429. release_firmware(ucode_raw);
  5430. return 0;
  5431. err_pci_alloc:
  5432. IWL_ERROR("failed to allocate pci memory\n");
  5433. ret = -ENOMEM;
  5434. iwl4965_dealloc_ucode_pci(priv);
  5435. err_release:
  5436. release_firmware(ucode_raw);
  5437. error:
  5438. return ret;
  5439. }
  5440. /**
  5441. * iwl4965_set_ucode_ptrs - Set uCode address location
  5442. *
  5443. * Tell initialization uCode where to find runtime uCode.
  5444. *
  5445. * BSM registers initially contain pointers to initialization uCode.
  5446. * We need to replace them to load runtime uCode inst and data,
  5447. * and to save runtime data when powering down.
  5448. */
  5449. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5450. {
  5451. dma_addr_t pinst;
  5452. dma_addr_t pdata;
  5453. int rc = 0;
  5454. unsigned long flags;
  5455. /* bits 35:4 for 4965 */
  5456. pinst = priv->ucode_code.p_addr >> 4;
  5457. pdata = priv->ucode_data_backup.p_addr >> 4;
  5458. spin_lock_irqsave(&priv->lock, flags);
  5459. rc = iwl4965_grab_nic_access(priv);
  5460. if (rc) {
  5461. spin_unlock_irqrestore(&priv->lock, flags);
  5462. return rc;
  5463. }
  5464. /* Tell bootstrap uCode where to find image to load */
  5465. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5466. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5467. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5468. priv->ucode_data.len);
  5469. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5470. * that all new ptr/size info is in place */
  5471. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5472. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5473. iwl4965_release_nic_access(priv);
  5474. spin_unlock_irqrestore(&priv->lock, flags);
  5475. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5476. return rc;
  5477. }
  5478. /**
  5479. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5480. *
  5481. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5482. *
  5483. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5484. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5485. * (3945 does not contain this data).
  5486. *
  5487. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5488. */
  5489. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5490. {
  5491. /* Check alive response for "valid" sign from uCode */
  5492. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5493. /* We had an error bringing up the hardware, so take it
  5494. * all the way back down so we can try again */
  5495. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5496. goto restart;
  5497. }
  5498. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5499. * This is a paranoid check, because we would not have gotten the
  5500. * "initialize" alive if code weren't properly loaded. */
  5501. if (iwl4965_verify_ucode(priv)) {
  5502. /* Runtime instruction load was bad;
  5503. * take it all the way back down so we can try again */
  5504. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5505. goto restart;
  5506. }
  5507. /* Calculate temperature */
  5508. priv->temperature = iwl4965_get_temperature(priv);
  5509. /* Send pointers to protocol/runtime uCode image ... init code will
  5510. * load and launch runtime uCode, which will send us another "Alive"
  5511. * notification. */
  5512. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5513. if (iwl4965_set_ucode_ptrs(priv)) {
  5514. /* Runtime instruction load won't happen;
  5515. * take it all the way back down so we can try again */
  5516. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5517. goto restart;
  5518. }
  5519. return;
  5520. restart:
  5521. queue_work(priv->workqueue, &priv->restart);
  5522. }
  5523. /**
  5524. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5525. * from protocol/runtime uCode (initialization uCode's
  5526. * Alive gets handled by iwl4965_init_alive_start()).
  5527. */
  5528. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5529. {
  5530. int rc = 0;
  5531. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5532. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5533. /* We had an error bringing up the hardware, so take it
  5534. * all the way back down so we can try again */
  5535. IWL_DEBUG_INFO("Alive failed.\n");
  5536. goto restart;
  5537. }
  5538. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5539. * This is a paranoid check, because we would not have gotten the
  5540. * "runtime" alive if code weren't properly loaded. */
  5541. if (iwl4965_verify_ucode(priv)) {
  5542. /* Runtime instruction load was bad;
  5543. * take it all the way back down so we can try again */
  5544. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5545. goto restart;
  5546. }
  5547. iwl4965_clear_stations_table(priv);
  5548. rc = iwl4965_alive_notify(priv);
  5549. if (rc) {
  5550. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5551. rc);
  5552. goto restart;
  5553. }
  5554. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5555. set_bit(STATUS_ALIVE, &priv->status);
  5556. /* Clear out the uCode error bit if it is set */
  5557. clear_bit(STATUS_FW_ERROR, &priv->status);
  5558. if (iwl4965_is_rfkill(priv))
  5559. return;
  5560. ieee80211_start_queues(priv->hw);
  5561. priv->active_rate = priv->rates_mask;
  5562. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5563. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5564. if (iwl4965_is_associated(priv)) {
  5565. struct iwl4965_rxon_cmd *active_rxon =
  5566. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5567. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5568. sizeof(priv->staging_rxon));
  5569. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5570. } else {
  5571. /* Initialize our rx_config data */
  5572. iwl4965_connection_init_rx_config(priv);
  5573. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5574. }
  5575. /* Configure Bluetooth device coexistence support */
  5576. iwl4965_send_bt_config(priv);
  5577. /* Configure the adapter for unassociated operation */
  5578. iwl4965_commit_rxon(priv);
  5579. /* At this point, the NIC is initialized and operational */
  5580. priv->notif_missed_beacons = 0;
  5581. set_bit(STATUS_READY, &priv->status);
  5582. iwl4965_rf_kill_ct_config(priv);
  5583. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5584. wake_up_interruptible(&priv->wait_command_queue);
  5585. if (priv->error_recovering)
  5586. iwl4965_error_recovery(priv);
  5587. return;
  5588. restart:
  5589. queue_work(priv->workqueue, &priv->restart);
  5590. }
  5591. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5592. static void __iwl4965_down(struct iwl4965_priv *priv)
  5593. {
  5594. unsigned long flags;
  5595. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5596. struct ieee80211_conf *conf = NULL;
  5597. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5598. conf = ieee80211_get_hw_conf(priv->hw);
  5599. if (!exit_pending)
  5600. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5601. iwl4965_clear_stations_table(priv);
  5602. /* Unblock any waiting calls */
  5603. wake_up_interruptible_all(&priv->wait_command_queue);
  5604. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5605. * exiting the module */
  5606. if (!exit_pending)
  5607. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5608. /* stop and reset the on-board processor */
  5609. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5610. /* tell the device to stop sending interrupts */
  5611. iwl4965_disable_interrupts(priv);
  5612. if (priv->mac80211_registered)
  5613. ieee80211_stop_queues(priv->hw);
  5614. /* If we have not previously called iwl4965_init() then
  5615. * clear all bits but the RF Kill and SUSPEND bits and return */
  5616. if (!iwl4965_is_init(priv)) {
  5617. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5618. STATUS_RF_KILL_HW |
  5619. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5620. STATUS_RF_KILL_SW |
  5621. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5622. STATUS_GEO_CONFIGURED |
  5623. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5624. STATUS_IN_SUSPEND;
  5625. goto exit;
  5626. }
  5627. /* ...otherwise clear out all the status bits but the RF Kill and
  5628. * SUSPEND bits and continue taking the NIC down. */
  5629. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5630. STATUS_RF_KILL_HW |
  5631. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5632. STATUS_RF_KILL_SW |
  5633. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5634. STATUS_GEO_CONFIGURED |
  5635. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5636. STATUS_IN_SUSPEND |
  5637. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5638. STATUS_FW_ERROR;
  5639. spin_lock_irqsave(&priv->lock, flags);
  5640. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5641. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5642. spin_unlock_irqrestore(&priv->lock, flags);
  5643. iwl4965_hw_txq_ctx_stop(priv);
  5644. iwl4965_hw_rxq_stop(priv);
  5645. spin_lock_irqsave(&priv->lock, flags);
  5646. if (!iwl4965_grab_nic_access(priv)) {
  5647. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5648. APMG_CLK_VAL_DMA_CLK_RQT);
  5649. iwl4965_release_nic_access(priv);
  5650. }
  5651. spin_unlock_irqrestore(&priv->lock, flags);
  5652. udelay(5);
  5653. iwl4965_hw_nic_stop_master(priv);
  5654. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5655. iwl4965_hw_nic_reset(priv);
  5656. exit:
  5657. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5658. if (priv->ibss_beacon)
  5659. dev_kfree_skb(priv->ibss_beacon);
  5660. priv->ibss_beacon = NULL;
  5661. /* clear out any free frames */
  5662. iwl4965_clear_free_frames(priv);
  5663. }
  5664. static void iwl4965_down(struct iwl4965_priv *priv)
  5665. {
  5666. mutex_lock(&priv->mutex);
  5667. __iwl4965_down(priv);
  5668. mutex_unlock(&priv->mutex);
  5669. iwl4965_cancel_deferred_work(priv);
  5670. }
  5671. #define MAX_HW_RESTARTS 5
  5672. static int __iwl4965_up(struct iwl4965_priv *priv)
  5673. {
  5674. int rc, i;
  5675. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5676. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5677. return -EIO;
  5678. }
  5679. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5680. IWL_WARNING("Radio disabled by SW RF kill (module "
  5681. "parameter)\n");
  5682. return -ENODEV;
  5683. }
  5684. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5685. IWL_ERROR("ucode not available for device bringup\n");
  5686. return -EIO;
  5687. }
  5688. /* If platform's RF_KILL switch is NOT set to KILL */
  5689. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5690. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5691. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5692. else {
  5693. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5694. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5695. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5696. return -ENODEV;
  5697. }
  5698. }
  5699. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5700. rc = iwl4965_hw_nic_init(priv);
  5701. if (rc) {
  5702. IWL_ERROR("Unable to int nic\n");
  5703. return rc;
  5704. }
  5705. /* make sure rfkill handshake bits are cleared */
  5706. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5707. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5708. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5709. /* clear (again), then enable host interrupts */
  5710. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5711. iwl4965_enable_interrupts(priv);
  5712. /* really make sure rfkill handshake bits are cleared */
  5713. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5714. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5715. /* Copy original ucode data image from disk into backup cache.
  5716. * This will be used to initialize the on-board processor's
  5717. * data SRAM for a clean start when the runtime program first loads. */
  5718. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5719. priv->ucode_data.len);
  5720. /* We return success when we resume from suspend and rf_kill is on. */
  5721. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5722. return 0;
  5723. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5724. iwl4965_clear_stations_table(priv);
  5725. /* load bootstrap state machine,
  5726. * load bootstrap program into processor's memory,
  5727. * prepare to load the "initialize" uCode */
  5728. rc = iwl4965_load_bsm(priv);
  5729. if (rc) {
  5730. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5731. continue;
  5732. }
  5733. /* start card; "initialize" will load runtime ucode */
  5734. iwl4965_nic_start(priv);
  5735. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5736. return 0;
  5737. }
  5738. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5739. __iwl4965_down(priv);
  5740. /* tried to restart and config the device for as long as our
  5741. * patience could withstand */
  5742. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5743. return -EIO;
  5744. }
  5745. /*****************************************************************************
  5746. *
  5747. * Workqueue callbacks
  5748. *
  5749. *****************************************************************************/
  5750. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5751. {
  5752. struct iwl4965_priv *priv =
  5753. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5754. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5755. return;
  5756. mutex_lock(&priv->mutex);
  5757. iwl4965_init_alive_start(priv);
  5758. mutex_unlock(&priv->mutex);
  5759. }
  5760. static void iwl4965_bg_alive_start(struct work_struct *data)
  5761. {
  5762. struct iwl4965_priv *priv =
  5763. container_of(data, struct iwl4965_priv, alive_start.work);
  5764. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5765. return;
  5766. mutex_lock(&priv->mutex);
  5767. iwl4965_alive_start(priv);
  5768. mutex_unlock(&priv->mutex);
  5769. }
  5770. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5771. {
  5772. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5773. wake_up_interruptible(&priv->wait_command_queue);
  5774. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5775. return;
  5776. mutex_lock(&priv->mutex);
  5777. if (!iwl4965_is_rfkill(priv)) {
  5778. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5779. "HW and/or SW RF Kill no longer active, restarting "
  5780. "device\n");
  5781. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5782. queue_work(priv->workqueue, &priv->restart);
  5783. } else {
  5784. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5785. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5786. "disabled by SW switch\n");
  5787. else
  5788. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5789. "Kill switch must be turned off for "
  5790. "wireless networking to work.\n");
  5791. }
  5792. mutex_unlock(&priv->mutex);
  5793. }
  5794. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5795. static void iwl4965_bg_scan_check(struct work_struct *data)
  5796. {
  5797. struct iwl4965_priv *priv =
  5798. container_of(data, struct iwl4965_priv, scan_check.work);
  5799. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5800. return;
  5801. mutex_lock(&priv->mutex);
  5802. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5803. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5804. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5805. "Scan completion watchdog resetting adapter (%dms)\n",
  5806. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5807. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5808. iwl4965_send_scan_abort(priv);
  5809. }
  5810. mutex_unlock(&priv->mutex);
  5811. }
  5812. static void iwl4965_bg_request_scan(struct work_struct *data)
  5813. {
  5814. struct iwl4965_priv *priv =
  5815. container_of(data, struct iwl4965_priv, request_scan);
  5816. struct iwl4965_host_cmd cmd = {
  5817. .id = REPLY_SCAN_CMD,
  5818. .len = sizeof(struct iwl4965_scan_cmd),
  5819. .meta.flags = CMD_SIZE_HUGE,
  5820. };
  5821. int rc = 0;
  5822. struct iwl4965_scan_cmd *scan;
  5823. struct ieee80211_conf *conf = NULL;
  5824. u8 direct_mask;
  5825. int phymode;
  5826. conf = ieee80211_get_hw_conf(priv->hw);
  5827. mutex_lock(&priv->mutex);
  5828. if (!iwl4965_is_ready(priv)) {
  5829. IWL_WARNING("request scan called when driver not ready.\n");
  5830. goto done;
  5831. }
  5832. /* Make sure the scan wasn't cancelled before this queued work
  5833. * was given the chance to run... */
  5834. if (!test_bit(STATUS_SCANNING, &priv->status))
  5835. goto done;
  5836. /* This should never be called or scheduled if there is currently
  5837. * a scan active in the hardware. */
  5838. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5839. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5840. "Ignoring second request.\n");
  5841. rc = -EIO;
  5842. goto done;
  5843. }
  5844. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5845. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5846. goto done;
  5847. }
  5848. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5849. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5850. goto done;
  5851. }
  5852. if (iwl4965_is_rfkill(priv)) {
  5853. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5854. goto done;
  5855. }
  5856. if (!test_bit(STATUS_READY, &priv->status)) {
  5857. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5858. goto done;
  5859. }
  5860. if (!priv->scan_bands) {
  5861. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5862. goto done;
  5863. }
  5864. if (!priv->scan) {
  5865. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5866. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5867. if (!priv->scan) {
  5868. rc = -ENOMEM;
  5869. goto done;
  5870. }
  5871. }
  5872. scan = priv->scan;
  5873. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5874. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5875. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5876. if (iwl4965_is_associated(priv)) {
  5877. u16 interval = 0;
  5878. u32 extra;
  5879. u32 suspend_time = 100;
  5880. u32 scan_suspend_time = 100;
  5881. unsigned long flags;
  5882. IWL_DEBUG_INFO("Scanning while associated...\n");
  5883. spin_lock_irqsave(&priv->lock, flags);
  5884. interval = priv->beacon_int;
  5885. spin_unlock_irqrestore(&priv->lock, flags);
  5886. scan->suspend_time = 0;
  5887. scan->max_out_time = cpu_to_le32(200 * 1024);
  5888. if (!interval)
  5889. interval = suspend_time;
  5890. extra = (suspend_time / interval) << 22;
  5891. scan_suspend_time = (extra |
  5892. ((suspend_time % interval) * 1024));
  5893. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5894. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5895. scan_suspend_time, interval);
  5896. }
  5897. /* We should add the ability for user to lock to PASSIVE ONLY */
  5898. if (priv->one_direct_scan) {
  5899. IWL_DEBUG_SCAN
  5900. ("Kicking off one direct scan for '%s'\n",
  5901. iwl4965_escape_essid(priv->direct_ssid,
  5902. priv->direct_ssid_len));
  5903. scan->direct_scan[0].id = WLAN_EID_SSID;
  5904. scan->direct_scan[0].len = priv->direct_ssid_len;
  5905. memcpy(scan->direct_scan[0].ssid,
  5906. priv->direct_ssid, priv->direct_ssid_len);
  5907. direct_mask = 1;
  5908. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5909. scan->direct_scan[0].id = WLAN_EID_SSID;
  5910. scan->direct_scan[0].len = priv->essid_len;
  5911. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5912. direct_mask = 1;
  5913. } else
  5914. direct_mask = 0;
  5915. /* We don't build a direct scan probe request; the uCode will do
  5916. * that based on the direct_mask added to each channel entry */
  5917. scan->tx_cmd.len = cpu_to_le16(
  5918. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5919. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
  5920. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5921. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5922. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5923. /* flags + rate selection */
  5924. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5925. switch (priv->scan_bands) {
  5926. case 2:
  5927. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5928. scan->tx_cmd.rate_n_flags =
  5929. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5930. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5931. scan->good_CRC_th = 0;
  5932. phymode = MODE_IEEE80211G;
  5933. break;
  5934. case 1:
  5935. scan->tx_cmd.rate_n_flags =
  5936. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5937. RATE_MCS_ANT_B_MSK);
  5938. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5939. phymode = MODE_IEEE80211A;
  5940. break;
  5941. default:
  5942. IWL_WARNING("Invalid scan band count\n");
  5943. goto done;
  5944. }
  5945. /* select Rx chains */
  5946. /* Force use of chains B and C (0x6) for scan Rx.
  5947. * Avoid A (0x1) because of its off-channel reception on A-band.
  5948. * MIMO is not used here, but value is required to make uCode happy. */
  5949. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5950. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5951. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5952. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5953. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5954. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5955. if (direct_mask)
  5956. IWL_DEBUG_SCAN
  5957. ("Initiating direct scan for %s.\n",
  5958. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5959. else
  5960. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5961. scan->channel_count =
  5962. iwl4965_get_channels_for_scan(
  5963. priv, phymode, 1, /* active */
  5964. direct_mask,
  5965. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5966. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5967. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5968. cmd.data = scan;
  5969. scan->len = cpu_to_le16(cmd.len);
  5970. set_bit(STATUS_SCAN_HW, &priv->status);
  5971. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5972. if (rc)
  5973. goto done;
  5974. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5975. IWL_SCAN_CHECK_WATCHDOG);
  5976. mutex_unlock(&priv->mutex);
  5977. return;
  5978. done:
  5979. /* inform mac80211 scan aborted */
  5980. queue_work(priv->workqueue, &priv->scan_completed);
  5981. mutex_unlock(&priv->mutex);
  5982. }
  5983. static void iwl4965_bg_up(struct work_struct *data)
  5984. {
  5985. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5986. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5987. return;
  5988. mutex_lock(&priv->mutex);
  5989. __iwl4965_up(priv);
  5990. mutex_unlock(&priv->mutex);
  5991. }
  5992. static void iwl4965_bg_restart(struct work_struct *data)
  5993. {
  5994. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5995. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5996. return;
  5997. iwl4965_down(priv);
  5998. queue_work(priv->workqueue, &priv->up);
  5999. }
  6000. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  6001. {
  6002. struct iwl4965_priv *priv =
  6003. container_of(data, struct iwl4965_priv, rx_replenish);
  6004. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6005. return;
  6006. mutex_lock(&priv->mutex);
  6007. iwl4965_rx_replenish(priv);
  6008. mutex_unlock(&priv->mutex);
  6009. }
  6010. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6011. static void iwl4965_bg_post_associate(struct work_struct *data)
  6012. {
  6013. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  6014. post_associate.work);
  6015. int rc = 0;
  6016. struct ieee80211_conf *conf = NULL;
  6017. DECLARE_MAC_BUF(mac);
  6018. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6019. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  6020. return;
  6021. }
  6022. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  6023. priv->assoc_id,
  6024. print_mac(mac, priv->active_rxon.bssid_addr));
  6025. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6026. return;
  6027. mutex_lock(&priv->mutex);
  6028. if (!priv->vif || !priv->is_open) {
  6029. mutex_unlock(&priv->mutex);
  6030. return;
  6031. }
  6032. iwl4965_scan_cancel_timeout(priv, 200);
  6033. conf = ieee80211_get_hw_conf(priv->hw);
  6034. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6035. iwl4965_commit_rxon(priv);
  6036. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6037. iwl4965_setup_rxon_timing(priv);
  6038. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6039. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6040. if (rc)
  6041. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6042. "Attempting to continue.\n");
  6043. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6044. #ifdef CONFIG_IWL4965_HT
  6045. if (priv->current_ht_config.is_ht)
  6046. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  6047. #endif /* CONFIG_IWL4965_HT*/
  6048. iwl4965_set_rxon_chain(priv);
  6049. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6050. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6051. priv->assoc_id, priv->beacon_int);
  6052. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6053. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6054. else
  6055. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6056. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6057. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6058. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6059. else
  6060. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6061. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6062. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6063. }
  6064. iwl4965_commit_rxon(priv);
  6065. switch (priv->iw_mode) {
  6066. case IEEE80211_IF_TYPE_STA:
  6067. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6068. break;
  6069. case IEEE80211_IF_TYPE_IBSS:
  6070. /* clear out the station table */
  6071. iwl4965_clear_stations_table(priv);
  6072. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6073. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6074. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6075. iwl4965_send_beacon_cmd(priv);
  6076. break;
  6077. default:
  6078. IWL_ERROR("%s Should not be called in %d mode\n",
  6079. __FUNCTION__, priv->iw_mode);
  6080. break;
  6081. }
  6082. iwl4965_sequence_reset(priv);
  6083. #ifdef CONFIG_IWL4965_SENSITIVITY
  6084. /* Enable Rx differential gain and sensitivity calibrations */
  6085. iwl4965_chain_noise_reset(priv);
  6086. priv->start_calib = 1;
  6087. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6088. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6089. priv->assoc_station_added = 1;
  6090. #ifdef CONFIG_IWL4965_QOS
  6091. iwl4965_activate_qos(priv, 0);
  6092. #endif /* CONFIG_IWL4965_QOS */
  6093. /* we have just associated, don't start scan too early */
  6094. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6095. mutex_unlock(&priv->mutex);
  6096. }
  6097. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6098. {
  6099. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6100. if (!iwl4965_is_ready(priv))
  6101. return;
  6102. mutex_lock(&priv->mutex);
  6103. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6104. iwl4965_send_scan_abort(priv);
  6105. mutex_unlock(&priv->mutex);
  6106. }
  6107. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  6108. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6109. {
  6110. struct iwl4965_priv *priv =
  6111. container_of(work, struct iwl4965_priv, scan_completed);
  6112. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6113. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6114. return;
  6115. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  6116. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  6117. ieee80211_scan_completed(priv->hw);
  6118. /* Since setting the TXPOWER may have been deferred while
  6119. * performing the scan, fire one off */
  6120. mutex_lock(&priv->mutex);
  6121. iwl4965_hw_reg_send_txpower(priv);
  6122. mutex_unlock(&priv->mutex);
  6123. }
  6124. /*****************************************************************************
  6125. *
  6126. * mac80211 entry point functions
  6127. *
  6128. *****************************************************************************/
  6129. #define UCODE_READY_TIMEOUT (2 * HZ)
  6130. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6131. {
  6132. struct iwl4965_priv *priv = hw->priv;
  6133. int ret;
  6134. IWL_DEBUG_MAC80211("enter\n");
  6135. if (pci_enable_device(priv->pci_dev)) {
  6136. IWL_ERROR("Fail to pci_enable_device\n");
  6137. return -ENODEV;
  6138. }
  6139. pci_restore_state(priv->pci_dev);
  6140. pci_enable_msi(priv->pci_dev);
  6141. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  6142. DRV_NAME, priv);
  6143. if (ret) {
  6144. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  6145. goto out_disable_msi;
  6146. }
  6147. /* we should be verifying the device is ready to be opened */
  6148. mutex_lock(&priv->mutex);
  6149. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  6150. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  6151. * ucode filename and max sizes are card-specific. */
  6152. if (!priv->ucode_code.len) {
  6153. ret = iwl4965_read_ucode(priv);
  6154. if (ret) {
  6155. IWL_ERROR("Could not read microcode: %d\n", ret);
  6156. mutex_unlock(&priv->mutex);
  6157. goto out_release_irq;
  6158. }
  6159. }
  6160. ret = __iwl4965_up(priv);
  6161. mutex_unlock(&priv->mutex);
  6162. if (ret)
  6163. goto out_release_irq;
  6164. IWL_DEBUG_INFO("Start UP work done.\n");
  6165. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  6166. return 0;
  6167. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  6168. * mac80211 will not be run successfully. */
  6169. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  6170. test_bit(STATUS_READY, &priv->status),
  6171. UCODE_READY_TIMEOUT);
  6172. if (!ret) {
  6173. if (!test_bit(STATUS_READY, &priv->status)) {
  6174. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  6175. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  6176. ret = -ETIMEDOUT;
  6177. goto out_release_irq;
  6178. }
  6179. }
  6180. priv->is_open = 1;
  6181. IWL_DEBUG_MAC80211("leave\n");
  6182. return 0;
  6183. out_release_irq:
  6184. free_irq(priv->pci_dev->irq, priv);
  6185. out_disable_msi:
  6186. pci_disable_msi(priv->pci_dev);
  6187. pci_disable_device(priv->pci_dev);
  6188. priv->is_open = 0;
  6189. IWL_DEBUG_MAC80211("leave - failed\n");
  6190. return ret;
  6191. }
  6192. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6193. {
  6194. struct iwl4965_priv *priv = hw->priv;
  6195. IWL_DEBUG_MAC80211("enter\n");
  6196. if (!priv->is_open) {
  6197. IWL_DEBUG_MAC80211("leave - skip\n");
  6198. return;
  6199. }
  6200. priv->is_open = 0;
  6201. if (iwl4965_is_ready_rf(priv)) {
  6202. /* stop mac, cancel any scan request and clear
  6203. * RXON_FILTER_ASSOC_MSK BIT
  6204. */
  6205. mutex_lock(&priv->mutex);
  6206. iwl4965_scan_cancel_timeout(priv, 100);
  6207. cancel_delayed_work(&priv->post_associate);
  6208. mutex_unlock(&priv->mutex);
  6209. }
  6210. iwl4965_down(priv);
  6211. flush_workqueue(priv->workqueue);
  6212. free_irq(priv->pci_dev->irq, priv);
  6213. pci_disable_msi(priv->pci_dev);
  6214. pci_save_state(priv->pci_dev);
  6215. pci_disable_device(priv->pci_dev);
  6216. IWL_DEBUG_MAC80211("leave\n");
  6217. }
  6218. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6219. struct ieee80211_tx_control *ctl)
  6220. {
  6221. struct iwl4965_priv *priv = hw->priv;
  6222. IWL_DEBUG_MAC80211("enter\n");
  6223. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6224. IWL_DEBUG_MAC80211("leave - monitor\n");
  6225. return -1;
  6226. }
  6227. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6228. ctl->tx_rate);
  6229. if (iwl4965_tx_skb(priv, skb, ctl))
  6230. dev_kfree_skb_any(skb);
  6231. IWL_DEBUG_MAC80211("leave\n");
  6232. return 0;
  6233. }
  6234. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6235. struct ieee80211_if_init_conf *conf)
  6236. {
  6237. struct iwl4965_priv *priv = hw->priv;
  6238. unsigned long flags;
  6239. DECLARE_MAC_BUF(mac);
  6240. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6241. if (priv->vif) {
  6242. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6243. return -EOPNOTSUPP;
  6244. }
  6245. spin_lock_irqsave(&priv->lock, flags);
  6246. priv->vif = conf->vif;
  6247. spin_unlock_irqrestore(&priv->lock, flags);
  6248. mutex_lock(&priv->mutex);
  6249. if (conf->mac_addr) {
  6250. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6251. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6252. }
  6253. if (iwl4965_is_ready(priv))
  6254. iwl4965_set_mode(priv, conf->type);
  6255. mutex_unlock(&priv->mutex);
  6256. IWL_DEBUG_MAC80211("leave\n");
  6257. return 0;
  6258. }
  6259. /**
  6260. * iwl4965_mac_config - mac80211 config callback
  6261. *
  6262. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6263. * be set inappropriately and the driver currently sets the hardware up to
  6264. * use it whenever needed.
  6265. */
  6266. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6267. {
  6268. struct iwl4965_priv *priv = hw->priv;
  6269. const struct iwl4965_channel_info *ch_info;
  6270. unsigned long flags;
  6271. int ret = 0;
  6272. mutex_lock(&priv->mutex);
  6273. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6274. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6275. if (!iwl4965_is_ready(priv)) {
  6276. IWL_DEBUG_MAC80211("leave - not ready\n");
  6277. ret = -EIO;
  6278. goto out;
  6279. }
  6280. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6281. test_bit(STATUS_SCANNING, &priv->status))) {
  6282. IWL_DEBUG_MAC80211("leave - scanning\n");
  6283. set_bit(STATUS_CONF_PENDING, &priv->status);
  6284. mutex_unlock(&priv->mutex);
  6285. return 0;
  6286. }
  6287. spin_lock_irqsave(&priv->lock, flags);
  6288. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6289. if (!is_channel_valid(ch_info)) {
  6290. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6291. conf->channel, conf->phymode);
  6292. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6293. spin_unlock_irqrestore(&priv->lock, flags);
  6294. ret = -EINVAL;
  6295. goto out;
  6296. }
  6297. #ifdef CONFIG_IWL4965_HT
  6298. /* if we are switching fron ht to 2.4 clear flags
  6299. * from any ht related info since 2.4 does not
  6300. * support ht */
  6301. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6302. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6303. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6304. #endif
  6305. )
  6306. priv->staging_rxon.flags = 0;
  6307. #endif /* CONFIG_IWL4965_HT */
  6308. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6309. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6310. /* The list of supported rates and rate mask can be different
  6311. * for each phymode; since the phymode may have changed, reset
  6312. * the rate mask to what mac80211 lists */
  6313. iwl4965_set_rate(priv);
  6314. spin_unlock_irqrestore(&priv->lock, flags);
  6315. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6316. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6317. iwl4965_hw_channel_switch(priv, conf->channel);
  6318. goto out;
  6319. }
  6320. #endif
  6321. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6322. if (!conf->radio_enabled) {
  6323. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6324. goto out;
  6325. }
  6326. if (iwl4965_is_rfkill(priv)) {
  6327. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6328. ret = -EIO;
  6329. goto out;
  6330. }
  6331. iwl4965_set_rate(priv);
  6332. if (memcmp(&priv->active_rxon,
  6333. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6334. iwl4965_commit_rxon(priv);
  6335. else
  6336. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6337. IWL_DEBUG_MAC80211("leave\n");
  6338. out:
  6339. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6340. mutex_unlock(&priv->mutex);
  6341. return ret;
  6342. }
  6343. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6344. {
  6345. int rc = 0;
  6346. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6347. return;
  6348. /* The following should be done only at AP bring up */
  6349. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6350. /* RXON - unassoc (to set timing command) */
  6351. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6352. iwl4965_commit_rxon(priv);
  6353. /* RXON Timing */
  6354. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6355. iwl4965_setup_rxon_timing(priv);
  6356. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6357. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6358. if (rc)
  6359. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6360. "Attempting to continue.\n");
  6361. iwl4965_set_rxon_chain(priv);
  6362. /* FIXME: what should be the assoc_id for AP? */
  6363. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6364. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6365. priv->staging_rxon.flags |=
  6366. RXON_FLG_SHORT_PREAMBLE_MSK;
  6367. else
  6368. priv->staging_rxon.flags &=
  6369. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6370. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6371. if (priv->assoc_capability &
  6372. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6373. priv->staging_rxon.flags |=
  6374. RXON_FLG_SHORT_SLOT_MSK;
  6375. else
  6376. priv->staging_rxon.flags &=
  6377. ~RXON_FLG_SHORT_SLOT_MSK;
  6378. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6379. priv->staging_rxon.flags &=
  6380. ~RXON_FLG_SHORT_SLOT_MSK;
  6381. }
  6382. /* restore RXON assoc */
  6383. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6384. iwl4965_commit_rxon(priv);
  6385. #ifdef CONFIG_IWL4965_QOS
  6386. iwl4965_activate_qos(priv, 1);
  6387. #endif
  6388. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6389. }
  6390. iwl4965_send_beacon_cmd(priv);
  6391. /* FIXME - we need to add code here to detect a totally new
  6392. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6393. * clear sta table, add BCAST sta... */
  6394. }
  6395. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6396. struct ieee80211_vif *vif,
  6397. struct ieee80211_if_conf *conf)
  6398. {
  6399. struct iwl4965_priv *priv = hw->priv;
  6400. DECLARE_MAC_BUF(mac);
  6401. unsigned long flags;
  6402. int rc;
  6403. if (conf == NULL)
  6404. return -EIO;
  6405. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6406. (!conf->beacon || !conf->ssid_len)) {
  6407. IWL_DEBUG_MAC80211
  6408. ("Leaving in AP mode because HostAPD is not ready.\n");
  6409. return 0;
  6410. }
  6411. if (!iwl4965_is_alive(priv))
  6412. return -EAGAIN;
  6413. mutex_lock(&priv->mutex);
  6414. if (conf->bssid)
  6415. IWL_DEBUG_MAC80211("bssid: %s\n",
  6416. print_mac(mac, conf->bssid));
  6417. /*
  6418. * very dubious code was here; the probe filtering flag is never set:
  6419. *
  6420. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6421. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6422. */
  6423. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6424. IWL_DEBUG_MAC80211("leave - scanning\n");
  6425. mutex_unlock(&priv->mutex);
  6426. return 0;
  6427. }
  6428. if (priv->vif != vif) {
  6429. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6430. mutex_unlock(&priv->mutex);
  6431. return 0;
  6432. }
  6433. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6434. if (!conf->bssid) {
  6435. conf->bssid = priv->mac_addr;
  6436. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6437. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6438. print_mac(mac, conf->bssid));
  6439. }
  6440. if (priv->ibss_beacon)
  6441. dev_kfree_skb(priv->ibss_beacon);
  6442. priv->ibss_beacon = conf->beacon;
  6443. }
  6444. if (iwl4965_is_rfkill(priv))
  6445. goto done;
  6446. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6447. !is_multicast_ether_addr(conf->bssid)) {
  6448. /* If there is currently a HW scan going on in the background
  6449. * then we need to cancel it else the RXON below will fail. */
  6450. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6451. IWL_WARNING("Aborted scan still in progress "
  6452. "after 100ms\n");
  6453. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6454. mutex_unlock(&priv->mutex);
  6455. return -EAGAIN;
  6456. }
  6457. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6458. /* TODO: Audit driver for usage of these members and see
  6459. * if mac80211 deprecates them (priv->bssid looks like it
  6460. * shouldn't be there, but I haven't scanned the IBSS code
  6461. * to verify) - jpk */
  6462. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6463. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6464. iwl4965_config_ap(priv);
  6465. else {
  6466. rc = iwl4965_commit_rxon(priv);
  6467. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6468. iwl4965_rxon_add_station(
  6469. priv, priv->active_rxon.bssid_addr, 1);
  6470. }
  6471. } else {
  6472. iwl4965_scan_cancel_timeout(priv, 100);
  6473. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6474. iwl4965_commit_rxon(priv);
  6475. }
  6476. done:
  6477. spin_lock_irqsave(&priv->lock, flags);
  6478. if (!conf->ssid_len)
  6479. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6480. else
  6481. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6482. priv->essid_len = conf->ssid_len;
  6483. spin_unlock_irqrestore(&priv->lock, flags);
  6484. IWL_DEBUG_MAC80211("leave\n");
  6485. mutex_unlock(&priv->mutex);
  6486. return 0;
  6487. }
  6488. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6489. unsigned int changed_flags,
  6490. unsigned int *total_flags,
  6491. int mc_count, struct dev_addr_list *mc_list)
  6492. {
  6493. /*
  6494. * XXX: dummy
  6495. * see also iwl4965_connection_init_rx_config
  6496. */
  6497. *total_flags = 0;
  6498. }
  6499. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6500. struct ieee80211_if_init_conf *conf)
  6501. {
  6502. struct iwl4965_priv *priv = hw->priv;
  6503. IWL_DEBUG_MAC80211("enter\n");
  6504. mutex_lock(&priv->mutex);
  6505. if (iwl4965_is_ready_rf(priv)) {
  6506. iwl4965_scan_cancel_timeout(priv, 100);
  6507. cancel_delayed_work(&priv->post_associate);
  6508. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6509. iwl4965_commit_rxon(priv);
  6510. }
  6511. if (priv->vif == conf->vif) {
  6512. priv->vif = NULL;
  6513. memset(priv->bssid, 0, ETH_ALEN);
  6514. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6515. priv->essid_len = 0;
  6516. }
  6517. mutex_unlock(&priv->mutex);
  6518. IWL_DEBUG_MAC80211("leave\n");
  6519. }
  6520. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6521. struct ieee80211_vif *vif,
  6522. struct ieee80211_bss_conf *bss_conf,
  6523. u32 changes)
  6524. {
  6525. struct iwl4965_priv *priv = hw->priv;
  6526. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6527. if (bss_conf->use_short_preamble)
  6528. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6529. else
  6530. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6531. }
  6532. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6533. if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
  6534. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6535. else
  6536. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6537. }
  6538. if (changes & BSS_CHANGED_ASSOC) {
  6539. /*
  6540. * TODO:
  6541. * do stuff instead of sniffing assoc resp
  6542. */
  6543. }
  6544. if (iwl4965_is_associated(priv))
  6545. iwl4965_send_rxon_assoc(priv);
  6546. }
  6547. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6548. {
  6549. int rc = 0;
  6550. unsigned long flags;
  6551. struct iwl4965_priv *priv = hw->priv;
  6552. IWL_DEBUG_MAC80211("enter\n");
  6553. mutex_lock(&priv->mutex);
  6554. spin_lock_irqsave(&priv->lock, flags);
  6555. if (!iwl4965_is_ready_rf(priv)) {
  6556. rc = -EIO;
  6557. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6558. goto out_unlock;
  6559. }
  6560. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6561. rc = -EIO;
  6562. IWL_ERROR("ERROR: APs don't scan\n");
  6563. goto out_unlock;
  6564. }
  6565. /* we don't schedule scan within next_scan_jiffies period */
  6566. if (priv->next_scan_jiffies &&
  6567. time_after(priv->next_scan_jiffies, jiffies)) {
  6568. rc = -EAGAIN;
  6569. goto out_unlock;
  6570. }
  6571. /* if we just finished scan ask for delay */
  6572. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6573. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6574. rc = -EAGAIN;
  6575. goto out_unlock;
  6576. }
  6577. if (len) {
  6578. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6579. iwl4965_escape_essid(ssid, len), (int)len);
  6580. priv->one_direct_scan = 1;
  6581. priv->direct_ssid_len = (u8)
  6582. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6583. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6584. } else
  6585. priv->one_direct_scan = 0;
  6586. rc = iwl4965_scan_initiate(priv);
  6587. IWL_DEBUG_MAC80211("leave\n");
  6588. out_unlock:
  6589. spin_unlock_irqrestore(&priv->lock, flags);
  6590. mutex_unlock(&priv->mutex);
  6591. return rc;
  6592. }
  6593. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6594. const u8 *local_addr, const u8 *addr,
  6595. struct ieee80211_key_conf *key)
  6596. {
  6597. struct iwl4965_priv *priv = hw->priv;
  6598. DECLARE_MAC_BUF(mac);
  6599. int rc = 0;
  6600. u8 sta_id;
  6601. IWL_DEBUG_MAC80211("enter\n");
  6602. if (!iwl4965_param_hwcrypto) {
  6603. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6604. return -EOPNOTSUPP;
  6605. }
  6606. if (is_zero_ether_addr(addr))
  6607. /* only support pairwise keys */
  6608. return -EOPNOTSUPP;
  6609. sta_id = iwl4965_hw_find_station(priv, addr);
  6610. if (sta_id == IWL_INVALID_STATION) {
  6611. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6612. print_mac(mac, addr));
  6613. return -EINVAL;
  6614. }
  6615. mutex_lock(&priv->mutex);
  6616. iwl4965_scan_cancel_timeout(priv, 100);
  6617. switch (cmd) {
  6618. case SET_KEY:
  6619. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6620. if (!rc) {
  6621. iwl4965_set_rxon_hwcrypto(priv, 1);
  6622. iwl4965_commit_rxon(priv);
  6623. key->hw_key_idx = sta_id;
  6624. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6625. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6626. }
  6627. break;
  6628. case DISABLE_KEY:
  6629. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6630. if (!rc) {
  6631. iwl4965_set_rxon_hwcrypto(priv, 0);
  6632. iwl4965_commit_rxon(priv);
  6633. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6634. }
  6635. break;
  6636. default:
  6637. rc = -EINVAL;
  6638. }
  6639. IWL_DEBUG_MAC80211("leave\n");
  6640. mutex_unlock(&priv->mutex);
  6641. return rc;
  6642. }
  6643. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6644. const struct ieee80211_tx_queue_params *params)
  6645. {
  6646. struct iwl4965_priv *priv = hw->priv;
  6647. #ifdef CONFIG_IWL4965_QOS
  6648. unsigned long flags;
  6649. int q;
  6650. #endif /* CONFIG_IWL4965_QOS */
  6651. IWL_DEBUG_MAC80211("enter\n");
  6652. if (!iwl4965_is_ready_rf(priv)) {
  6653. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6654. return -EIO;
  6655. }
  6656. if (queue >= AC_NUM) {
  6657. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6658. return 0;
  6659. }
  6660. #ifdef CONFIG_IWL4965_QOS
  6661. if (!priv->qos_data.qos_enable) {
  6662. priv->qos_data.qos_active = 0;
  6663. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6664. return 0;
  6665. }
  6666. q = AC_NUM - 1 - queue;
  6667. spin_lock_irqsave(&priv->lock, flags);
  6668. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6669. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6670. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6671. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6672. cpu_to_le16((params->burst_time * 100));
  6673. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6674. priv->qos_data.qos_active = 1;
  6675. spin_unlock_irqrestore(&priv->lock, flags);
  6676. mutex_lock(&priv->mutex);
  6677. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6678. iwl4965_activate_qos(priv, 1);
  6679. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6680. iwl4965_activate_qos(priv, 0);
  6681. mutex_unlock(&priv->mutex);
  6682. #endif /*CONFIG_IWL4965_QOS */
  6683. IWL_DEBUG_MAC80211("leave\n");
  6684. return 0;
  6685. }
  6686. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6687. struct ieee80211_tx_queue_stats *stats)
  6688. {
  6689. struct iwl4965_priv *priv = hw->priv;
  6690. int i, avail;
  6691. struct iwl4965_tx_queue *txq;
  6692. struct iwl4965_queue *q;
  6693. unsigned long flags;
  6694. IWL_DEBUG_MAC80211("enter\n");
  6695. if (!iwl4965_is_ready_rf(priv)) {
  6696. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6697. return -EIO;
  6698. }
  6699. spin_lock_irqsave(&priv->lock, flags);
  6700. for (i = 0; i < AC_NUM; i++) {
  6701. txq = &priv->txq[i];
  6702. q = &txq->q;
  6703. avail = iwl4965_queue_space(q);
  6704. stats->data[i].len = q->n_window - avail;
  6705. stats->data[i].limit = q->n_window - q->high_mark;
  6706. stats->data[i].count = q->n_window;
  6707. }
  6708. spin_unlock_irqrestore(&priv->lock, flags);
  6709. IWL_DEBUG_MAC80211("leave\n");
  6710. return 0;
  6711. }
  6712. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6713. struct ieee80211_low_level_stats *stats)
  6714. {
  6715. IWL_DEBUG_MAC80211("enter\n");
  6716. IWL_DEBUG_MAC80211("leave\n");
  6717. return 0;
  6718. }
  6719. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6720. {
  6721. IWL_DEBUG_MAC80211("enter\n");
  6722. IWL_DEBUG_MAC80211("leave\n");
  6723. return 0;
  6724. }
  6725. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6726. {
  6727. struct iwl4965_priv *priv = hw->priv;
  6728. unsigned long flags;
  6729. mutex_lock(&priv->mutex);
  6730. IWL_DEBUG_MAC80211("enter\n");
  6731. priv->lq_mngr.lq_ready = 0;
  6732. #ifdef CONFIG_IWL4965_HT
  6733. spin_lock_irqsave(&priv->lock, flags);
  6734. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6735. spin_unlock_irqrestore(&priv->lock, flags);
  6736. #ifdef CONFIG_IWL4965_HT_AGG
  6737. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6738. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6739. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
  6740. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6741. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6742. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6743. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6744. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6745. #endif /*CONFIG_IWL4965_HT_AGG */
  6746. #endif /* CONFIG_IWL4965_HT */
  6747. #ifdef CONFIG_IWL4965_QOS
  6748. iwl4965_reset_qos(priv);
  6749. #endif
  6750. cancel_delayed_work(&priv->post_associate);
  6751. spin_lock_irqsave(&priv->lock, flags);
  6752. priv->assoc_id = 0;
  6753. priv->assoc_capability = 0;
  6754. priv->call_post_assoc_from_beacon = 0;
  6755. priv->assoc_station_added = 0;
  6756. /* new association get rid of ibss beacon skb */
  6757. if (priv->ibss_beacon)
  6758. dev_kfree_skb(priv->ibss_beacon);
  6759. priv->ibss_beacon = NULL;
  6760. priv->beacon_int = priv->hw->conf.beacon_int;
  6761. priv->timestamp1 = 0;
  6762. priv->timestamp0 = 0;
  6763. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6764. priv->beacon_int = 0;
  6765. spin_unlock_irqrestore(&priv->lock, flags);
  6766. if (!iwl4965_is_ready_rf(priv)) {
  6767. IWL_DEBUG_MAC80211("leave - not ready\n");
  6768. mutex_unlock(&priv->mutex);
  6769. return;
  6770. }
  6771. /* we are restarting association process
  6772. * clear RXON_FILTER_ASSOC_MSK bit
  6773. */
  6774. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6775. iwl4965_scan_cancel_timeout(priv, 100);
  6776. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6777. iwl4965_commit_rxon(priv);
  6778. }
  6779. /* Per mac80211.h: This is only used in IBSS mode... */
  6780. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6781. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6782. mutex_unlock(&priv->mutex);
  6783. return;
  6784. }
  6785. priv->only_active_channel = 0;
  6786. iwl4965_set_rate(priv);
  6787. mutex_unlock(&priv->mutex);
  6788. IWL_DEBUG_MAC80211("leave\n");
  6789. }
  6790. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6791. struct ieee80211_tx_control *control)
  6792. {
  6793. struct iwl4965_priv *priv = hw->priv;
  6794. unsigned long flags;
  6795. mutex_lock(&priv->mutex);
  6796. IWL_DEBUG_MAC80211("enter\n");
  6797. if (!iwl4965_is_ready_rf(priv)) {
  6798. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6799. mutex_unlock(&priv->mutex);
  6800. return -EIO;
  6801. }
  6802. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6803. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6804. mutex_unlock(&priv->mutex);
  6805. return -EIO;
  6806. }
  6807. spin_lock_irqsave(&priv->lock, flags);
  6808. if (priv->ibss_beacon)
  6809. dev_kfree_skb(priv->ibss_beacon);
  6810. priv->ibss_beacon = skb;
  6811. priv->assoc_id = 0;
  6812. IWL_DEBUG_MAC80211("leave\n");
  6813. spin_unlock_irqrestore(&priv->lock, flags);
  6814. #ifdef CONFIG_IWL4965_QOS
  6815. iwl4965_reset_qos(priv);
  6816. #endif
  6817. queue_work(priv->workqueue, &priv->post_associate.work);
  6818. mutex_unlock(&priv->mutex);
  6819. return 0;
  6820. }
  6821. #ifdef CONFIG_IWL4965_HT
  6822. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6823. struct iwl4965_priv *priv)
  6824. {
  6825. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6826. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6827. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6828. IWL_DEBUG_MAC80211("enter: \n");
  6829. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6830. iwl_conf->is_ht = 0;
  6831. return;
  6832. }
  6833. iwl_conf->is_ht = 1;
  6834. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6835. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6836. iwl_conf->sgf |= 0x1;
  6837. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6838. iwl_conf->sgf |= 0x2;
  6839. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6840. iwl_conf->max_amsdu_size =
  6841. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6842. iwl_conf->supported_chan_width =
  6843. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6844. iwl_conf->tx_mimo_ps_mode =
  6845. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6846. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6847. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6848. iwl_conf->extension_chan_offset =
  6849. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6850. iwl_conf->tx_chan_width =
  6851. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6852. iwl_conf->ht_protection =
  6853. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6854. iwl_conf->non_GF_STA_present =
  6855. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6856. IWL_DEBUG_MAC80211("control channel %d\n",
  6857. iwl_conf->control_channel);
  6858. IWL_DEBUG_MAC80211("leave\n");
  6859. }
  6860. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6861. struct ieee80211_conf *conf)
  6862. {
  6863. struct iwl4965_priv *priv = hw->priv;
  6864. IWL_DEBUG_MAC80211("enter: \n");
  6865. iwl4965_ht_info_fill(conf, priv);
  6866. iwl4965_set_rxon_chain(priv);
  6867. if (priv && priv->assoc_id &&
  6868. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6869. unsigned long flags;
  6870. spin_lock_irqsave(&priv->lock, flags);
  6871. if (priv->beacon_int)
  6872. queue_work(priv->workqueue, &priv->post_associate.work);
  6873. else
  6874. priv->call_post_assoc_from_beacon = 1;
  6875. spin_unlock_irqrestore(&priv->lock, flags);
  6876. }
  6877. IWL_DEBUG_MAC80211("leave:\n");
  6878. return 0;
  6879. }
  6880. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6881. struct ieee80211_ht_cap *ht_cap,
  6882. u8 use_current_config)
  6883. {
  6884. struct ieee80211_conf *conf = &hw->conf;
  6885. struct ieee80211_hw_mode *mode = conf->mode;
  6886. if (use_current_config) {
  6887. ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
  6888. memcpy(ht_cap->supp_mcs_set,
  6889. conf->ht_conf.supp_mcs_set, 16);
  6890. } else {
  6891. ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
  6892. memcpy(ht_cap->supp_mcs_set,
  6893. mode->ht_info.supp_mcs_set, 16);
  6894. }
  6895. ht_cap->ampdu_params_info =
  6896. (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
  6897. ((mode->ht_info.ampdu_density << 2) &
  6898. IEEE80211_HT_CAP_AMPDU_DENSITY);
  6899. }
  6900. #endif /*CONFIG_IWL4965_HT*/
  6901. /*****************************************************************************
  6902. *
  6903. * sysfs attributes
  6904. *
  6905. *****************************************************************************/
  6906. #ifdef CONFIG_IWL4965_DEBUG
  6907. /*
  6908. * The following adds a new attribute to the sysfs representation
  6909. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6910. * used for controlling the debug level.
  6911. *
  6912. * See the level definitions in iwl for details.
  6913. */
  6914. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6915. {
  6916. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6917. }
  6918. static ssize_t store_debug_level(struct device_driver *d,
  6919. const char *buf, size_t count)
  6920. {
  6921. char *p = (char *)buf;
  6922. u32 val;
  6923. val = simple_strtoul(p, &p, 0);
  6924. if (p == buf)
  6925. printk(KERN_INFO DRV_NAME
  6926. ": %s is not in hex or decimal form.\n", buf);
  6927. else
  6928. iwl4965_debug_level = val;
  6929. return strnlen(buf, count);
  6930. }
  6931. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6932. show_debug_level, store_debug_level);
  6933. #endif /* CONFIG_IWL4965_DEBUG */
  6934. static ssize_t show_rf_kill(struct device *d,
  6935. struct device_attribute *attr, char *buf)
  6936. {
  6937. /*
  6938. * 0 - RF kill not enabled
  6939. * 1 - SW based RF kill active (sysfs)
  6940. * 2 - HW based RF kill active
  6941. * 3 - Both HW and SW based RF kill active
  6942. */
  6943. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6944. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6945. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6946. return sprintf(buf, "%i\n", val);
  6947. }
  6948. static ssize_t store_rf_kill(struct device *d,
  6949. struct device_attribute *attr,
  6950. const char *buf, size_t count)
  6951. {
  6952. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6953. mutex_lock(&priv->mutex);
  6954. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6955. mutex_unlock(&priv->mutex);
  6956. return count;
  6957. }
  6958. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6959. static ssize_t show_temperature(struct device *d,
  6960. struct device_attribute *attr, char *buf)
  6961. {
  6962. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6963. if (!iwl4965_is_alive(priv))
  6964. return -EAGAIN;
  6965. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6966. }
  6967. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6968. static ssize_t show_rs_window(struct device *d,
  6969. struct device_attribute *attr,
  6970. char *buf)
  6971. {
  6972. struct iwl4965_priv *priv = d->driver_data;
  6973. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6974. }
  6975. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6976. static ssize_t show_tx_power(struct device *d,
  6977. struct device_attribute *attr, char *buf)
  6978. {
  6979. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6980. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6981. }
  6982. static ssize_t store_tx_power(struct device *d,
  6983. struct device_attribute *attr,
  6984. const char *buf, size_t count)
  6985. {
  6986. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6987. char *p = (char *)buf;
  6988. u32 val;
  6989. val = simple_strtoul(p, &p, 10);
  6990. if (p == buf)
  6991. printk(KERN_INFO DRV_NAME
  6992. ": %s is not in decimal form.\n", buf);
  6993. else
  6994. iwl4965_hw_reg_set_txpower(priv, val);
  6995. return count;
  6996. }
  6997. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6998. static ssize_t show_flags(struct device *d,
  6999. struct device_attribute *attr, char *buf)
  7000. {
  7001. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7002. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  7003. }
  7004. static ssize_t store_flags(struct device *d,
  7005. struct device_attribute *attr,
  7006. const char *buf, size_t count)
  7007. {
  7008. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7009. u32 flags = simple_strtoul(buf, NULL, 0);
  7010. mutex_lock(&priv->mutex);
  7011. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  7012. /* Cancel any currently running scans... */
  7013. if (iwl4965_scan_cancel_timeout(priv, 100))
  7014. IWL_WARNING("Could not cancel scan.\n");
  7015. else {
  7016. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  7017. flags);
  7018. priv->staging_rxon.flags = cpu_to_le32(flags);
  7019. iwl4965_commit_rxon(priv);
  7020. }
  7021. }
  7022. mutex_unlock(&priv->mutex);
  7023. return count;
  7024. }
  7025. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  7026. static ssize_t show_filter_flags(struct device *d,
  7027. struct device_attribute *attr, char *buf)
  7028. {
  7029. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7030. return sprintf(buf, "0x%04X\n",
  7031. le32_to_cpu(priv->active_rxon.filter_flags));
  7032. }
  7033. static ssize_t store_filter_flags(struct device *d,
  7034. struct device_attribute *attr,
  7035. const char *buf, size_t count)
  7036. {
  7037. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7038. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  7039. mutex_lock(&priv->mutex);
  7040. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  7041. /* Cancel any currently running scans... */
  7042. if (iwl4965_scan_cancel_timeout(priv, 100))
  7043. IWL_WARNING("Could not cancel scan.\n");
  7044. else {
  7045. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  7046. "0x%04X\n", filter_flags);
  7047. priv->staging_rxon.filter_flags =
  7048. cpu_to_le32(filter_flags);
  7049. iwl4965_commit_rxon(priv);
  7050. }
  7051. }
  7052. mutex_unlock(&priv->mutex);
  7053. return count;
  7054. }
  7055. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7056. store_filter_flags);
  7057. static ssize_t show_tune(struct device *d,
  7058. struct device_attribute *attr, char *buf)
  7059. {
  7060. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7061. return sprintf(buf, "0x%04X\n",
  7062. (priv->phymode << 8) |
  7063. le16_to_cpu(priv->active_rxon.channel));
  7064. }
  7065. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7066. static ssize_t store_tune(struct device *d,
  7067. struct device_attribute *attr,
  7068. const char *buf, size_t count)
  7069. {
  7070. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7071. char *p = (char *)buf;
  7072. u16 tune = simple_strtoul(p, &p, 0);
  7073. u8 phymode = (tune >> 8) & 0xff;
  7074. u16 channel = tune & 0xff;
  7075. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7076. mutex_lock(&priv->mutex);
  7077. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7078. (priv->phymode != phymode)) {
  7079. const struct iwl4965_channel_info *ch_info;
  7080. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7081. if (!ch_info) {
  7082. IWL_WARNING("Requested invalid phymode/channel "
  7083. "combination: %d %d\n", phymode, channel);
  7084. mutex_unlock(&priv->mutex);
  7085. return -EINVAL;
  7086. }
  7087. /* Cancel any currently running scans... */
  7088. if (iwl4965_scan_cancel_timeout(priv, 100))
  7089. IWL_WARNING("Could not cancel scan.\n");
  7090. else {
  7091. IWL_DEBUG_INFO("Committing phymode and "
  7092. "rxon.channel = %d %d\n",
  7093. phymode, channel);
  7094. iwl4965_set_rxon_channel(priv, phymode, channel);
  7095. iwl4965_set_flags_for_phymode(priv, phymode);
  7096. iwl4965_set_rate(priv);
  7097. iwl4965_commit_rxon(priv);
  7098. }
  7099. }
  7100. mutex_unlock(&priv->mutex);
  7101. return count;
  7102. }
  7103. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7104. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7105. static ssize_t show_measurement(struct device *d,
  7106. struct device_attribute *attr, char *buf)
  7107. {
  7108. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7109. struct iwl4965_spectrum_notification measure_report;
  7110. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7111. u8 *data = (u8 *) & measure_report;
  7112. unsigned long flags;
  7113. spin_lock_irqsave(&priv->lock, flags);
  7114. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7115. spin_unlock_irqrestore(&priv->lock, flags);
  7116. return 0;
  7117. }
  7118. memcpy(&measure_report, &priv->measure_report, size);
  7119. priv->measurement_status = 0;
  7120. spin_unlock_irqrestore(&priv->lock, flags);
  7121. while (size && (PAGE_SIZE - len)) {
  7122. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7123. PAGE_SIZE - len, 1);
  7124. len = strlen(buf);
  7125. if (PAGE_SIZE - len)
  7126. buf[len++] = '\n';
  7127. ofs += 16;
  7128. size -= min(size, 16U);
  7129. }
  7130. return len;
  7131. }
  7132. static ssize_t store_measurement(struct device *d,
  7133. struct device_attribute *attr,
  7134. const char *buf, size_t count)
  7135. {
  7136. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7137. struct ieee80211_measurement_params params = {
  7138. .channel = le16_to_cpu(priv->active_rxon.channel),
  7139. .start_time = cpu_to_le64(priv->last_tsf),
  7140. .duration = cpu_to_le16(1),
  7141. };
  7142. u8 type = IWL_MEASURE_BASIC;
  7143. u8 buffer[32];
  7144. u8 channel;
  7145. if (count) {
  7146. char *p = buffer;
  7147. strncpy(buffer, buf, min(sizeof(buffer), count));
  7148. channel = simple_strtoul(p, NULL, 0);
  7149. if (channel)
  7150. params.channel = channel;
  7151. p = buffer;
  7152. while (*p && *p != ' ')
  7153. p++;
  7154. if (*p)
  7155. type = simple_strtoul(p + 1, NULL, 0);
  7156. }
  7157. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7158. "channel %d (for '%s')\n", type, params.channel, buf);
  7159. iwl4965_get_measurement(priv, &params, type);
  7160. return count;
  7161. }
  7162. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7163. show_measurement, store_measurement);
  7164. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7165. static ssize_t store_retry_rate(struct device *d,
  7166. struct device_attribute *attr,
  7167. const char *buf, size_t count)
  7168. {
  7169. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7170. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7171. if (priv->retry_rate <= 0)
  7172. priv->retry_rate = 1;
  7173. return count;
  7174. }
  7175. static ssize_t show_retry_rate(struct device *d,
  7176. struct device_attribute *attr, char *buf)
  7177. {
  7178. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7179. return sprintf(buf, "%d", priv->retry_rate);
  7180. }
  7181. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7182. store_retry_rate);
  7183. static ssize_t store_power_level(struct device *d,
  7184. struct device_attribute *attr,
  7185. const char *buf, size_t count)
  7186. {
  7187. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7188. int rc;
  7189. int mode;
  7190. mode = simple_strtoul(buf, NULL, 0);
  7191. mutex_lock(&priv->mutex);
  7192. if (!iwl4965_is_ready(priv)) {
  7193. rc = -EAGAIN;
  7194. goto out;
  7195. }
  7196. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7197. mode = IWL_POWER_AC;
  7198. else
  7199. mode |= IWL_POWER_ENABLED;
  7200. if (mode != priv->power_mode) {
  7201. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7202. if (rc) {
  7203. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7204. goto out;
  7205. }
  7206. priv->power_mode = mode;
  7207. }
  7208. rc = count;
  7209. out:
  7210. mutex_unlock(&priv->mutex);
  7211. return rc;
  7212. }
  7213. #define MAX_WX_STRING 80
  7214. /* Values are in microsecond */
  7215. static const s32 timeout_duration[] = {
  7216. 350000,
  7217. 250000,
  7218. 75000,
  7219. 37000,
  7220. 25000,
  7221. };
  7222. static const s32 period_duration[] = {
  7223. 400000,
  7224. 700000,
  7225. 1000000,
  7226. 1000000,
  7227. 1000000
  7228. };
  7229. static ssize_t show_power_level(struct device *d,
  7230. struct device_attribute *attr, char *buf)
  7231. {
  7232. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7233. int level = IWL_POWER_LEVEL(priv->power_mode);
  7234. char *p = buf;
  7235. p += sprintf(p, "%d ", level);
  7236. switch (level) {
  7237. case IWL_POWER_MODE_CAM:
  7238. case IWL_POWER_AC:
  7239. p += sprintf(p, "(AC)");
  7240. break;
  7241. case IWL_POWER_BATTERY:
  7242. p += sprintf(p, "(BATTERY)");
  7243. break;
  7244. default:
  7245. p += sprintf(p,
  7246. "(Timeout %dms, Period %dms)",
  7247. timeout_duration[level - 1] / 1000,
  7248. period_duration[level - 1] / 1000);
  7249. }
  7250. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7251. p += sprintf(p, " OFF\n");
  7252. else
  7253. p += sprintf(p, " \n");
  7254. return (p - buf + 1);
  7255. }
  7256. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7257. store_power_level);
  7258. static ssize_t show_channels(struct device *d,
  7259. struct device_attribute *attr, char *buf)
  7260. {
  7261. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7262. int len = 0, i;
  7263. struct ieee80211_channel *channels = NULL;
  7264. const struct ieee80211_hw_mode *hw_mode = NULL;
  7265. int count = 0;
  7266. if (!iwl4965_is_ready(priv))
  7267. return -EAGAIN;
  7268. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7269. if (!hw_mode)
  7270. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7271. if (hw_mode) {
  7272. channels = hw_mode->channels;
  7273. count = hw_mode->num_channels;
  7274. }
  7275. len +=
  7276. sprintf(&buf[len],
  7277. "Displaying %d channels in 2.4GHz band "
  7278. "(802.11bg):\n", count);
  7279. for (i = 0; i < count; i++)
  7280. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7281. channels[i].chan,
  7282. channels[i].power_level,
  7283. channels[i].
  7284. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7285. " (IEEE 802.11h required)" : "",
  7286. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7287. || (channels[i].
  7288. flag &
  7289. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7290. ", IBSS",
  7291. channels[i].
  7292. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7293. "active/passive" : "passive only");
  7294. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7295. if (hw_mode) {
  7296. channels = hw_mode->channels;
  7297. count = hw_mode->num_channels;
  7298. } else {
  7299. channels = NULL;
  7300. count = 0;
  7301. }
  7302. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7303. "(802.11a):\n", count);
  7304. for (i = 0; i < count; i++)
  7305. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7306. channels[i].chan,
  7307. channels[i].power_level,
  7308. channels[i].
  7309. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7310. " (IEEE 802.11h required)" : "",
  7311. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7312. || (channels[i].
  7313. flag &
  7314. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7315. ", IBSS",
  7316. channels[i].
  7317. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7318. "active/passive" : "passive only");
  7319. return len;
  7320. }
  7321. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7322. static ssize_t show_statistics(struct device *d,
  7323. struct device_attribute *attr, char *buf)
  7324. {
  7325. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7326. u32 size = sizeof(struct iwl4965_notif_statistics);
  7327. u32 len = 0, ofs = 0;
  7328. u8 *data = (u8 *) & priv->statistics;
  7329. int rc = 0;
  7330. if (!iwl4965_is_alive(priv))
  7331. return -EAGAIN;
  7332. mutex_lock(&priv->mutex);
  7333. rc = iwl4965_send_statistics_request(priv);
  7334. mutex_unlock(&priv->mutex);
  7335. if (rc) {
  7336. len = sprintf(buf,
  7337. "Error sending statistics request: 0x%08X\n", rc);
  7338. return len;
  7339. }
  7340. while (size && (PAGE_SIZE - len)) {
  7341. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7342. PAGE_SIZE - len, 1);
  7343. len = strlen(buf);
  7344. if (PAGE_SIZE - len)
  7345. buf[len++] = '\n';
  7346. ofs += 16;
  7347. size -= min(size, 16U);
  7348. }
  7349. return len;
  7350. }
  7351. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7352. static ssize_t show_antenna(struct device *d,
  7353. struct device_attribute *attr, char *buf)
  7354. {
  7355. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7356. if (!iwl4965_is_alive(priv))
  7357. return -EAGAIN;
  7358. return sprintf(buf, "%d\n", priv->antenna);
  7359. }
  7360. static ssize_t store_antenna(struct device *d,
  7361. struct device_attribute *attr,
  7362. const char *buf, size_t count)
  7363. {
  7364. int ant;
  7365. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7366. if (count == 0)
  7367. return 0;
  7368. if (sscanf(buf, "%1i", &ant) != 1) {
  7369. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7370. return count;
  7371. }
  7372. if ((ant >= 0) && (ant <= 2)) {
  7373. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7374. priv->antenna = (enum iwl4965_antenna)ant;
  7375. } else
  7376. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7377. return count;
  7378. }
  7379. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7380. static ssize_t show_status(struct device *d,
  7381. struct device_attribute *attr, char *buf)
  7382. {
  7383. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7384. if (!iwl4965_is_alive(priv))
  7385. return -EAGAIN;
  7386. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7387. }
  7388. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7389. static ssize_t dump_error_log(struct device *d,
  7390. struct device_attribute *attr,
  7391. const char *buf, size_t count)
  7392. {
  7393. char *p = (char *)buf;
  7394. if (p[0] == '1')
  7395. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7396. return strnlen(buf, count);
  7397. }
  7398. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7399. static ssize_t dump_event_log(struct device *d,
  7400. struct device_attribute *attr,
  7401. const char *buf, size_t count)
  7402. {
  7403. char *p = (char *)buf;
  7404. if (p[0] == '1')
  7405. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7406. return strnlen(buf, count);
  7407. }
  7408. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7409. /*****************************************************************************
  7410. *
  7411. * driver setup and teardown
  7412. *
  7413. *****************************************************************************/
  7414. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7415. {
  7416. priv->workqueue = create_workqueue(DRV_NAME);
  7417. init_waitqueue_head(&priv->wait_command_queue);
  7418. INIT_WORK(&priv->up, iwl4965_bg_up);
  7419. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7420. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7421. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7422. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7423. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7424. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7425. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7426. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7427. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7428. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7429. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7430. iwl4965_hw_setup_deferred_work(priv);
  7431. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7432. iwl4965_irq_tasklet, (unsigned long)priv);
  7433. }
  7434. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7435. {
  7436. iwl4965_hw_cancel_deferred_work(priv);
  7437. cancel_delayed_work_sync(&priv->init_alive_start);
  7438. cancel_delayed_work(&priv->scan_check);
  7439. cancel_delayed_work(&priv->alive_start);
  7440. cancel_delayed_work(&priv->post_associate);
  7441. cancel_work_sync(&priv->beacon_update);
  7442. }
  7443. static struct attribute *iwl4965_sysfs_entries[] = {
  7444. &dev_attr_antenna.attr,
  7445. &dev_attr_channels.attr,
  7446. &dev_attr_dump_errors.attr,
  7447. &dev_attr_dump_events.attr,
  7448. &dev_attr_flags.attr,
  7449. &dev_attr_filter_flags.attr,
  7450. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7451. &dev_attr_measurement.attr,
  7452. #endif
  7453. &dev_attr_power_level.attr,
  7454. &dev_attr_retry_rate.attr,
  7455. &dev_attr_rf_kill.attr,
  7456. &dev_attr_rs_window.attr,
  7457. &dev_attr_statistics.attr,
  7458. &dev_attr_status.attr,
  7459. &dev_attr_temperature.attr,
  7460. &dev_attr_tune.attr,
  7461. &dev_attr_tx_power.attr,
  7462. NULL
  7463. };
  7464. static struct attribute_group iwl4965_attribute_group = {
  7465. .name = NULL, /* put in device directory */
  7466. .attrs = iwl4965_sysfs_entries,
  7467. };
  7468. static struct ieee80211_ops iwl4965_hw_ops = {
  7469. .tx = iwl4965_mac_tx,
  7470. .start = iwl4965_mac_start,
  7471. .stop = iwl4965_mac_stop,
  7472. .add_interface = iwl4965_mac_add_interface,
  7473. .remove_interface = iwl4965_mac_remove_interface,
  7474. .config = iwl4965_mac_config,
  7475. .config_interface = iwl4965_mac_config_interface,
  7476. .configure_filter = iwl4965_configure_filter,
  7477. .set_key = iwl4965_mac_set_key,
  7478. .get_stats = iwl4965_mac_get_stats,
  7479. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7480. .conf_tx = iwl4965_mac_conf_tx,
  7481. .get_tsf = iwl4965_mac_get_tsf,
  7482. .reset_tsf = iwl4965_mac_reset_tsf,
  7483. .beacon_update = iwl4965_mac_beacon_update,
  7484. .bss_info_changed = iwl4965_bss_info_changed,
  7485. #ifdef CONFIG_IWL4965_HT
  7486. .conf_ht = iwl4965_mac_conf_ht,
  7487. .ampdu_action = iwl4965_mac_ampdu_action,
  7488. #ifdef CONFIG_IWL4965_HT_AGG
  7489. .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
  7490. .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
  7491. #endif /* CONFIG_IWL4965_HT_AGG */
  7492. #endif /* CONFIG_IWL4965_HT */
  7493. .hw_scan = iwl4965_mac_hw_scan
  7494. };
  7495. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7496. {
  7497. int err = 0;
  7498. struct iwl4965_priv *priv;
  7499. struct ieee80211_hw *hw;
  7500. int i;
  7501. DECLARE_MAC_BUF(mac);
  7502. /* Disabling hardware scan means that mac80211 will perform scans
  7503. * "the hard way", rather than using device's scan. */
  7504. if (iwl4965_param_disable_hw_scan) {
  7505. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7506. iwl4965_hw_ops.hw_scan = NULL;
  7507. }
  7508. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7509. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7510. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7511. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7512. err = -EINVAL;
  7513. goto out;
  7514. }
  7515. /* mac80211 allocates memory for this device instance, including
  7516. * space for this driver's private structure */
  7517. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7518. if (hw == NULL) {
  7519. IWL_ERROR("Can not allocate network device\n");
  7520. err = -ENOMEM;
  7521. goto out;
  7522. }
  7523. SET_IEEE80211_DEV(hw, &pdev->dev);
  7524. hw->rate_control_algorithm = "iwl-4965-rs";
  7525. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7526. priv = hw->priv;
  7527. priv->hw = hw;
  7528. priv->pci_dev = pdev;
  7529. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7530. #ifdef CONFIG_IWL4965_DEBUG
  7531. iwl4965_debug_level = iwl4965_param_debug;
  7532. atomic_set(&priv->restrict_refcnt, 0);
  7533. #endif
  7534. priv->retry_rate = 1;
  7535. priv->ibss_beacon = NULL;
  7536. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7537. * the range of signal quality values that we'll provide.
  7538. * Negative values for level/noise indicate that we'll provide dBm.
  7539. * For WE, at least, non-0 values here *enable* display of values
  7540. * in app (iwconfig). */
  7541. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7542. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7543. hw->max_signal = 100; /* link quality indication (%) */
  7544. /* Tell mac80211 our Tx characteristics */
  7545. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7546. /* Default value; 4 EDCA QOS priorities */
  7547. hw->queues = 4;
  7548. #ifdef CONFIG_IWL4965_HT
  7549. #ifdef CONFIG_IWL4965_HT_AGG
  7550. /* Enhanced value; more queues, to support 11n aggregation */
  7551. hw->queues = 16;
  7552. #endif /* CONFIG_IWL4965_HT_AGG */
  7553. #endif /* CONFIG_IWL4965_HT */
  7554. spin_lock_init(&priv->lock);
  7555. spin_lock_init(&priv->power_data.lock);
  7556. spin_lock_init(&priv->sta_lock);
  7557. spin_lock_init(&priv->hcmd_lock);
  7558. spin_lock_init(&priv->lq_mngr.lock);
  7559. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7560. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7561. INIT_LIST_HEAD(&priv->free_frames);
  7562. mutex_init(&priv->mutex);
  7563. if (pci_enable_device(pdev)) {
  7564. err = -ENODEV;
  7565. goto out_ieee80211_free_hw;
  7566. }
  7567. pci_set_master(pdev);
  7568. /* Clear the driver's (not device's) station table */
  7569. iwl4965_clear_stations_table(priv);
  7570. priv->data_retry_limit = -1;
  7571. priv->ieee_channels = NULL;
  7572. priv->ieee_rates = NULL;
  7573. priv->phymode = -1;
  7574. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7575. if (!err)
  7576. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7577. if (err) {
  7578. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7579. goto out_pci_disable_device;
  7580. }
  7581. pci_set_drvdata(pdev, priv);
  7582. err = pci_request_regions(pdev, DRV_NAME);
  7583. if (err)
  7584. goto out_pci_disable_device;
  7585. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7586. * PCI Tx retries from interfering with C3 CPU state */
  7587. pci_write_config_byte(pdev, 0x41, 0x00);
  7588. priv->hw_base = pci_iomap(pdev, 0, 0);
  7589. if (!priv->hw_base) {
  7590. err = -ENODEV;
  7591. goto out_pci_release_regions;
  7592. }
  7593. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7594. (unsigned long long) pci_resource_len(pdev, 0));
  7595. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7596. /* Initialize module parameter values here */
  7597. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7598. if (iwl4965_param_disable) {
  7599. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7600. IWL_DEBUG_INFO("Radio disabled.\n");
  7601. }
  7602. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7603. priv->ps_mode = 0;
  7604. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7605. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7606. priv->ps_mode = IWL_MIMO_PS_NONE;
  7607. /* Choose which receivers/antennas to use */
  7608. iwl4965_set_rxon_chain(priv);
  7609. printk(KERN_INFO DRV_NAME
  7610. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7611. /* Device-specific setup */
  7612. if (iwl4965_hw_set_hw_setting(priv)) {
  7613. IWL_ERROR("failed to set hw settings\n");
  7614. goto out_iounmap;
  7615. }
  7616. #ifdef CONFIG_IWL4965_QOS
  7617. if (iwl4965_param_qos_enable)
  7618. priv->qos_data.qos_enable = 1;
  7619. iwl4965_reset_qos(priv);
  7620. priv->qos_data.qos_active = 0;
  7621. priv->qos_data.qos_cap.val = 0;
  7622. #endif /* CONFIG_IWL4965_QOS */
  7623. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7624. iwl4965_setup_deferred_work(priv);
  7625. iwl4965_setup_rx_handlers(priv);
  7626. priv->rates_mask = IWL_RATES_MASK;
  7627. /* If power management is turned on, default to AC mode */
  7628. priv->power_mode = IWL_POWER_AC;
  7629. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7630. iwl4965_disable_interrupts(priv);
  7631. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7632. if (err) {
  7633. IWL_ERROR("failed to create sysfs device attributes\n");
  7634. goto out_release_irq;
  7635. }
  7636. /* nic init */
  7637. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7638. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7639. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7640. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7641. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7642. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7643. if (err < 0) {
  7644. IWL_DEBUG_INFO("Failed to init the card\n");
  7645. goto out_remove_sysfs;
  7646. }
  7647. /* Read the EEPROM */
  7648. err = iwl4965_eeprom_init(priv);
  7649. if (err) {
  7650. IWL_ERROR("Unable to init EEPROM\n");
  7651. goto out_remove_sysfs;
  7652. }
  7653. /* MAC Address location in EEPROM same for 3945/4965 */
  7654. get_eeprom_mac(priv, priv->mac_addr);
  7655. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7656. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7657. err = iwl4965_init_channel_map(priv);
  7658. if (err) {
  7659. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7660. goto out_remove_sysfs;
  7661. }
  7662. err = iwl4965_init_geos(priv);
  7663. if (err) {
  7664. IWL_ERROR("initializing geos failed: %d\n", err);
  7665. goto out_free_channel_map;
  7666. }
  7667. iwl4965_reset_channel_flag(priv);
  7668. iwl4965_rate_control_register(priv->hw);
  7669. err = ieee80211_register_hw(priv->hw);
  7670. if (err) {
  7671. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7672. goto out_free_geos;
  7673. }
  7674. priv->hw->conf.beacon_int = 100;
  7675. priv->mac80211_registered = 1;
  7676. pci_save_state(pdev);
  7677. pci_disable_device(pdev);
  7678. return 0;
  7679. out_free_geos:
  7680. iwl4965_free_geos(priv);
  7681. out_free_channel_map:
  7682. iwl4965_free_channel_map(priv);
  7683. out_remove_sysfs:
  7684. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7685. out_release_irq:
  7686. destroy_workqueue(priv->workqueue);
  7687. priv->workqueue = NULL;
  7688. iwl4965_unset_hw_setting(priv);
  7689. out_iounmap:
  7690. pci_iounmap(pdev, priv->hw_base);
  7691. out_pci_release_regions:
  7692. pci_release_regions(pdev);
  7693. out_pci_disable_device:
  7694. pci_disable_device(pdev);
  7695. pci_set_drvdata(pdev, NULL);
  7696. out_ieee80211_free_hw:
  7697. ieee80211_free_hw(priv->hw);
  7698. out:
  7699. return err;
  7700. }
  7701. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7702. {
  7703. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7704. struct list_head *p, *q;
  7705. int i;
  7706. if (!priv)
  7707. return;
  7708. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7709. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7710. iwl4965_down(priv);
  7711. /* Free MAC hash list for ADHOC */
  7712. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7713. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7714. list_del(p);
  7715. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7716. }
  7717. }
  7718. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7719. iwl4965_dealloc_ucode_pci(priv);
  7720. if (priv->rxq.bd)
  7721. iwl4965_rx_queue_free(priv, &priv->rxq);
  7722. iwl4965_hw_txq_ctx_free(priv);
  7723. iwl4965_unset_hw_setting(priv);
  7724. iwl4965_clear_stations_table(priv);
  7725. if (priv->mac80211_registered) {
  7726. ieee80211_unregister_hw(priv->hw);
  7727. iwl4965_rate_control_unregister(priv->hw);
  7728. }
  7729. /*netif_stop_queue(dev); */
  7730. flush_workqueue(priv->workqueue);
  7731. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7732. * priv->workqueue... so we can't take down the workqueue
  7733. * until now... */
  7734. destroy_workqueue(priv->workqueue);
  7735. priv->workqueue = NULL;
  7736. pci_iounmap(pdev, priv->hw_base);
  7737. pci_release_regions(pdev);
  7738. pci_disable_device(pdev);
  7739. pci_set_drvdata(pdev, NULL);
  7740. iwl4965_free_channel_map(priv);
  7741. iwl4965_free_geos(priv);
  7742. if (priv->ibss_beacon)
  7743. dev_kfree_skb(priv->ibss_beacon);
  7744. ieee80211_free_hw(priv->hw);
  7745. }
  7746. #ifdef CONFIG_PM
  7747. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7748. {
  7749. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7750. if (priv->is_open) {
  7751. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7752. iwl4965_mac_stop(priv->hw);
  7753. priv->is_open = 1;
  7754. }
  7755. pci_set_power_state(pdev, PCI_D3hot);
  7756. return 0;
  7757. }
  7758. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7759. {
  7760. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7761. pci_set_power_state(pdev, PCI_D0);
  7762. if (priv->is_open)
  7763. iwl4965_mac_start(priv->hw);
  7764. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7765. return 0;
  7766. }
  7767. #endif /* CONFIG_PM */
  7768. /*****************************************************************************
  7769. *
  7770. * driver and module entry point
  7771. *
  7772. *****************************************************************************/
  7773. static struct pci_driver iwl4965_driver = {
  7774. .name = DRV_NAME,
  7775. .id_table = iwl4965_hw_card_ids,
  7776. .probe = iwl4965_pci_probe,
  7777. .remove = __devexit_p(iwl4965_pci_remove),
  7778. #ifdef CONFIG_PM
  7779. .suspend = iwl4965_pci_suspend,
  7780. .resume = iwl4965_pci_resume,
  7781. #endif
  7782. };
  7783. static int __init iwl4965_init(void)
  7784. {
  7785. int ret;
  7786. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7787. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7788. ret = pci_register_driver(&iwl4965_driver);
  7789. if (ret) {
  7790. IWL_ERROR("Unable to initialize PCI module\n");
  7791. return ret;
  7792. }
  7793. #ifdef CONFIG_IWL4965_DEBUG
  7794. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7795. if (ret) {
  7796. IWL_ERROR("Unable to create driver sysfs file\n");
  7797. pci_unregister_driver(&iwl4965_driver);
  7798. return ret;
  7799. }
  7800. #endif
  7801. return ret;
  7802. }
  7803. static void __exit iwl4965_exit(void)
  7804. {
  7805. #ifdef CONFIG_IWL4965_DEBUG
  7806. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7807. #endif
  7808. pci_unregister_driver(&iwl4965_driver);
  7809. }
  7810. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7811. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7812. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7813. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7814. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7815. MODULE_PARM_DESC(hwcrypto,
  7816. "using hardware crypto engine (default 0 [software])\n");
  7817. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7818. MODULE_PARM_DESC(debug, "debug output mask");
  7819. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7820. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7821. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7822. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7823. /* QoS */
  7824. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7825. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7826. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7827. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7828. module_exit(iwl4965_exit);
  7829. module_init(iwl4965_init);