qlcnic_ethtool.c 28 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/types.h>
  25. #include <linux/delay.h>
  26. #include <linux/pci.h>
  27. #include <linux/io.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/ethtool.h>
  30. #include "qlcnic.h"
  31. struct qlcnic_stats {
  32. char stat_string[ETH_GSTRING_LEN];
  33. int sizeof_stat;
  34. int stat_offset;
  35. };
  36. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  37. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  38. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  39. {"xmit_called",
  40. QLC_SIZEOF(stats.xmitcalled), QLC_OFF(stats.xmitcalled)},
  41. {"xmit_finished",
  42. QLC_SIZEOF(stats.xmitfinished), QLC_OFF(stats.xmitfinished)},
  43. {"rx_dropped",
  44. QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  45. {"tx_dropped",
  46. QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  47. {"csummed",
  48. QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  49. {"rx_pkts",
  50. QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  51. {"lro_pkts",
  52. QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  53. {"rx_bytes",
  54. QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  55. {"tx_bytes",
  56. QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  57. {"lrobytes",
  58. QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
  59. {"lso_frames",
  60. QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
  61. {"xmit_on",
  62. QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
  63. {"xmit_off",
  64. QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
  65. {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
  66. QLC_OFF(stats.skb_alloc_failure)},
  67. {"null rxbuf",
  68. QLC_SIZEOF(stats.null_rxbuf), QLC_OFF(stats.null_rxbuf)},
  69. {"rx dma map error", QLC_SIZEOF(stats.rx_dma_map_error),
  70. QLC_OFF(stats.rx_dma_map_error)},
  71. {"tx dma map error", QLC_SIZEOF(stats.tx_dma_map_error),
  72. QLC_OFF(stats.tx_dma_map_error)},
  73. };
  74. static const char qlcnic_device_gstrings_stats[][ETH_GSTRING_LEN] = {
  75. "rx unicast frames",
  76. "rx multicast frames",
  77. "rx broadcast frames",
  78. "rx dropped frames",
  79. "rx errors",
  80. "rx local frames",
  81. "rx numbytes",
  82. "tx unicast frames",
  83. "tx multicast frames",
  84. "tx broadcast frames",
  85. "tx dropped frames",
  86. "tx errors",
  87. "tx local frames",
  88. "tx numbytes",
  89. };
  90. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  91. #define QLCNIC_DEVICE_STATS_LEN ARRAY_SIZE(qlcnic_device_gstrings_stats)
  92. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  93. "Register_Test_on_offline",
  94. "Link_Test_on_offline",
  95. "Interrupt_Test_offline"
  96. };
  97. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  98. #define QLCNIC_RING_REGS_COUNT 20
  99. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  100. #define QLCNIC_MAX_EEPROM_LEN 1024
  101. static const u32 diag_registers[] = {
  102. CRB_CMDPEG_STATE,
  103. CRB_RCVPEG_STATE,
  104. CRB_XG_STATE_P3P,
  105. CRB_FW_CAPABILITIES_1,
  106. ISR_INT_STATE_REG,
  107. QLCNIC_CRB_DRV_ACTIVE,
  108. QLCNIC_CRB_DEV_STATE,
  109. QLCNIC_CRB_DRV_STATE,
  110. QLCNIC_CRB_DRV_SCRATCH,
  111. QLCNIC_CRB_DEV_PARTITION_INFO,
  112. QLCNIC_CRB_DRV_IDC_VER,
  113. QLCNIC_PEG_ALIVE_COUNTER,
  114. QLCNIC_PEG_HALT_STATUS1,
  115. QLCNIC_PEG_HALT_STATUS2,
  116. QLCNIC_CRB_PEG_NET_0+0x3c,
  117. QLCNIC_CRB_PEG_NET_1+0x3c,
  118. QLCNIC_CRB_PEG_NET_2+0x3c,
  119. QLCNIC_CRB_PEG_NET_4+0x3c,
  120. -1
  121. };
  122. #define QLCNIC_MGMT_API_VERSION 2
  123. #define QLCNIC_DEV_INFO_SIZE 1
  124. #define QLCNIC_ETHTOOL_REGS_VER 2
  125. static int qlcnic_get_regs_len(struct net_device *dev)
  126. {
  127. return sizeof(diag_registers) + QLCNIC_RING_REGS_LEN +
  128. QLCNIC_DEV_INFO_SIZE + 1;
  129. }
  130. static int qlcnic_get_eeprom_len(struct net_device *dev)
  131. {
  132. return QLCNIC_FLASH_TOTAL_SIZE;
  133. }
  134. static void
  135. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  136. {
  137. struct qlcnic_adapter *adapter = netdev_priv(dev);
  138. u32 fw_major, fw_minor, fw_build;
  139. fw_major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  140. fw_minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  141. fw_build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  142. sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
  143. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  144. strlcpy(drvinfo->driver, qlcnic_driver_name, 32);
  145. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID, 32);
  146. }
  147. static int
  148. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  149. {
  150. struct qlcnic_adapter *adapter = netdev_priv(dev);
  151. int check_sfp_module = 0;
  152. u16 pcifn = adapter->ahw.pci_func;
  153. /* read which mode */
  154. if (adapter->ahw.port_type == QLCNIC_GBE) {
  155. ecmd->supported = (SUPPORTED_10baseT_Half |
  156. SUPPORTED_10baseT_Full |
  157. SUPPORTED_100baseT_Half |
  158. SUPPORTED_100baseT_Full |
  159. SUPPORTED_1000baseT_Half |
  160. SUPPORTED_1000baseT_Full);
  161. ecmd->advertising = (ADVERTISED_100baseT_Half |
  162. ADVERTISED_100baseT_Full |
  163. ADVERTISED_1000baseT_Half |
  164. ADVERTISED_1000baseT_Full);
  165. ecmd->speed = adapter->link_speed;
  166. ecmd->duplex = adapter->link_duplex;
  167. ecmd->autoneg = adapter->link_autoneg;
  168. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  169. u32 val;
  170. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  171. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  172. ecmd->supported = SUPPORTED_1000baseT_Full;
  173. ecmd->advertising = ADVERTISED_1000baseT_Full;
  174. } else {
  175. ecmd->supported = SUPPORTED_10000baseT_Full;
  176. ecmd->advertising = ADVERTISED_10000baseT_Full;
  177. }
  178. if (netif_running(dev) && adapter->has_link_events) {
  179. ecmd->speed = adapter->link_speed;
  180. ecmd->autoneg = adapter->link_autoneg;
  181. ecmd->duplex = adapter->link_duplex;
  182. goto skip;
  183. }
  184. val = QLCRD32(adapter, P3P_LINK_SPEED_REG(pcifn));
  185. ecmd->speed = P3P_LINK_SPEED_MHZ *
  186. P3P_LINK_SPEED_VAL(pcifn, val);
  187. ecmd->duplex = DUPLEX_FULL;
  188. ecmd->autoneg = AUTONEG_DISABLE;
  189. } else
  190. return -EIO;
  191. skip:
  192. ecmd->phy_address = adapter->physical_port;
  193. ecmd->transceiver = XCVR_EXTERNAL;
  194. switch (adapter->ahw.board_type) {
  195. case QLCNIC_BRDTYPE_P3P_REF_QG:
  196. case QLCNIC_BRDTYPE_P3P_4_GB:
  197. case QLCNIC_BRDTYPE_P3P_4_GB_MM:
  198. ecmd->supported |= SUPPORTED_Autoneg;
  199. ecmd->advertising |= ADVERTISED_Autoneg;
  200. case QLCNIC_BRDTYPE_P3P_10G_CX4:
  201. case QLCNIC_BRDTYPE_P3P_10G_CX4_LP:
  202. case QLCNIC_BRDTYPE_P3P_10000_BASE_T:
  203. ecmd->supported |= SUPPORTED_TP;
  204. ecmd->advertising |= ADVERTISED_TP;
  205. ecmd->port = PORT_TP;
  206. ecmd->autoneg = adapter->link_autoneg;
  207. break;
  208. case QLCNIC_BRDTYPE_P3P_IMEZ:
  209. case QLCNIC_BRDTYPE_P3P_XG_LOM:
  210. case QLCNIC_BRDTYPE_P3P_HMEZ:
  211. ecmd->supported |= SUPPORTED_MII;
  212. ecmd->advertising |= ADVERTISED_MII;
  213. ecmd->port = PORT_MII;
  214. ecmd->autoneg = AUTONEG_DISABLE;
  215. break;
  216. case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS:
  217. case QLCNIC_BRDTYPE_P3P_10G_SFP_CT:
  218. case QLCNIC_BRDTYPE_P3P_10G_SFP_QT:
  219. ecmd->advertising |= ADVERTISED_TP;
  220. ecmd->supported |= SUPPORTED_TP;
  221. check_sfp_module = netif_running(dev) &&
  222. adapter->has_link_events;
  223. case QLCNIC_BRDTYPE_P3P_10G_XFP:
  224. ecmd->supported |= SUPPORTED_FIBRE;
  225. ecmd->advertising |= ADVERTISED_FIBRE;
  226. ecmd->port = PORT_FIBRE;
  227. ecmd->autoneg = AUTONEG_DISABLE;
  228. break;
  229. case QLCNIC_BRDTYPE_P3P_10G_TP:
  230. if (adapter->ahw.port_type == QLCNIC_XGBE) {
  231. ecmd->autoneg = AUTONEG_DISABLE;
  232. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  233. ecmd->advertising |=
  234. (ADVERTISED_FIBRE | ADVERTISED_TP);
  235. ecmd->port = PORT_FIBRE;
  236. check_sfp_module = netif_running(dev) &&
  237. adapter->has_link_events;
  238. } else {
  239. ecmd->autoneg = AUTONEG_ENABLE;
  240. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  241. ecmd->advertising |=
  242. (ADVERTISED_TP | ADVERTISED_Autoneg);
  243. ecmd->port = PORT_TP;
  244. }
  245. break;
  246. default:
  247. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  248. adapter->ahw.board_type);
  249. return -EIO;
  250. }
  251. if (check_sfp_module) {
  252. switch (adapter->module_type) {
  253. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  254. case LINKEVENT_MODULE_OPTICAL_SRLR:
  255. case LINKEVENT_MODULE_OPTICAL_LRM:
  256. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  257. ecmd->port = PORT_FIBRE;
  258. break;
  259. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  260. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  261. case LINKEVENT_MODULE_TWINAX:
  262. ecmd->port = PORT_TP;
  263. break;
  264. default:
  265. ecmd->port = PORT_OTHER;
  266. }
  267. }
  268. return 0;
  269. }
  270. static int
  271. qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  272. {
  273. struct qlcnic_adapter *adapter = netdev_priv(dev);
  274. __u32 status;
  275. /* read which mode */
  276. if (adapter->ahw.port_type == QLCNIC_GBE) {
  277. /* autonegotiation */
  278. if (qlcnic_fw_cmd_set_phy(adapter,
  279. QLCNIC_NIU_GB_MII_MGMT_ADDR_AUTONEG,
  280. ecmd->autoneg) != 0)
  281. return -EIO;
  282. else
  283. adapter->link_autoneg = ecmd->autoneg;
  284. if (qlcnic_fw_cmd_query_phy(adapter,
  285. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  286. &status) != 0)
  287. return -EIO;
  288. switch (ecmd->speed) {
  289. case SPEED_10:
  290. qlcnic_set_phy_speed(status, 0);
  291. break;
  292. case SPEED_100:
  293. qlcnic_set_phy_speed(status, 1);
  294. break;
  295. case SPEED_1000:
  296. qlcnic_set_phy_speed(status, 2);
  297. break;
  298. }
  299. if (ecmd->duplex == DUPLEX_HALF)
  300. qlcnic_clear_phy_duplex(status);
  301. if (ecmd->duplex == DUPLEX_FULL)
  302. qlcnic_set_phy_duplex(status);
  303. if (qlcnic_fw_cmd_set_phy(adapter,
  304. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  305. *((int *)&status)) != 0)
  306. return -EIO;
  307. else {
  308. adapter->link_speed = ecmd->speed;
  309. adapter->link_duplex = ecmd->duplex;
  310. }
  311. } else
  312. return -EOPNOTSUPP;
  313. if (!netif_running(dev))
  314. return 0;
  315. dev->netdev_ops->ndo_stop(dev);
  316. return dev->netdev_ops->ndo_open(dev);
  317. }
  318. static void
  319. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  320. {
  321. struct qlcnic_adapter *adapter = netdev_priv(dev);
  322. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  323. struct qlcnic_host_sds_ring *sds_ring;
  324. u32 *regs_buff = p;
  325. int ring, i = 0, j = 0;
  326. memset(p, 0, qlcnic_get_regs_len(dev));
  327. regs->version = (QLCNIC_ETHTOOL_REGS_VER << 24) |
  328. (adapter->ahw.revision_id << 16) | (adapter->pdev)->device;
  329. regs_buff[0] = (0xcafe0000 | (QLCNIC_DEV_INFO_SIZE & 0xffff));
  330. regs_buff[1] = QLCNIC_MGMT_API_VERSION;
  331. for (i = QLCNIC_DEV_INFO_SIZE + 1; diag_registers[j] != -1; j++, i++)
  332. regs_buff[i] = QLCRD32(adapter, diag_registers[j]);
  333. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  334. return;
  335. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  336. regs_buff[i++] = 1; /* No. of tx ring */
  337. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  338. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  339. regs_buff[i++] = 2; /* No. of rx ring */
  340. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  341. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  342. regs_buff[i++] = adapter->max_sds_rings;
  343. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  344. sds_ring = &(recv_ctx->sds_rings[ring]);
  345. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  346. }
  347. }
  348. static u32 qlcnic_test_link(struct net_device *dev)
  349. {
  350. struct qlcnic_adapter *adapter = netdev_priv(dev);
  351. u32 val;
  352. val = QLCRD32(adapter, CRB_XG_STATE_P3P);
  353. val = XG_LINK_STATE_P3P(adapter->ahw.pci_func, val);
  354. return (val == XG_LINK_UP_P3P) ? 0 : 1;
  355. }
  356. static int
  357. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  358. u8 *bytes)
  359. {
  360. struct qlcnic_adapter *adapter = netdev_priv(dev);
  361. int offset;
  362. int ret;
  363. if (eeprom->len == 0)
  364. return -EINVAL;
  365. eeprom->magic = (adapter->pdev)->vendor |
  366. ((adapter->pdev)->device << 16);
  367. offset = eeprom->offset;
  368. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  369. eeprom->len);
  370. if (ret < 0)
  371. return ret;
  372. return 0;
  373. }
  374. static void
  375. qlcnic_get_ringparam(struct net_device *dev,
  376. struct ethtool_ringparam *ring)
  377. {
  378. struct qlcnic_adapter *adapter = netdev_priv(dev);
  379. ring->rx_pending = adapter->num_rxd;
  380. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  381. ring->tx_pending = adapter->num_txd;
  382. ring->rx_max_pending = adapter->max_rxd;
  383. ring->rx_jumbo_max_pending = adapter->max_jumbo_rxd;
  384. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  385. ring->rx_mini_max_pending = 0;
  386. ring->rx_mini_pending = 0;
  387. }
  388. static u32
  389. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  390. {
  391. u32 num_desc;
  392. num_desc = max(val, min);
  393. num_desc = min(num_desc, max);
  394. num_desc = roundup_pow_of_two(num_desc);
  395. if (val != num_desc) {
  396. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  397. qlcnic_driver_name, r_name, num_desc, val);
  398. }
  399. return num_desc;
  400. }
  401. static int
  402. qlcnic_set_ringparam(struct net_device *dev,
  403. struct ethtool_ringparam *ring)
  404. {
  405. struct qlcnic_adapter *adapter = netdev_priv(dev);
  406. u16 num_rxd, num_jumbo_rxd, num_txd;
  407. if (ring->rx_mini_pending)
  408. return -EOPNOTSUPP;
  409. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  410. MIN_RCV_DESCRIPTORS, adapter->max_rxd, "rx");
  411. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  412. MIN_JUMBO_DESCRIPTORS, adapter->max_jumbo_rxd,
  413. "rx jumbo");
  414. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  415. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  416. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  417. num_jumbo_rxd == adapter->num_jumbo_rxd)
  418. return 0;
  419. adapter->num_rxd = num_rxd;
  420. adapter->num_jumbo_rxd = num_jumbo_rxd;
  421. adapter->num_txd = num_txd;
  422. return qlcnic_reset_context(adapter);
  423. }
  424. static void
  425. qlcnic_get_pauseparam(struct net_device *netdev,
  426. struct ethtool_pauseparam *pause)
  427. {
  428. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  429. int port = adapter->physical_port;
  430. __u32 val;
  431. if (adapter->ahw.port_type == QLCNIC_GBE) {
  432. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  433. return;
  434. /* get flow control settings */
  435. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  436. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  437. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  438. switch (port) {
  439. case 0:
  440. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  441. break;
  442. case 1:
  443. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  444. break;
  445. case 2:
  446. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  447. break;
  448. case 3:
  449. default:
  450. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  451. break;
  452. }
  453. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  454. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  455. return;
  456. pause->rx_pause = 1;
  457. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  458. if (port == 0)
  459. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  460. else
  461. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  462. } else {
  463. dev_err(&netdev->dev, "Unknown board type: %x\n",
  464. adapter->ahw.port_type);
  465. }
  466. }
  467. static int
  468. qlcnic_set_pauseparam(struct net_device *netdev,
  469. struct ethtool_pauseparam *pause)
  470. {
  471. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  472. int port = adapter->physical_port;
  473. __u32 val;
  474. /* read mode */
  475. if (adapter->ahw.port_type == QLCNIC_GBE) {
  476. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  477. return -EIO;
  478. /* set flow control */
  479. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  480. if (pause->rx_pause)
  481. qlcnic_gb_rx_flowctl(val);
  482. else
  483. qlcnic_gb_unset_rx_flowctl(val);
  484. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  485. val);
  486. /* set autoneg */
  487. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  488. switch (port) {
  489. case 0:
  490. if (pause->tx_pause)
  491. qlcnic_gb_unset_gb0_mask(val);
  492. else
  493. qlcnic_gb_set_gb0_mask(val);
  494. break;
  495. case 1:
  496. if (pause->tx_pause)
  497. qlcnic_gb_unset_gb1_mask(val);
  498. else
  499. qlcnic_gb_set_gb1_mask(val);
  500. break;
  501. case 2:
  502. if (pause->tx_pause)
  503. qlcnic_gb_unset_gb2_mask(val);
  504. else
  505. qlcnic_gb_set_gb2_mask(val);
  506. break;
  507. case 3:
  508. default:
  509. if (pause->tx_pause)
  510. qlcnic_gb_unset_gb3_mask(val);
  511. else
  512. qlcnic_gb_set_gb3_mask(val);
  513. break;
  514. }
  515. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  516. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  517. if (!pause->rx_pause || pause->autoneg)
  518. return -EOPNOTSUPP;
  519. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  520. return -EIO;
  521. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  522. if (port == 0) {
  523. if (pause->tx_pause)
  524. qlcnic_xg_unset_xg0_mask(val);
  525. else
  526. qlcnic_xg_set_xg0_mask(val);
  527. } else {
  528. if (pause->tx_pause)
  529. qlcnic_xg_unset_xg1_mask(val);
  530. else
  531. qlcnic_xg_set_xg1_mask(val);
  532. }
  533. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  534. } else {
  535. dev_err(&netdev->dev, "Unknown board type: %x\n",
  536. adapter->ahw.port_type);
  537. }
  538. return 0;
  539. }
  540. static int qlcnic_reg_test(struct net_device *dev)
  541. {
  542. struct qlcnic_adapter *adapter = netdev_priv(dev);
  543. u32 data_read;
  544. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  545. if ((data_read & 0xffff) != adapter->pdev->vendor)
  546. return 1;
  547. return 0;
  548. }
  549. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  550. {
  551. struct qlcnic_adapter *adapter = netdev_priv(dev);
  552. switch (sset) {
  553. case ETH_SS_TEST:
  554. return QLCNIC_TEST_LEN;
  555. case ETH_SS_STATS:
  556. if (adapter->flags & QLCNIC_ESWITCH_ENABLED)
  557. return QLCNIC_STATS_LEN + QLCNIC_DEVICE_STATS_LEN;
  558. return QLCNIC_STATS_LEN;
  559. default:
  560. return -EOPNOTSUPP;
  561. }
  562. }
  563. static int qlcnic_irq_test(struct net_device *netdev)
  564. {
  565. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  566. int max_sds_rings = adapter->max_sds_rings;
  567. int ret;
  568. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  569. return -EIO;
  570. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST);
  571. if (ret)
  572. goto clear_it;
  573. adapter->diag_cnt = 0;
  574. ret = qlcnic_issue_cmd(adapter, adapter->ahw.pci_func,
  575. adapter->fw_hal_version, adapter->portnum,
  576. 0, 0, 0x00000011);
  577. if (ret)
  578. goto done;
  579. msleep(10);
  580. ret = !adapter->diag_cnt;
  581. done:
  582. qlcnic_diag_free_res(netdev, max_sds_rings);
  583. clear_it:
  584. adapter->max_sds_rings = max_sds_rings;
  585. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  586. return ret;
  587. }
  588. static void
  589. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  590. u64 *data)
  591. {
  592. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  593. data[0] = qlcnic_reg_test(dev);
  594. if (data[0])
  595. eth_test->flags |= ETH_TEST_FL_FAILED;
  596. data[1] = (u64) qlcnic_test_link(dev);
  597. if (data[1])
  598. eth_test->flags |= ETH_TEST_FL_FAILED;
  599. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  600. data[2] = qlcnic_irq_test(dev);
  601. if (data[2])
  602. eth_test->flags |= ETH_TEST_FL_FAILED;
  603. }
  604. }
  605. static void
  606. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)
  607. {
  608. struct qlcnic_adapter *adapter = netdev_priv(dev);
  609. int index, i;
  610. switch (stringset) {
  611. case ETH_SS_TEST:
  612. memcpy(data, *qlcnic_gstrings_test,
  613. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  614. break;
  615. case ETH_SS_STATS:
  616. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  617. memcpy(data + index * ETH_GSTRING_LEN,
  618. qlcnic_gstrings_stats[index].stat_string,
  619. ETH_GSTRING_LEN);
  620. }
  621. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  622. return;
  623. for (i = 0; i < QLCNIC_DEVICE_STATS_LEN; index++, i++) {
  624. memcpy(data + index * ETH_GSTRING_LEN,
  625. qlcnic_device_gstrings_stats[i],
  626. ETH_GSTRING_LEN);
  627. }
  628. }
  629. }
  630. #define QLCNIC_FILL_ESWITCH_STATS(VAL1) \
  631. (((VAL1) == QLCNIC_ESW_STATS_NOT_AVAIL) ? 0 : VAL1)
  632. static void
  633. qlcnic_fill_device_stats(int *index, u64 *data,
  634. struct __qlcnic_esw_statistics *stats)
  635. {
  636. int ind = *index;
  637. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->unicast_frames);
  638. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->multicast_frames);
  639. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->broadcast_frames);
  640. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->dropped_frames);
  641. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->errors);
  642. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->local_frames);
  643. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->numbytes);
  644. *index = ind;
  645. }
  646. static void
  647. qlcnic_get_ethtool_stats(struct net_device *dev,
  648. struct ethtool_stats *stats, u64 * data)
  649. {
  650. struct qlcnic_adapter *adapter = netdev_priv(dev);
  651. struct qlcnic_esw_statistics port_stats;
  652. int index, ret;
  653. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  654. char *p =
  655. (char *)adapter +
  656. qlcnic_gstrings_stats[index].stat_offset;
  657. data[index] =
  658. (qlcnic_gstrings_stats[index].sizeof_stat ==
  659. sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);
  660. }
  661. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  662. return;
  663. memset(&port_stats, 0, sizeof(struct qlcnic_esw_statistics));
  664. ret = qlcnic_get_port_stats(adapter, adapter->ahw.pci_func,
  665. QLCNIC_QUERY_RX_COUNTER, &port_stats.rx);
  666. if (ret)
  667. return;
  668. qlcnic_fill_device_stats(&index, data, &port_stats.rx);
  669. ret = qlcnic_get_port_stats(adapter, adapter->ahw.pci_func,
  670. QLCNIC_QUERY_TX_COUNTER, &port_stats.tx);
  671. if (ret)
  672. return;
  673. qlcnic_fill_device_stats(&index, data, &port_stats.tx);
  674. }
  675. static int qlcnic_set_tx_csum(struct net_device *dev, u32 data)
  676. {
  677. struct qlcnic_adapter *adapter = netdev_priv(dev);
  678. if ((adapter->flags & QLCNIC_ESWITCH_ENABLED))
  679. return -EOPNOTSUPP;
  680. if (data)
  681. dev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
  682. else
  683. dev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
  684. return 0;
  685. }
  686. static u32 qlcnic_get_tx_csum(struct net_device *dev)
  687. {
  688. return dev->features & NETIF_F_IP_CSUM;
  689. }
  690. static u32 qlcnic_get_rx_csum(struct net_device *dev)
  691. {
  692. struct qlcnic_adapter *adapter = netdev_priv(dev);
  693. return adapter->rx_csum;
  694. }
  695. static int qlcnic_set_rx_csum(struct net_device *dev, u32 data)
  696. {
  697. struct qlcnic_adapter *adapter = netdev_priv(dev);
  698. if ((adapter->flags & QLCNIC_ESWITCH_ENABLED))
  699. return -EOPNOTSUPP;
  700. if (!!data) {
  701. adapter->rx_csum = !!data;
  702. return 0;
  703. }
  704. if (dev->features & NETIF_F_LRO) {
  705. if (qlcnic_config_hw_lro(adapter, QLCNIC_LRO_DISABLED))
  706. return -EIO;
  707. dev->features &= ~NETIF_F_LRO;
  708. qlcnic_send_lro_cleanup(adapter);
  709. dev_info(&adapter->pdev->dev,
  710. "disabling LRO as rx_csum is off\n");
  711. }
  712. adapter->rx_csum = !!data;
  713. return 0;
  714. }
  715. static u32 qlcnic_get_tso(struct net_device *dev)
  716. {
  717. return (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) != 0;
  718. }
  719. static int qlcnic_set_tso(struct net_device *dev, u32 data)
  720. {
  721. struct qlcnic_adapter *adapter = netdev_priv(dev);
  722. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO))
  723. return -EOPNOTSUPP;
  724. if (data)
  725. dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
  726. else
  727. dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  728. return 0;
  729. }
  730. static int qlcnic_blink_led(struct net_device *dev, u32 val)
  731. {
  732. struct qlcnic_adapter *adapter = netdev_priv(dev);
  733. int ret;
  734. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  735. return -EIO;
  736. ret = adapter->nic_ops->config_led(adapter, 1, 0xf);
  737. if (ret) {
  738. dev_err(&adapter->pdev->dev,
  739. "Failed to set LED blink state.\n");
  740. return ret;
  741. }
  742. msleep_interruptible(val * 1000);
  743. ret = adapter->nic_ops->config_led(adapter, 0, 0xf);
  744. if (ret) {
  745. dev_err(&adapter->pdev->dev,
  746. "Failed to reset LED blink state.\n");
  747. return ret;
  748. }
  749. return 0;
  750. }
  751. static void
  752. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  753. {
  754. struct qlcnic_adapter *adapter = netdev_priv(dev);
  755. u32 wol_cfg;
  756. wol->supported = 0;
  757. wol->wolopts = 0;
  758. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  759. if (wol_cfg & (1UL << adapter->portnum))
  760. wol->supported |= WAKE_MAGIC;
  761. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  762. if (wol_cfg & (1UL << adapter->portnum))
  763. wol->wolopts |= WAKE_MAGIC;
  764. }
  765. static int
  766. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  767. {
  768. struct qlcnic_adapter *adapter = netdev_priv(dev);
  769. u32 wol_cfg;
  770. if (wol->wolopts & ~WAKE_MAGIC)
  771. return -EOPNOTSUPP;
  772. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  773. if (!(wol_cfg & (1 << adapter->portnum)))
  774. return -EOPNOTSUPP;
  775. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  776. if (wol->wolopts & WAKE_MAGIC)
  777. wol_cfg |= 1UL << adapter->portnum;
  778. else
  779. wol_cfg &= ~(1UL << adapter->portnum);
  780. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  781. return 0;
  782. }
  783. /*
  784. * Set the coalescing parameters. Currently only normal is supported.
  785. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  786. * firmware coalescing to default.
  787. */
  788. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  789. struct ethtool_coalesce *ethcoal)
  790. {
  791. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  792. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  793. return -EINVAL;
  794. /*
  795. * Return Error if unsupported values or
  796. * unsupported parameters are set.
  797. */
  798. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  799. ethcoal->rx_max_coalesced_frames > 0xffff ||
  800. ethcoal->tx_coalesce_usecs > 0xffff ||
  801. ethcoal->tx_max_coalesced_frames > 0xffff ||
  802. ethcoal->rx_coalesce_usecs_irq ||
  803. ethcoal->rx_max_coalesced_frames_irq ||
  804. ethcoal->tx_coalesce_usecs_irq ||
  805. ethcoal->tx_max_coalesced_frames_irq ||
  806. ethcoal->stats_block_coalesce_usecs ||
  807. ethcoal->use_adaptive_rx_coalesce ||
  808. ethcoal->use_adaptive_tx_coalesce ||
  809. ethcoal->pkt_rate_low ||
  810. ethcoal->rx_coalesce_usecs_low ||
  811. ethcoal->rx_max_coalesced_frames_low ||
  812. ethcoal->tx_coalesce_usecs_low ||
  813. ethcoal->tx_max_coalesced_frames_low ||
  814. ethcoal->pkt_rate_high ||
  815. ethcoal->rx_coalesce_usecs_high ||
  816. ethcoal->rx_max_coalesced_frames_high ||
  817. ethcoal->tx_coalesce_usecs_high ||
  818. ethcoal->tx_max_coalesced_frames_high)
  819. return -EINVAL;
  820. if (!ethcoal->rx_coalesce_usecs ||
  821. !ethcoal->rx_max_coalesced_frames) {
  822. adapter->coal.flags = QLCNIC_INTR_DEFAULT;
  823. adapter->coal.normal.data.rx_time_us =
  824. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  825. adapter->coal.normal.data.rx_packets =
  826. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  827. } else {
  828. adapter->coal.flags = 0;
  829. adapter->coal.normal.data.rx_time_us =
  830. ethcoal->rx_coalesce_usecs;
  831. adapter->coal.normal.data.rx_packets =
  832. ethcoal->rx_max_coalesced_frames;
  833. }
  834. adapter->coal.normal.data.tx_time_us = ethcoal->tx_coalesce_usecs;
  835. adapter->coal.normal.data.tx_packets =
  836. ethcoal->tx_max_coalesced_frames;
  837. qlcnic_config_intr_coalesce(adapter);
  838. return 0;
  839. }
  840. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  841. struct ethtool_coalesce *ethcoal)
  842. {
  843. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  844. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  845. return -EINVAL;
  846. ethcoal->rx_coalesce_usecs = adapter->coal.normal.data.rx_time_us;
  847. ethcoal->tx_coalesce_usecs = adapter->coal.normal.data.tx_time_us;
  848. ethcoal->rx_max_coalesced_frames =
  849. adapter->coal.normal.data.rx_packets;
  850. ethcoal->tx_max_coalesced_frames =
  851. adapter->coal.normal.data.tx_packets;
  852. return 0;
  853. }
  854. static int qlcnic_set_flags(struct net_device *netdev, u32 data)
  855. {
  856. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  857. int hw_lro;
  858. if (data & ~ETH_FLAG_LRO)
  859. return -EINVAL;
  860. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO))
  861. return -EINVAL;
  862. if (!adapter->rx_csum) {
  863. dev_info(&adapter->pdev->dev, "rx csum is off, "
  864. "cannot toggle lro\n");
  865. return -EINVAL;
  866. }
  867. if ((data & ETH_FLAG_LRO) && (netdev->features & NETIF_F_LRO))
  868. return 0;
  869. if (data & ETH_FLAG_LRO) {
  870. hw_lro = QLCNIC_LRO_ENABLED;
  871. netdev->features |= NETIF_F_LRO;
  872. } else {
  873. hw_lro = 0;
  874. netdev->features &= ~NETIF_F_LRO;
  875. }
  876. if (qlcnic_config_hw_lro(adapter, hw_lro))
  877. return -EIO;
  878. if ((hw_lro == 0) && qlcnic_send_lro_cleanup(adapter))
  879. return -EIO;
  880. return 0;
  881. }
  882. static u32 qlcnic_get_msglevel(struct net_device *netdev)
  883. {
  884. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  885. return adapter->msg_enable;
  886. }
  887. static void qlcnic_set_msglevel(struct net_device *netdev, u32 msglvl)
  888. {
  889. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  890. adapter->msg_enable = msglvl;
  891. }
  892. const struct ethtool_ops qlcnic_ethtool_ops = {
  893. .get_settings = qlcnic_get_settings,
  894. .set_settings = qlcnic_set_settings,
  895. .get_drvinfo = qlcnic_get_drvinfo,
  896. .get_regs_len = qlcnic_get_regs_len,
  897. .get_regs = qlcnic_get_regs,
  898. .get_link = ethtool_op_get_link,
  899. .get_eeprom_len = qlcnic_get_eeprom_len,
  900. .get_eeprom = qlcnic_get_eeprom,
  901. .get_ringparam = qlcnic_get_ringparam,
  902. .set_ringparam = qlcnic_set_ringparam,
  903. .get_pauseparam = qlcnic_get_pauseparam,
  904. .set_pauseparam = qlcnic_set_pauseparam,
  905. .get_tx_csum = qlcnic_get_tx_csum,
  906. .set_tx_csum = qlcnic_set_tx_csum,
  907. .set_sg = ethtool_op_set_sg,
  908. .get_tso = qlcnic_get_tso,
  909. .set_tso = qlcnic_set_tso,
  910. .get_wol = qlcnic_get_wol,
  911. .set_wol = qlcnic_set_wol,
  912. .self_test = qlcnic_diag_test,
  913. .get_strings = qlcnic_get_strings,
  914. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  915. .get_sset_count = qlcnic_get_sset_count,
  916. .get_rx_csum = qlcnic_get_rx_csum,
  917. .set_rx_csum = qlcnic_set_rx_csum,
  918. .get_coalesce = qlcnic_get_intr_coalesce,
  919. .set_coalesce = qlcnic_set_intr_coalesce,
  920. .get_flags = ethtool_op_get_flags,
  921. .set_flags = qlcnic_set_flags,
  922. .phys_id = qlcnic_blink_led,
  923. .set_msglevel = qlcnic_set_msglevel,
  924. .get_msglevel = qlcnic_get_msglevel,
  925. };