board-mop500-pins.c 23 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License terms: GNU General Public License (GPL) version 2
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/init.h>
  8. #include <linux/bug.h>
  9. #include <linux/string.h>
  10. #include <linux/pinctrl/machine.h>
  11. #include <asm/mach-types.h>
  12. #include <plat/pincfg.h>
  13. #include <plat/gpio-nomadik.h>
  14. #include <mach/hardware.h>
  15. #include "pins-db8500.h"
  16. #include "board-mop500.h"
  17. enum custom_pin_cfg_t {
  18. PINS_FOR_DEFAULT,
  19. PINS_FOR_U9500,
  20. };
  21. static enum custom_pin_cfg_t pinsfor;
  22. /* These simply sets bias for pins */
  23. #define BIAS(a,b) static unsigned long a[] = { b }
  24. BIAS(pd, PIN_PULL_DOWN);
  25. BIAS(in_nopull, PIN_INPUT_NOPULL);
  26. BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
  27. BIAS(in_pu, PIN_INPUT_PULLUP);
  28. BIAS(in_pd, PIN_INPUT_PULLDOWN);
  29. BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
  30. BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
  31. BIAS(out_hi, PIN_OUTPUT_HIGH);
  32. BIAS(out_lo, PIN_OUTPUT_LOW);
  33. BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
  34. /* These also force them into GPIO mode */
  35. BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
  36. BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
  37. BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
  38. BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
  39. BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
  40. BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
  41. /* Sleep modes */
  42. BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  43. BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE);
  44. BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  45. BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  46. BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  47. BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
  48. BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  49. BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  50. /* We use these to define hog settings that are always done on boot */
  51. #define DB8500_MUX_HOG(group,func) \
  52. PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
  53. #define DB8500_PIN_HOG(pin,conf) \
  54. PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
  55. #define DB8500_PIN_SLEEP(pin, conf, dev) \
  56. PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
  57. pin, conf)
  58. /* These are default states associated with device and changed runtime */
  59. #define DB8500_MUX(group,func,dev) \
  60. PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
  61. #define DB8500_PIN(pin,conf,dev) \
  62. PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
  63. #define DB8500_PIN_SLEEP(pin, conf, dev) \
  64. PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
  65. pin, conf)
  66. #define DB8500_PIN_SLEEP(pin,conf,dev) \
  67. PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
  68. pin, conf)
  69. /* Pin control settings */
  70. static struct pinctrl_map __initdata mop500_family_pinmap[] = {
  71. /*
  72. * uMSP0, mux in 4 pins, regular placement of RX/TX
  73. * explicitly set the pins to no pull
  74. */
  75. DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
  76. DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
  77. DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
  78. DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
  79. DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
  80. DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
  81. /* MSP2 for HDMI, pull down TXD, TCK, TFS */
  82. DB8500_MUX_HOG("msp2_a_1", "msp2"),
  83. DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
  84. DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
  85. DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
  86. DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
  87. /*
  88. * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
  89. * pull-up
  90. * TODO: is this really correct? Snowball doesn't have a LCD.
  91. */
  92. DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
  93. DB8500_PIN_HOG("GPIO68_E1", in_pu),
  94. DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
  95. /*
  96. * STMPE1601/tc35893 keypad IRQ GPIO 218
  97. * TODO: set for snowball and HREF really??
  98. */
  99. DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
  100. /*
  101. * UART0, we do not mux in u0 here.
  102. * uart-0 pins gpio configuration should be kept intact to prevent
  103. * a glitch in tx line when the tty dev is opened. Later these pins
  104. * are configured to uart mop500_pins_uart0
  105. */
  106. DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
  107. DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
  108. DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
  109. DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
  110. /*
  111. * Mux in UART2 on altfunction C and set pull-ups.
  112. * TODO: is this used on U8500 variants and Snowball really?
  113. * The setting on GPIO31 conflicts with magnetometer use on hrefv60
  114. */
  115. DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
  116. DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
  117. DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
  118. DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
  119. DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
  120. DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
  121. /*
  122. * The following pin sets were known as "runtime pins" before being
  123. * converted to the pinctrl model. Here we model them as "default"
  124. * states.
  125. */
  126. /* Mux in UART0 after initialization */
  127. DB8500_MUX("u0_a_1", "u0", "uart0"),
  128. DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
  129. DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
  130. DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
  131. DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
  132. /* UART0 sleep state */
  133. DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"),
  134. DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"),
  135. DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"),
  136. DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"),
  137. /* MSP1 for ALSA codec */
  138. DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
  139. DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
  140. DB8500_PIN("GPIO33_AF2", out_lo_slpm_nowkup, "ux500-msp-i2s.1"),
  141. DB8500_PIN("GPIO34_AE1", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
  142. DB8500_PIN("GPIO35_AE2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
  143. DB8500_PIN("GPIO36_AG2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
  144. /* MSP1 sleep state */
  145. DB8500_PIN_SLEEP("GPIO33_AF2", slpm_out_lo_wkup, "ux500-msp-i2s.1"),
  146. DB8500_PIN_SLEEP("GPIO34_AE1", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
  147. DB8500_PIN_SLEEP("GPIO35_AE2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
  148. DB8500_PIN_SLEEP("GPIO36_AG2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
  149. /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
  150. DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
  151. DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
  152. /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
  153. DB8500_MUX("lcdvsi1_a_1", "lcd", "0-0070"),
  154. DB8500_PIN("GPIO69_E2", in_pu, "0-0070"),
  155. /* LCD VSI1 sleep state */
  156. DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"),
  157. /* Mux in i2c0 block, default state */
  158. DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
  159. /* i2c0 sleep state */
  160. DB8500_PIN_SLEEP("GPIO147_C15", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SDA */
  161. DB8500_PIN_SLEEP("GPIO148_B16", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SCL */
  162. /* Mux in i2c1 block, default state */
  163. DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
  164. /* i2c1 sleep state */
  165. DB8500_PIN_SLEEP("GPIO16_AD3", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SDA */
  166. DB8500_PIN_SLEEP("GPIO17_AD4", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SCL */
  167. /* Mux in i2c2 block, default state */
  168. DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
  169. /* i2c2 sleep state */
  170. DB8500_PIN_SLEEP("GPIO10_AF5", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SDA */
  171. DB8500_PIN_SLEEP("GPIO11_AG4", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SCL */
  172. /* Mux in i2c3 block, default state */
  173. DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
  174. /* i2c3 sleep state */
  175. DB8500_PIN_SLEEP("GPIO229_AG7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SDA */
  176. DB8500_PIN_SLEEP("GPIO230_AF7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SCL */
  177. /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
  178. DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
  179. DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
  180. DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
  181. DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
  182. DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
  183. DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
  184. DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
  185. DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
  186. DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
  187. DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
  188. DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
  189. /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
  190. DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
  191. DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
  192. DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
  193. DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
  194. DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
  195. DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
  196. DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
  197. DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
  198. /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
  199. DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
  200. DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
  201. DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
  202. DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
  203. DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
  204. DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
  205. DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
  206. DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
  207. DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
  208. DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
  209. DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
  210. DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
  211. /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
  212. DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
  213. DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
  214. DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
  215. DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
  216. DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
  217. DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
  218. DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
  219. DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
  220. DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
  221. DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
  222. DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
  223. DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
  224. /* Mux in USB pins, drive STP high */
  225. DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
  226. DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
  227. /* Mux in SPI2 pins on the "other C1" altfunction */
  228. DB8500_MUX("spi2_oc1_2", "spi2", "spi2"),
  229. DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
  230. DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
  231. DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
  232. DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
  233. /* SPI2 sleep state */
  234. DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
  235. DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
  236. DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
  237. };
  238. /*
  239. * These are specifically for the MOP500 and HREFP (pre-v60) version of the
  240. * board, which utilized a TC35892 GPIO expander instead of using a lot of
  241. * on-chip pins as the HREFv60 and later does.
  242. */
  243. static struct pinctrl_map __initdata mop500_pinmap[] = {
  244. /* Mux in SSP0, pull down RXD pin */
  245. DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
  246. DB8500_PIN_HOG("GPIO145_C13", pd),
  247. /*
  248. * XENON Flashgun on image processor GPIO (controlled from image
  249. * processor firmware), mux in these image processor GPIO lines 0
  250. * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
  251. * the pins.
  252. */
  253. DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
  254. DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
  255. DB8500_PIN_HOG("GPIO6_AF6", in_pu),
  256. DB8500_PIN_HOG("GPIO7_AG5", in_pu),
  257. /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
  258. DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
  259. /* Mux in UART1 and set the pull-ups */
  260. DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
  261. DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
  262. DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
  263. DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
  264. DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
  265. DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
  266. /*
  267. * Runtime stuff: make it possible to mux in the SKE keypad
  268. * and bias the pins
  269. */
  270. DB8500_MUX("kp_a_2", "kp", "ske"),
  271. DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
  272. DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
  273. DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
  274. DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
  275. DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
  276. DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
  277. DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
  278. DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
  279. DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
  280. DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
  281. DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
  282. DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
  283. DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
  284. DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
  285. DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
  286. DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
  287. /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
  288. DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
  289. DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
  290. };
  291. /*
  292. * The HREFv60 series of platforms is using available pins on the DB8500
  293. * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
  294. * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
  295. */
  296. static struct pinctrl_map __initdata hrefv60_pinmap[] = {
  297. /* Drive WLAN_ENA low */
  298. DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
  299. /*
  300. * XENON Flashgun on image processor GPIO (controlled from image
  301. * processor firmware), mux in these image processor GPIO lines 0
  302. * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
  303. * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
  304. * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
  305. */
  306. DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
  307. DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
  308. DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
  309. DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
  310. DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
  311. DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
  312. DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
  313. /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
  314. DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
  315. DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
  316. /*
  317. * Display Interface 1 uses GPIO 65 for RST (reset).
  318. * Display Interface 2 uses GPIO 66 for RST (reset).
  319. * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
  320. */
  321. DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
  322. DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
  323. /*
  324. * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
  325. * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
  326. * reset signals low.
  327. */
  328. DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
  329. DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
  330. DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
  331. /*
  332. * Drive D19-D23 for the ETM PTM trace interface low,
  333. * (presumably pins are unconnected therefore grounded here,
  334. * the "other alt C1" setting enables these pins)
  335. */
  336. DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
  337. DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
  338. DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
  339. DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
  340. DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
  341. /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
  342. DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
  343. DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
  344. /* NFC ENA and RESET to low, pulldown IRQ line */
  345. DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
  346. DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
  347. DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
  348. /*
  349. * SKE keyboard partly on alt A and partly on "Other alt C1"
  350. * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
  351. * rows of 6 keys, then pull up force sensing interrup and
  352. * drive reset and force sensing WU low.
  353. */
  354. DB8500_MUX_HOG("kp_a_1", "kp"),
  355. DB8500_MUX_HOG("kp_oc1_1", "kp"),
  356. DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
  357. DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
  358. DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
  359. DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
  360. DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
  361. DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
  362. DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
  363. DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
  364. DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
  365. DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
  366. DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
  367. /* DiPro Sensor interrupt */
  368. DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
  369. /* Audio Amplifier HF enable */
  370. DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
  371. /* GBF interface, pull low to reset state */
  372. DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
  373. /* MSP : HDTV INTERFACE GPIO line */
  374. DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
  375. /* Accelerometer interrupt lines */
  376. DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
  377. DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
  378. /* SD card detect GPIO pin */
  379. DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
  380. /*
  381. * Runtime stuff
  382. * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
  383. * etc.
  384. */
  385. DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
  386. DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
  387. DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
  388. /*
  389. * Make it possible to mux in the SKE keypad and bias the pins
  390. * FIXME: what's the point with this on HREFv60? KP/SKE is already
  391. * muxed in at another place! Enabling this will bork.
  392. */
  393. DB8500_MUX("kp_a_2", "kp", "ske"),
  394. DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
  395. DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
  396. DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
  397. DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
  398. DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
  399. DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
  400. DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
  401. DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
  402. DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
  403. DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
  404. DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
  405. DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
  406. DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
  407. DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
  408. DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
  409. DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
  410. };
  411. static struct pinctrl_map __initdata u9500_pinmap[] = {
  412. /* Mux in UART1 (just RX/TX) and set the pull-ups */
  413. DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
  414. DB8500_PIN_HOG("GPIO4_AH6", in_pu),
  415. DB8500_PIN_HOG("GPIO5_AG6", out_hi),
  416. /* WLAN_IRQ line */
  417. DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
  418. /* HSI */
  419. DB8500_MUX_HOG("hsir_a_1", "hsi"),
  420. DB8500_MUX_HOG("hsit_a_2", "hsi"),
  421. DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
  422. DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
  423. DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
  424. DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
  425. DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
  426. DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
  427. DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
  428. DB8500_PIN_HOG("GPIO226_AF8", gpio_out_hi), /* ACWAKE0 */
  429. };
  430. static struct pinctrl_map __initdata u8500_pinmap[] = {
  431. DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
  432. DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
  433. };
  434. static struct pinctrl_map __initdata snowball_pinmap[] = {
  435. /* Mux in SSP0 connected to AB8500, pull down RXD pin */
  436. DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
  437. DB8500_PIN_HOG("GPIO145_C13", pd),
  438. /* Always drive the MC0 DAT31DIR line high on these boards */
  439. DB8500_PIN_HOG("GPIO21_AB3", out_hi),
  440. /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
  441. DB8500_MUX_HOG("sm_b_1", "sm"),
  442. /* Drive RSTn_LAN high */
  443. DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
  444. /* Accelerometer/Magnetometer */
  445. DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
  446. DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
  447. DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
  448. /* WLAN/GBF */
  449. DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
  450. DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
  451. DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
  452. DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
  453. };
  454. /*
  455. * passing "pinsfor=" in kernel cmdline allows for custom
  456. * configuration of GPIOs on u8500 derived boards.
  457. */
  458. static int __init early_pinsfor(char *p)
  459. {
  460. pinsfor = PINS_FOR_DEFAULT;
  461. if (strcmp(p, "u9500-21") == 0)
  462. pinsfor = PINS_FOR_U9500;
  463. return 0;
  464. }
  465. early_param("pinsfor", early_pinsfor);
  466. int pins_for_u9500(void)
  467. {
  468. if (pinsfor == PINS_FOR_U9500)
  469. return 1;
  470. return 0;
  471. }
  472. static void __init mop500_href_family_pinmaps_init(void)
  473. {
  474. switch (pinsfor) {
  475. case PINS_FOR_U9500:
  476. pinctrl_register_mappings(u9500_pinmap,
  477. ARRAY_SIZE(u9500_pinmap));
  478. break;
  479. case PINS_FOR_DEFAULT:
  480. pinctrl_register_mappings(u8500_pinmap,
  481. ARRAY_SIZE(u8500_pinmap));
  482. default:
  483. break;
  484. }
  485. }
  486. void __init mop500_pinmaps_init(void)
  487. {
  488. pinctrl_register_mappings(mop500_family_pinmap,
  489. ARRAY_SIZE(mop500_family_pinmap));
  490. pinctrl_register_mappings(mop500_pinmap,
  491. ARRAY_SIZE(mop500_pinmap));
  492. mop500_href_family_pinmaps_init();
  493. }
  494. void __init snowball_pinmaps_init(void)
  495. {
  496. pinctrl_register_mappings(mop500_family_pinmap,
  497. ARRAY_SIZE(mop500_family_pinmap));
  498. pinctrl_register_mappings(snowball_pinmap,
  499. ARRAY_SIZE(snowball_pinmap));
  500. pinctrl_register_mappings(u8500_pinmap,
  501. ARRAY_SIZE(u8500_pinmap));
  502. }
  503. void __init hrefv60_pinmaps_init(void)
  504. {
  505. pinctrl_register_mappings(mop500_family_pinmap,
  506. ARRAY_SIZE(mop500_family_pinmap));
  507. pinctrl_register_mappings(hrefv60_pinmap,
  508. ARRAY_SIZE(hrefv60_pinmap));
  509. mop500_href_family_pinmaps_init();
  510. }