am33xx.dtsi 13 KB

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  1. /*
  2. * Device Tree Source for AM33XX SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/am33xx.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. compatible = "ti,am33xx";
  15. interrupt-parent = <&intc>;
  16. aliases {
  17. serial0 = &uart0;
  18. serial1 = &uart1;
  19. serial2 = &uart2;
  20. serial3 = &uart3;
  21. serial4 = &uart4;
  22. serial5 = &uart5;
  23. d_can0 = &dcan0;
  24. d_can1 = &dcan1;
  25. usb0 = &usb0;
  26. usb1 = &usb1;
  27. phy0 = &usb0_phy;
  28. phy1 = &usb1_phy;
  29. };
  30. cpus {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. cpu@0 {
  34. compatible = "arm,cortex-a8";
  35. device_type = "cpu";
  36. reg = <0>;
  37. /*
  38. * To consider voltage drop between PMIC and SoC,
  39. * tolerance value is reduced to 2% from 4% and
  40. * voltage value is increased as a precaution.
  41. */
  42. operating-points = <
  43. /* kHz uV */
  44. 720000 1285000
  45. 600000 1225000
  46. 500000 1125000
  47. 275000 1125000
  48. >;
  49. voltage-tolerance = <2>; /* 2 percentage */
  50. clock-latency = <300000>; /* From omap-cpufreq driver */
  51. };
  52. };
  53. /*
  54. * The soc node represents the soc top level view. It is uses for IPs
  55. * that are not memory mapped in the MPU view or for the MPU itself.
  56. */
  57. soc {
  58. compatible = "ti,omap-infra";
  59. mpu {
  60. compatible = "ti,omap3-mpu";
  61. ti,hwmods = "mpu";
  62. };
  63. };
  64. am33xx_pinmux: pinmux@44e10800 {
  65. compatible = "pinctrl-single";
  66. reg = <0x44e10800 0x0238>;
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. pinctrl-single,register-width = <32>;
  70. pinctrl-single,function-mask = <0x7f>;
  71. };
  72. /*
  73. * XXX: Use a flat representation of the AM33XX interconnect.
  74. * The real AM33XX interconnect network is quite complex.Since
  75. * that will not bring real advantage to represent that in DT
  76. * for the moment, just use a fake OCP bus entry to represent
  77. * the whole bus hierarchy.
  78. */
  79. ocp {
  80. compatible = "simple-bus";
  81. #address-cells = <1>;
  82. #size-cells = <1>;
  83. ranges;
  84. ti,hwmods = "l3_main";
  85. intc: interrupt-controller@48200000 {
  86. compatible = "ti,omap2-intc";
  87. interrupt-controller;
  88. #interrupt-cells = <1>;
  89. ti,intc-size = <128>;
  90. reg = <0x48200000 0x1000>;
  91. };
  92. gpio0: gpio@44e07000 {
  93. compatible = "ti,omap4-gpio";
  94. ti,hwmods = "gpio1";
  95. gpio-controller;
  96. #gpio-cells = <2>;
  97. interrupt-controller;
  98. #interrupt-cells = <1>;
  99. reg = <0x44e07000 0x1000>;
  100. interrupts = <96>;
  101. };
  102. gpio1: gpio@4804c000 {
  103. compatible = "ti,omap4-gpio";
  104. ti,hwmods = "gpio2";
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. interrupt-controller;
  108. #interrupt-cells = <1>;
  109. reg = <0x4804c000 0x1000>;
  110. interrupts = <98>;
  111. };
  112. gpio2: gpio@481ac000 {
  113. compatible = "ti,omap4-gpio";
  114. ti,hwmods = "gpio3";
  115. gpio-controller;
  116. #gpio-cells = <2>;
  117. interrupt-controller;
  118. #interrupt-cells = <1>;
  119. reg = <0x481ac000 0x1000>;
  120. interrupts = <32>;
  121. };
  122. gpio3: gpio@481ae000 {
  123. compatible = "ti,omap4-gpio";
  124. ti,hwmods = "gpio4";
  125. gpio-controller;
  126. #gpio-cells = <2>;
  127. interrupt-controller;
  128. #interrupt-cells = <1>;
  129. reg = <0x481ae000 0x1000>;
  130. interrupts = <62>;
  131. };
  132. uart0: serial@44e09000 {
  133. compatible = "ti,omap3-uart";
  134. ti,hwmods = "uart1";
  135. clock-frequency = <48000000>;
  136. reg = <0x44e09000 0x2000>;
  137. interrupts = <72>;
  138. status = "disabled";
  139. };
  140. uart1: serial@48022000 {
  141. compatible = "ti,omap3-uart";
  142. ti,hwmods = "uart2";
  143. clock-frequency = <48000000>;
  144. reg = <0x48022000 0x2000>;
  145. interrupts = <73>;
  146. status = "disabled";
  147. };
  148. uart2: serial@48024000 {
  149. compatible = "ti,omap3-uart";
  150. ti,hwmods = "uart3";
  151. clock-frequency = <48000000>;
  152. reg = <0x48024000 0x2000>;
  153. interrupts = <74>;
  154. status = "disabled";
  155. };
  156. uart3: serial@481a6000 {
  157. compatible = "ti,omap3-uart";
  158. ti,hwmods = "uart4";
  159. clock-frequency = <48000000>;
  160. reg = <0x481a6000 0x2000>;
  161. interrupts = <44>;
  162. status = "disabled";
  163. };
  164. uart4: serial@481a8000 {
  165. compatible = "ti,omap3-uart";
  166. ti,hwmods = "uart5";
  167. clock-frequency = <48000000>;
  168. reg = <0x481a8000 0x2000>;
  169. interrupts = <45>;
  170. status = "disabled";
  171. };
  172. uart5: serial@481aa000 {
  173. compatible = "ti,omap3-uart";
  174. ti,hwmods = "uart6";
  175. clock-frequency = <48000000>;
  176. reg = <0x481aa000 0x2000>;
  177. interrupts = <46>;
  178. status = "disabled";
  179. };
  180. i2c0: i2c@44e0b000 {
  181. compatible = "ti,omap4-i2c";
  182. #address-cells = <1>;
  183. #size-cells = <0>;
  184. ti,hwmods = "i2c1";
  185. reg = <0x44e0b000 0x1000>;
  186. interrupts = <70>;
  187. status = "disabled";
  188. };
  189. i2c1: i2c@4802a000 {
  190. compatible = "ti,omap4-i2c";
  191. #address-cells = <1>;
  192. #size-cells = <0>;
  193. ti,hwmods = "i2c2";
  194. reg = <0x4802a000 0x1000>;
  195. interrupts = <71>;
  196. status = "disabled";
  197. };
  198. i2c2: i2c@4819c000 {
  199. compatible = "ti,omap4-i2c";
  200. #address-cells = <1>;
  201. #size-cells = <0>;
  202. ti,hwmods = "i2c3";
  203. reg = <0x4819c000 0x1000>;
  204. interrupts = <30>;
  205. status = "disabled";
  206. };
  207. wdt2: wdt@44e35000 {
  208. compatible = "ti,omap3-wdt";
  209. ti,hwmods = "wd_timer2";
  210. reg = <0x44e35000 0x1000>;
  211. interrupts = <91>;
  212. };
  213. dcan0: d_can@481cc000 {
  214. compatible = "bosch,d_can";
  215. ti,hwmods = "d_can0";
  216. reg = <0x481cc000 0x2000
  217. 0x44e10644 0x4>;
  218. interrupts = <52>;
  219. status = "disabled";
  220. };
  221. dcan1: d_can@481d0000 {
  222. compatible = "bosch,d_can";
  223. ti,hwmods = "d_can1";
  224. reg = <0x481d0000 0x2000
  225. 0x44e10644 0x4>;
  226. interrupts = <55>;
  227. status = "disabled";
  228. };
  229. timer1: timer@44e31000 {
  230. compatible = "ti,am335x-timer-1ms";
  231. reg = <0x44e31000 0x400>;
  232. interrupts = <67>;
  233. ti,hwmods = "timer1";
  234. ti,timer-alwon;
  235. };
  236. timer2: timer@48040000 {
  237. compatible = "ti,am335x-timer";
  238. reg = <0x48040000 0x400>;
  239. interrupts = <68>;
  240. ti,hwmods = "timer2";
  241. };
  242. timer3: timer@48042000 {
  243. compatible = "ti,am335x-timer";
  244. reg = <0x48042000 0x400>;
  245. interrupts = <69>;
  246. ti,hwmods = "timer3";
  247. };
  248. timer4: timer@48044000 {
  249. compatible = "ti,am335x-timer";
  250. reg = <0x48044000 0x400>;
  251. interrupts = <92>;
  252. ti,hwmods = "timer4";
  253. ti,timer-pwm;
  254. };
  255. timer5: timer@48046000 {
  256. compatible = "ti,am335x-timer";
  257. reg = <0x48046000 0x400>;
  258. interrupts = <93>;
  259. ti,hwmods = "timer5";
  260. ti,timer-pwm;
  261. };
  262. timer6: timer@48048000 {
  263. compatible = "ti,am335x-timer";
  264. reg = <0x48048000 0x400>;
  265. interrupts = <94>;
  266. ti,hwmods = "timer6";
  267. ti,timer-pwm;
  268. };
  269. timer7: timer@4804a000 {
  270. compatible = "ti,am335x-timer";
  271. reg = <0x4804a000 0x400>;
  272. interrupts = <95>;
  273. ti,hwmods = "timer7";
  274. ti,timer-pwm;
  275. };
  276. rtc@44e3e000 {
  277. compatible = "ti,da830-rtc";
  278. reg = <0x44e3e000 0x1000>;
  279. interrupts = <75
  280. 76>;
  281. ti,hwmods = "rtc";
  282. };
  283. spi0: spi@48030000 {
  284. compatible = "ti,omap4-mcspi";
  285. #address-cells = <1>;
  286. #size-cells = <0>;
  287. reg = <0x48030000 0x400>;
  288. interrupts = <65>;
  289. ti,spi-num-cs = <2>;
  290. ti,hwmods = "spi0";
  291. status = "disabled";
  292. };
  293. spi1: spi@481a0000 {
  294. compatible = "ti,omap4-mcspi";
  295. #address-cells = <1>;
  296. #size-cells = <0>;
  297. reg = <0x481a0000 0x400>;
  298. interrupts = <125>;
  299. ti,spi-num-cs = <2>;
  300. ti,hwmods = "spi1";
  301. status = "disabled";
  302. };
  303. usb: usb@47400000 {
  304. compatible = "ti,am33xx-usb";
  305. reg = <0x47400000 0x1000>;
  306. ranges;
  307. #address-cells = <1>;
  308. #size-cells = <1>;
  309. ti,hwmods = "usb_otg_hs";
  310. status = "disabled";
  311. ctrl_mod: control@44e10000 {
  312. compatible = "ti,am335x-usb-ctrl-module";
  313. reg = <0x44e10620 0x10
  314. 0x44e10648 0x4>;
  315. reg-names = "phy_ctrl", "wakeup";
  316. status = "disabled";
  317. };
  318. usb0_phy: phy@47401300 {
  319. compatible = "ti,am335x-usb-phy";
  320. reg = <0x47401300 0x100>;
  321. reg-names = "phy";
  322. status = "disabled";
  323. ti,ctrl_mod = <&ctrl_mod>;
  324. };
  325. usb0: usb@47401000 {
  326. compatible = "ti,musb-am33xx";
  327. ranges;
  328. #address-cells = <1>;
  329. #size-cells = <1>;
  330. reg = <0x47401000 0x200>;
  331. reg-names = "control";
  332. status = "disabled";
  333. musb0: usb@47401400 {
  334. compatible = "mg,musbmhdrc";
  335. reg = <0x47401400 0x400>;
  336. reg-names = "mc";
  337. interrupts = <18>;
  338. interrupt-names = "mc";
  339. multipoint = <1>;
  340. num-eps = <16>;
  341. ram-bits = <12>;
  342. port-mode = <3>;
  343. power = <250>;
  344. phys = <&usb0_phy>;
  345. };
  346. };
  347. usb1_phy: phy@47401b00 {
  348. compatible = "ti,am335x-usb-phy";
  349. reg = <0x47401b00 0x100>;
  350. reg-names = "phy";
  351. status = "disabled";
  352. ti,ctrl_mod = <&ctrl_mod>;
  353. };
  354. usb1: usb@47401800 {
  355. compatible = "ti,musb-am33xx";
  356. ranges;
  357. #address-cells = <1>;
  358. #size-cells = <1>;
  359. reg = <0x47401800 0x200>;
  360. reg-names = "control";
  361. status = "disabled";
  362. musb1: usb@47401c00 {
  363. compatible = "mg,musbmhdrc";
  364. reg = <0x47401c00 0x400>;
  365. reg-names = "mc";
  366. interrupts = <19>;
  367. interrupt-names = "mc";
  368. multipoint = <1>;
  369. num-eps = <16>;
  370. ram-bits = <12>;
  371. port-mode = <3>;
  372. power = <250>;
  373. phys = <&usb1_phy>;
  374. };
  375. };
  376. };
  377. epwmss0: epwmss@48300000 {
  378. compatible = "ti,am33xx-pwmss";
  379. reg = <0x48300000 0x10>;
  380. ti,hwmods = "epwmss0";
  381. #address-cells = <1>;
  382. #size-cells = <1>;
  383. status = "disabled";
  384. ranges = <0x48300100 0x48300100 0x80 /* ECAP */
  385. 0x48300180 0x48300180 0x80 /* EQEP */
  386. 0x48300200 0x48300200 0x80>; /* EHRPWM */
  387. ecap0: ecap@48300100 {
  388. compatible = "ti,am33xx-ecap";
  389. #pwm-cells = <3>;
  390. reg = <0x48300100 0x80>;
  391. ti,hwmods = "ecap0";
  392. status = "disabled";
  393. };
  394. ehrpwm0: ehrpwm@48300200 {
  395. compatible = "ti,am33xx-ehrpwm";
  396. #pwm-cells = <3>;
  397. reg = <0x48300200 0x80>;
  398. ti,hwmods = "ehrpwm0";
  399. status = "disabled";
  400. };
  401. };
  402. epwmss1: epwmss@48302000 {
  403. compatible = "ti,am33xx-pwmss";
  404. reg = <0x48302000 0x10>;
  405. ti,hwmods = "epwmss1";
  406. #address-cells = <1>;
  407. #size-cells = <1>;
  408. status = "disabled";
  409. ranges = <0x48302100 0x48302100 0x80 /* ECAP */
  410. 0x48302180 0x48302180 0x80 /* EQEP */
  411. 0x48302200 0x48302200 0x80>; /* EHRPWM */
  412. ecap1: ecap@48302100 {
  413. compatible = "ti,am33xx-ecap";
  414. #pwm-cells = <3>;
  415. reg = <0x48302100 0x80>;
  416. ti,hwmods = "ecap1";
  417. status = "disabled";
  418. };
  419. ehrpwm1: ehrpwm@48302200 {
  420. compatible = "ti,am33xx-ehrpwm";
  421. #pwm-cells = <3>;
  422. reg = <0x48302200 0x80>;
  423. ti,hwmods = "ehrpwm1";
  424. status = "disabled";
  425. };
  426. };
  427. epwmss2: epwmss@48304000 {
  428. compatible = "ti,am33xx-pwmss";
  429. reg = <0x48304000 0x10>;
  430. ti,hwmods = "epwmss2";
  431. #address-cells = <1>;
  432. #size-cells = <1>;
  433. status = "disabled";
  434. ranges = <0x48304100 0x48304100 0x80 /* ECAP */
  435. 0x48304180 0x48304180 0x80 /* EQEP */
  436. 0x48304200 0x48304200 0x80>; /* EHRPWM */
  437. ecap2: ecap@48304100 {
  438. compatible = "ti,am33xx-ecap";
  439. #pwm-cells = <3>;
  440. reg = <0x48304100 0x80>;
  441. ti,hwmods = "ecap2";
  442. status = "disabled";
  443. };
  444. ehrpwm2: ehrpwm@48304200 {
  445. compatible = "ti,am33xx-ehrpwm";
  446. #pwm-cells = <3>;
  447. reg = <0x48304200 0x80>;
  448. ti,hwmods = "ehrpwm2";
  449. status = "disabled";
  450. };
  451. };
  452. mac: ethernet@4a100000 {
  453. compatible = "ti,cpsw";
  454. ti,hwmods = "cpgmac0";
  455. cpdma_channels = <8>;
  456. ale_entries = <1024>;
  457. bd_ram_size = <0x2000>;
  458. no_bd_ram = <0>;
  459. rx_descs = <64>;
  460. mac_control = <0x20>;
  461. slaves = <2>;
  462. active_slave = <0>;
  463. cpts_clock_mult = <0x80000000>;
  464. cpts_clock_shift = <29>;
  465. reg = <0x4a100000 0x800
  466. 0x4a101200 0x100>;
  467. #address-cells = <1>;
  468. #size-cells = <1>;
  469. interrupt-parent = <&intc>;
  470. /*
  471. * c0_rx_thresh_pend
  472. * c0_rx_pend
  473. * c0_tx_pend
  474. * c0_misc_pend
  475. */
  476. interrupts = <40 41 42 43>;
  477. ranges;
  478. davinci_mdio: mdio@4a101000 {
  479. compatible = "ti,davinci_mdio";
  480. #address-cells = <1>;
  481. #size-cells = <0>;
  482. ti,hwmods = "davinci_mdio";
  483. bus_freq = <1000000>;
  484. reg = <0x4a101000 0x100>;
  485. };
  486. cpsw_emac0: slave@4a100200 {
  487. /* Filled in by U-Boot */
  488. mac-address = [ 00 00 00 00 00 00 ];
  489. };
  490. cpsw_emac1: slave@4a100300 {
  491. /* Filled in by U-Boot */
  492. mac-address = [ 00 00 00 00 00 00 ];
  493. };
  494. };
  495. ocmcram: ocmcram@40300000 {
  496. compatible = "ti,am3352-ocmcram";
  497. reg = <0x40300000 0x10000>;
  498. ti,hwmods = "ocmcram";
  499. };
  500. wkup_m3: wkup_m3@44d00000 {
  501. compatible = "ti,am3353-wkup-m3";
  502. reg = <0x44d00000 0x4000 /* M3 UMEM */
  503. 0x44d80000 0x2000>; /* M3 DMEM */
  504. ti,hwmods = "wkup_m3";
  505. };
  506. elm: elm@48080000 {
  507. compatible = "ti,am3352-elm";
  508. reg = <0x48080000 0x2000>;
  509. interrupts = <4>;
  510. ti,hwmods = "elm";
  511. status = "disabled";
  512. };
  513. tscadc: tscadc@44e0d000 {
  514. compatible = "ti,am3359-tscadc";
  515. reg = <0x44e0d000 0x1000>;
  516. interrupt-parent = <&intc>;
  517. interrupts = <16>;
  518. ti,hwmods = "adc_tsc";
  519. status = "disabled";
  520. tsc {
  521. compatible = "ti,am3359-tsc";
  522. };
  523. am335x_adc: adc {
  524. #io-channel-cells = <1>;
  525. compatible = "ti,am3359-adc";
  526. };
  527. };
  528. gpmc: gpmc@50000000 {
  529. compatible = "ti,am3352-gpmc";
  530. ti,hwmods = "gpmc";
  531. reg = <0x50000000 0x2000>;
  532. interrupts = <100>;
  533. gpmc,num-cs = <7>;
  534. gpmc,num-waitpins = <2>;
  535. #address-cells = <2>;
  536. #size-cells = <1>;
  537. status = "disabled";
  538. };
  539. };
  540. };