ov9740.c 26 KB

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  1. /*
  2. * OmniVision OV9740 Camera Driver
  3. *
  4. * Copyright (C) 2011 NVIDIA Corporation
  5. *
  6. * Based on ov9640 camera driver.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/i2c.h>
  15. #include <linux/slab.h>
  16. #include <media/v4l2-chip-ident.h>
  17. #include <media/soc_camera.h>
  18. #define to_ov9740(sd) container_of(sd, struct ov9740_priv, subdev)
  19. /* General Status Registers */
  20. #define OV9740_MODEL_ID_HI 0x0000
  21. #define OV9740_MODEL_ID_LO 0x0001
  22. #define OV9740_REVISION_NUMBER 0x0002
  23. #define OV9740_MANUFACTURER_ID 0x0003
  24. #define OV9740_SMIA_VERSION 0x0004
  25. /* General Setup Registers */
  26. #define OV9740_MODE_SELECT 0x0100
  27. #define OV9740_IMAGE_ORT 0x0101
  28. #define OV9740_SOFTWARE_RESET 0x0103
  29. #define OV9740_GRP_PARAM_HOLD 0x0104
  30. #define OV9740_MSK_CORRUP_FM 0x0105
  31. /* Timing Setting */
  32. #define OV9740_FRM_LENGTH_LN_HI 0x0340 /* VTS */
  33. #define OV9740_FRM_LENGTH_LN_LO 0x0341 /* VTS */
  34. #define OV9740_LN_LENGTH_PCK_HI 0x0342 /* HTS */
  35. #define OV9740_LN_LENGTH_PCK_LO 0x0343 /* HTS */
  36. #define OV9740_X_ADDR_START_HI 0x0344
  37. #define OV9740_X_ADDR_START_LO 0x0345
  38. #define OV9740_Y_ADDR_START_HI 0x0346
  39. #define OV9740_Y_ADDR_START_LO 0x0347
  40. #define OV9740_X_ADDR_END_HI 0x0348
  41. #define OV9740_X_ADDR_END_LO 0x0349
  42. #define OV9740_Y_ADDR_END_HI 0x034a
  43. #define OV9740_Y_ADDR_END_LO 0x034b
  44. #define OV9740_X_OUTPUT_SIZE_HI 0x034c
  45. #define OV9740_X_OUTPUT_SIZE_LO 0x034d
  46. #define OV9740_Y_OUTPUT_SIZE_HI 0x034e
  47. #define OV9740_Y_OUTPUT_SIZE_LO 0x034f
  48. /* IO Control Registers */
  49. #define OV9740_IO_CREL00 0x3002
  50. #define OV9740_IO_CREL01 0x3004
  51. #define OV9740_IO_CREL02 0x3005
  52. #define OV9740_IO_OUTPUT_SEL01 0x3026
  53. #define OV9740_IO_OUTPUT_SEL02 0x3027
  54. /* AWB Registers */
  55. #define OV9740_AWB_MANUAL_CTRL 0x3406
  56. /* Analog Control Registers */
  57. #define OV9740_ANALOG_CTRL01 0x3601
  58. #define OV9740_ANALOG_CTRL02 0x3602
  59. #define OV9740_ANALOG_CTRL03 0x3603
  60. #define OV9740_ANALOG_CTRL04 0x3604
  61. #define OV9740_ANALOG_CTRL10 0x3610
  62. #define OV9740_ANALOG_CTRL12 0x3612
  63. #define OV9740_ANALOG_CTRL15 0x3615
  64. #define OV9740_ANALOG_CTRL20 0x3620
  65. #define OV9740_ANALOG_CTRL21 0x3621
  66. #define OV9740_ANALOG_CTRL22 0x3622
  67. #define OV9740_ANALOG_CTRL30 0x3630
  68. #define OV9740_ANALOG_CTRL31 0x3631
  69. #define OV9740_ANALOG_CTRL32 0x3632
  70. #define OV9740_ANALOG_CTRL33 0x3633
  71. /* Sensor Control */
  72. #define OV9740_SENSOR_CTRL03 0x3703
  73. #define OV9740_SENSOR_CTRL04 0x3704
  74. #define OV9740_SENSOR_CTRL05 0x3705
  75. #define OV9740_SENSOR_CTRL07 0x3707
  76. /* Timing Control */
  77. #define OV9740_TIMING_CTRL17 0x3817
  78. #define OV9740_TIMING_CTRL19 0x3819
  79. #define OV9740_TIMING_CTRL33 0x3833
  80. #define OV9740_TIMING_CTRL35 0x3835
  81. /* Banding Filter */
  82. #define OV9740_AEC_MAXEXPO_60_H 0x3a02
  83. #define OV9740_AEC_MAXEXPO_60_L 0x3a03
  84. #define OV9740_AEC_B50_STEP_HI 0x3a08
  85. #define OV9740_AEC_B50_STEP_LO 0x3a09
  86. #define OV9740_AEC_B60_STEP_HI 0x3a0a
  87. #define OV9740_AEC_B60_STEP_LO 0x3a0b
  88. #define OV9740_AEC_CTRL0D 0x3a0d
  89. #define OV9740_AEC_CTRL0E 0x3a0e
  90. #define OV9740_AEC_MAXEXPO_50_H 0x3a14
  91. #define OV9740_AEC_MAXEXPO_50_L 0x3a15
  92. /* AEC/AGC Control */
  93. #define OV9740_AEC_ENABLE 0x3503
  94. #define OV9740_GAIN_CEILING_01 0x3a18
  95. #define OV9740_GAIN_CEILING_02 0x3a19
  96. #define OV9740_AEC_HI_THRESHOLD 0x3a11
  97. #define OV9740_AEC_3A1A 0x3a1a
  98. #define OV9740_AEC_CTRL1B_WPT2 0x3a1b
  99. #define OV9740_AEC_CTRL0F_WPT 0x3a0f
  100. #define OV9740_AEC_CTRL10_BPT 0x3a10
  101. #define OV9740_AEC_CTRL1E_BPT2 0x3a1e
  102. #define OV9740_AEC_LO_THRESHOLD 0x3a1f
  103. /* BLC Control */
  104. #define OV9740_BLC_AUTO_ENABLE 0x4002
  105. #define OV9740_BLC_MODE 0x4005
  106. /* VFIFO */
  107. #define OV9740_VFIFO_READ_START_HI 0x4608
  108. #define OV9740_VFIFO_READ_START_LO 0x4609
  109. /* DVP Control */
  110. #define OV9740_DVP_VSYNC_CTRL02 0x4702
  111. #define OV9740_DVP_VSYNC_MODE 0x4704
  112. #define OV9740_DVP_VSYNC_CTRL06 0x4706
  113. /* PLL Setting */
  114. #define OV9740_PLL_MODE_CTRL01 0x3104
  115. #define OV9740_PRE_PLL_CLK_DIV 0x0305
  116. #define OV9740_PLL_MULTIPLIER 0x0307
  117. #define OV9740_VT_SYS_CLK_DIV 0x0303
  118. #define OV9740_VT_PIX_CLK_DIV 0x0301
  119. #define OV9740_PLL_CTRL3010 0x3010
  120. #define OV9740_VFIFO_CTRL00 0x460e
  121. /* ISP Control */
  122. #define OV9740_ISP_CTRL00 0x5000
  123. #define OV9740_ISP_CTRL01 0x5001
  124. #define OV9740_ISP_CTRL03 0x5003
  125. #define OV9740_ISP_CTRL05 0x5005
  126. #define OV9740_ISP_CTRL12 0x5012
  127. #define OV9740_ISP_CTRL19 0x5019
  128. #define OV9740_ISP_CTRL1A 0x501a
  129. #define OV9740_ISP_CTRL1E 0x501e
  130. #define OV9740_ISP_CTRL1F 0x501f
  131. #define OV9740_ISP_CTRL20 0x5020
  132. #define OV9740_ISP_CTRL21 0x5021
  133. /* AWB */
  134. #define OV9740_AWB_CTRL00 0x5180
  135. #define OV9740_AWB_CTRL01 0x5181
  136. #define OV9740_AWB_CTRL02 0x5182
  137. #define OV9740_AWB_CTRL03 0x5183
  138. #define OV9740_AWB_ADV_CTRL01 0x5184
  139. #define OV9740_AWB_ADV_CTRL02 0x5185
  140. #define OV9740_AWB_ADV_CTRL03 0x5186
  141. #define OV9740_AWB_ADV_CTRL04 0x5187
  142. #define OV9740_AWB_ADV_CTRL05 0x5188
  143. #define OV9740_AWB_ADV_CTRL06 0x5189
  144. #define OV9740_AWB_ADV_CTRL07 0x518a
  145. #define OV9740_AWB_ADV_CTRL08 0x518b
  146. #define OV9740_AWB_ADV_CTRL09 0x518c
  147. #define OV9740_AWB_ADV_CTRL10 0x518d
  148. #define OV9740_AWB_ADV_CTRL11 0x518e
  149. #define OV9740_AWB_CTRL0F 0x518f
  150. #define OV9740_AWB_CTRL10 0x5190
  151. #define OV9740_AWB_CTRL11 0x5191
  152. #define OV9740_AWB_CTRL12 0x5192
  153. #define OV9740_AWB_CTRL13 0x5193
  154. #define OV9740_AWB_CTRL14 0x5194
  155. /* MIPI Control */
  156. #define OV9740_MIPI_CTRL00 0x4800
  157. #define OV9740_MIPI_3837 0x3837
  158. #define OV9740_MIPI_CTRL01 0x4801
  159. #define OV9740_MIPI_CTRL03 0x4803
  160. #define OV9740_MIPI_CTRL05 0x4805
  161. #define OV9740_VFIFO_RD_CTRL 0x4601
  162. #define OV9740_MIPI_CTRL_3012 0x3012
  163. #define OV9740_SC_CMMM_MIPI_CTR 0x3014
  164. #define OV9740_MAX_WIDTH 1280
  165. #define OV9740_MAX_HEIGHT 720
  166. /* Misc. structures */
  167. struct ov9740_reg {
  168. u16 reg;
  169. u8 val;
  170. };
  171. struct ov9740_priv {
  172. struct v4l2_subdev subdev;
  173. int ident;
  174. u16 model;
  175. u8 revision;
  176. u8 manid;
  177. u8 smiaver;
  178. bool flag_vflip;
  179. bool flag_hflip;
  180. };
  181. static const struct ov9740_reg ov9740_defaults[] = {
  182. /* Software Reset */
  183. { OV9740_SOFTWARE_RESET, 0x01 },
  184. /* Banding Filter */
  185. { OV9740_AEC_B50_STEP_HI, 0x00 },
  186. { OV9740_AEC_B50_STEP_LO, 0xe8 },
  187. { OV9740_AEC_CTRL0E, 0x03 },
  188. { OV9740_AEC_MAXEXPO_50_H, 0x15 },
  189. { OV9740_AEC_MAXEXPO_50_L, 0xc6 },
  190. { OV9740_AEC_B60_STEP_HI, 0x00 },
  191. { OV9740_AEC_B60_STEP_LO, 0xc0 },
  192. { OV9740_AEC_CTRL0D, 0x04 },
  193. { OV9740_AEC_MAXEXPO_60_H, 0x18 },
  194. { OV9740_AEC_MAXEXPO_60_L, 0x20 },
  195. /* LC */
  196. { 0x5842, 0x02 }, { 0x5843, 0x5e }, { 0x5844, 0x04 }, { 0x5845, 0x32 },
  197. { 0x5846, 0x03 }, { 0x5847, 0x29 }, { 0x5848, 0x02 }, { 0x5849, 0xcc },
  198. /* Un-documented OV9740 registers */
  199. { 0x5800, 0x29 }, { 0x5801, 0x25 }, { 0x5802, 0x20 }, { 0x5803, 0x21 },
  200. { 0x5804, 0x26 }, { 0x5805, 0x2e }, { 0x5806, 0x11 }, { 0x5807, 0x0c },
  201. { 0x5808, 0x09 }, { 0x5809, 0x0a }, { 0x580a, 0x0e }, { 0x580b, 0x16 },
  202. { 0x580c, 0x06 }, { 0x580d, 0x02 }, { 0x580e, 0x00 }, { 0x580f, 0x00 },
  203. { 0x5810, 0x04 }, { 0x5811, 0x0a }, { 0x5812, 0x05 }, { 0x5813, 0x02 },
  204. { 0x5814, 0x00 }, { 0x5815, 0x00 }, { 0x5816, 0x03 }, { 0x5817, 0x09 },
  205. { 0x5818, 0x0f }, { 0x5819, 0x0a }, { 0x581a, 0x07 }, { 0x581b, 0x08 },
  206. { 0x581c, 0x0b }, { 0x581d, 0x14 }, { 0x581e, 0x28 }, { 0x581f, 0x23 },
  207. { 0x5820, 0x1d }, { 0x5821, 0x1e }, { 0x5822, 0x24 }, { 0x5823, 0x2a },
  208. { 0x5824, 0x4f }, { 0x5825, 0x6f }, { 0x5826, 0x5f }, { 0x5827, 0x7f },
  209. { 0x5828, 0x9f }, { 0x5829, 0x5f }, { 0x582a, 0x8f }, { 0x582b, 0x9e },
  210. { 0x582c, 0x8f }, { 0x582d, 0x9f }, { 0x582e, 0x4f }, { 0x582f, 0x87 },
  211. { 0x5830, 0x86 }, { 0x5831, 0x97 }, { 0x5832, 0xae }, { 0x5833, 0x3f },
  212. { 0x5834, 0x8e }, { 0x5835, 0x7c }, { 0x5836, 0x7e }, { 0x5837, 0xaf },
  213. { 0x5838, 0x8f }, { 0x5839, 0x8f }, { 0x583a, 0x9f }, { 0x583b, 0x7f },
  214. { 0x583c, 0x5f },
  215. /* Y Gamma */
  216. { 0x5480, 0x07 }, { 0x5481, 0x18 }, { 0x5482, 0x2c }, { 0x5483, 0x4e },
  217. { 0x5484, 0x5e }, { 0x5485, 0x6b }, { 0x5486, 0x77 }, { 0x5487, 0x82 },
  218. { 0x5488, 0x8c }, { 0x5489, 0x95 }, { 0x548a, 0xa4 }, { 0x548b, 0xb1 },
  219. { 0x548c, 0xc6 }, { 0x548d, 0xd8 }, { 0x548e, 0xe9 },
  220. /* UV Gamma */
  221. { 0x5490, 0x0f }, { 0x5491, 0xff }, { 0x5492, 0x0d }, { 0x5493, 0x05 },
  222. { 0x5494, 0x07 }, { 0x5495, 0x1a }, { 0x5496, 0x04 }, { 0x5497, 0x01 },
  223. { 0x5498, 0x03 }, { 0x5499, 0x53 }, { 0x549a, 0x02 }, { 0x549b, 0xeb },
  224. { 0x549c, 0x02 }, { 0x549d, 0xa0 }, { 0x549e, 0x02 }, { 0x549f, 0x67 },
  225. { 0x54a0, 0x02 }, { 0x54a1, 0x3b }, { 0x54a2, 0x02 }, { 0x54a3, 0x18 },
  226. { 0x54a4, 0x01 }, { 0x54a5, 0xe7 }, { 0x54a6, 0x01 }, { 0x54a7, 0xc3 },
  227. { 0x54a8, 0x01 }, { 0x54a9, 0x94 }, { 0x54aa, 0x01 }, { 0x54ab, 0x72 },
  228. { 0x54ac, 0x01 }, { 0x54ad, 0x57 },
  229. /* AWB */
  230. { OV9740_AWB_CTRL00, 0xf0 },
  231. { OV9740_AWB_CTRL01, 0x00 },
  232. { OV9740_AWB_CTRL02, 0x41 },
  233. { OV9740_AWB_CTRL03, 0x42 },
  234. { OV9740_AWB_ADV_CTRL01, 0x8a },
  235. { OV9740_AWB_ADV_CTRL02, 0x61 },
  236. { OV9740_AWB_ADV_CTRL03, 0xce },
  237. { OV9740_AWB_ADV_CTRL04, 0xa8 },
  238. { OV9740_AWB_ADV_CTRL05, 0x17 },
  239. { OV9740_AWB_ADV_CTRL06, 0x1f },
  240. { OV9740_AWB_ADV_CTRL07, 0x27 },
  241. { OV9740_AWB_ADV_CTRL08, 0x41 },
  242. { OV9740_AWB_ADV_CTRL09, 0x34 },
  243. { OV9740_AWB_ADV_CTRL10, 0xf0 },
  244. { OV9740_AWB_ADV_CTRL11, 0x10 },
  245. { OV9740_AWB_CTRL0F, 0xff },
  246. { OV9740_AWB_CTRL10, 0x00 },
  247. { OV9740_AWB_CTRL11, 0xff },
  248. { OV9740_AWB_CTRL12, 0x00 },
  249. { OV9740_AWB_CTRL13, 0xff },
  250. { OV9740_AWB_CTRL14, 0x00 },
  251. /* CIP */
  252. { 0x530d, 0x12 },
  253. /* CMX */
  254. { 0x5380, 0x01 }, { 0x5381, 0x00 }, { 0x5382, 0x00 }, { 0x5383, 0x17 },
  255. { 0x5384, 0x00 }, { 0x5385, 0x01 }, { 0x5386, 0x00 }, { 0x5387, 0x00 },
  256. { 0x5388, 0x00 }, { 0x5389, 0xe0 }, { 0x538a, 0x00 }, { 0x538b, 0x20 },
  257. { 0x538c, 0x00 }, { 0x538d, 0x00 }, { 0x538e, 0x00 }, { 0x538f, 0x16 },
  258. { 0x5390, 0x00 }, { 0x5391, 0x9c }, { 0x5392, 0x00 }, { 0x5393, 0xa0 },
  259. { 0x5394, 0x18 },
  260. /* 50/60 Detection */
  261. { 0x3c0a, 0x9c }, { 0x3c0b, 0x3f },
  262. /* Output Select */
  263. { OV9740_IO_OUTPUT_SEL01, 0x00 },
  264. { OV9740_IO_OUTPUT_SEL02, 0x00 },
  265. { OV9740_IO_CREL00, 0x00 },
  266. { OV9740_IO_CREL01, 0x00 },
  267. { OV9740_IO_CREL02, 0x00 },
  268. /* AWB Control */
  269. { OV9740_AWB_MANUAL_CTRL, 0x00 },
  270. /* Analog Control */
  271. { OV9740_ANALOG_CTRL03, 0xaa },
  272. { OV9740_ANALOG_CTRL32, 0x2f },
  273. { OV9740_ANALOG_CTRL20, 0x66 },
  274. { OV9740_ANALOG_CTRL21, 0xc0 },
  275. { OV9740_ANALOG_CTRL31, 0x52 },
  276. { OV9740_ANALOG_CTRL33, 0x50 },
  277. { OV9740_ANALOG_CTRL30, 0xca },
  278. { OV9740_ANALOG_CTRL04, 0x0c },
  279. { OV9740_ANALOG_CTRL01, 0x40 },
  280. { OV9740_ANALOG_CTRL02, 0x16 },
  281. { OV9740_ANALOG_CTRL10, 0xa1 },
  282. { OV9740_ANALOG_CTRL12, 0x24 },
  283. { OV9740_ANALOG_CTRL22, 0x9f },
  284. { OV9740_ANALOG_CTRL15, 0xf0 },
  285. /* Sensor Control */
  286. { OV9740_SENSOR_CTRL03, 0x42 },
  287. { OV9740_SENSOR_CTRL04, 0x10 },
  288. { OV9740_SENSOR_CTRL05, 0x45 },
  289. { OV9740_SENSOR_CTRL07, 0x14 },
  290. /* Timing Control */
  291. { OV9740_TIMING_CTRL33, 0x04 },
  292. { OV9740_TIMING_CTRL35, 0x02 },
  293. { OV9740_TIMING_CTRL19, 0x6e },
  294. { OV9740_TIMING_CTRL17, 0x94 },
  295. /* AEC/AGC Control */
  296. { OV9740_AEC_ENABLE, 0x10 },
  297. { OV9740_GAIN_CEILING_01, 0x00 },
  298. { OV9740_GAIN_CEILING_02, 0x7f },
  299. { OV9740_AEC_HI_THRESHOLD, 0xa0 },
  300. { OV9740_AEC_3A1A, 0x05 },
  301. { OV9740_AEC_CTRL1B_WPT2, 0x50 },
  302. { OV9740_AEC_CTRL0F_WPT, 0x50 },
  303. { OV9740_AEC_CTRL10_BPT, 0x4c },
  304. { OV9740_AEC_CTRL1E_BPT2, 0x4c },
  305. { OV9740_AEC_LO_THRESHOLD, 0x26 },
  306. /* BLC Control */
  307. { OV9740_BLC_AUTO_ENABLE, 0x45 },
  308. { OV9740_BLC_MODE, 0x18 },
  309. /* DVP Control */
  310. { OV9740_DVP_VSYNC_CTRL02, 0x04 },
  311. { OV9740_DVP_VSYNC_MODE, 0x00 },
  312. { OV9740_DVP_VSYNC_CTRL06, 0x08 },
  313. /* PLL Setting */
  314. { OV9740_PLL_MODE_CTRL01, 0x20 },
  315. { OV9740_PRE_PLL_CLK_DIV, 0x03 },
  316. { OV9740_PLL_MULTIPLIER, 0x4c },
  317. { OV9740_VT_SYS_CLK_DIV, 0x01 },
  318. { OV9740_VT_PIX_CLK_DIV, 0x08 },
  319. { OV9740_PLL_CTRL3010, 0x01 },
  320. { OV9740_VFIFO_CTRL00, 0x82 },
  321. /* Timing Setting */
  322. /* VTS */
  323. { OV9740_FRM_LENGTH_LN_HI, 0x03 },
  324. { OV9740_FRM_LENGTH_LN_LO, 0x07 },
  325. /* HTS */
  326. { OV9740_LN_LENGTH_PCK_HI, 0x06 },
  327. { OV9740_LN_LENGTH_PCK_LO, 0x62 },
  328. /* MIPI Control */
  329. { OV9740_MIPI_CTRL00, 0x44 }, /* 0x64 for discontinuous clk */
  330. { OV9740_MIPI_3837, 0x01 },
  331. { OV9740_MIPI_CTRL01, 0x0f },
  332. { OV9740_MIPI_CTRL03, 0x05 },
  333. { OV9740_MIPI_CTRL05, 0x10 },
  334. { OV9740_VFIFO_RD_CTRL, 0x16 },
  335. { OV9740_MIPI_CTRL_3012, 0x70 },
  336. { OV9740_SC_CMMM_MIPI_CTR, 0x01 },
  337. /* YUYV order */
  338. { OV9740_ISP_CTRL19, 0x02 },
  339. };
  340. static enum v4l2_mbus_pixelcode ov9740_codes[] = {
  341. V4L2_MBUS_FMT_YUYV8_2X8,
  342. };
  343. static const struct v4l2_queryctrl ov9740_controls[] = {
  344. {
  345. .id = V4L2_CID_VFLIP,
  346. .type = V4L2_CTRL_TYPE_BOOLEAN,
  347. .name = "Flip Vertically",
  348. .minimum = 0,
  349. .maximum = 1,
  350. .step = 1,
  351. .default_value = 0,
  352. },
  353. {
  354. .id = V4L2_CID_HFLIP,
  355. .type = V4L2_CTRL_TYPE_BOOLEAN,
  356. .name = "Flip Horizontally",
  357. .minimum = 0,
  358. .maximum = 1,
  359. .step = 1,
  360. .default_value = 0,
  361. },
  362. };
  363. /* read a register */
  364. static int ov9740_reg_read(struct i2c_client *client, u16 reg, u8 *val)
  365. {
  366. int ret;
  367. struct i2c_msg msg[] = {
  368. {
  369. .addr = client->addr,
  370. .flags = 0,
  371. .len = 2,
  372. .buf = (u8 *)&reg,
  373. },
  374. {
  375. .addr = client->addr,
  376. .flags = I2C_M_RD,
  377. .len = 1,
  378. .buf = val,
  379. },
  380. };
  381. reg = swab16(reg);
  382. ret = i2c_transfer(client->adapter, msg, 2);
  383. if (ret < 0) {
  384. dev_err(&client->dev, "Failed reading register 0x%04x!\n", reg);
  385. return ret;
  386. }
  387. return 0;
  388. }
  389. /* write a register */
  390. static int ov9740_reg_write(struct i2c_client *client, u16 reg, u8 val)
  391. {
  392. struct i2c_msg msg;
  393. struct {
  394. u16 reg;
  395. u8 val;
  396. } __packed buf;
  397. int ret;
  398. reg = swab16(reg);
  399. buf.reg = reg;
  400. buf.val = val;
  401. msg.addr = client->addr;
  402. msg.flags = 0;
  403. msg.len = 3;
  404. msg.buf = (u8 *)&buf;
  405. ret = i2c_transfer(client->adapter, &msg, 1);
  406. if (ret < 0) {
  407. dev_err(&client->dev, "Failed writing register 0x%04x!\n", reg);
  408. return ret;
  409. }
  410. return 0;
  411. }
  412. /* Read a register, alter its bits, write it back */
  413. static int ov9740_reg_rmw(struct i2c_client *client, u16 reg, u8 set, u8 unset)
  414. {
  415. u8 val;
  416. int ret;
  417. ret = ov9740_reg_read(client, reg, &val);
  418. if (ret < 0) {
  419. dev_err(&client->dev,
  420. "[Read]-Modify-Write of register 0x%04x failed!\n",
  421. reg);
  422. return ret;
  423. }
  424. val |= set;
  425. val &= ~unset;
  426. ret = ov9740_reg_write(client, reg, val);
  427. if (ret < 0) {
  428. dev_err(&client->dev,
  429. "Read-Modify-[Write] of register 0x%04x failed!\n",
  430. reg);
  431. return ret;
  432. }
  433. return 0;
  434. }
  435. static int ov9740_reg_write_array(struct i2c_client *client,
  436. const struct ov9740_reg *regarray,
  437. int regarraylen)
  438. {
  439. int i;
  440. int ret;
  441. for (i = 0; i < regarraylen; i++) {
  442. ret = ov9740_reg_write(client,
  443. regarray[i].reg, regarray[i].val);
  444. if (ret < 0)
  445. return ret;
  446. }
  447. return 0;
  448. }
  449. /* Start/Stop streaming from the device */
  450. static int ov9740_s_stream(struct v4l2_subdev *sd, int enable)
  451. {
  452. struct i2c_client *client = v4l2_get_subdevdata(sd);
  453. struct ov9740_priv *priv = to_ov9740(sd);
  454. int ret;
  455. /* Program orientation register. */
  456. if (priv->flag_vflip)
  457. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x2, 0);
  458. else
  459. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x2);
  460. if (ret < 0)
  461. return ret;
  462. if (priv->flag_hflip)
  463. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0x1, 0);
  464. else
  465. ret = ov9740_reg_rmw(client, OV9740_IMAGE_ORT, 0, 0x1);
  466. if (ret < 0)
  467. return ret;
  468. if (enable) {
  469. dev_dbg(&client->dev, "Enabling Streaming\n");
  470. /* Start Streaming */
  471. ret = ov9740_reg_write(client, OV9740_MODE_SELECT, 0x01);
  472. } else {
  473. dev_dbg(&client->dev, "Disabling Streaming\n");
  474. /* Software Reset */
  475. ret = ov9740_reg_write(client, OV9740_SOFTWARE_RESET, 0x01);
  476. if (!ret)
  477. /* Setting Streaming to Standby */
  478. ret = ov9740_reg_write(client, OV9740_MODE_SELECT,
  479. 0x00);
  480. }
  481. return ret;
  482. }
  483. /* Alter bus settings on camera side */
  484. static int ov9740_set_bus_param(struct soc_camera_device *icd,
  485. unsigned long flags)
  486. {
  487. return 0;
  488. }
  489. /* Request bus settings on camera side */
  490. static unsigned long ov9740_query_bus_param(struct soc_camera_device *icd)
  491. {
  492. struct soc_camera_link *icl = to_soc_camera_link(icd);
  493. unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
  494. SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
  495. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
  496. return soc_camera_apply_sensor_flags(icl, flags);
  497. }
  498. /* Get status of additional camera capabilities */
  499. static int ov9740_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  500. {
  501. struct ov9740_priv *priv = to_ov9740(sd);
  502. switch (ctrl->id) {
  503. case V4L2_CID_VFLIP:
  504. ctrl->value = priv->flag_vflip;
  505. break;
  506. case V4L2_CID_HFLIP:
  507. ctrl->value = priv->flag_hflip;
  508. break;
  509. default:
  510. return -EINVAL;
  511. }
  512. return 0;
  513. }
  514. /* Set status of additional camera capabilities */
  515. static int ov9740_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  516. {
  517. struct ov9740_priv *priv = to_ov9740(sd);
  518. switch (ctrl->id) {
  519. case V4L2_CID_VFLIP:
  520. priv->flag_vflip = ctrl->value;
  521. break;
  522. case V4L2_CID_HFLIP:
  523. priv->flag_hflip = ctrl->value;
  524. break;
  525. default:
  526. return -EINVAL;
  527. }
  528. return 0;
  529. }
  530. /* Get chip identification */
  531. static int ov9740_g_chip_ident(struct v4l2_subdev *sd,
  532. struct v4l2_dbg_chip_ident *id)
  533. {
  534. struct ov9740_priv *priv = to_ov9740(sd);
  535. id->ident = priv->ident;
  536. id->revision = priv->revision;
  537. return 0;
  538. }
  539. #ifdef CONFIG_VIDEO_ADV_DEBUG
  540. static int ov9740_get_register(struct v4l2_subdev *sd,
  541. struct v4l2_dbg_register *reg)
  542. {
  543. struct i2c_client *client = v4l2_get_subdevdata(sd);
  544. int ret;
  545. u8 val;
  546. if (reg->reg & ~0xffff)
  547. return -EINVAL;
  548. reg->size = 2;
  549. ret = ov9740_reg_read(client, reg->reg, &val);
  550. if (ret)
  551. return ret;
  552. reg->val = (__u64)val;
  553. return ret;
  554. }
  555. static int ov9740_set_register(struct v4l2_subdev *sd,
  556. struct v4l2_dbg_register *reg)
  557. {
  558. struct i2c_client *client = v4l2_get_subdevdata(sd);
  559. if (reg->reg & ~0xffff || reg->val & ~0xff)
  560. return -EINVAL;
  561. return ov9740_reg_write(client, reg->reg, reg->val);
  562. }
  563. #endif
  564. /* select nearest higher resolution for capture */
  565. static void ov9740_res_roundup(u32 *width, u32 *height)
  566. {
  567. /* Width must be a multiple of 4 pixels. */
  568. *width = ALIGN(*width, 4);
  569. /* Max resolution is 1280x720 (720p). */
  570. if (*width > OV9740_MAX_WIDTH)
  571. *width = OV9740_MAX_WIDTH;
  572. if (*height > OV9740_MAX_HEIGHT)
  573. *height = OV9740_MAX_HEIGHT;
  574. }
  575. /* Setup registers according to resolution and color encoding */
  576. static int ov9740_set_res(struct i2c_client *client, u32 width, u32 height)
  577. {
  578. u32 x_start;
  579. u32 y_start;
  580. u32 x_end;
  581. u32 y_end;
  582. bool scaling = 0;
  583. u32 scale_input_x;
  584. u32 scale_input_y;
  585. int ret;
  586. if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT))
  587. scaling = 1;
  588. /*
  589. * Try to use as much of the sensor area as possible when supporting
  590. * smaller resolutions. Depending on the aspect ratio of the
  591. * chosen resolution, we can either use the full width of the sensor,
  592. * or the full height of the sensor (or both if the aspect ratio is
  593. * the same as 1280x720.
  594. */
  595. if ((OV9740_MAX_WIDTH * height) > (OV9740_MAX_HEIGHT * width)) {
  596. scale_input_x = (OV9740_MAX_HEIGHT * width) / height;
  597. scale_input_y = OV9740_MAX_HEIGHT;
  598. } else {
  599. scale_input_x = OV9740_MAX_WIDTH;
  600. scale_input_y = (OV9740_MAX_WIDTH * height) / width;
  601. }
  602. /* These describe the area of the sensor to use. */
  603. x_start = (OV9740_MAX_WIDTH - scale_input_x) / 2;
  604. y_start = (OV9740_MAX_HEIGHT - scale_input_y) / 2;
  605. x_end = x_start + scale_input_x - 1;
  606. y_end = y_start + scale_input_y - 1;
  607. ret = ov9740_reg_write(client, OV9740_X_ADDR_START_HI, x_start >> 8);
  608. if (ret)
  609. goto done;
  610. ret = ov9740_reg_write(client, OV9740_X_ADDR_START_LO, x_start & 0xff);
  611. if (ret)
  612. goto done;
  613. ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_HI, y_start >> 8);
  614. if (ret)
  615. goto done;
  616. ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_LO, y_start & 0xff);
  617. if (ret)
  618. goto done;
  619. ret = ov9740_reg_write(client, OV9740_X_ADDR_END_HI, x_end >> 8);
  620. if (ret)
  621. goto done;
  622. ret = ov9740_reg_write(client, OV9740_X_ADDR_END_LO, x_end & 0xff);
  623. if (ret)
  624. goto done;
  625. ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_HI, y_end >> 8);
  626. if (ret)
  627. goto done;
  628. ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_LO, y_end & 0xff);
  629. if (ret)
  630. goto done;
  631. ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_HI, width >> 8);
  632. if (ret)
  633. goto done;
  634. ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_LO, width & 0xff);
  635. if (ret)
  636. goto done;
  637. ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_HI, height >> 8);
  638. if (ret)
  639. goto done;
  640. ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_LO, height & 0xff);
  641. if (ret)
  642. goto done;
  643. ret = ov9740_reg_write(client, OV9740_ISP_CTRL1E, scale_input_x >> 8);
  644. if (ret)
  645. goto done;
  646. ret = ov9740_reg_write(client, OV9740_ISP_CTRL1F, scale_input_x & 0xff);
  647. if (ret)
  648. goto done;
  649. ret = ov9740_reg_write(client, OV9740_ISP_CTRL20, scale_input_y >> 8);
  650. if (ret)
  651. goto done;
  652. ret = ov9740_reg_write(client, OV9740_ISP_CTRL21, scale_input_y & 0xff);
  653. if (ret)
  654. goto done;
  655. ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_HI,
  656. (scale_input_x - width) >> 8);
  657. if (ret)
  658. goto done;
  659. ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_LO,
  660. (scale_input_x - width) & 0xff);
  661. if (ret)
  662. goto done;
  663. ret = ov9740_reg_write(client, OV9740_ISP_CTRL00, 0xff);
  664. if (ret)
  665. goto done;
  666. ret = ov9740_reg_write(client, OV9740_ISP_CTRL01, 0xef |
  667. (scaling << 4));
  668. if (ret)
  669. goto done;
  670. ret = ov9740_reg_write(client, OV9740_ISP_CTRL03, 0xff);
  671. done:
  672. return ret;
  673. }
  674. /* set the format we will capture in */
  675. static int ov9740_s_fmt(struct v4l2_subdev *sd,
  676. struct v4l2_mbus_framefmt *mf)
  677. {
  678. struct i2c_client *client = v4l2_get_subdevdata(sd);
  679. enum v4l2_colorspace cspace;
  680. enum v4l2_mbus_pixelcode code = mf->code;
  681. int ret;
  682. ov9740_res_roundup(&mf->width, &mf->height);
  683. switch (code) {
  684. case V4L2_MBUS_FMT_YUYV8_2X8:
  685. cspace = V4L2_COLORSPACE_SRGB;
  686. break;
  687. default:
  688. return -EINVAL;
  689. }
  690. ret = ov9740_reg_write_array(client, ov9740_defaults,
  691. ARRAY_SIZE(ov9740_defaults));
  692. if (ret < 0)
  693. return ret;
  694. ret = ov9740_set_res(client, mf->width, mf->height);
  695. if (ret < 0)
  696. return ret;
  697. mf->code = code;
  698. mf->colorspace = cspace;
  699. return ret;
  700. }
  701. static int ov9740_try_fmt(struct v4l2_subdev *sd,
  702. struct v4l2_mbus_framefmt *mf)
  703. {
  704. ov9740_res_roundup(&mf->width, &mf->height);
  705. mf->field = V4L2_FIELD_NONE;
  706. mf->code = V4L2_MBUS_FMT_YUYV8_2X8;
  707. mf->colorspace = V4L2_COLORSPACE_SRGB;
  708. return 0;
  709. }
  710. static int ov9740_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  711. enum v4l2_mbus_pixelcode *code)
  712. {
  713. if (index >= ARRAY_SIZE(ov9740_codes))
  714. return -EINVAL;
  715. *code = ov9740_codes[index];
  716. return 0;
  717. }
  718. static int ov9740_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  719. {
  720. a->bounds.left = 0;
  721. a->bounds.top = 0;
  722. a->bounds.width = OV9740_MAX_WIDTH;
  723. a->bounds.height = OV9740_MAX_HEIGHT;
  724. a->defrect = a->bounds;
  725. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  726. a->pixelaspect.numerator = 1;
  727. a->pixelaspect.denominator = 1;
  728. return 0;
  729. }
  730. static int ov9740_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  731. {
  732. a->c.left = 0;
  733. a->c.top = 0;
  734. a->c.width = OV9740_MAX_WIDTH;
  735. a->c.height = OV9740_MAX_HEIGHT;
  736. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  737. return 0;
  738. }
  739. static int ov9740_video_probe(struct soc_camera_device *icd,
  740. struct i2c_client *client)
  741. {
  742. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  743. struct ov9740_priv *priv = to_ov9740(sd);
  744. u8 modelhi, modello;
  745. int ret;
  746. /*
  747. * We must have a parent by now. And it cannot be a wrong one.
  748. * So this entire test is completely redundant.
  749. */
  750. if (!icd->dev.parent ||
  751. to_soc_camera_host(icd->dev.parent)->nr != icd->iface) {
  752. dev_err(&client->dev, "Parent missing or invalid!\n");
  753. ret = -ENODEV;
  754. goto err;
  755. }
  756. /*
  757. * check and show product ID and manufacturer ID
  758. */
  759. ret = ov9740_reg_read(client, OV9740_MODEL_ID_HI, &modelhi);
  760. if (ret < 0)
  761. goto err;
  762. ret = ov9740_reg_read(client, OV9740_MODEL_ID_LO, &modello);
  763. if (ret < 0)
  764. goto err;
  765. priv->model = (modelhi << 8) | modello;
  766. ret = ov9740_reg_read(client, OV9740_REVISION_NUMBER, &priv->revision);
  767. if (ret < 0)
  768. goto err;
  769. ret = ov9740_reg_read(client, OV9740_MANUFACTURER_ID, &priv->manid);
  770. if (ret < 0)
  771. goto err;
  772. ret = ov9740_reg_read(client, OV9740_SMIA_VERSION, &priv->smiaver);
  773. if (ret < 0)
  774. goto err;
  775. if (priv->model != 0x9740) {
  776. ret = -ENODEV;
  777. goto err;
  778. }
  779. priv->ident = V4L2_IDENT_OV9740;
  780. dev_info(&client->dev, "ov9740 Model ID 0x%04x, Revision 0x%02x, "
  781. "Manufacturer 0x%02x, SMIA Version 0x%02x\n",
  782. priv->model, priv->revision, priv->manid, priv->smiaver);
  783. err:
  784. return ret;
  785. }
  786. static struct soc_camera_ops ov9740_ops = {
  787. .set_bus_param = ov9740_set_bus_param,
  788. .query_bus_param = ov9740_query_bus_param,
  789. .controls = ov9740_controls,
  790. .num_controls = ARRAY_SIZE(ov9740_controls),
  791. };
  792. static struct v4l2_subdev_core_ops ov9740_core_ops = {
  793. .g_ctrl = ov9740_g_ctrl,
  794. .s_ctrl = ov9740_s_ctrl,
  795. .g_chip_ident = ov9740_g_chip_ident,
  796. #ifdef CONFIG_VIDEO_ADV_DEBUG
  797. .g_register = ov9740_get_register,
  798. .s_register = ov9740_set_register,
  799. #endif
  800. };
  801. static struct v4l2_subdev_video_ops ov9740_video_ops = {
  802. .s_stream = ov9740_s_stream,
  803. .s_mbus_fmt = ov9740_s_fmt,
  804. .try_mbus_fmt = ov9740_try_fmt,
  805. .enum_mbus_fmt = ov9740_enum_fmt,
  806. .cropcap = ov9740_cropcap,
  807. .g_crop = ov9740_g_crop,
  808. };
  809. static struct v4l2_subdev_ops ov9740_subdev_ops = {
  810. .core = &ov9740_core_ops,
  811. .video = &ov9740_video_ops,
  812. };
  813. /*
  814. * i2c_driver function
  815. */
  816. static int ov9740_probe(struct i2c_client *client,
  817. const struct i2c_device_id *did)
  818. {
  819. struct ov9740_priv *priv;
  820. struct soc_camera_device *icd = client->dev.platform_data;
  821. struct soc_camera_link *icl;
  822. int ret;
  823. if (!icd) {
  824. dev_err(&client->dev, "Missing soc-camera data!\n");
  825. return -EINVAL;
  826. }
  827. icl = to_soc_camera_link(icd);
  828. if (!icl) {
  829. dev_err(&client->dev, "Missing platform_data for driver\n");
  830. return -EINVAL;
  831. }
  832. priv = kzalloc(sizeof(struct ov9740_priv), GFP_KERNEL);
  833. if (!priv) {
  834. dev_err(&client->dev, "Failed to allocate private data!\n");
  835. return -ENOMEM;
  836. }
  837. v4l2_i2c_subdev_init(&priv->subdev, client, &ov9740_subdev_ops);
  838. icd->ops = &ov9740_ops;
  839. ret = ov9740_video_probe(icd, client);
  840. if (ret < 0) {
  841. icd->ops = NULL;
  842. kfree(priv);
  843. }
  844. return ret;
  845. }
  846. static int ov9740_remove(struct i2c_client *client)
  847. {
  848. struct ov9740_priv *priv = i2c_get_clientdata(client);
  849. kfree(priv);
  850. return 0;
  851. }
  852. static const struct i2c_device_id ov9740_id[] = {
  853. { "ov9740", 0 },
  854. { }
  855. };
  856. MODULE_DEVICE_TABLE(i2c, ov9740_id);
  857. static struct i2c_driver ov9740_i2c_driver = {
  858. .driver = {
  859. .name = "ov9740",
  860. },
  861. .probe = ov9740_probe,
  862. .remove = ov9740_remove,
  863. .id_table = ov9740_id,
  864. };
  865. static int __init ov9740_module_init(void)
  866. {
  867. return i2c_add_driver(&ov9740_i2c_driver);
  868. }
  869. static void __exit ov9740_module_exit(void)
  870. {
  871. i2c_del_driver(&ov9740_i2c_driver);
  872. }
  873. module_init(ov9740_module_init);
  874. module_exit(ov9740_module_exit);
  875. MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV9740");
  876. MODULE_AUTHOR("Andrew Chew <achew@nvidia.com>");
  877. MODULE_LICENSE("GPL v2");