ioport.c 19 KB

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  1. /*
  2. * ioport.c: Simple io mapping allocator.
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
  6. *
  7. * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
  8. *
  9. * 2000/01/29
  10. * <rth> zait: as long as pci_alloc_consistent produces something addressable,
  11. * things are ok.
  12. * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
  13. * pointer into the big page mapping
  14. * <rth> zait: so what?
  15. * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
  16. * <zaitcev> Hmm
  17. * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
  18. * So far so good.
  19. * <zaitcev> Now, driver calls pci_free_consistent(with result of
  20. * remap_it_my_way()).
  21. * <zaitcev> How do you find the address to pass to free_pages()?
  22. * <rth> zait: walk the page tables? It's only two or three level after all.
  23. * <rth> zait: you have to walk them anyway to remove the mapping.
  24. * <zaitcev> Hmm
  25. * <zaitcev> Sounds reasonable
  26. */
  27. #include <linux/module.h>
  28. #include <linux/sched.h>
  29. #include <linux/kernel.h>
  30. #include <linux/errno.h>
  31. #include <linux/types.h>
  32. #include <linux/ioport.h>
  33. #include <linux/mm.h>
  34. #include <linux/slab.h>
  35. #include <linux/pci.h> /* struct pci_dev */
  36. #include <linux/proc_fs.h>
  37. #include <linux/seq_file.h>
  38. #include <linux/scatterlist.h>
  39. #include <linux/of_device.h>
  40. #include <asm/io.h>
  41. #include <asm/vaddrs.h>
  42. #include <asm/oplib.h>
  43. #include <asm/prom.h>
  44. #include <asm/page.h>
  45. #include <asm/pgalloc.h>
  46. #include <asm/dma.h>
  47. #include <asm/iommu.h>
  48. #include <asm/io-unit.h>
  49. #include <asm/leon.h>
  50. /* This function must make sure that caches and memory are coherent after DMA
  51. * On LEON systems without cache snooping it flushes the entire D-CACHE.
  52. */
  53. #ifndef CONFIG_SPARC_LEON
  54. static inline void dma_make_coherent(unsigned long pa, unsigned long len)
  55. {
  56. }
  57. #else
  58. static inline void dma_make_coherent(unsigned long pa, unsigned long len)
  59. {
  60. if (!sparc_leon3_snooping_enabled())
  61. leon_flush_dcache_all();
  62. }
  63. #endif
  64. static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
  65. static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
  66. unsigned long size, char *name);
  67. static void _sparc_free_io(struct resource *res);
  68. static void register_proc_sparc_ioport(void);
  69. /* This points to the next to use virtual memory for DVMA mappings */
  70. static struct resource _sparc_dvma = {
  71. .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
  72. };
  73. /* This points to the start of I/O mappings, cluable from outside. */
  74. /*ext*/ struct resource sparc_iomap = {
  75. .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
  76. };
  77. /*
  78. * Our mini-allocator...
  79. * Boy this is gross! We need it because we must map I/O for
  80. * timers and interrupt controller before the kmalloc is available.
  81. */
  82. #define XNMLN 15
  83. #define XNRES 10 /* SS-10 uses 8 */
  84. struct xresource {
  85. struct resource xres; /* Must be first */
  86. int xflag; /* 1 == used */
  87. char xname[XNMLN+1];
  88. };
  89. static struct xresource xresv[XNRES];
  90. static struct xresource *xres_alloc(void) {
  91. struct xresource *xrp;
  92. int n;
  93. xrp = xresv;
  94. for (n = 0; n < XNRES; n++) {
  95. if (xrp->xflag == 0) {
  96. xrp->xflag = 1;
  97. return xrp;
  98. }
  99. xrp++;
  100. }
  101. return NULL;
  102. }
  103. static void xres_free(struct xresource *xrp) {
  104. xrp->xflag = 0;
  105. }
  106. /*
  107. * These are typically used in PCI drivers
  108. * which are trying to be cross-platform.
  109. *
  110. * Bus type is always zero on IIep.
  111. */
  112. void __iomem *ioremap(unsigned long offset, unsigned long size)
  113. {
  114. char name[14];
  115. sprintf(name, "phys_%08x", (u32)offset);
  116. return _sparc_alloc_io(0, offset, size, name);
  117. }
  118. EXPORT_SYMBOL(ioremap);
  119. /*
  120. * Comlimentary to ioremap().
  121. */
  122. void iounmap(volatile void __iomem *virtual)
  123. {
  124. unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
  125. struct resource *res;
  126. /*
  127. * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
  128. * This probably warrants some sort of hashing.
  129. */
  130. if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
  131. printk("free_io/iounmap: cannot free %lx\n", vaddr);
  132. return;
  133. }
  134. _sparc_free_io(res);
  135. if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
  136. xres_free((struct xresource *)res);
  137. } else {
  138. kfree(res);
  139. }
  140. }
  141. EXPORT_SYMBOL(iounmap);
  142. void __iomem *of_ioremap(struct resource *res, unsigned long offset,
  143. unsigned long size, char *name)
  144. {
  145. return _sparc_alloc_io(res->flags & 0xF,
  146. res->start + offset,
  147. size, name);
  148. }
  149. EXPORT_SYMBOL(of_ioremap);
  150. void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
  151. {
  152. iounmap(base);
  153. }
  154. EXPORT_SYMBOL(of_iounmap);
  155. /*
  156. * Meat of mapping
  157. */
  158. static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
  159. unsigned long size, char *name)
  160. {
  161. static int printed_full;
  162. struct xresource *xres;
  163. struct resource *res;
  164. char *tack;
  165. int tlen;
  166. void __iomem *va; /* P3 diag */
  167. if (name == NULL) name = "???";
  168. if ((xres = xres_alloc()) != 0) {
  169. tack = xres->xname;
  170. res = &xres->xres;
  171. } else {
  172. if (!printed_full) {
  173. printk("ioremap: done with statics, switching to malloc\n");
  174. printed_full = 1;
  175. }
  176. tlen = strlen(name);
  177. tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
  178. if (tack == NULL) return NULL;
  179. memset(tack, 0, sizeof(struct resource));
  180. res = (struct resource *) tack;
  181. tack += sizeof (struct resource);
  182. }
  183. strlcpy(tack, name, XNMLN+1);
  184. res->name = tack;
  185. va = _sparc_ioremap(res, busno, phys, size);
  186. /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
  187. return va;
  188. }
  189. /*
  190. */
  191. static void __iomem *
  192. _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
  193. {
  194. unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
  195. if (allocate_resource(&sparc_iomap, res,
  196. (offset + sz + PAGE_SIZE-1) & PAGE_MASK,
  197. sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
  198. /* Usually we cannot see printks in this case. */
  199. prom_printf("alloc_io_res(%s): cannot occupy\n",
  200. (res->name != NULL)? res->name: "???");
  201. prom_halt();
  202. }
  203. pa &= PAGE_MASK;
  204. srmmu_mapiorange(bus, pa, res->start, resource_size(res));
  205. return (void __iomem *)(unsigned long)(res->start + offset);
  206. }
  207. /*
  208. * Comlimentary to _sparc_ioremap().
  209. */
  210. static void _sparc_free_io(struct resource *res)
  211. {
  212. unsigned long plen;
  213. plen = resource_size(res);
  214. BUG_ON((plen & (PAGE_SIZE-1)) != 0);
  215. srmmu_unmapiorange(res->start, plen);
  216. release_resource(res);
  217. }
  218. #ifdef CONFIG_SBUS
  219. void sbus_set_sbus64(struct device *dev, int x)
  220. {
  221. printk("sbus_set_sbus64: unsupported\n");
  222. }
  223. EXPORT_SYMBOL(sbus_set_sbus64);
  224. /*
  225. * Allocate a chunk of memory suitable for DMA.
  226. * Typically devices use them for control blocks.
  227. * CPU may access them without any explicit flushing.
  228. */
  229. static void *sbus_alloc_coherent(struct device *dev, size_t len,
  230. dma_addr_t *dma_addrp, gfp_t gfp,
  231. struct dma_attrs *attrs)
  232. {
  233. struct platform_device *op = to_platform_device(dev);
  234. unsigned long len_total = PAGE_ALIGN(len);
  235. unsigned long va;
  236. struct resource *res;
  237. int order;
  238. /* XXX why are some lengths signed, others unsigned? */
  239. if (len <= 0) {
  240. return NULL;
  241. }
  242. /* XXX So what is maxphys for us and how do drivers know it? */
  243. if (len > 256*1024) { /* __get_free_pages() limit */
  244. return NULL;
  245. }
  246. order = get_order(len_total);
  247. if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0)
  248. goto err_nopages;
  249. if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
  250. goto err_nomem;
  251. if (allocate_resource(&_sparc_dvma, res, len_total,
  252. _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
  253. printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
  254. goto err_nova;
  255. }
  256. // XXX The mmu_map_dma_area does this for us below, see comments.
  257. // srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
  258. /*
  259. * XXX That's where sdev would be used. Currently we load
  260. * all iommu tables with the same translations.
  261. */
  262. if (mmu_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
  263. goto err_noiommu;
  264. res->name = op->dev.of_node->name;
  265. return (void *)(unsigned long)res->start;
  266. err_noiommu:
  267. release_resource(res);
  268. err_nova:
  269. kfree(res);
  270. err_nomem:
  271. free_pages(va, order);
  272. err_nopages:
  273. return NULL;
  274. }
  275. static void sbus_free_coherent(struct device *dev, size_t n, void *p,
  276. dma_addr_t ba, struct dma_attrs *attrs)
  277. {
  278. struct resource *res;
  279. struct page *pgv;
  280. if ((res = lookup_resource(&_sparc_dvma,
  281. (unsigned long)p)) == NULL) {
  282. printk("sbus_free_consistent: cannot free %p\n", p);
  283. return;
  284. }
  285. if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
  286. printk("sbus_free_consistent: unaligned va %p\n", p);
  287. return;
  288. }
  289. n = PAGE_ALIGN(n);
  290. if (resource_size(res) != n) {
  291. printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
  292. (long)resource_size(res), n);
  293. return;
  294. }
  295. release_resource(res);
  296. kfree(res);
  297. pgv = virt_to_page(p);
  298. mmu_unmap_dma_area(dev, ba, n);
  299. __free_pages(pgv, get_order(n));
  300. }
  301. /*
  302. * Map a chunk of memory so that devices can see it.
  303. * CPU view of this memory may be inconsistent with
  304. * a device view and explicit flushing is necessary.
  305. */
  306. static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
  307. unsigned long offset, size_t len,
  308. enum dma_data_direction dir,
  309. struct dma_attrs *attrs)
  310. {
  311. void *va = page_address(page) + offset;
  312. /* XXX why are some lengths signed, others unsigned? */
  313. if (len <= 0) {
  314. return 0;
  315. }
  316. /* XXX So what is maxphys for us and how do drivers know it? */
  317. if (len > 256*1024) { /* __get_free_pages() limit */
  318. return 0;
  319. }
  320. return mmu_get_scsi_one(dev, va, len);
  321. }
  322. static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
  323. enum dma_data_direction dir, struct dma_attrs *attrs)
  324. {
  325. mmu_release_scsi_one(dev, ba, n);
  326. }
  327. static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
  328. enum dma_data_direction dir, struct dma_attrs *attrs)
  329. {
  330. mmu_get_scsi_sgl(dev, sg, n);
  331. return n;
  332. }
  333. static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
  334. enum dma_data_direction dir, struct dma_attrs *attrs)
  335. {
  336. mmu_release_scsi_sgl(dev, sg, n);
  337. }
  338. static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
  339. int n, enum dma_data_direction dir)
  340. {
  341. BUG();
  342. }
  343. static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
  344. int n, enum dma_data_direction dir)
  345. {
  346. BUG();
  347. }
  348. struct dma_map_ops sbus_dma_ops = {
  349. .alloc = sbus_alloc_coherent,
  350. .free = sbus_free_coherent,
  351. .map_page = sbus_map_page,
  352. .unmap_page = sbus_unmap_page,
  353. .map_sg = sbus_map_sg,
  354. .unmap_sg = sbus_unmap_sg,
  355. .sync_sg_for_cpu = sbus_sync_sg_for_cpu,
  356. .sync_sg_for_device = sbus_sync_sg_for_device,
  357. };
  358. static int __init sparc_register_ioport(void)
  359. {
  360. register_proc_sparc_ioport();
  361. return 0;
  362. }
  363. arch_initcall(sparc_register_ioport);
  364. #endif /* CONFIG_SBUS */
  365. /* LEON reuses PCI DMA ops */
  366. #if defined(CONFIG_PCI) || defined(CONFIG_SPARC_LEON)
  367. /* Allocate and map kernel buffer using consistent mode DMA for a device.
  368. * hwdev should be valid struct pci_dev pointer for PCI devices.
  369. */
  370. static void *pci32_alloc_coherent(struct device *dev, size_t len,
  371. dma_addr_t *pba, gfp_t gfp,
  372. struct dma_attrs *attrs)
  373. {
  374. unsigned long len_total = PAGE_ALIGN(len);
  375. void *va;
  376. struct resource *res;
  377. int order;
  378. if (len == 0) {
  379. return NULL;
  380. }
  381. if (len > 256*1024) { /* __get_free_pages() limit */
  382. return NULL;
  383. }
  384. order = get_order(len_total);
  385. va = (void *) __get_free_pages(GFP_KERNEL, order);
  386. if (va == NULL) {
  387. printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
  388. goto err_nopages;
  389. }
  390. if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
  391. printk("pci_alloc_consistent: no core\n");
  392. goto err_nomem;
  393. }
  394. if (allocate_resource(&_sparc_dvma, res, len_total,
  395. _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
  396. printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
  397. goto err_nova;
  398. }
  399. srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
  400. *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
  401. return (void *) res->start;
  402. err_nova:
  403. kfree(res);
  404. err_nomem:
  405. free_pages((unsigned long)va, order);
  406. err_nopages:
  407. return NULL;
  408. }
  409. /* Free and unmap a consistent DMA buffer.
  410. * cpu_addr is what was returned from pci_alloc_consistent,
  411. * size must be the same as what as passed into pci_alloc_consistent,
  412. * and likewise dma_addr must be the same as what *dma_addrp was set to.
  413. *
  414. * References to the memory and mappings associated with cpu_addr/dma_addr
  415. * past this call are illegal.
  416. */
  417. static void pci32_free_coherent(struct device *dev, size_t n, void *p,
  418. dma_addr_t ba, struct dma_attrs *attrs)
  419. {
  420. struct resource *res;
  421. if ((res = lookup_resource(&_sparc_dvma,
  422. (unsigned long)p)) == NULL) {
  423. printk("pci_free_consistent: cannot free %p\n", p);
  424. return;
  425. }
  426. if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
  427. printk("pci_free_consistent: unaligned va %p\n", p);
  428. return;
  429. }
  430. n = PAGE_ALIGN(n);
  431. if (resource_size(res) != n) {
  432. printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
  433. (long)resource_size(res), (long)n);
  434. return;
  435. }
  436. dma_make_coherent(ba, n);
  437. srmmu_unmapiorange((unsigned long)p, n);
  438. release_resource(res);
  439. kfree(res);
  440. free_pages((unsigned long)phys_to_virt(ba), get_order(n));
  441. }
  442. /*
  443. * Same as pci_map_single, but with pages.
  444. */
  445. static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
  446. unsigned long offset, size_t size,
  447. enum dma_data_direction dir,
  448. struct dma_attrs *attrs)
  449. {
  450. /* IIep is write-through, not flushing. */
  451. return page_to_phys(page) + offset;
  452. }
  453. static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size,
  454. enum dma_data_direction dir, struct dma_attrs *attrs)
  455. {
  456. if (dir != PCI_DMA_TODEVICE)
  457. dma_make_coherent(ba, PAGE_ALIGN(size));
  458. }
  459. /* Map a set of buffers described by scatterlist in streaming
  460. * mode for DMA. This is the scather-gather version of the
  461. * above pci_map_single interface. Here the scatter gather list
  462. * elements are each tagged with the appropriate dma address
  463. * and length. They are obtained via sg_dma_{address,length}(SG).
  464. *
  465. * NOTE: An implementation may be able to use a smaller number of
  466. * DMA address/length pairs than there are SG table elements.
  467. * (for example via virtual mapping capabilities)
  468. * The routine returns the number of addr/length pairs actually
  469. * used, at most nents.
  470. *
  471. * Device ownership issues as mentioned above for pci_map_single are
  472. * the same here.
  473. */
  474. static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
  475. int nents, enum dma_data_direction dir,
  476. struct dma_attrs *attrs)
  477. {
  478. struct scatterlist *sg;
  479. int n;
  480. /* IIep is write-through, not flushing. */
  481. for_each_sg(sgl, sg, nents, n) {
  482. sg->dma_address = sg_phys(sg);
  483. sg->dma_length = sg->length;
  484. }
  485. return nents;
  486. }
  487. /* Unmap a set of streaming mode DMA translations.
  488. * Again, cpu read rules concerning calls here are the same as for
  489. * pci_unmap_single() above.
  490. */
  491. static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
  492. int nents, enum dma_data_direction dir,
  493. struct dma_attrs *attrs)
  494. {
  495. struct scatterlist *sg;
  496. int n;
  497. if (dir != PCI_DMA_TODEVICE) {
  498. for_each_sg(sgl, sg, nents, n) {
  499. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  500. }
  501. }
  502. }
  503. /* Make physical memory consistent for a single
  504. * streaming mode DMA translation before or after a transfer.
  505. *
  506. * If you perform a pci_map_single() but wish to interrogate the
  507. * buffer using the cpu, yet do not wish to teardown the PCI dma
  508. * mapping, you must call this function before doing so. At the
  509. * next point you give the PCI dma address back to the card, you
  510. * must first perform a pci_dma_sync_for_device, and then the
  511. * device again owns the buffer.
  512. */
  513. static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
  514. size_t size, enum dma_data_direction dir)
  515. {
  516. if (dir != PCI_DMA_TODEVICE) {
  517. dma_make_coherent(ba, PAGE_ALIGN(size));
  518. }
  519. }
  520. static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
  521. size_t size, enum dma_data_direction dir)
  522. {
  523. if (dir != PCI_DMA_TODEVICE) {
  524. dma_make_coherent(ba, PAGE_ALIGN(size));
  525. }
  526. }
  527. /* Make physical memory consistent for a set of streaming
  528. * mode DMA translations after a transfer.
  529. *
  530. * The same as pci_dma_sync_single_* but for a scatter-gather list,
  531. * same rules and usage.
  532. */
  533. static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
  534. int nents, enum dma_data_direction dir)
  535. {
  536. struct scatterlist *sg;
  537. int n;
  538. if (dir != PCI_DMA_TODEVICE) {
  539. for_each_sg(sgl, sg, nents, n) {
  540. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  541. }
  542. }
  543. }
  544. static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
  545. int nents, enum dma_data_direction dir)
  546. {
  547. struct scatterlist *sg;
  548. int n;
  549. if (dir != PCI_DMA_TODEVICE) {
  550. for_each_sg(sgl, sg, nents, n) {
  551. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  552. }
  553. }
  554. }
  555. struct dma_map_ops pci32_dma_ops = {
  556. .alloc = pci32_alloc_coherent,
  557. .free = pci32_free_coherent,
  558. .map_page = pci32_map_page,
  559. .unmap_page = pci32_unmap_page,
  560. .map_sg = pci32_map_sg,
  561. .unmap_sg = pci32_unmap_sg,
  562. .sync_single_for_cpu = pci32_sync_single_for_cpu,
  563. .sync_single_for_device = pci32_sync_single_for_device,
  564. .sync_sg_for_cpu = pci32_sync_sg_for_cpu,
  565. .sync_sg_for_device = pci32_sync_sg_for_device,
  566. };
  567. EXPORT_SYMBOL(pci32_dma_ops);
  568. #endif /* CONFIG_PCI || CONFIG_SPARC_LEON */
  569. #ifdef CONFIG_SPARC_LEON
  570. struct dma_map_ops *dma_ops = &pci32_dma_ops;
  571. #elif defined(CONFIG_SBUS)
  572. struct dma_map_ops *dma_ops = &sbus_dma_ops;
  573. #endif
  574. EXPORT_SYMBOL(dma_ops);
  575. /*
  576. * Return whether the given PCI device DMA address mask can be
  577. * supported properly. For example, if your device can only drive the
  578. * low 24-bits during PCI bus mastering, then you would pass
  579. * 0x00ffffff as the mask to this function.
  580. */
  581. int dma_supported(struct device *dev, u64 mask)
  582. {
  583. #ifdef CONFIG_PCI
  584. if (dev->bus == &pci_bus_type)
  585. return 1;
  586. #endif
  587. return 0;
  588. }
  589. EXPORT_SYMBOL(dma_supported);
  590. #ifdef CONFIG_PROC_FS
  591. static int sparc_io_proc_show(struct seq_file *m, void *v)
  592. {
  593. struct resource *root = m->private, *r;
  594. const char *nm;
  595. for (r = root->child; r != NULL; r = r->sibling) {
  596. if ((nm = r->name) == 0) nm = "???";
  597. seq_printf(m, "%016llx-%016llx: %s\n",
  598. (unsigned long long)r->start,
  599. (unsigned long long)r->end, nm);
  600. }
  601. return 0;
  602. }
  603. static int sparc_io_proc_open(struct inode *inode, struct file *file)
  604. {
  605. return single_open(file, sparc_io_proc_show, PDE(inode)->data);
  606. }
  607. static const struct file_operations sparc_io_proc_fops = {
  608. .owner = THIS_MODULE,
  609. .open = sparc_io_proc_open,
  610. .read = seq_read,
  611. .llseek = seq_lseek,
  612. .release = single_release,
  613. };
  614. #endif /* CONFIG_PROC_FS */
  615. static void register_proc_sparc_ioport(void)
  616. {
  617. #ifdef CONFIG_PROC_FS
  618. proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
  619. proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
  620. #endif
  621. }