ixgb_main.c 57 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. /* Change Log
  22. * 1.0.96 04/19/05
  23. * - Make needlessly global code static -- bunk@stusta.de
  24. * - ethtool cleanup -- shemminger@osdl.org
  25. * - Support for MODULE_VERSION -- linville@tuxdriver.com
  26. * - add skb_header_cloned check to the tso path -- herbert@apana.org.au
  27. * 1.0.88 01/05/05
  28. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  29. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  30. * 1.0.84 10/26/04
  31. * - reset buffer_info->dma in Tx resource cleanup logic
  32. * 1.0.83 10/12/04
  33. * - sparse cleanup - shemminger@osdl.org
  34. * - fix tx resource cleanup logic
  35. */
  36. char ixgb_driver_name[] = "ixgb";
  37. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  38. #ifndef CONFIG_IXGB_NAPI
  39. #define DRIVERNAPI
  40. #else
  41. #define DRIVERNAPI "-NAPI"
  42. #endif
  43. #define DRV_VERSION "1.0.100-k2"DRIVERNAPI
  44. char ixgb_driver_version[] = DRV_VERSION;
  45. static char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  46. /* ixgb_pci_tbl - PCI Device ID Table
  47. *
  48. * Wildcard entries (PCI_ANY_ID) should come last
  49. * Last entry must be all 0s
  50. *
  51. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  52. * Class, Class Mask, private data (not used) }
  53. */
  54. static struct pci_device_id ixgb_pci_tbl[] = {
  55. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  56. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  57. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  58. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  59. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  60. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  61. /* required last entry */
  62. {0,}
  63. };
  64. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  65. /* Local Function Prototypes */
  66. int ixgb_up(struct ixgb_adapter *adapter);
  67. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  68. void ixgb_reset(struct ixgb_adapter *adapter);
  69. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  70. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  71. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  72. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  73. void ixgb_update_stats(struct ixgb_adapter *adapter);
  74. static int ixgb_init_module(void);
  75. static void ixgb_exit_module(void);
  76. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  77. static void __devexit ixgb_remove(struct pci_dev *pdev);
  78. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  79. static int ixgb_open(struct net_device *netdev);
  80. static int ixgb_close(struct net_device *netdev);
  81. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  82. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  83. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  84. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  85. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  86. static void ixgb_set_multi(struct net_device *netdev);
  87. static void ixgb_watchdog(unsigned long data);
  88. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  89. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  90. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  91. static int ixgb_set_mac(struct net_device *netdev, void *p);
  92. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  93. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  94. #ifdef CONFIG_IXGB_NAPI
  95. static int ixgb_clean(struct net_device *netdev, int *budget);
  96. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  97. int *work_done, int work_to_do);
  98. #else
  99. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  100. #endif
  101. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  102. void ixgb_set_ethtool_ops(struct net_device *netdev);
  103. static void ixgb_tx_timeout(struct net_device *dev);
  104. static void ixgb_tx_timeout_task(struct net_device *dev);
  105. static void ixgb_vlan_rx_register(struct net_device *netdev,
  106. struct vlan_group *grp);
  107. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  108. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  109. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  110. #ifdef CONFIG_NET_POLL_CONTROLLER
  111. /* for netdump / net console */
  112. static void ixgb_netpoll(struct net_device *dev);
  113. #endif
  114. /* Exported from other modules */
  115. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  116. static struct pci_driver ixgb_driver = {
  117. .name = ixgb_driver_name,
  118. .id_table = ixgb_pci_tbl,
  119. .probe = ixgb_probe,
  120. .remove = __devexit_p(ixgb_remove),
  121. };
  122. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  123. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  124. MODULE_LICENSE("GPL");
  125. MODULE_VERSION(DRV_VERSION);
  126. /* some defines for controlling descriptor fetches in h/w */
  127. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  128. #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
  129. * this */
  130. #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
  131. * is pushed this many descriptors
  132. * from head */
  133. /**
  134. * ixgb_init_module - Driver Registration Routine
  135. *
  136. * ixgb_init_module is the first routine called when the driver is
  137. * loaded. All it does is register with the PCI subsystem.
  138. **/
  139. static int __init
  140. ixgb_init_module(void)
  141. {
  142. printk(KERN_INFO "%s - version %s\n",
  143. ixgb_driver_string, ixgb_driver_version);
  144. printk(KERN_INFO "%s\n", ixgb_copyright);
  145. return pci_module_init(&ixgb_driver);
  146. }
  147. module_init(ixgb_init_module);
  148. /**
  149. * ixgb_exit_module - Driver Exit Cleanup Routine
  150. *
  151. * ixgb_exit_module is called just before the driver is removed
  152. * from memory.
  153. **/
  154. static void __exit
  155. ixgb_exit_module(void)
  156. {
  157. pci_unregister_driver(&ixgb_driver);
  158. }
  159. module_exit(ixgb_exit_module);
  160. /**
  161. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  162. * @adapter: board private structure
  163. **/
  164. static inline void
  165. ixgb_irq_disable(struct ixgb_adapter *adapter)
  166. {
  167. atomic_inc(&adapter->irq_sem);
  168. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  169. IXGB_WRITE_FLUSH(&adapter->hw);
  170. synchronize_irq(adapter->pdev->irq);
  171. }
  172. /**
  173. * ixgb_irq_enable - Enable default interrupt generation settings
  174. * @adapter: board private structure
  175. **/
  176. static inline void
  177. ixgb_irq_enable(struct ixgb_adapter *adapter)
  178. {
  179. if(atomic_dec_and_test(&adapter->irq_sem)) {
  180. IXGB_WRITE_REG(&adapter->hw, IMS,
  181. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  182. IXGB_INT_LSC);
  183. IXGB_WRITE_FLUSH(&adapter->hw);
  184. }
  185. }
  186. int
  187. ixgb_up(struct ixgb_adapter *adapter)
  188. {
  189. struct net_device *netdev = adapter->netdev;
  190. int err;
  191. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  192. struct ixgb_hw *hw = &adapter->hw;
  193. /* hardware has been reset, we need to reload some things */
  194. ixgb_set_multi(netdev);
  195. ixgb_restore_vlan(adapter);
  196. ixgb_configure_tx(adapter);
  197. ixgb_setup_rctl(adapter);
  198. ixgb_configure_rx(adapter);
  199. ixgb_alloc_rx_buffers(adapter);
  200. #ifdef CONFIG_PCI_MSI
  201. {
  202. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  203. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  204. adapter->have_msi = TRUE;
  205. if (!pcix)
  206. adapter->have_msi = FALSE;
  207. else if((err = pci_enable_msi(adapter->pdev))) {
  208. printk (KERN_ERR
  209. "Unable to allocate MSI interrupt Error: %d\n", err);
  210. adapter->have_msi = FALSE;
  211. /* proceed to try to request regular interrupt */
  212. }
  213. }
  214. #endif
  215. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  216. SA_SHIRQ | SA_SAMPLE_RANDOM,
  217. netdev->name, netdev)))
  218. return err;
  219. /* disable interrupts and get the hardware into a known state */
  220. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  221. if((hw->max_frame_size != max_frame) ||
  222. (hw->max_frame_size !=
  223. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  224. hw->max_frame_size = max_frame;
  225. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  226. if(hw->max_frame_size >
  227. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  228. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  229. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  230. ctrl0 |= IXGB_CTRL0_JFE;
  231. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  232. }
  233. }
  234. }
  235. mod_timer(&adapter->watchdog_timer, jiffies);
  236. ixgb_irq_enable(adapter);
  237. #ifdef CONFIG_IXGB_NAPI
  238. netif_poll_enable(netdev);
  239. #endif
  240. return 0;
  241. }
  242. void
  243. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  244. {
  245. struct net_device *netdev = adapter->netdev;
  246. ixgb_irq_disable(adapter);
  247. free_irq(adapter->pdev->irq, netdev);
  248. #ifdef CONFIG_PCI_MSI
  249. if(adapter->have_msi == TRUE)
  250. pci_disable_msi(adapter->pdev);
  251. #endif
  252. if(kill_watchdog)
  253. del_timer_sync(&adapter->watchdog_timer);
  254. #ifdef CONFIG_IXGB_NAPI
  255. netif_poll_disable(netdev);
  256. #endif
  257. adapter->link_speed = 0;
  258. adapter->link_duplex = 0;
  259. netif_carrier_off(netdev);
  260. netif_stop_queue(netdev);
  261. ixgb_reset(adapter);
  262. ixgb_clean_tx_ring(adapter);
  263. ixgb_clean_rx_ring(adapter);
  264. }
  265. void
  266. ixgb_reset(struct ixgb_adapter *adapter)
  267. {
  268. ixgb_adapter_stop(&adapter->hw);
  269. if(!ixgb_init_hw(&adapter->hw))
  270. IXGB_DBG("ixgb_init_hw failed.\n");
  271. }
  272. /**
  273. * ixgb_probe - Device Initialization Routine
  274. * @pdev: PCI device information struct
  275. * @ent: entry in ixgb_pci_tbl
  276. *
  277. * Returns 0 on success, negative on failure
  278. *
  279. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  280. * The OS initialization, configuring of the adapter private structure,
  281. * and a hardware reset occur.
  282. **/
  283. static int __devinit
  284. ixgb_probe(struct pci_dev *pdev,
  285. const struct pci_device_id *ent)
  286. {
  287. struct net_device *netdev = NULL;
  288. struct ixgb_adapter *adapter;
  289. static int cards_found = 0;
  290. unsigned long mmio_start;
  291. int mmio_len;
  292. int pci_using_dac;
  293. int i;
  294. int err;
  295. if((err = pci_enable_device(pdev)))
  296. return err;
  297. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  298. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  299. pci_using_dac = 1;
  300. } else {
  301. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
  302. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  303. IXGB_ERR("No usable DMA configuration, aborting\n");
  304. goto err_dma_mask;
  305. }
  306. pci_using_dac = 0;
  307. }
  308. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  309. goto err_request_regions;
  310. pci_set_master(pdev);
  311. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  312. if(!netdev) {
  313. err = -ENOMEM;
  314. goto err_alloc_etherdev;
  315. }
  316. SET_MODULE_OWNER(netdev);
  317. SET_NETDEV_DEV(netdev, &pdev->dev);
  318. pci_set_drvdata(pdev, netdev);
  319. adapter = netdev_priv(netdev);
  320. adapter->netdev = netdev;
  321. adapter->pdev = pdev;
  322. adapter->hw.back = adapter;
  323. mmio_start = pci_resource_start(pdev, BAR_0);
  324. mmio_len = pci_resource_len(pdev, BAR_0);
  325. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  326. if(!adapter->hw.hw_addr) {
  327. err = -EIO;
  328. goto err_ioremap;
  329. }
  330. for(i = BAR_1; i <= BAR_5; i++) {
  331. if(pci_resource_len(pdev, i) == 0)
  332. continue;
  333. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  334. adapter->hw.io_base = pci_resource_start(pdev, i);
  335. break;
  336. }
  337. }
  338. netdev->open = &ixgb_open;
  339. netdev->stop = &ixgb_close;
  340. netdev->hard_start_xmit = &ixgb_xmit_frame;
  341. netdev->get_stats = &ixgb_get_stats;
  342. netdev->set_multicast_list = &ixgb_set_multi;
  343. netdev->set_mac_address = &ixgb_set_mac;
  344. netdev->change_mtu = &ixgb_change_mtu;
  345. ixgb_set_ethtool_ops(netdev);
  346. netdev->tx_timeout = &ixgb_tx_timeout;
  347. netdev->watchdog_timeo = HZ;
  348. #ifdef CONFIG_IXGB_NAPI
  349. netdev->poll = &ixgb_clean;
  350. netdev->weight = 64;
  351. #endif
  352. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  353. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  354. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  355. #ifdef CONFIG_NET_POLL_CONTROLLER
  356. netdev->poll_controller = ixgb_netpoll;
  357. #endif
  358. netdev->mem_start = mmio_start;
  359. netdev->mem_end = mmio_start + mmio_len;
  360. netdev->base_addr = adapter->hw.io_base;
  361. adapter->bd_number = cards_found;
  362. adapter->link_speed = 0;
  363. adapter->link_duplex = 0;
  364. /* setup the private structure */
  365. if((err = ixgb_sw_init(adapter)))
  366. goto err_sw_init;
  367. netdev->features = NETIF_F_SG |
  368. NETIF_F_HW_CSUM |
  369. NETIF_F_HW_VLAN_TX |
  370. NETIF_F_HW_VLAN_RX |
  371. NETIF_F_HW_VLAN_FILTER;
  372. #ifdef NETIF_F_TSO
  373. netdev->features |= NETIF_F_TSO;
  374. #endif
  375. if(pci_using_dac)
  376. netdev->features |= NETIF_F_HIGHDMA;
  377. /* make sure the EEPROM is good */
  378. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  379. printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
  380. err = -EIO;
  381. goto err_eeprom;
  382. }
  383. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  384. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  385. if(!is_valid_ether_addr(netdev->perm_addr)) {
  386. err = -EIO;
  387. goto err_eeprom;
  388. }
  389. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  390. init_timer(&adapter->watchdog_timer);
  391. adapter->watchdog_timer.function = &ixgb_watchdog;
  392. adapter->watchdog_timer.data = (unsigned long)adapter;
  393. INIT_WORK(&adapter->tx_timeout_task,
  394. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  395. if((err = register_netdev(netdev)))
  396. goto err_register;
  397. /* we're going to reset, so assume we have no link for now */
  398. netif_carrier_off(netdev);
  399. netif_stop_queue(netdev);
  400. printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
  401. netdev->name);
  402. ixgb_check_options(adapter);
  403. /* reset the hardware with the new settings */
  404. ixgb_reset(adapter);
  405. cards_found++;
  406. return 0;
  407. err_register:
  408. err_sw_init:
  409. err_eeprom:
  410. iounmap(adapter->hw.hw_addr);
  411. err_ioremap:
  412. free_netdev(netdev);
  413. err_alloc_etherdev:
  414. pci_release_regions(pdev);
  415. err_request_regions:
  416. err_dma_mask:
  417. pci_disable_device(pdev);
  418. return err;
  419. }
  420. /**
  421. * ixgb_remove - Device Removal Routine
  422. * @pdev: PCI device information struct
  423. *
  424. * ixgb_remove is called by the PCI subsystem to alert the driver
  425. * that it should release a PCI device. The could be caused by a
  426. * Hot-Plug event, or because the driver is going to be removed from
  427. * memory.
  428. **/
  429. static void __devexit
  430. ixgb_remove(struct pci_dev *pdev)
  431. {
  432. struct net_device *netdev = pci_get_drvdata(pdev);
  433. struct ixgb_adapter *adapter = netdev_priv(netdev);
  434. unregister_netdev(netdev);
  435. iounmap(adapter->hw.hw_addr);
  436. pci_release_regions(pdev);
  437. free_netdev(netdev);
  438. }
  439. /**
  440. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  441. * @adapter: board private structure to initialize
  442. *
  443. * ixgb_sw_init initializes the Adapter private data structure.
  444. * Fields are initialized based on PCI device information and
  445. * OS network device settings (MTU size).
  446. **/
  447. static int __devinit
  448. ixgb_sw_init(struct ixgb_adapter *adapter)
  449. {
  450. struct ixgb_hw *hw = &adapter->hw;
  451. struct net_device *netdev = adapter->netdev;
  452. struct pci_dev *pdev = adapter->pdev;
  453. /* PCI config space info */
  454. hw->vendor_id = pdev->vendor;
  455. hw->device_id = pdev->device;
  456. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  457. hw->subsystem_id = pdev->subsystem_device;
  458. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  459. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  460. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  461. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  462. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  463. hw->mac_type = ixgb_82597;
  464. else {
  465. /* should never have loaded on this device */
  466. printk(KERN_ERR "ixgb: unsupported device id\n");
  467. }
  468. /* enable flow control to be programmed */
  469. hw->fc.send_xon = 1;
  470. atomic_set(&adapter->irq_sem, 1);
  471. spin_lock_init(&adapter->tx_lock);
  472. return 0;
  473. }
  474. /**
  475. * ixgb_open - Called when a network interface is made active
  476. * @netdev: network interface device structure
  477. *
  478. * Returns 0 on success, negative value on failure
  479. *
  480. * The open entry point is called when a network interface is made
  481. * active by the system (IFF_UP). At this point all resources needed
  482. * for transmit and receive operations are allocated, the interrupt
  483. * handler is registered with the OS, the watchdog timer is started,
  484. * and the stack is notified that the interface is ready.
  485. **/
  486. static int
  487. ixgb_open(struct net_device *netdev)
  488. {
  489. struct ixgb_adapter *adapter = netdev_priv(netdev);
  490. int err;
  491. /* allocate transmit descriptors */
  492. if((err = ixgb_setup_tx_resources(adapter)))
  493. goto err_setup_tx;
  494. /* allocate receive descriptors */
  495. if((err = ixgb_setup_rx_resources(adapter)))
  496. goto err_setup_rx;
  497. if((err = ixgb_up(adapter)))
  498. goto err_up;
  499. return 0;
  500. err_up:
  501. ixgb_free_rx_resources(adapter);
  502. err_setup_rx:
  503. ixgb_free_tx_resources(adapter);
  504. err_setup_tx:
  505. ixgb_reset(adapter);
  506. return err;
  507. }
  508. /**
  509. * ixgb_close - Disables a network interface
  510. * @netdev: network interface device structure
  511. *
  512. * Returns 0, this is not allowed to fail
  513. *
  514. * The close entry point is called when an interface is de-activated
  515. * by the OS. The hardware is still under the drivers control, but
  516. * needs to be disabled. A global MAC reset is issued to stop the
  517. * hardware, and all transmit and receive resources are freed.
  518. **/
  519. static int
  520. ixgb_close(struct net_device *netdev)
  521. {
  522. struct ixgb_adapter *adapter = netdev_priv(netdev);
  523. ixgb_down(adapter, TRUE);
  524. ixgb_free_tx_resources(adapter);
  525. ixgb_free_rx_resources(adapter);
  526. return 0;
  527. }
  528. /**
  529. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  530. * @adapter: board private structure
  531. *
  532. * Return 0 on success, negative on failure
  533. **/
  534. int
  535. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  536. {
  537. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  538. struct pci_dev *pdev = adapter->pdev;
  539. int size;
  540. size = sizeof(struct ixgb_buffer) * txdr->count;
  541. txdr->buffer_info = vmalloc(size);
  542. if(!txdr->buffer_info) {
  543. return -ENOMEM;
  544. }
  545. memset(txdr->buffer_info, 0, size);
  546. /* round up to nearest 4K */
  547. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  548. IXGB_ROUNDUP(txdr->size, 4096);
  549. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  550. if(!txdr->desc) {
  551. vfree(txdr->buffer_info);
  552. return -ENOMEM;
  553. }
  554. memset(txdr->desc, 0, txdr->size);
  555. txdr->next_to_use = 0;
  556. txdr->next_to_clean = 0;
  557. return 0;
  558. }
  559. /**
  560. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  561. * @adapter: board private structure
  562. *
  563. * Configure the Tx unit of the MAC after a reset.
  564. **/
  565. static void
  566. ixgb_configure_tx(struct ixgb_adapter *adapter)
  567. {
  568. uint64_t tdba = adapter->tx_ring.dma;
  569. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  570. uint32_t tctl;
  571. struct ixgb_hw *hw = &adapter->hw;
  572. /* Setup the Base and Length of the Tx Descriptor Ring
  573. * tx_ring.dma can be either a 32 or 64 bit value
  574. */
  575. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  576. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  577. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  578. /* Setup the HW Tx Head and Tail descriptor pointers */
  579. IXGB_WRITE_REG(hw, TDH, 0);
  580. IXGB_WRITE_REG(hw, TDT, 0);
  581. /* don't set up txdctl, it induces performance problems if configured
  582. * incorrectly */
  583. /* Set the Tx Interrupt Delay register */
  584. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  585. /* Program the Transmit Control Register */
  586. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  587. IXGB_WRITE_REG(hw, TCTL, tctl);
  588. /* Setup Transmit Descriptor Settings for this adapter */
  589. adapter->tx_cmd_type =
  590. IXGB_TX_DESC_TYPE
  591. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  592. }
  593. /**
  594. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  595. * @adapter: board private structure
  596. *
  597. * Returns 0 on success, negative on failure
  598. **/
  599. int
  600. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  601. {
  602. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  603. struct pci_dev *pdev = adapter->pdev;
  604. int size;
  605. size = sizeof(struct ixgb_buffer) * rxdr->count;
  606. rxdr->buffer_info = vmalloc(size);
  607. if(!rxdr->buffer_info) {
  608. return -ENOMEM;
  609. }
  610. memset(rxdr->buffer_info, 0, size);
  611. /* Round up to nearest 4K */
  612. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  613. IXGB_ROUNDUP(rxdr->size, 4096);
  614. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  615. if(!rxdr->desc) {
  616. vfree(rxdr->buffer_info);
  617. return -ENOMEM;
  618. }
  619. memset(rxdr->desc, 0, rxdr->size);
  620. rxdr->next_to_clean = 0;
  621. rxdr->next_to_use = 0;
  622. return 0;
  623. }
  624. /**
  625. * ixgb_setup_rctl - configure the receive control register
  626. * @adapter: Board private structure
  627. **/
  628. static void
  629. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  630. {
  631. uint32_t rctl;
  632. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  633. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  634. rctl |=
  635. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  636. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  637. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  638. rctl |= IXGB_RCTL_SECRC;
  639. switch (adapter->rx_buffer_len) {
  640. case IXGB_RXBUFFER_2048:
  641. default:
  642. rctl |= IXGB_RCTL_BSIZE_2048;
  643. break;
  644. case IXGB_RXBUFFER_4096:
  645. rctl |= IXGB_RCTL_BSIZE_4096;
  646. break;
  647. case IXGB_RXBUFFER_8192:
  648. rctl |= IXGB_RCTL_BSIZE_8192;
  649. break;
  650. case IXGB_RXBUFFER_16384:
  651. rctl |= IXGB_RCTL_BSIZE_16384;
  652. break;
  653. }
  654. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  655. }
  656. /**
  657. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  658. * @adapter: board private structure
  659. *
  660. * Configure the Rx unit of the MAC after a reset.
  661. **/
  662. static void
  663. ixgb_configure_rx(struct ixgb_adapter *adapter)
  664. {
  665. uint64_t rdba = adapter->rx_ring.dma;
  666. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  667. struct ixgb_hw *hw = &adapter->hw;
  668. uint32_t rctl;
  669. uint32_t rxcsum;
  670. uint32_t rxdctl;
  671. /* make sure receives are disabled while setting up the descriptors */
  672. rctl = IXGB_READ_REG(hw, RCTL);
  673. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  674. /* set the Receive Delay Timer Register */
  675. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  676. /* Setup the Base and Length of the Rx Descriptor Ring */
  677. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  678. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  679. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  680. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  681. IXGB_WRITE_REG(hw, RDH, 0);
  682. IXGB_WRITE_REG(hw, RDT, 0);
  683. /* set up pre-fetching of receive buffers so we get some before we
  684. * run out (default hardware behavior is to run out before fetching
  685. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  686. * and the descriptors in hw cache are below PTHRESH. This avoids
  687. * the hardware behavior of fetching <=512 descriptors in a single
  688. * burst that pre-empts all other activity, usually causing fifo
  689. * overflows. */
  690. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  691. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  692. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  693. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  694. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  695. /* Enable Receive Checksum Offload for TCP and UDP */
  696. if(adapter->rx_csum == TRUE) {
  697. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  698. rxcsum |= IXGB_RXCSUM_TUOFL;
  699. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  700. }
  701. /* Enable Receives */
  702. IXGB_WRITE_REG(hw, RCTL, rctl);
  703. }
  704. /**
  705. * ixgb_free_tx_resources - Free Tx Resources
  706. * @adapter: board private structure
  707. *
  708. * Free all transmit software resources
  709. **/
  710. void
  711. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  712. {
  713. struct pci_dev *pdev = adapter->pdev;
  714. ixgb_clean_tx_ring(adapter);
  715. vfree(adapter->tx_ring.buffer_info);
  716. adapter->tx_ring.buffer_info = NULL;
  717. pci_free_consistent(pdev, adapter->tx_ring.size,
  718. adapter->tx_ring.desc, adapter->tx_ring.dma);
  719. adapter->tx_ring.desc = NULL;
  720. }
  721. static inline void
  722. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  723. struct ixgb_buffer *buffer_info)
  724. {
  725. struct pci_dev *pdev = adapter->pdev;
  726. if(buffer_info->dma) {
  727. pci_unmap_page(pdev,
  728. buffer_info->dma,
  729. buffer_info->length,
  730. PCI_DMA_TODEVICE);
  731. buffer_info->dma = 0;
  732. }
  733. if(buffer_info->skb) {
  734. dev_kfree_skb_any(buffer_info->skb);
  735. buffer_info->skb = NULL;
  736. }
  737. }
  738. /**
  739. * ixgb_clean_tx_ring - Free Tx Buffers
  740. * @adapter: board private structure
  741. **/
  742. static void
  743. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  744. {
  745. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  746. struct ixgb_buffer *buffer_info;
  747. unsigned long size;
  748. unsigned int i;
  749. /* Free all the Tx ring sk_buffs */
  750. for(i = 0; i < tx_ring->count; i++) {
  751. buffer_info = &tx_ring->buffer_info[i];
  752. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  753. }
  754. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  755. memset(tx_ring->buffer_info, 0, size);
  756. /* Zero out the descriptor ring */
  757. memset(tx_ring->desc, 0, tx_ring->size);
  758. tx_ring->next_to_use = 0;
  759. tx_ring->next_to_clean = 0;
  760. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  761. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  762. }
  763. /**
  764. * ixgb_free_rx_resources - Free Rx Resources
  765. * @adapter: board private structure
  766. *
  767. * Free all receive software resources
  768. **/
  769. void
  770. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  771. {
  772. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  773. struct pci_dev *pdev = adapter->pdev;
  774. ixgb_clean_rx_ring(adapter);
  775. vfree(rx_ring->buffer_info);
  776. rx_ring->buffer_info = NULL;
  777. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  778. rx_ring->desc = NULL;
  779. }
  780. /**
  781. * ixgb_clean_rx_ring - Free Rx Buffers
  782. * @adapter: board private structure
  783. **/
  784. static void
  785. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  786. {
  787. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  788. struct ixgb_buffer *buffer_info;
  789. struct pci_dev *pdev = adapter->pdev;
  790. unsigned long size;
  791. unsigned int i;
  792. /* Free all the Rx ring sk_buffs */
  793. for(i = 0; i < rx_ring->count; i++) {
  794. buffer_info = &rx_ring->buffer_info[i];
  795. if(buffer_info->skb) {
  796. pci_unmap_single(pdev,
  797. buffer_info->dma,
  798. buffer_info->length,
  799. PCI_DMA_FROMDEVICE);
  800. dev_kfree_skb(buffer_info->skb);
  801. buffer_info->skb = NULL;
  802. }
  803. }
  804. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  805. memset(rx_ring->buffer_info, 0, size);
  806. /* Zero out the descriptor ring */
  807. memset(rx_ring->desc, 0, rx_ring->size);
  808. rx_ring->next_to_clean = 0;
  809. rx_ring->next_to_use = 0;
  810. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  811. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  812. }
  813. /**
  814. * ixgb_set_mac - Change the Ethernet Address of the NIC
  815. * @netdev: network interface device structure
  816. * @p: pointer to an address structure
  817. *
  818. * Returns 0 on success, negative on failure
  819. **/
  820. static int
  821. ixgb_set_mac(struct net_device *netdev, void *p)
  822. {
  823. struct ixgb_adapter *adapter = netdev_priv(netdev);
  824. struct sockaddr *addr = p;
  825. if(!is_valid_ether_addr(addr->sa_data))
  826. return -EADDRNOTAVAIL;
  827. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  828. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  829. return 0;
  830. }
  831. /**
  832. * ixgb_set_multi - Multicast and Promiscuous mode set
  833. * @netdev: network interface device structure
  834. *
  835. * The set_multi entry point is called whenever the multicast address
  836. * list or the network interface flags are updated. This routine is
  837. * responsible for configuring the hardware for proper multicast,
  838. * promiscuous mode, and all-multi behavior.
  839. **/
  840. static void
  841. ixgb_set_multi(struct net_device *netdev)
  842. {
  843. struct ixgb_adapter *adapter = netdev_priv(netdev);
  844. struct ixgb_hw *hw = &adapter->hw;
  845. struct dev_mc_list *mc_ptr;
  846. uint32_t rctl;
  847. int i;
  848. /* Check for Promiscuous and All Multicast modes */
  849. rctl = IXGB_READ_REG(hw, RCTL);
  850. if(netdev->flags & IFF_PROMISC) {
  851. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  852. } else if(netdev->flags & IFF_ALLMULTI) {
  853. rctl |= IXGB_RCTL_MPE;
  854. rctl &= ~IXGB_RCTL_UPE;
  855. } else {
  856. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  857. }
  858. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  859. rctl |= IXGB_RCTL_MPE;
  860. IXGB_WRITE_REG(hw, RCTL, rctl);
  861. } else {
  862. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  863. IXGB_WRITE_REG(hw, RCTL, rctl);
  864. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  865. i++, mc_ptr = mc_ptr->next)
  866. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  867. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  868. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  869. }
  870. }
  871. /**
  872. * ixgb_watchdog - Timer Call-back
  873. * @data: pointer to netdev cast into an unsigned long
  874. **/
  875. static void
  876. ixgb_watchdog(unsigned long data)
  877. {
  878. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  879. struct net_device *netdev = adapter->netdev;
  880. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  881. ixgb_check_for_link(&adapter->hw);
  882. if (ixgb_check_for_bad_link(&adapter->hw)) {
  883. /* force the reset path */
  884. netif_stop_queue(netdev);
  885. }
  886. if(adapter->hw.link_up) {
  887. if(!netif_carrier_ok(netdev)) {
  888. printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
  889. netdev->name, 10000, "Full Duplex");
  890. adapter->link_speed = 10000;
  891. adapter->link_duplex = FULL_DUPLEX;
  892. netif_carrier_on(netdev);
  893. netif_wake_queue(netdev);
  894. }
  895. } else {
  896. if(netif_carrier_ok(netdev)) {
  897. adapter->link_speed = 0;
  898. adapter->link_duplex = 0;
  899. printk(KERN_INFO
  900. "ixgb: %s NIC Link is Down\n",
  901. netdev->name);
  902. netif_carrier_off(netdev);
  903. netif_stop_queue(netdev);
  904. }
  905. }
  906. ixgb_update_stats(adapter);
  907. if(!netif_carrier_ok(netdev)) {
  908. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  909. /* We've lost link, so the controller stops DMA,
  910. * but we've got queued Tx work that's never going
  911. * to get done, so reset controller to flush Tx.
  912. * (Do the reset outside of interrupt context). */
  913. schedule_work(&adapter->tx_timeout_task);
  914. }
  915. }
  916. /* Force detection of hung controller every watchdog period */
  917. adapter->detect_tx_hung = TRUE;
  918. /* generate an interrupt to force clean up of any stragglers */
  919. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  920. /* Reset the timer */
  921. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  922. }
  923. #define IXGB_TX_FLAGS_CSUM 0x00000001
  924. #define IXGB_TX_FLAGS_VLAN 0x00000002
  925. #define IXGB_TX_FLAGS_TSO 0x00000004
  926. static inline int
  927. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  928. {
  929. #ifdef NETIF_F_TSO
  930. struct ixgb_context_desc *context_desc;
  931. unsigned int i;
  932. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  933. uint16_t ipcse, tucse, mss;
  934. int err;
  935. if(likely(skb_shinfo(skb)->tso_size)) {
  936. if (skb_header_cloned(skb)) {
  937. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  938. if (err)
  939. return err;
  940. }
  941. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  942. mss = skb_shinfo(skb)->tso_size;
  943. skb->nh.iph->tot_len = 0;
  944. skb->nh.iph->check = 0;
  945. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  946. skb->nh.iph->daddr,
  947. 0, IPPROTO_TCP, 0);
  948. ipcss = skb->nh.raw - skb->data;
  949. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  950. ipcse = skb->h.raw - skb->data - 1;
  951. tucss = skb->h.raw - skb->data;
  952. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  953. tucse = 0;
  954. i = adapter->tx_ring.next_to_use;
  955. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  956. context_desc->ipcss = ipcss;
  957. context_desc->ipcso = ipcso;
  958. context_desc->ipcse = cpu_to_le16(ipcse);
  959. context_desc->tucss = tucss;
  960. context_desc->tucso = tucso;
  961. context_desc->tucse = cpu_to_le16(tucse);
  962. context_desc->mss = cpu_to_le16(mss);
  963. context_desc->hdr_len = hdr_len;
  964. context_desc->status = 0;
  965. context_desc->cmd_type_len = cpu_to_le32(
  966. IXGB_CONTEXT_DESC_TYPE
  967. | IXGB_CONTEXT_DESC_CMD_TSE
  968. | IXGB_CONTEXT_DESC_CMD_IP
  969. | IXGB_CONTEXT_DESC_CMD_TCP
  970. | IXGB_CONTEXT_DESC_CMD_IDE
  971. | (skb->len - (hdr_len)));
  972. if(++i == adapter->tx_ring.count) i = 0;
  973. adapter->tx_ring.next_to_use = i;
  974. return 1;
  975. }
  976. #endif
  977. return 0;
  978. }
  979. static inline boolean_t
  980. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  981. {
  982. struct ixgb_context_desc *context_desc;
  983. unsigned int i;
  984. uint8_t css, cso;
  985. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  986. css = skb->h.raw - skb->data;
  987. cso = (skb->h.raw + skb->csum) - skb->data;
  988. i = adapter->tx_ring.next_to_use;
  989. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  990. context_desc->tucss = css;
  991. context_desc->tucso = cso;
  992. context_desc->tucse = 0;
  993. /* zero out any previously existing data in one instruction */
  994. *(uint32_t *)&(context_desc->ipcss) = 0;
  995. context_desc->status = 0;
  996. context_desc->hdr_len = 0;
  997. context_desc->mss = 0;
  998. context_desc->cmd_type_len =
  999. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  1000. | IXGB_TX_DESC_CMD_IDE);
  1001. if(++i == adapter->tx_ring.count) i = 0;
  1002. adapter->tx_ring.next_to_use = i;
  1003. return TRUE;
  1004. }
  1005. return FALSE;
  1006. }
  1007. #define IXGB_MAX_TXD_PWR 14
  1008. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1009. static inline int
  1010. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1011. unsigned int first)
  1012. {
  1013. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1014. struct ixgb_buffer *buffer_info;
  1015. int len = skb->len;
  1016. unsigned int offset = 0, size, count = 0, i;
  1017. unsigned int mss = skb_shinfo(skb)->tso_size;
  1018. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1019. unsigned int f;
  1020. len -= skb->data_len;
  1021. i = tx_ring->next_to_use;
  1022. while(len) {
  1023. buffer_info = &tx_ring->buffer_info[i];
  1024. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1025. /* Workaround for premature desc write-backs
  1026. * in TSO mode. Append 4-byte sentinel desc */
  1027. if(unlikely(mss && !nr_frags && size == len && size > 8))
  1028. size -= 4;
  1029. buffer_info->length = size;
  1030. buffer_info->dma =
  1031. pci_map_single(adapter->pdev,
  1032. skb->data + offset,
  1033. size,
  1034. PCI_DMA_TODEVICE);
  1035. buffer_info->time_stamp = jiffies;
  1036. len -= size;
  1037. offset += size;
  1038. count++;
  1039. if(++i == tx_ring->count) i = 0;
  1040. }
  1041. for(f = 0; f < nr_frags; f++) {
  1042. struct skb_frag_struct *frag;
  1043. frag = &skb_shinfo(skb)->frags[f];
  1044. len = frag->size;
  1045. offset = 0;
  1046. while(len) {
  1047. buffer_info = &tx_ring->buffer_info[i];
  1048. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1049. /* Workaround for premature desc write-backs
  1050. * in TSO mode. Append 4-byte sentinel desc */
  1051. if(unlikely(mss && (f == (nr_frags-1)) && (size == len)
  1052. && (size > 8)))
  1053. size -= 4;
  1054. buffer_info->length = size;
  1055. buffer_info->dma =
  1056. pci_map_page(adapter->pdev,
  1057. frag->page,
  1058. frag->page_offset + offset,
  1059. size,
  1060. PCI_DMA_TODEVICE);
  1061. buffer_info->time_stamp = jiffies;
  1062. len -= size;
  1063. offset += size;
  1064. count++;
  1065. if(++i == tx_ring->count) i = 0;
  1066. }
  1067. }
  1068. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1069. tx_ring->buffer_info[i].skb = skb;
  1070. tx_ring->buffer_info[first].next_to_watch = i;
  1071. return count;
  1072. }
  1073. static inline void
  1074. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1075. {
  1076. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1077. struct ixgb_tx_desc *tx_desc = NULL;
  1078. struct ixgb_buffer *buffer_info;
  1079. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1080. uint8_t status = 0;
  1081. uint8_t popts = 0;
  1082. unsigned int i;
  1083. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1084. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1085. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1086. }
  1087. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1088. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1089. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1090. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1091. }
  1092. i = tx_ring->next_to_use;
  1093. while(count--) {
  1094. buffer_info = &tx_ring->buffer_info[i];
  1095. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1096. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1097. tx_desc->cmd_type_len =
  1098. cpu_to_le32(cmd_type_len | buffer_info->length);
  1099. tx_desc->status = status;
  1100. tx_desc->popts = popts;
  1101. tx_desc->vlan = cpu_to_le16(vlan_id);
  1102. if(++i == tx_ring->count) i = 0;
  1103. }
  1104. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1105. | IXGB_TX_DESC_CMD_RS );
  1106. /* Force memory writes to complete before letting h/w
  1107. * know there are new descriptors to fetch. (Only
  1108. * applicable for weak-ordered memory model archs,
  1109. * such as IA-64). */
  1110. wmb();
  1111. tx_ring->next_to_use = i;
  1112. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1113. }
  1114. /* Tx Descriptors needed, worst case */
  1115. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1116. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1117. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1118. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 \
  1119. /* one more for TSO workaround */ + 1
  1120. static int
  1121. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1122. {
  1123. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1124. unsigned int first;
  1125. unsigned int tx_flags = 0;
  1126. unsigned long flags;
  1127. int vlan_id = 0;
  1128. int tso;
  1129. if(skb->len <= 0) {
  1130. dev_kfree_skb_any(skb);
  1131. return 0;
  1132. }
  1133. spin_lock_irqsave(&adapter->tx_lock, flags);
  1134. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1135. netif_stop_queue(netdev);
  1136. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1137. return 1;
  1138. }
  1139. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1140. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1141. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1142. vlan_id = vlan_tx_tag_get(skb);
  1143. }
  1144. first = adapter->tx_ring.next_to_use;
  1145. tso = ixgb_tso(adapter, skb);
  1146. if (tso < 0) {
  1147. dev_kfree_skb_any(skb);
  1148. return NETDEV_TX_OK;
  1149. }
  1150. if (likely(tso))
  1151. tx_flags |= IXGB_TX_FLAGS_TSO;
  1152. else if(ixgb_tx_csum(adapter, skb))
  1153. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1154. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1155. tx_flags);
  1156. netdev->trans_start = jiffies;
  1157. return 0;
  1158. }
  1159. /**
  1160. * ixgb_tx_timeout - Respond to a Tx Hang
  1161. * @netdev: network interface device structure
  1162. **/
  1163. static void
  1164. ixgb_tx_timeout(struct net_device *netdev)
  1165. {
  1166. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1167. /* Do the reset outside of interrupt context */
  1168. schedule_work(&adapter->tx_timeout_task);
  1169. }
  1170. static void
  1171. ixgb_tx_timeout_task(struct net_device *netdev)
  1172. {
  1173. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1174. ixgb_down(adapter, TRUE);
  1175. ixgb_up(adapter);
  1176. }
  1177. /**
  1178. * ixgb_get_stats - Get System Network Statistics
  1179. * @netdev: network interface device structure
  1180. *
  1181. * Returns the address of the device statistics structure.
  1182. * The statistics are actually updated from the timer callback.
  1183. **/
  1184. static struct net_device_stats *
  1185. ixgb_get_stats(struct net_device *netdev)
  1186. {
  1187. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1188. return &adapter->net_stats;
  1189. }
  1190. /**
  1191. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1192. * @netdev: network interface device structure
  1193. * @new_mtu: new value for maximum frame size
  1194. *
  1195. * Returns 0 on success, negative on failure
  1196. **/
  1197. static int
  1198. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1199. {
  1200. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1201. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1202. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1203. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1204. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1205. IXGB_ERR("Invalid MTU setting\n");
  1206. return -EINVAL;
  1207. }
  1208. if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1209. || (max_frame <= IXGB_RXBUFFER_2048)) {
  1210. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  1211. } else if(max_frame <= IXGB_RXBUFFER_4096) {
  1212. adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
  1213. } else if(max_frame <= IXGB_RXBUFFER_8192) {
  1214. adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
  1215. } else {
  1216. adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
  1217. }
  1218. netdev->mtu = new_mtu;
  1219. if(old_max_frame != max_frame && netif_running(netdev)) {
  1220. ixgb_down(adapter, TRUE);
  1221. ixgb_up(adapter);
  1222. }
  1223. return 0;
  1224. }
  1225. /**
  1226. * ixgb_update_stats - Update the board statistics counters.
  1227. * @adapter: board private structure
  1228. **/
  1229. void
  1230. ixgb_update_stats(struct ixgb_adapter *adapter)
  1231. {
  1232. struct net_device *netdev = adapter->netdev;
  1233. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1234. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1235. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1236. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1237. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1238. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1239. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1240. /* fix up multicast stats by removing broadcasts */
  1241. if(multi >= bcast)
  1242. multi -= bcast;
  1243. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1244. adapter->stats.mprch += (multi >> 32);
  1245. adapter->stats.bprcl += bcast_l;
  1246. adapter->stats.bprch += bcast_h;
  1247. } else {
  1248. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1249. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1250. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1251. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1252. }
  1253. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1254. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1255. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1256. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1257. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1258. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1259. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1260. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1261. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1262. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1263. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1264. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1265. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1266. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1267. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1268. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1269. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1270. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1271. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1272. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1273. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1274. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1275. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1276. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1277. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1278. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1279. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1280. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1281. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1282. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1283. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1284. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1285. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1286. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1287. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1288. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1289. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1290. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1291. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1292. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1293. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1294. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1295. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1296. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1297. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1298. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1299. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1300. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1301. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1302. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1303. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1304. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1305. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1306. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1307. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1308. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1309. /* Fill out the OS statistics structure */
  1310. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1311. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1312. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1313. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1314. adapter->net_stats.multicast = adapter->stats.mprcl;
  1315. adapter->net_stats.collisions = 0;
  1316. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1317. * with a length in the type/len field */
  1318. adapter->net_stats.rx_errors =
  1319. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1320. adapter->stats.ruc +
  1321. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1322. adapter->stats.icbc +
  1323. adapter->stats.ecbc + adapter->stats.mpc;
  1324. /* see above
  1325. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1326. */
  1327. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1328. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1329. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1330. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1331. adapter->net_stats.tx_errors = 0;
  1332. adapter->net_stats.rx_frame_errors = 0;
  1333. adapter->net_stats.tx_aborted_errors = 0;
  1334. adapter->net_stats.tx_carrier_errors = 0;
  1335. adapter->net_stats.tx_fifo_errors = 0;
  1336. adapter->net_stats.tx_heartbeat_errors = 0;
  1337. adapter->net_stats.tx_window_errors = 0;
  1338. }
  1339. #define IXGB_MAX_INTR 10
  1340. /**
  1341. * ixgb_intr - Interrupt Handler
  1342. * @irq: interrupt number
  1343. * @data: pointer to a network interface device structure
  1344. * @pt_regs: CPU registers structure
  1345. **/
  1346. static irqreturn_t
  1347. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1348. {
  1349. struct net_device *netdev = data;
  1350. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1351. struct ixgb_hw *hw = &adapter->hw;
  1352. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1353. #ifndef CONFIG_IXGB_NAPI
  1354. unsigned int i;
  1355. #endif
  1356. if(unlikely(!icr))
  1357. return IRQ_NONE; /* Not our interrupt */
  1358. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1359. mod_timer(&adapter->watchdog_timer, jiffies);
  1360. }
  1361. #ifdef CONFIG_IXGB_NAPI
  1362. if(netif_rx_schedule_prep(netdev)) {
  1363. /* Disable interrupts and register for poll. The flush
  1364. of the posted write is intentionally left out.
  1365. */
  1366. atomic_inc(&adapter->irq_sem);
  1367. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1368. __netif_rx_schedule(netdev);
  1369. }
  1370. #else
  1371. /* yes, that is actually a & and it is meant to make sure that
  1372. * every pass through this for loop checks both receive and
  1373. * transmit queues for completed descriptors, intended to
  1374. * avoid starvation issues and assist tx/rx fairness. */
  1375. for(i = 0; i < IXGB_MAX_INTR; i++)
  1376. if(!ixgb_clean_rx_irq(adapter) &
  1377. !ixgb_clean_tx_irq(adapter))
  1378. break;
  1379. #endif
  1380. return IRQ_HANDLED;
  1381. }
  1382. #ifdef CONFIG_IXGB_NAPI
  1383. /**
  1384. * ixgb_clean - NAPI Rx polling callback
  1385. * @adapter: board private structure
  1386. **/
  1387. static int
  1388. ixgb_clean(struct net_device *netdev, int *budget)
  1389. {
  1390. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1391. int work_to_do = min(*budget, netdev->quota);
  1392. int tx_cleaned;
  1393. int work_done = 0;
  1394. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1395. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1396. *budget -= work_done;
  1397. netdev->quota -= work_done;
  1398. /* if no Tx and not enough Rx work done, exit the polling mode */
  1399. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1400. netif_rx_complete(netdev);
  1401. ixgb_irq_enable(adapter);
  1402. return 0;
  1403. }
  1404. return 1;
  1405. }
  1406. #endif
  1407. /**
  1408. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1409. * @adapter: board private structure
  1410. **/
  1411. static boolean_t
  1412. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1413. {
  1414. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1415. struct net_device *netdev = adapter->netdev;
  1416. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1417. struct ixgb_buffer *buffer_info;
  1418. unsigned int i, eop;
  1419. boolean_t cleaned = FALSE;
  1420. i = tx_ring->next_to_clean;
  1421. eop = tx_ring->buffer_info[i].next_to_watch;
  1422. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1423. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1424. for(cleaned = FALSE; !cleaned; ) {
  1425. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1426. buffer_info = &tx_ring->buffer_info[i];
  1427. if (tx_desc->popts
  1428. & (IXGB_TX_DESC_POPTS_TXSM |
  1429. IXGB_TX_DESC_POPTS_IXSM))
  1430. adapter->hw_csum_tx_good++;
  1431. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1432. *(uint32_t *)&(tx_desc->status) = 0;
  1433. cleaned = (i == eop);
  1434. if(++i == tx_ring->count) i = 0;
  1435. }
  1436. eop = tx_ring->buffer_info[i].next_to_watch;
  1437. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1438. }
  1439. tx_ring->next_to_clean = i;
  1440. spin_lock(&adapter->tx_lock);
  1441. if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1442. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
  1443. netif_wake_queue(netdev);
  1444. }
  1445. spin_unlock(&adapter->tx_lock);
  1446. if(adapter->detect_tx_hung) {
  1447. /* detect a transmit hang in hardware, this serializes the
  1448. * check with the clearing of time_stamp and movement of i */
  1449. adapter->detect_tx_hung = FALSE;
  1450. if(tx_ring->buffer_info[i].dma &&
  1451. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  1452. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1453. IXGB_STATUS_TXOFF))
  1454. netif_stop_queue(netdev);
  1455. }
  1456. return cleaned;
  1457. }
  1458. /**
  1459. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1460. * @adapter: board private structure
  1461. * @rx_desc: receive descriptor
  1462. * @sk_buff: socket buffer with received data
  1463. **/
  1464. static inline void
  1465. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1466. struct ixgb_rx_desc *rx_desc,
  1467. struct sk_buff *skb)
  1468. {
  1469. /* Ignore Checksum bit is set OR
  1470. * TCP Checksum has not been calculated
  1471. */
  1472. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1473. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1474. skb->ip_summed = CHECKSUM_NONE;
  1475. return;
  1476. }
  1477. /* At this point we know the hardware did the TCP checksum */
  1478. /* now look at the TCP checksum error bit */
  1479. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1480. /* let the stack verify checksum errors */
  1481. skb->ip_summed = CHECKSUM_NONE;
  1482. adapter->hw_csum_rx_error++;
  1483. } else {
  1484. /* TCP checksum is good */
  1485. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1486. adapter->hw_csum_rx_good++;
  1487. }
  1488. }
  1489. /**
  1490. * ixgb_clean_rx_irq - Send received data up the network stack,
  1491. * @adapter: board private structure
  1492. **/
  1493. static boolean_t
  1494. #ifdef CONFIG_IXGB_NAPI
  1495. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1496. #else
  1497. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1498. #endif
  1499. {
  1500. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1501. struct net_device *netdev = adapter->netdev;
  1502. struct pci_dev *pdev = adapter->pdev;
  1503. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1504. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1505. uint32_t length;
  1506. unsigned int i, j;
  1507. boolean_t cleaned = FALSE;
  1508. i = rx_ring->next_to_clean;
  1509. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1510. buffer_info = &rx_ring->buffer_info[i];
  1511. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1512. struct sk_buff *skb, *next_skb;
  1513. u8 status;
  1514. #ifdef CONFIG_IXGB_NAPI
  1515. if(*work_done >= work_to_do)
  1516. break;
  1517. (*work_done)++;
  1518. #endif
  1519. status = rx_desc->status;
  1520. skb = buffer_info->skb;
  1521. prefetch(skb->data);
  1522. if(++i == rx_ring->count) i = 0;
  1523. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1524. prefetch(next_rxd);
  1525. if((j = i + 1) == rx_ring->count) j = 0;
  1526. next2_buffer = &rx_ring->buffer_info[j];
  1527. prefetch(next2_buffer);
  1528. next_buffer = &rx_ring->buffer_info[i];
  1529. next_skb = next_buffer->skb;
  1530. prefetch(next_skb);
  1531. cleaned = TRUE;
  1532. pci_unmap_single(pdev,
  1533. buffer_info->dma,
  1534. buffer_info->length,
  1535. PCI_DMA_FROMDEVICE);
  1536. length = le16_to_cpu(rx_desc->length);
  1537. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1538. /* All receives must fit into a single buffer */
  1539. IXGB_DBG("Receive packet consumed multiple buffers "
  1540. "length<%x>\n", length);
  1541. dev_kfree_skb_irq(skb);
  1542. goto rxdesc_done;
  1543. }
  1544. if (unlikely(rx_desc->errors
  1545. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1546. | IXGB_RX_DESC_ERRORS_P |
  1547. IXGB_RX_DESC_ERRORS_RXE))) {
  1548. dev_kfree_skb_irq(skb);
  1549. goto rxdesc_done;
  1550. }
  1551. /* Good Receive */
  1552. skb_put(skb, length);
  1553. /* Receive Checksum Offload */
  1554. ixgb_rx_checksum(adapter, rx_desc, skb);
  1555. skb->protocol = eth_type_trans(skb, netdev);
  1556. #ifdef CONFIG_IXGB_NAPI
  1557. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1558. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1559. le16_to_cpu(rx_desc->special) &
  1560. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1561. } else {
  1562. netif_receive_skb(skb);
  1563. }
  1564. #else /* CONFIG_IXGB_NAPI */
  1565. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1566. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1567. le16_to_cpu(rx_desc->special) &
  1568. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1569. } else {
  1570. netif_rx(skb);
  1571. }
  1572. #endif /* CONFIG_IXGB_NAPI */
  1573. netdev->last_rx = jiffies;
  1574. rxdesc_done:
  1575. /* clean up descriptor, might be written over by hw */
  1576. rx_desc->status = 0;
  1577. buffer_info->skb = NULL;
  1578. /* use prefetched values */
  1579. rx_desc = next_rxd;
  1580. buffer_info = next_buffer;
  1581. }
  1582. rx_ring->next_to_clean = i;
  1583. ixgb_alloc_rx_buffers(adapter);
  1584. return cleaned;
  1585. }
  1586. /**
  1587. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1588. * @adapter: address of board private structure
  1589. **/
  1590. static void
  1591. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1592. {
  1593. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1594. struct net_device *netdev = adapter->netdev;
  1595. struct pci_dev *pdev = adapter->pdev;
  1596. struct ixgb_rx_desc *rx_desc;
  1597. struct ixgb_buffer *buffer_info;
  1598. struct sk_buff *skb;
  1599. unsigned int i;
  1600. int num_group_tail_writes;
  1601. long cleancount;
  1602. i = rx_ring->next_to_use;
  1603. buffer_info = &rx_ring->buffer_info[i];
  1604. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1605. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1606. /* leave three descriptors unused */
  1607. while(--cleancount > 2) {
  1608. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1609. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1610. if(unlikely(!skb)) {
  1611. /* Better luck next round */
  1612. break;
  1613. }
  1614. /* Make buffer alignment 2 beyond a 16 byte boundary
  1615. * this will result in a 16 byte aligned IP header after
  1616. * the 14 byte MAC header is removed
  1617. */
  1618. skb_reserve(skb, NET_IP_ALIGN);
  1619. skb->dev = netdev;
  1620. buffer_info->skb = skb;
  1621. buffer_info->length = adapter->rx_buffer_len;
  1622. buffer_info->dma =
  1623. pci_map_single(pdev,
  1624. skb->data,
  1625. adapter->rx_buffer_len,
  1626. PCI_DMA_FROMDEVICE);
  1627. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1628. /* guarantee DD bit not set now before h/w gets descriptor
  1629. * this is the rest of the workaround for h/w double
  1630. * writeback. */
  1631. rx_desc->status = 0;
  1632. if((i & ~(num_group_tail_writes- 1)) == i) {
  1633. /* Force memory writes to complete before letting h/w
  1634. * know there are new descriptors to fetch. (Only
  1635. * applicable for weak-ordered memory model archs,
  1636. * such as IA-64). */
  1637. wmb();
  1638. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1639. }
  1640. if(++i == rx_ring->count) i = 0;
  1641. buffer_info = &rx_ring->buffer_info[i];
  1642. }
  1643. rx_ring->next_to_use = i;
  1644. }
  1645. /**
  1646. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1647. *
  1648. * @param netdev network interface device structure
  1649. * @param grp indicates to enable or disable tagging/stripping
  1650. **/
  1651. static void
  1652. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1653. {
  1654. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1655. uint32_t ctrl, rctl;
  1656. ixgb_irq_disable(adapter);
  1657. adapter->vlgrp = grp;
  1658. if(grp) {
  1659. /* enable VLAN tag insert/strip */
  1660. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1661. ctrl |= IXGB_CTRL0_VME;
  1662. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1663. /* enable VLAN receive filtering */
  1664. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1665. rctl |= IXGB_RCTL_VFE;
  1666. rctl &= ~IXGB_RCTL_CFIEN;
  1667. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1668. } else {
  1669. /* disable VLAN tag insert/strip */
  1670. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1671. ctrl &= ~IXGB_CTRL0_VME;
  1672. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1673. /* disable VLAN filtering */
  1674. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1675. rctl &= ~IXGB_RCTL_VFE;
  1676. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1677. }
  1678. ixgb_irq_enable(adapter);
  1679. }
  1680. static void
  1681. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1682. {
  1683. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1684. uint32_t vfta, index;
  1685. /* add VID to filter table */
  1686. index = (vid >> 5) & 0x7F;
  1687. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1688. vfta |= (1 << (vid & 0x1F));
  1689. ixgb_write_vfta(&adapter->hw, index, vfta);
  1690. }
  1691. static void
  1692. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1693. {
  1694. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1695. uint32_t vfta, index;
  1696. ixgb_irq_disable(adapter);
  1697. if(adapter->vlgrp)
  1698. adapter->vlgrp->vlan_devices[vid] = NULL;
  1699. ixgb_irq_enable(adapter);
  1700. /* remove VID from filter table*/
  1701. index = (vid >> 5) & 0x7F;
  1702. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1703. vfta &= ~(1 << (vid & 0x1F));
  1704. ixgb_write_vfta(&adapter->hw, index, vfta);
  1705. }
  1706. static void
  1707. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1708. {
  1709. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1710. if(adapter->vlgrp) {
  1711. uint16_t vid;
  1712. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1713. if(!adapter->vlgrp->vlan_devices[vid])
  1714. continue;
  1715. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1716. }
  1717. }
  1718. }
  1719. #ifdef CONFIG_NET_POLL_CONTROLLER
  1720. /*
  1721. * Polling 'interrupt' - used by things like netconsole to send skbs
  1722. * without having to re-enable interrupts. It's not called while
  1723. * the interrupt routine is executing.
  1724. */
  1725. static void ixgb_netpoll(struct net_device *dev)
  1726. {
  1727. struct ixgb_adapter *adapter = dev->priv;
  1728. disable_irq(adapter->pdev->irq);
  1729. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1730. enable_irq(adapter->pdev->irq);
  1731. }
  1732. #endif
  1733. /* ixgb_main.c */