devicetree.c 6.1 KB

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  1. /*
  2. * Architecture specific OF callbacks.
  3. */
  4. #include <linux/bootmem.h>
  5. #include <linux/io.h>
  6. #include <linux/interrupt.h>
  7. #include <linux/list.h>
  8. #include <linux/of.h>
  9. #include <linux/of_fdt.h>
  10. #include <linux/of_address.h>
  11. #include <linux/of_platform.h>
  12. #include <linux/of_irq.h>
  13. #include <linux/slab.h>
  14. #include <linux/pci.h>
  15. #include <linux/of_pci.h>
  16. #include <asm/hpet.h>
  17. #include <asm/irq_controller.h>
  18. #include <asm/apic.h>
  19. #include <asm/pci_x86.h>
  20. __initdata u64 initial_dtb;
  21. char __initdata cmd_line[COMMAND_LINE_SIZE];
  22. static LIST_HEAD(irq_domains);
  23. static DEFINE_RAW_SPINLOCK(big_irq_lock);
  24. int __initdata of_ioapic;
  25. void add_interrupt_host(struct irq_domain *ih)
  26. {
  27. unsigned long flags;
  28. raw_spin_lock_irqsave(&big_irq_lock, flags);
  29. list_add(&ih->l, &irq_domains);
  30. raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  31. }
  32. static struct irq_domain *get_ih_from_node(struct device_node *controller)
  33. {
  34. struct irq_domain *ih, *found = NULL;
  35. unsigned long flags;
  36. raw_spin_lock_irqsave(&big_irq_lock, flags);
  37. list_for_each_entry(ih, &irq_domains, l) {
  38. if (ih->controller == controller) {
  39. found = ih;
  40. break;
  41. }
  42. }
  43. raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  44. return found;
  45. }
  46. unsigned int irq_create_of_mapping(struct device_node *controller,
  47. const u32 *intspec, unsigned int intsize)
  48. {
  49. struct irq_domain *ih;
  50. u32 virq, type;
  51. int ret;
  52. ih = get_ih_from_node(controller);
  53. if (!ih)
  54. return 0;
  55. ret = ih->xlate(ih, intspec, intsize, &virq, &type);
  56. if (ret)
  57. return ret;
  58. if (type == IRQ_TYPE_NONE)
  59. return virq;
  60. /* set the mask if it is different from current */
  61. if (type == (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
  62. set_irq_type(virq, type);
  63. return virq;
  64. }
  65. EXPORT_SYMBOL_GPL(irq_create_of_mapping);
  66. unsigned long pci_address_to_pio(phys_addr_t address)
  67. {
  68. /*
  69. * The ioport address can be directly used by inX / outX
  70. */
  71. BUG_ON(address >= (1 << 16));
  72. return (unsigned long)address;
  73. }
  74. EXPORT_SYMBOL_GPL(pci_address_to_pio);
  75. void __init early_init_dt_scan_chosen_arch(unsigned long node)
  76. {
  77. BUG();
  78. }
  79. void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  80. {
  81. BUG();
  82. }
  83. void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  84. {
  85. return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
  86. }
  87. void __init add_dtb(u64 data)
  88. {
  89. initial_dtb = data + offsetof(struct setup_data, data);
  90. }
  91. #ifdef CONFIG_PCI
  92. static int x86_of_pci_irq_enable(struct pci_dev *dev)
  93. {
  94. struct of_irq oirq;
  95. u32 virq;
  96. int ret;
  97. u8 pin;
  98. ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
  99. if (ret)
  100. return ret;
  101. if (!pin)
  102. return 0;
  103. ret = of_irq_map_pci(dev, &oirq);
  104. if (ret)
  105. return ret;
  106. virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
  107. oirq.size);
  108. if (virq == 0)
  109. return -EINVAL;
  110. dev->irq = virq;
  111. return 0;
  112. }
  113. static void x86_of_pci_irq_disable(struct pci_dev *dev)
  114. {
  115. }
  116. void __cpuinit x86_of_pci_init(void)
  117. {
  118. struct device_node *np;
  119. pcibios_enable_irq = x86_of_pci_irq_enable;
  120. pcibios_disable_irq = x86_of_pci_irq_disable;
  121. for_each_node_by_type(np, "pci") {
  122. const void *prop;
  123. struct pci_bus *bus;
  124. unsigned int bus_min;
  125. struct device_node *child;
  126. prop = of_get_property(np, "bus-range", NULL);
  127. if (!prop)
  128. continue;
  129. bus_min = be32_to_cpup(prop);
  130. bus = pci_find_bus(0, bus_min);
  131. if (!bus) {
  132. printk(KERN_ERR "Can't find a node for bus %s.\n",
  133. np->full_name);
  134. continue;
  135. }
  136. if (bus->self)
  137. bus->self->dev.of_node = np;
  138. else
  139. bus->dev.of_node = np;
  140. for_each_child_of_node(np, child) {
  141. struct pci_dev *dev;
  142. u32 devfn;
  143. prop = of_get_property(child, "reg", NULL);
  144. if (!prop)
  145. continue;
  146. devfn = (be32_to_cpup(prop) >> 8) & 0xff;
  147. dev = pci_get_slot(bus, devfn);
  148. if (!dev)
  149. continue;
  150. dev->dev.of_node = child;
  151. pci_dev_put(dev);
  152. }
  153. }
  154. }
  155. #endif
  156. static void __init dtb_setup_hpet(void)
  157. {
  158. struct device_node *dn;
  159. struct resource r;
  160. int ret;
  161. dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
  162. if (!dn)
  163. return;
  164. ret = of_address_to_resource(dn, 0, &r);
  165. if (ret) {
  166. WARN_ON(1);
  167. return;
  168. }
  169. hpet_address = r.start;
  170. }
  171. static void __init dtb_lapic_setup(void)
  172. {
  173. #ifdef CONFIG_X86_LOCAL_APIC
  174. if (apic_force_enable())
  175. return;
  176. smp_found_config = 1;
  177. pic_mode = 1;
  178. /* Required for ioapic registration */
  179. set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
  180. if (boot_cpu_physical_apicid == -1U)
  181. boot_cpu_physical_apicid = read_apic_id();
  182. generic_processor_info(boot_cpu_physical_apicid,
  183. GET_APIC_VERSION(apic_read(APIC_LVR)));
  184. #endif
  185. }
  186. #ifdef CONFIG_X86_IO_APIC
  187. static unsigned int ioapic_id;
  188. static void __init dtb_add_ioapic(struct device_node *dn)
  189. {
  190. struct resource r;
  191. int ret;
  192. ret = of_address_to_resource(dn, 0, &r);
  193. if (ret) {
  194. printk(KERN_ERR "Can't obtain address from node %s.\n",
  195. dn->full_name);
  196. return;
  197. }
  198. mp_register_ioapic(++ioapic_id, r.start, gsi_top);
  199. }
  200. static void __init dtb_ioapic_setup(void)
  201. {
  202. struct device_node *dn;
  203. if (!smp_found_config)
  204. return;
  205. for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
  206. dtb_add_ioapic(dn);
  207. if (nr_ioapics) {
  208. of_ioapic = 1;
  209. return;
  210. }
  211. printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
  212. smp_found_config = 0;
  213. }
  214. #else
  215. static void __init dtb_ioapic_setup(void) {}
  216. #endif
  217. static void __init dtb_apic_setup(void)
  218. {
  219. dtb_lapic_setup();
  220. dtb_ioapic_setup();
  221. }
  222. void __init x86_dtb_find_config(void)
  223. {
  224. if (initial_dtb)
  225. smp_found_config = 1;
  226. else
  227. printk(KERN_ERR "Missing device tree!.\n");
  228. }
  229. void __init x86_dtb_get_config(unsigned int unused)
  230. {
  231. u32 size, map_len;
  232. void *new_dtb;
  233. if (!initial_dtb)
  234. return;
  235. map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
  236. (u64)sizeof(struct boot_param_header));
  237. initial_boot_params = early_memremap(initial_dtb, map_len);
  238. size = be32_to_cpu(initial_boot_params->totalsize);
  239. if (map_len < size) {
  240. early_iounmap(initial_boot_params, map_len);
  241. initial_boot_params = early_memremap(initial_dtb, size);
  242. map_len = size;
  243. }
  244. new_dtb = alloc_bootmem(size);
  245. memcpy(new_dtb, initial_boot_params, size);
  246. early_iounmap(initial_boot_params, map_len);
  247. initial_boot_params = new_dtb;
  248. /* root level address cells */
  249. of_scan_flat_dt(early_init_dt_scan_root, NULL);
  250. unflatten_device_tree();
  251. dtb_setup_hpet();
  252. dtb_apic_setup();
  253. }