isp1760-hcd.c 52 KB

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  1. /*
  2. * Driver for the NXP ISP1760 chip
  3. *
  4. * However, the code might contain some bugs. What doesn't work for sure is:
  5. * - ISO
  6. * - OTG
  7. e The interrupt line is configured as active low, level.
  8. *
  9. * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/slab.h>
  15. #include <linux/list.h>
  16. #include <linux/usb.h>
  17. #include <linux/debugfs.h>
  18. #include <linux/uaccess.h>
  19. #include <linux/io.h>
  20. #include <asm/unaligned.h>
  21. #include "../core/hcd.h"
  22. #include "isp1760-hcd.h"
  23. static struct kmem_cache *qtd_cachep;
  24. static struct kmem_cache *qh_cachep;
  25. struct isp1760_hcd {
  26. u32 hcs_params;
  27. spinlock_t lock;
  28. struct inter_packet_info atl_ints[32];
  29. struct inter_packet_info int_ints[32];
  30. struct memory_chunk memory_pool[BLOCKS];
  31. /* periodic schedule support */
  32. #define DEFAULT_I_TDPS 1024
  33. unsigned periodic_size;
  34. unsigned i_thresh;
  35. unsigned long reset_done;
  36. unsigned long next_statechange;
  37. };
  38. static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
  39. {
  40. return (struct isp1760_hcd *) (hcd->hcd_priv);
  41. }
  42. static inline struct usb_hcd *priv_to_hcd(struct isp1760_hcd *priv)
  43. {
  44. return container_of((void *) priv, struct usb_hcd, hcd_priv);
  45. }
  46. /* Section 2.2 Host Controller Capability Registers */
  47. #define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
  48. #define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
  49. #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
  50. #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
  51. #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
  52. #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
  53. #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
  54. /* Section 2.3 Host Controller Operational Registers */
  55. #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
  56. #define CMD_RESET (1<<1) /* reset HC not bus */
  57. #define CMD_RUN (1<<0) /* start/stop HC */
  58. #define STS_PCD (1<<2) /* port change detect */
  59. #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
  60. #define PORT_OWNER (1<<13) /* true: companion hc owns this port */
  61. #define PORT_POWER (1<<12) /* true: has power (see PPC) */
  62. #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
  63. #define PORT_RESET (1<<8) /* reset port */
  64. #define PORT_SUSPEND (1<<7) /* suspend port */
  65. #define PORT_RESUME (1<<6) /* resume it */
  66. #define PORT_PE (1<<2) /* port enable */
  67. #define PORT_CSC (1<<1) /* connect status change */
  68. #define PORT_CONNECT (1<<0) /* device connected */
  69. #define PORT_RWC_BITS (PORT_CSC)
  70. struct isp1760_qtd {
  71. struct isp1760_qtd *hw_next;
  72. u8 packet_type;
  73. u8 toggle;
  74. void *data_buffer;
  75. /* the rest is HCD-private */
  76. struct list_head qtd_list;
  77. struct urb *urb;
  78. size_t length;
  79. /* isp special*/
  80. u32 status;
  81. #define URB_COMPLETE_NOTIFY (1 << 0)
  82. #define URB_ENQUEUED (1 << 1)
  83. #define URB_TYPE_ATL (1 << 2)
  84. #define URB_TYPE_INT (1 << 3)
  85. };
  86. struct isp1760_qh {
  87. /* first part defined by EHCI spec */
  88. struct list_head qtd_list;
  89. struct isp1760_hcd *priv;
  90. /* periodic schedule info */
  91. unsigned short period; /* polling interval */
  92. struct usb_device *dev;
  93. u32 toggle;
  94. u32 ping;
  95. };
  96. #define ehci_port_speed(priv, portsc) (1 << USB_PORT_FEAT_HIGHSPEED)
  97. static unsigned int isp1760_readl(__u32 __iomem *regs)
  98. {
  99. return readl(regs);
  100. }
  101. static void isp1760_writel(const unsigned int val, __u32 __iomem *regs)
  102. {
  103. writel(val, regs);
  104. }
  105. /*
  106. * The next two copy via MMIO data to/from the device. memcpy_{to|from}io()
  107. * doesn't quite work because some people have to enforce 32-bit access
  108. */
  109. static void priv_read_copy(struct isp1760_hcd *priv, u32 *src,
  110. __u32 __iomem *dst, u32 offset, u32 len)
  111. {
  112. struct usb_hcd *hcd = priv_to_hcd(priv);
  113. u32 val;
  114. u8 *buff8;
  115. if (!src) {
  116. printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len);
  117. return;
  118. }
  119. isp1760_writel(offset, hcd->regs + HC_MEMORY_REG);
  120. /* XXX
  121. * 90nsec delay, the spec says something how this could be avoided.
  122. */
  123. mdelay(1);
  124. while (len >= 4) {
  125. *src = __raw_readl(dst);
  126. len -= 4;
  127. src++;
  128. dst++;
  129. }
  130. if (!len)
  131. return;
  132. /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
  133. * allocated.
  134. */
  135. val = isp1760_readl(dst);
  136. buff8 = (u8 *)src;
  137. while (len) {
  138. *buff8 = val;
  139. val >>= 8;
  140. len--;
  141. buff8++;
  142. }
  143. }
  144. static void priv_write_copy(const struct isp1760_hcd *priv, const u32 *src,
  145. __u32 __iomem *dst, u32 len)
  146. {
  147. while (len >= 4) {
  148. __raw_writel(*src, dst);
  149. len -= 4;
  150. src++;
  151. dst++;
  152. }
  153. if (!len)
  154. return;
  155. /* in case we have 3, 2 or 1 by left. The buffer is allocated and the
  156. * extra bytes should not be read by the HW
  157. */
  158. __raw_writel(*src, dst);
  159. }
  160. /* memory management of the 60kb on the chip from 0x1000 to 0xffff */
  161. static void init_memory(struct isp1760_hcd *priv)
  162. {
  163. int i;
  164. u32 payload;
  165. payload = 0x1000;
  166. for (i = 0; i < BLOCK_1_NUM; i++) {
  167. priv->memory_pool[i].start = payload;
  168. priv->memory_pool[i].size = BLOCK_1_SIZE;
  169. priv->memory_pool[i].free = 1;
  170. payload += priv->memory_pool[i].size;
  171. }
  172. for (i = BLOCK_1_NUM; i < BLOCK_1_NUM + BLOCK_2_NUM; i++) {
  173. priv->memory_pool[i].start = payload;
  174. priv->memory_pool[i].size = BLOCK_2_SIZE;
  175. priv->memory_pool[i].free = 1;
  176. payload += priv->memory_pool[i].size;
  177. }
  178. for (i = BLOCK_1_NUM + BLOCK_2_NUM; i < BLOCKS; i++) {
  179. priv->memory_pool[i].start = payload;
  180. priv->memory_pool[i].size = BLOCK_3_SIZE;
  181. priv->memory_pool[i].free = 1;
  182. payload += priv->memory_pool[i].size;
  183. }
  184. BUG_ON(payload - priv->memory_pool[i - 1].size > PAYLOAD_SIZE);
  185. }
  186. static u32 alloc_mem(struct isp1760_hcd *priv, u32 size)
  187. {
  188. int i;
  189. if (!size)
  190. return ISP1760_NULL_POINTER;
  191. for (i = 0; i < BLOCKS; i++) {
  192. if (priv->memory_pool[i].size >= size &&
  193. priv->memory_pool[i].free) {
  194. priv->memory_pool[i].free = 0;
  195. return priv->memory_pool[i].start;
  196. }
  197. }
  198. printk(KERN_ERR "ISP1760 MEM: can not allocate %d bytes of memory\n",
  199. size);
  200. printk(KERN_ERR "Current memory map:\n");
  201. for (i = 0; i < BLOCKS; i++) {
  202. printk(KERN_ERR "Pool %2d size %4d status: %d\n",
  203. i, priv->memory_pool[i].size,
  204. priv->memory_pool[i].free);
  205. }
  206. /* XXX maybe -ENOMEM could be possible */
  207. BUG();
  208. return 0;
  209. }
  210. static void free_mem(struct isp1760_hcd *priv, u32 mem)
  211. {
  212. int i;
  213. if (mem == ISP1760_NULL_POINTER)
  214. return;
  215. for (i = 0; i < BLOCKS; i++) {
  216. if (priv->memory_pool[i].start == mem) {
  217. BUG_ON(priv->memory_pool[i].free);
  218. priv->memory_pool[i].free = 1;
  219. return ;
  220. }
  221. }
  222. printk(KERN_ERR "Trying to free not-here-allocated memory :%08x\n",
  223. mem);
  224. BUG();
  225. }
  226. static void isp1760_init_regs(struct usb_hcd *hcd)
  227. {
  228. isp1760_writel(0, hcd->regs + HC_BUFFER_STATUS_REG);
  229. isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
  230. HC_ATL_PTD_SKIPMAP_REG);
  231. isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
  232. HC_INT_PTD_SKIPMAP_REG);
  233. isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
  234. HC_ISO_PTD_SKIPMAP_REG);
  235. isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
  236. HC_ATL_PTD_DONEMAP_REG);
  237. isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
  238. HC_INT_PTD_DONEMAP_REG);
  239. isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
  240. HC_ISO_PTD_DONEMAP_REG);
  241. }
  242. static int handshake(struct isp1760_hcd *priv, void __iomem *ptr,
  243. u32 mask, u32 done, int usec)
  244. {
  245. u32 result;
  246. do {
  247. result = isp1760_readl(ptr);
  248. if (result == ~0)
  249. return -ENODEV;
  250. result &= mask;
  251. if (result == done)
  252. return 0;
  253. udelay(1);
  254. usec--;
  255. } while (usec > 0);
  256. return -ETIMEDOUT;
  257. }
  258. /* reset a non-running (STS_HALT == 1) controller */
  259. static int ehci_reset(struct isp1760_hcd *priv)
  260. {
  261. int retval;
  262. struct usb_hcd *hcd = priv_to_hcd(priv);
  263. u32 command = isp1760_readl(hcd->regs + HC_USBCMD);
  264. command |= CMD_RESET;
  265. isp1760_writel(command, hcd->regs + HC_USBCMD);
  266. hcd->state = HC_STATE_HALT;
  267. priv->next_statechange = jiffies;
  268. retval = handshake(priv, hcd->regs + HC_USBCMD,
  269. CMD_RESET, 0, 250 * 1000);
  270. return retval;
  271. }
  272. static void qh_destroy(struct isp1760_qh *qh)
  273. {
  274. BUG_ON(!list_empty(&qh->qtd_list));
  275. kmem_cache_free(qh_cachep, qh);
  276. }
  277. static struct isp1760_qh *isp1760_qh_alloc(struct isp1760_hcd *priv,
  278. gfp_t flags)
  279. {
  280. struct isp1760_qh *qh;
  281. qh = kmem_cache_zalloc(qh_cachep, flags);
  282. if (!qh)
  283. return qh;
  284. INIT_LIST_HEAD(&qh->qtd_list);
  285. qh->priv = priv;
  286. return qh;
  287. }
  288. /* magic numbers that can affect system performance */
  289. #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
  290. #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
  291. #define EHCI_TUNE_RL_TT 0
  292. #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
  293. #define EHCI_TUNE_MULT_TT 1
  294. #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
  295. /* one-time init, only for memory state */
  296. static int priv_init(struct usb_hcd *hcd)
  297. {
  298. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  299. u32 hcc_params;
  300. spin_lock_init(&priv->lock);
  301. /*
  302. * hw default: 1K periodic list heads, one per frame.
  303. * periodic_size can shrink by USBCMD update if hcc_params allows.
  304. */
  305. priv->periodic_size = DEFAULT_I_TDPS;
  306. /* controllers may cache some of the periodic schedule ... */
  307. hcc_params = isp1760_readl(hcd->regs + HC_HCCPARAMS);
  308. /* full frame cache */
  309. if (HCC_ISOC_CACHE(hcc_params))
  310. priv->i_thresh = 8;
  311. else /* N microframes cached */
  312. priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
  313. return 0;
  314. }
  315. static int isp1760_hc_setup(struct usb_hcd *hcd)
  316. {
  317. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  318. int result;
  319. u32 scratch;
  320. isp1760_writel(0xdeadbabe, hcd->regs + HC_SCRATCH_REG);
  321. scratch = isp1760_readl(hcd->regs + HC_SCRATCH_REG);
  322. if (scratch != 0xdeadbabe) {
  323. printk(KERN_ERR "ISP1760: Scratch test failed.\n");
  324. return -ENODEV;
  325. }
  326. /* pre reset */
  327. isp1760_init_regs(hcd);
  328. /* reset */
  329. isp1760_writel(SW_RESET_RESET_ALL, hcd->regs + HC_RESET_REG);
  330. mdelay(100);
  331. isp1760_writel(SW_RESET_RESET_HC, hcd->regs + HC_RESET_REG);
  332. mdelay(100);
  333. result = ehci_reset(priv);
  334. if (result)
  335. return result;
  336. /* Step 11 passed */
  337. isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_REG);
  338. isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_ENABLE);
  339. /* ATL reset */
  340. scratch = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
  341. isp1760_writel(scratch | ALL_ATX_RESET, hcd->regs + HC_HW_MODE_CTRL);
  342. mdelay(10);
  343. isp1760_writel(scratch, hcd->regs + HC_HW_MODE_CTRL);
  344. isp1760_writel(PORT1_POWER | PORT1_INIT2, hcd->regs + HC_PORT1_CTRL);
  345. mdelay(10);
  346. priv->hcs_params = isp1760_readl(hcd->regs + HC_HCSPARAMS);
  347. return priv_init(hcd);
  348. }
  349. static void isp1760_init_maps(struct usb_hcd *hcd)
  350. {
  351. /*set last maps, for iso its only 1, else 32 tds bitmap*/
  352. isp1760_writel(0x80000000, hcd->regs + HC_ATL_PTD_LASTPTD_REG);
  353. isp1760_writel(0x80000000, hcd->regs + HC_INT_PTD_LASTPTD_REG);
  354. isp1760_writel(0x00000001, hcd->regs + HC_ISO_PTD_LASTPTD_REG);
  355. }
  356. static void isp1760_enable_interrupts(struct usb_hcd *hcd)
  357. {
  358. isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_AND_REG);
  359. isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
  360. isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_AND_REG);
  361. isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
  362. isp1760_writel(0, hcd->regs + HC_ISO_IRQ_MASK_AND_REG);
  363. isp1760_writel(0xffffffff, hcd->regs + HC_ISO_IRQ_MASK_OR_REG);
  364. /* step 23 passed */
  365. }
  366. static int isp1760_run(struct usb_hcd *hcd)
  367. {
  368. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  369. int retval;
  370. u32 temp;
  371. u32 command;
  372. u32 chipid;
  373. hcd->uses_new_polling = 1;
  374. hcd->poll_rh = 0;
  375. hcd->state = HC_STATE_RUNNING;
  376. isp1760_enable_interrupts(hcd);
  377. temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
  378. temp |= FINAL_HW_CONFIG;
  379. isp1760_writel(temp, hcd->regs + HC_HW_MODE_CTRL);
  380. command = isp1760_readl(hcd->regs + HC_USBCMD);
  381. command &= ~(CMD_LRESET|CMD_RESET);
  382. command |= CMD_RUN;
  383. isp1760_writel(command, hcd->regs + HC_USBCMD);
  384. retval = handshake(priv, hcd->regs + HC_USBCMD, CMD_RUN, CMD_RUN,
  385. 250 * 1000);
  386. if (retval)
  387. return retval;
  388. /*
  389. * XXX
  390. * Spec says to write FLAG_CF as last config action, priv code grabs
  391. * the semaphore while doing so.
  392. */
  393. down_write(&ehci_cf_port_reset_rwsem);
  394. isp1760_writel(FLAG_CF, hcd->regs + HC_CONFIGFLAG);
  395. retval = handshake(priv, hcd->regs + HC_CONFIGFLAG, FLAG_CF, FLAG_CF,
  396. 250 * 1000);
  397. up_write(&ehci_cf_port_reset_rwsem);
  398. if (retval)
  399. return retval;
  400. chipid = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
  401. isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff,
  402. chipid >> 16);
  403. /* PTD Register Init Part 2, Step 28 */
  404. /* enable INTs */
  405. isp1760_init_maps(hcd);
  406. /* GRR this is run-once init(), being done every time the HC starts.
  407. * So long as they're part of class devices, we can't do it init()
  408. * since the class device isn't created that early.
  409. */
  410. return 0;
  411. }
  412. static u32 base_to_chip(u32 base)
  413. {
  414. return ((base - 0x400) >> 3);
  415. }
  416. static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh,
  417. struct isp1760_qtd *qtd, struct urb *urb,
  418. u32 payload, struct ptd *ptd)
  419. {
  420. u32 dw0;
  421. u32 dw1;
  422. u32 dw2;
  423. u32 dw3;
  424. u32 maxpacket;
  425. u32 multi;
  426. u32 pid_code;
  427. u32 rl = RL_COUNTER;
  428. u32 nak = NAK_COUNTER;
  429. /* according to 3.6.2, max packet len can not be > 0x400 */
  430. maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
  431. multi = 1 + ((maxpacket >> 11) & 0x3);
  432. maxpacket &= 0x7ff;
  433. /* DW0 */
  434. dw0 = PTD_VALID;
  435. dw0 |= PTD_LENGTH(qtd->length);
  436. dw0 |= PTD_MAXPACKET(maxpacket);
  437. dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe));
  438. dw1 = usb_pipeendpoint(urb->pipe) >> 1;
  439. /* DW1 */
  440. dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe));
  441. pid_code = qtd->packet_type;
  442. dw1 |= PTD_PID_TOKEN(pid_code);
  443. if (usb_pipebulk(urb->pipe))
  444. dw1 |= PTD_TRANS_BULK;
  445. else if (usb_pipeint(urb->pipe))
  446. dw1 |= PTD_TRANS_INT;
  447. if (urb->dev->speed != USB_SPEED_HIGH) {
  448. /* split transaction */
  449. dw1 |= PTD_TRANS_SPLIT;
  450. if (urb->dev->speed == USB_SPEED_LOW)
  451. dw1 |= PTD_SE_USB_LOSPEED;
  452. dw1 |= PTD_PORT_NUM(urb->dev->ttport);
  453. dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum);
  454. /* SE bit for Split INT transfers */
  455. if (usb_pipeint(urb->pipe) &&
  456. (urb->dev->speed == USB_SPEED_LOW))
  457. dw1 |= 2 << 16;
  458. dw3 = 0;
  459. rl = 0;
  460. nak = 0;
  461. } else {
  462. dw0 |= PTD_MULTI(multi);
  463. if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe))
  464. dw3 = qh->ping;
  465. else
  466. dw3 = 0;
  467. }
  468. /* DW2 */
  469. dw2 = 0;
  470. dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload));
  471. dw2 |= PTD_RL_CNT(rl);
  472. dw3 |= PTD_NAC_CNT(nak);
  473. /* DW3 */
  474. if (usb_pipecontrol(urb->pipe))
  475. dw3 |= PTD_DATA_TOGGLE(qtd->toggle);
  476. else
  477. dw3 |= qh->toggle;
  478. dw3 |= PTD_ACTIVE;
  479. /* Cerr */
  480. dw3 |= PTD_CERR(ERR_COUNTER);
  481. memset(ptd, 0, sizeof(*ptd));
  482. ptd->dw0 = cpu_to_le32(dw0);
  483. ptd->dw1 = cpu_to_le32(dw1);
  484. ptd->dw2 = cpu_to_le32(dw2);
  485. ptd->dw3 = cpu_to_le32(dw3);
  486. }
  487. static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
  488. struct isp1760_qtd *qtd, struct urb *urb,
  489. u32 payload, struct ptd *ptd)
  490. {
  491. u32 maxpacket;
  492. u32 multi;
  493. u32 numberofusofs;
  494. u32 i;
  495. u32 usofmask, usof;
  496. u32 period;
  497. maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
  498. multi = 1 + ((maxpacket >> 11) & 0x3);
  499. maxpacket &= 0x7ff;
  500. /* length of the data per uframe */
  501. maxpacket = multi * maxpacket;
  502. numberofusofs = urb->transfer_buffer_length / maxpacket;
  503. if (urb->transfer_buffer_length % maxpacket)
  504. numberofusofs += 1;
  505. usofmask = 1;
  506. usof = 0;
  507. for (i = 0; i < numberofusofs; i++) {
  508. usof |= usofmask;
  509. usofmask <<= 1;
  510. }
  511. if (urb->dev->speed != USB_SPEED_HIGH) {
  512. /* split */
  513. ptd->dw5 = __constant_cpu_to_le32(0x1c);
  514. if (qh->period >= 32)
  515. period = qh->period / 2;
  516. else
  517. period = qh->period;
  518. } else {
  519. if (qh->period >= 8)
  520. period = qh->period/8;
  521. else
  522. period = qh->period;
  523. if (period >= 32)
  524. period = 16;
  525. if (qh->period >= 8) {
  526. /* millisecond period */
  527. period = (period << 3);
  528. } else {
  529. /* usof based tranmsfers */
  530. /* minimum 4 usofs */
  531. usof = 0x11;
  532. }
  533. }
  534. ptd->dw2 |= cpu_to_le32(period);
  535. ptd->dw4 = cpu_to_le32(usof);
  536. }
  537. static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
  538. struct isp1760_qtd *qtd, struct urb *urb,
  539. u32 payload, struct ptd *ptd)
  540. {
  541. transform_into_atl(priv, qh, qtd, urb, payload, ptd);
  542. transform_add_int(priv, qh, qtd, urb, payload, ptd);
  543. }
  544. static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
  545. u32 token)
  546. {
  547. int count;
  548. qtd->data_buffer = databuffer;
  549. qtd->packet_type = GET_QTD_TOKEN_TYPE(token);
  550. qtd->toggle = GET_DATA_TOGGLE(token);
  551. if (len > HC_ATL_PL_SIZE)
  552. count = HC_ATL_PL_SIZE;
  553. else
  554. count = len;
  555. qtd->length = count;
  556. return count;
  557. }
  558. static int check_error(struct ptd *ptd)
  559. {
  560. int error = 0;
  561. u32 dw3;
  562. dw3 = le32_to_cpu(ptd->dw3);
  563. if (dw3 & DW3_HALT_BIT)
  564. error = -EPIPE;
  565. if (dw3 & DW3_ERROR_BIT) {
  566. printk(KERN_ERR "error bit is set in DW3\n");
  567. error = -EPIPE;
  568. }
  569. if (dw3 & DW3_QTD_ACTIVE) {
  570. printk(KERN_ERR "transfer active bit is set DW3\n");
  571. printk(KERN_ERR "nak counter: %d, rl: %d\n", (dw3 >> 19) & 0xf,
  572. (le32_to_cpu(ptd->dw2) >> 25) & 0xf);
  573. }
  574. return error;
  575. }
  576. static void check_int_err_status(u32 dw4)
  577. {
  578. u32 i;
  579. dw4 >>= 8;
  580. for (i = 0; i < 8; i++) {
  581. switch (dw4 & 0x7) {
  582. case INT_UNDERRUN:
  583. printk(KERN_ERR "ERROR: under run , %d\n", i);
  584. break;
  585. case INT_EXACT:
  586. printk(KERN_ERR "ERROR: transaction error, %d\n", i);
  587. break;
  588. case INT_BABBLE:
  589. printk(KERN_ERR "ERROR: babble error, %d\n", i);
  590. break;
  591. }
  592. dw4 >>= 3;
  593. }
  594. }
  595. static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv,
  596. u32 payload)
  597. {
  598. u32 token;
  599. struct usb_hcd *hcd = priv_to_hcd(priv);
  600. token = qtd->packet_type;
  601. if (qtd->length && (qtd->length <= HC_ATL_PL_SIZE)) {
  602. switch (token) {
  603. case IN_PID:
  604. break;
  605. case OUT_PID:
  606. case SETUP_PID:
  607. priv_write_copy(priv, qtd->data_buffer,
  608. hcd->regs + payload,
  609. qtd->length);
  610. }
  611. }
  612. }
  613. static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload,
  614. struct isp1760_hcd *priv, struct isp1760_qh *qh,
  615. struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
  616. {
  617. struct ptd ptd;
  618. struct usb_hcd *hcd = priv_to_hcd(priv);
  619. transform_into_atl(priv, qh, qtd, urb, payload, &ptd);
  620. priv_write_copy(priv, (u32 *)&ptd, hcd->regs + atl_regs, sizeof(ptd));
  621. enqueue_one_qtd(qtd, priv, payload);
  622. priv->atl_ints[slot].urb = urb;
  623. priv->atl_ints[slot].qh = qh;
  624. priv->atl_ints[slot].qtd = qtd;
  625. priv->atl_ints[slot].data_buffer = qtd->data_buffer;
  626. priv->atl_ints[slot].payload = payload;
  627. qtd->status |= URB_ENQUEUED | URB_TYPE_ATL;
  628. qtd->status |= slot << 16;
  629. }
  630. static void enqueue_one_int_qtd(u32 int_regs, u32 payload,
  631. struct isp1760_hcd *priv, struct isp1760_qh *qh,
  632. struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
  633. {
  634. struct ptd ptd;
  635. struct usb_hcd *hcd = priv_to_hcd(priv);
  636. transform_into_int(priv, qh, qtd, urb, payload, &ptd);
  637. priv_write_copy(priv, (u32 *)&ptd, hcd->regs + int_regs, sizeof(ptd));
  638. enqueue_one_qtd(qtd, priv, payload);
  639. priv->int_ints[slot].urb = urb;
  640. priv->int_ints[slot].qh = qh;
  641. priv->int_ints[slot].qtd = qtd;
  642. priv->int_ints[slot].data_buffer = qtd->data_buffer;
  643. priv->int_ints[slot].payload = payload;
  644. qtd->status |= URB_ENQUEUED | URB_TYPE_INT;
  645. qtd->status |= slot << 16;
  646. }
  647. void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
  648. struct isp1760_qtd *qtd)
  649. {
  650. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  651. u32 skip_map, or_map;
  652. u32 queue_entry;
  653. u32 slot;
  654. u32 atl_regs, payload;
  655. u32 buffstatus;
  656. skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
  657. BUG_ON(!skip_map);
  658. slot = __ffs(skip_map);
  659. queue_entry = 1 << slot;
  660. atl_regs = ATL_REGS_OFFSET + slot * sizeof(struct ptd);
  661. payload = alloc_mem(priv, qtd->length);
  662. enqueue_one_atl_qtd(atl_regs, payload, priv, qh, qtd->urb, slot, qtd);
  663. or_map = isp1760_readl(hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
  664. or_map |= queue_entry;
  665. isp1760_writel(or_map, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
  666. skip_map &= ~queue_entry;
  667. isp1760_writel(skip_map, hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
  668. buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
  669. buffstatus |= ATL_BUFFER;
  670. isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
  671. }
  672. void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
  673. struct isp1760_qtd *qtd)
  674. {
  675. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  676. u32 skip_map, or_map;
  677. u32 queue_entry;
  678. u32 slot;
  679. u32 int_regs, payload;
  680. u32 buffstatus;
  681. skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG);
  682. BUG_ON(!skip_map);
  683. slot = __ffs(skip_map);
  684. queue_entry = 1 << slot;
  685. int_regs = INT_REGS_OFFSET + slot * sizeof(struct ptd);
  686. payload = alloc_mem(priv, qtd->length);
  687. enqueue_one_int_qtd(int_regs, payload, priv, qh, qtd->urb, slot, qtd);
  688. or_map = isp1760_readl(hcd->regs + HC_INT_IRQ_MASK_OR_REG);
  689. or_map |= queue_entry;
  690. isp1760_writel(or_map, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
  691. skip_map &= ~queue_entry;
  692. isp1760_writel(skip_map, hcd->regs + HC_INT_PTD_SKIPMAP_REG);
  693. buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
  694. buffstatus |= INT_BUFFER;
  695. isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
  696. }
  697. static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb, int status)
  698. __releases(priv->lock)
  699. __acquires(priv->lock)
  700. {
  701. if (!urb->unlinked) {
  702. if (status == -EINPROGRESS)
  703. status = 0;
  704. }
  705. /* complete() can reenter this HCD */
  706. usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
  707. spin_unlock(&priv->lock);
  708. usb_hcd_giveback_urb(priv_to_hcd(priv), urb, status);
  709. spin_lock(&priv->lock);
  710. }
  711. static void isp1760_qtd_free(struct isp1760_qtd *qtd)
  712. {
  713. kmem_cache_free(qtd_cachep, qtd);
  714. }
  715. static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd)
  716. {
  717. struct isp1760_qtd *tmp_qtd;
  718. tmp_qtd = qtd->hw_next;
  719. list_del(&qtd->qtd_list);
  720. isp1760_qtd_free(qtd);
  721. return tmp_qtd;
  722. }
  723. /*
  724. * Remove this QTD from the QH list and free its memory. If this QTD
  725. * isn't the last one than remove also his successor(s).
  726. * Returns the QTD which is part of an new URB and should be enqueued.
  727. */
  728. static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd)
  729. {
  730. struct isp1760_qtd *tmp_qtd;
  731. int last_one;
  732. do {
  733. tmp_qtd = qtd->hw_next;
  734. last_one = qtd->status & URB_COMPLETE_NOTIFY;
  735. list_del(&qtd->qtd_list);
  736. isp1760_qtd_free(qtd);
  737. qtd = tmp_qtd;
  738. } while (!last_one && qtd);
  739. return qtd;
  740. }
  741. static void do_atl_int(struct usb_hcd *usb_hcd)
  742. {
  743. struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
  744. u32 done_map, skip_map;
  745. struct ptd ptd;
  746. struct urb *urb = NULL;
  747. u32 atl_regs_base;
  748. u32 atl_regs;
  749. u32 queue_entry;
  750. u32 payload;
  751. u32 length;
  752. u32 or_map;
  753. u32 status = -EINVAL;
  754. int error;
  755. struct isp1760_qtd *qtd;
  756. struct isp1760_qh *qh;
  757. u32 rl;
  758. u32 nakcount;
  759. done_map = isp1760_readl(usb_hcd->regs +
  760. HC_ATL_PTD_DONEMAP_REG);
  761. skip_map = isp1760_readl(usb_hcd->regs +
  762. HC_ATL_PTD_SKIPMAP_REG);
  763. or_map = isp1760_readl(usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
  764. or_map &= ~done_map;
  765. isp1760_writel(or_map, usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
  766. atl_regs_base = ATL_REGS_OFFSET;
  767. while (done_map) {
  768. u32 dw1;
  769. u32 dw2;
  770. u32 dw3;
  771. status = 0;
  772. queue_entry = __ffs(done_map);
  773. done_map &= ~(1 << queue_entry);
  774. skip_map |= 1 << queue_entry;
  775. atl_regs = atl_regs_base + queue_entry * sizeof(struct ptd);
  776. urb = priv->atl_ints[queue_entry].urb;
  777. qtd = priv->atl_ints[queue_entry].qtd;
  778. qh = priv->atl_ints[queue_entry].qh;
  779. payload = priv->atl_ints[queue_entry].payload;
  780. if (!qh) {
  781. printk(KERN_ERR "qh is 0\n");
  782. continue;
  783. }
  784. priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs,
  785. atl_regs, sizeof(ptd));
  786. dw1 = le32_to_cpu(ptd.dw1);
  787. dw2 = le32_to_cpu(ptd.dw2);
  788. dw3 = le32_to_cpu(ptd.dw3);
  789. rl = (dw2 >> 25) & 0x0f;
  790. nakcount = (dw3 >> 19) & 0xf;
  791. /* Transfer Error, *but* active and no HALT -> reload */
  792. if ((dw3 & DW3_ERROR_BIT) && (dw3 & DW3_QTD_ACTIVE) &&
  793. !(dw3 & DW3_HALT_BIT)) {
  794. /* according to ppriv code, we have to
  795. * reload this one if trasfered bytes != requested bytes
  796. * else act like everything went smooth..
  797. * XXX This just doesn't feel right and hasn't
  798. * triggered so far.
  799. */
  800. length = PTD_XFERRED_LENGTH(dw3);
  801. printk(KERN_ERR "Should reload now.... transfered %d "
  802. "of %zu\n", length, qtd->length);
  803. BUG();
  804. }
  805. if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) {
  806. u32 buffstatus;
  807. /* XXX
  808. * NAKs are handled in HW by the chip. Usually if the
  809. * device is not able to send data fast enough.
  810. * This did not trigger for a long time now.
  811. */
  812. printk(KERN_ERR "Reloading ptd %p/%p... qh %p readed: "
  813. "%d of %zu done: %08x cur: %08x\n", qtd,
  814. urb, qh, PTD_XFERRED_LENGTH(dw3),
  815. qtd->length, done_map,
  816. (1 << queue_entry));
  817. /* RL counter = ERR counter */
  818. dw3 &= ~(0xf << 19);
  819. dw3 |= rl << 19;
  820. dw3 &= ~(3 << (55 - 32));
  821. dw3 |= ERR_COUNTER << (55 - 32);
  822. /*
  823. * It is not needed to write skip map back because it
  824. * is unchanged. Just make sure that this entry is
  825. * unskipped once it gets written to the HW.
  826. */
  827. skip_map &= ~(1 << queue_entry);
  828. or_map = isp1760_readl(usb_hcd->regs +
  829. HC_ATL_IRQ_MASK_OR_REG);
  830. or_map |= 1 << queue_entry;
  831. isp1760_writel(or_map, usb_hcd->regs +
  832. HC_ATL_IRQ_MASK_OR_REG);
  833. ptd.dw3 = cpu_to_le32(dw3);
  834. priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
  835. atl_regs, sizeof(ptd));
  836. ptd.dw0 |= __constant_cpu_to_le32(PTD_VALID);
  837. priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
  838. atl_regs, sizeof(ptd));
  839. buffstatus = isp1760_readl(usb_hcd->regs +
  840. HC_BUFFER_STATUS_REG);
  841. buffstatus |= ATL_BUFFER;
  842. isp1760_writel(buffstatus, usb_hcd->regs +
  843. HC_BUFFER_STATUS_REG);
  844. continue;
  845. }
  846. error = check_error(&ptd);
  847. if (error) {
  848. status = error;
  849. priv->atl_ints[queue_entry].qh->toggle = 0;
  850. priv->atl_ints[queue_entry].qh->ping = 0;
  851. urb->status = -EPIPE;
  852. #if 0
  853. printk(KERN_ERR "Error in %s().\n", __func__);
  854. printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
  855. "dw3: %08x dw4: %08x dw5: %08x dw6: "
  856. "%08x dw7: %08x\n",
  857. ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
  858. ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
  859. #endif
  860. } else {
  861. if (usb_pipetype(urb->pipe) == PIPE_BULK) {
  862. priv->atl_ints[queue_entry].qh->toggle = dw3 &
  863. (1 << 25);
  864. priv->atl_ints[queue_entry].qh->ping = dw3 &
  865. (1 << 26);
  866. }
  867. }
  868. length = PTD_XFERRED_LENGTH(dw3);
  869. if (length) {
  870. switch (DW1_GET_PID(dw1)) {
  871. case IN_PID:
  872. priv_read_copy(priv,
  873. priv->atl_ints[queue_entry].data_buffer,
  874. usb_hcd->regs + payload, payload,
  875. length);
  876. case OUT_PID:
  877. urb->actual_length += length;
  878. case SETUP_PID:
  879. break;
  880. }
  881. }
  882. priv->atl_ints[queue_entry].data_buffer = NULL;
  883. priv->atl_ints[queue_entry].urb = NULL;
  884. priv->atl_ints[queue_entry].qtd = NULL;
  885. priv->atl_ints[queue_entry].qh = NULL;
  886. free_mem(priv, payload);
  887. isp1760_writel(skip_map, usb_hcd->regs +
  888. HC_ATL_PTD_SKIPMAP_REG);
  889. if (urb->status == -EPIPE) {
  890. /* HALT was received */
  891. qtd = clean_up_qtdlist(qtd);
  892. isp1760_urb_done(priv, urb, urb->status);
  893. } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) {
  894. /* short BULK received */
  895. printk(KERN_ERR "short bulk, %d instead %zu\n", length,
  896. qtd->length);
  897. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  898. urb->status = -EREMOTEIO;
  899. printk(KERN_ERR "not okey\n");
  900. }
  901. if (urb->status == -EINPROGRESS)
  902. urb->status = 0;
  903. qtd = clean_up_qtdlist(qtd);
  904. isp1760_urb_done(priv, urb, urb->status);
  905. } else if (qtd->status & URB_COMPLETE_NOTIFY) {
  906. /* that was the last qtd of that URB */
  907. if (urb->status == -EINPROGRESS)
  908. urb->status = 0;
  909. qtd = clean_this_qtd(qtd);
  910. isp1760_urb_done(priv, urb, urb->status);
  911. } else {
  912. /* next QTD of this URB */
  913. qtd = clean_this_qtd(qtd);
  914. BUG_ON(!qtd);
  915. }
  916. if (qtd)
  917. enqueue_an_ATL_packet(usb_hcd, qh, qtd);
  918. skip_map = isp1760_readl(usb_hcd->regs +
  919. HC_ATL_PTD_SKIPMAP_REG);
  920. }
  921. }
  922. static void do_intl_int(struct usb_hcd *usb_hcd)
  923. {
  924. struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
  925. u32 done_map, skip_map;
  926. struct ptd ptd;
  927. struct urb *urb = NULL;
  928. u32 int_regs;
  929. u32 int_regs_base;
  930. u32 payload;
  931. u32 length;
  932. u32 or_map;
  933. int error;
  934. u32 queue_entry;
  935. struct isp1760_qtd *qtd;
  936. struct isp1760_qh *qh;
  937. done_map = isp1760_readl(usb_hcd->regs +
  938. HC_INT_PTD_DONEMAP_REG);
  939. skip_map = isp1760_readl(usb_hcd->regs +
  940. HC_INT_PTD_SKIPMAP_REG);
  941. or_map = isp1760_readl(usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
  942. or_map &= ~done_map;
  943. isp1760_writel(or_map, usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
  944. int_regs_base = INT_REGS_OFFSET;
  945. while (done_map) {
  946. u32 dw1;
  947. u32 dw3;
  948. queue_entry = __ffs(done_map);
  949. done_map &= ~(1 << queue_entry);
  950. skip_map |= 1 << queue_entry;
  951. int_regs = int_regs_base + queue_entry * sizeof(struct ptd);
  952. urb = priv->int_ints[queue_entry].urb;
  953. qtd = priv->int_ints[queue_entry].qtd;
  954. qh = priv->int_ints[queue_entry].qh;
  955. payload = priv->int_ints[queue_entry].payload;
  956. if (!qh) {
  957. printk(KERN_ERR "(INT) qh is 0\n");
  958. continue;
  959. }
  960. priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs,
  961. int_regs, sizeof(ptd));
  962. dw1 = le32_to_cpu(ptd.dw1);
  963. dw3 = le32_to_cpu(ptd.dw3);
  964. check_int_err_status(le32_to_cpu(ptd.dw4));
  965. error = check_error(&ptd);
  966. if (error) {
  967. #if 0
  968. printk(KERN_ERR "Error in %s().\n", __func__);
  969. printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
  970. "dw3: %08x dw4: %08x dw5: %08x dw6: "
  971. "%08x dw7: %08x\n",
  972. ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
  973. ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
  974. #endif
  975. urb->status = -EPIPE;
  976. priv->int_ints[queue_entry].qh->toggle = 0;
  977. priv->int_ints[queue_entry].qh->ping = 0;
  978. } else {
  979. priv->int_ints[queue_entry].qh->toggle =
  980. dw3 & (1 << 25);
  981. priv->int_ints[queue_entry].qh->ping = dw3 & (1 << 26);
  982. }
  983. if (urb->dev->speed != USB_SPEED_HIGH)
  984. length = PTD_XFERRED_LENGTH_LO(dw3);
  985. else
  986. length = PTD_XFERRED_LENGTH(dw3);
  987. if (length) {
  988. switch (DW1_GET_PID(dw1)) {
  989. case IN_PID:
  990. priv_read_copy(priv,
  991. priv->int_ints[queue_entry].data_buffer,
  992. usb_hcd->regs + payload , payload,
  993. length);
  994. case OUT_PID:
  995. urb->actual_length += length;
  996. case SETUP_PID:
  997. break;
  998. }
  999. }
  1000. priv->int_ints[queue_entry].data_buffer = NULL;
  1001. priv->int_ints[queue_entry].urb = NULL;
  1002. priv->int_ints[queue_entry].qtd = NULL;
  1003. priv->int_ints[queue_entry].qh = NULL;
  1004. isp1760_writel(skip_map, usb_hcd->regs +
  1005. HC_INT_PTD_SKIPMAP_REG);
  1006. free_mem(priv, payload);
  1007. if (urb->status == -EPIPE) {
  1008. /* HALT received */
  1009. qtd = clean_up_qtdlist(qtd);
  1010. isp1760_urb_done(priv, urb, urb->status);
  1011. } else if (qtd->status & URB_COMPLETE_NOTIFY) {
  1012. if (urb->status == -EINPROGRESS)
  1013. urb->status = 0;
  1014. qtd = clean_this_qtd(qtd);
  1015. isp1760_urb_done(priv, urb, urb->status);
  1016. } else {
  1017. /* next QTD of this URB */
  1018. qtd = clean_this_qtd(qtd);
  1019. BUG_ON(!qtd);
  1020. }
  1021. if (qtd)
  1022. enqueue_an_INT_packet(usb_hcd, qh, qtd);
  1023. skip_map = isp1760_readl(usb_hcd->regs +
  1024. HC_INT_PTD_SKIPMAP_REG);
  1025. }
  1026. }
  1027. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  1028. static struct isp1760_qh *qh_make(struct isp1760_hcd *priv, struct urb *urb,
  1029. gfp_t flags)
  1030. {
  1031. struct isp1760_qh *qh;
  1032. int is_input, type;
  1033. qh = isp1760_qh_alloc(priv, flags);
  1034. if (!qh)
  1035. return qh;
  1036. /*
  1037. * init endpoint/device data for this QH
  1038. */
  1039. is_input = usb_pipein(urb->pipe);
  1040. type = usb_pipetype(urb->pipe);
  1041. if (type == PIPE_INTERRUPT) {
  1042. if (urb->dev->speed == USB_SPEED_HIGH) {
  1043. qh->period = urb->interval >> 3;
  1044. if (qh->period == 0 && urb->interval != 1) {
  1045. /* NOTE interval 2 or 4 uframes could work.
  1046. * But interval 1 scheduling is simpler, and
  1047. * includes high bandwidth.
  1048. */
  1049. printk(KERN_ERR "intr period %d uframes, NYET!",
  1050. urb->interval);
  1051. qh_destroy(qh);
  1052. return NULL;
  1053. }
  1054. } else {
  1055. qh->period = urb->interval;
  1056. }
  1057. }
  1058. /* support for tt scheduling, and access to toggles */
  1059. qh->dev = urb->dev;
  1060. if (!usb_pipecontrol(urb->pipe))
  1061. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input,
  1062. 1);
  1063. return qh;
  1064. }
  1065. /*
  1066. * For control/bulk/interrupt, return QH with these TDs appended.
  1067. * Allocates and initializes the QH if necessary.
  1068. * Returns null if it can't allocate a QH it needs to.
  1069. * If the QH has TDs (urbs) already, that's great.
  1070. */
  1071. static struct isp1760_qh *qh_append_tds(struct isp1760_hcd *priv,
  1072. struct urb *urb, struct list_head *qtd_list, int epnum,
  1073. void **ptr)
  1074. {
  1075. struct isp1760_qh *qh;
  1076. struct isp1760_qtd *qtd;
  1077. struct isp1760_qtd *prev_qtd;
  1078. qh = (struct isp1760_qh *)*ptr;
  1079. if (!qh) {
  1080. /* can't sleep here, we have priv->lock... */
  1081. qh = qh_make(priv, urb, GFP_ATOMIC);
  1082. if (!qh)
  1083. return qh;
  1084. *ptr = qh;
  1085. }
  1086. qtd = list_entry(qtd_list->next, struct isp1760_qtd,
  1087. qtd_list);
  1088. if (!list_empty(&qh->qtd_list))
  1089. prev_qtd = list_entry(qh->qtd_list.prev,
  1090. struct isp1760_qtd, qtd_list);
  1091. else
  1092. prev_qtd = NULL;
  1093. list_splice(qtd_list, qh->qtd_list.prev);
  1094. if (prev_qtd) {
  1095. BUG_ON(prev_qtd->hw_next);
  1096. prev_qtd->hw_next = qtd;
  1097. }
  1098. urb->hcpriv = qh;
  1099. return qh;
  1100. }
  1101. static void qtd_list_free(struct isp1760_hcd *priv, struct urb *urb,
  1102. struct list_head *qtd_list)
  1103. {
  1104. struct list_head *entry, *temp;
  1105. list_for_each_safe(entry, temp, qtd_list) {
  1106. struct isp1760_qtd *qtd;
  1107. qtd = list_entry(entry, struct isp1760_qtd, qtd_list);
  1108. list_del(&qtd->qtd_list);
  1109. isp1760_qtd_free(qtd);
  1110. }
  1111. }
  1112. static int isp1760_prepare_enqueue(struct isp1760_hcd *priv, struct urb *urb,
  1113. struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p)
  1114. {
  1115. struct isp1760_qtd *qtd;
  1116. int epnum;
  1117. unsigned long flags;
  1118. struct isp1760_qh *qh = NULL;
  1119. int rc;
  1120. int qh_busy;
  1121. qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list);
  1122. epnum = urb->ep->desc.bEndpointAddress;
  1123. spin_lock_irqsave(&priv->lock, flags);
  1124. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &priv_to_hcd(priv)->flags)) {
  1125. rc = -ESHUTDOWN;
  1126. goto done;
  1127. }
  1128. rc = usb_hcd_link_urb_to_ep(priv_to_hcd(priv), urb);
  1129. if (rc)
  1130. goto done;
  1131. qh = urb->ep->hcpriv;
  1132. if (qh)
  1133. qh_busy = !list_empty(&qh->qtd_list);
  1134. else
  1135. qh_busy = 0;
  1136. qh = qh_append_tds(priv, urb, qtd_list, epnum, &urb->ep->hcpriv);
  1137. if (!qh) {
  1138. usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
  1139. rc = -ENOMEM;
  1140. goto done;
  1141. }
  1142. if (!qh_busy)
  1143. p(priv_to_hcd(priv), qh, qtd);
  1144. done:
  1145. spin_unlock_irqrestore(&priv->lock, flags);
  1146. if (!qh)
  1147. qtd_list_free(priv, urb, qtd_list);
  1148. return rc;
  1149. }
  1150. static struct isp1760_qtd *isp1760_qtd_alloc(struct isp1760_hcd *priv,
  1151. gfp_t flags)
  1152. {
  1153. struct isp1760_qtd *qtd;
  1154. qtd = kmem_cache_zalloc(qtd_cachep, flags);
  1155. if (qtd)
  1156. INIT_LIST_HEAD(&qtd->qtd_list);
  1157. return qtd;
  1158. }
  1159. /*
  1160. * create a list of filled qtds for this URB; won't link into qh.
  1161. */
  1162. static struct list_head *qh_urb_transaction(struct isp1760_hcd *priv,
  1163. struct urb *urb, struct list_head *head, gfp_t flags)
  1164. {
  1165. struct isp1760_qtd *qtd, *qtd_prev;
  1166. void *buf;
  1167. int len, maxpacket;
  1168. int is_input;
  1169. u32 token;
  1170. /*
  1171. * URBs map to sequences of QTDs: one logical transaction
  1172. */
  1173. qtd = isp1760_qtd_alloc(priv, flags);
  1174. if (!qtd)
  1175. return NULL;
  1176. list_add_tail(&qtd->qtd_list, head);
  1177. qtd->urb = urb;
  1178. urb->status = -EINPROGRESS;
  1179. token = 0;
  1180. /* for split transactions, SplitXState initialized to zero */
  1181. len = urb->transfer_buffer_length;
  1182. is_input = usb_pipein(urb->pipe);
  1183. if (usb_pipecontrol(urb->pipe)) {
  1184. /* SETUP pid */
  1185. qtd_fill(qtd, urb->setup_packet,
  1186. sizeof(struct usb_ctrlrequest),
  1187. token | SETUP_PID);
  1188. /* ... and always at least one more pid */
  1189. token ^= DATA_TOGGLE;
  1190. qtd_prev = qtd;
  1191. qtd = isp1760_qtd_alloc(priv, flags);
  1192. if (!qtd)
  1193. goto cleanup;
  1194. qtd->urb = urb;
  1195. qtd_prev->hw_next = qtd;
  1196. list_add_tail(&qtd->qtd_list, head);
  1197. /* for zero length DATA stages, STATUS is always IN */
  1198. if (len == 0)
  1199. token |= IN_PID;
  1200. }
  1201. /*
  1202. * data transfer stage: buffer setup
  1203. */
  1204. buf = urb->transfer_buffer;
  1205. if (is_input)
  1206. token |= IN_PID;
  1207. else
  1208. token |= OUT_PID;
  1209. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  1210. /*
  1211. * buffer gets wrapped in one or more qtds;
  1212. * last one may be "short" (including zero len)
  1213. * and may serve as a control status ack
  1214. */
  1215. for (;;) {
  1216. int this_qtd_len;
  1217. if (!buf && len) {
  1218. /* XXX This looks like usb storage / SCSI bug */
  1219. printk(KERN_ERR "buf is null, dma is %08lx len is %d\n",
  1220. (long unsigned)urb->transfer_dma, len);
  1221. WARN_ON(1);
  1222. }
  1223. this_qtd_len = qtd_fill(qtd, buf, len, token);
  1224. len -= this_qtd_len;
  1225. buf += this_qtd_len;
  1226. /* qh makes control packets use qtd toggle; maybe switch it */
  1227. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  1228. token ^= DATA_TOGGLE;
  1229. if (len <= 0)
  1230. break;
  1231. qtd_prev = qtd;
  1232. qtd = isp1760_qtd_alloc(priv, flags);
  1233. if (!qtd)
  1234. goto cleanup;
  1235. qtd->urb = urb;
  1236. qtd_prev->hw_next = qtd;
  1237. list_add_tail(&qtd->qtd_list, head);
  1238. }
  1239. /*
  1240. * control requests may need a terminating data "status" ack;
  1241. * bulk ones may need a terminating short packet (zero length).
  1242. */
  1243. if (urb->transfer_buffer_length != 0) {
  1244. int one_more = 0;
  1245. if (usb_pipecontrol(urb->pipe)) {
  1246. one_more = 1;
  1247. /* "in" <--> "out" */
  1248. token ^= IN_PID;
  1249. /* force DATA1 */
  1250. token |= DATA_TOGGLE;
  1251. } else if (usb_pipebulk(urb->pipe)
  1252. && (urb->transfer_flags & URB_ZERO_PACKET)
  1253. && !(urb->transfer_buffer_length % maxpacket)) {
  1254. one_more = 1;
  1255. }
  1256. if (one_more) {
  1257. qtd_prev = qtd;
  1258. qtd = isp1760_qtd_alloc(priv, flags);
  1259. if (!qtd)
  1260. goto cleanup;
  1261. qtd->urb = urb;
  1262. qtd_prev->hw_next = qtd;
  1263. list_add_tail(&qtd->qtd_list, head);
  1264. /* never any data in such packets */
  1265. qtd_fill(qtd, NULL, 0, token);
  1266. }
  1267. }
  1268. qtd->status = URB_COMPLETE_NOTIFY;
  1269. return head;
  1270. cleanup:
  1271. qtd_list_free(priv, urb, head);
  1272. return NULL;
  1273. }
  1274. static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
  1275. gfp_t mem_flags)
  1276. {
  1277. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  1278. struct list_head qtd_list;
  1279. packet_enqueue *pe;
  1280. INIT_LIST_HEAD(&qtd_list);
  1281. switch (usb_pipetype(urb->pipe)) {
  1282. case PIPE_CONTROL:
  1283. case PIPE_BULK:
  1284. if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
  1285. return -ENOMEM;
  1286. pe = enqueue_an_ATL_packet;
  1287. break;
  1288. case PIPE_INTERRUPT:
  1289. if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
  1290. return -ENOMEM;
  1291. pe = enqueue_an_INT_packet;
  1292. break;
  1293. case PIPE_ISOCHRONOUS:
  1294. printk(KERN_ERR "PIPE_ISOCHRONOUS ain't supported\n");
  1295. default:
  1296. return -EPIPE;
  1297. }
  1298. isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
  1299. return 0;
  1300. }
  1301. static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
  1302. int status)
  1303. {
  1304. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  1305. struct inter_packet_info *ints;
  1306. u32 i;
  1307. u32 reg_base, or_reg, skip_reg;
  1308. int flags;
  1309. struct ptd ptd;
  1310. switch (usb_pipetype(urb->pipe)) {
  1311. case PIPE_ISOCHRONOUS:
  1312. return -EPIPE;
  1313. break;
  1314. case PIPE_INTERRUPT:
  1315. ints = priv->int_ints;
  1316. reg_base = INT_REGS_OFFSET;
  1317. or_reg = HC_INT_IRQ_MASK_OR_REG;
  1318. skip_reg = HC_INT_PTD_SKIPMAP_REG;
  1319. break;
  1320. default:
  1321. ints = priv->atl_ints;
  1322. reg_base = ATL_REGS_OFFSET;
  1323. or_reg = HC_ATL_IRQ_MASK_OR_REG;
  1324. skip_reg = HC_ATL_PTD_SKIPMAP_REG;
  1325. break;
  1326. }
  1327. memset(&ptd, 0, sizeof(ptd));
  1328. spin_lock_irqsave(&priv->lock, flags);
  1329. for (i = 0; i < 32; i++) {
  1330. if (ints->urb == urb) {
  1331. u32 skip_map;
  1332. u32 or_map;
  1333. struct isp1760_qtd *qtd;
  1334. skip_map = isp1760_readl(hcd->regs + skip_reg);
  1335. skip_map |= 1 << i;
  1336. isp1760_writel(skip_map, hcd->regs + skip_reg);
  1337. or_map = isp1760_readl(hcd->regs + or_reg);
  1338. or_map &= ~(1 << i);
  1339. isp1760_writel(or_map, hcd->regs + or_reg);
  1340. priv_write_copy(priv, (u32 *)&ptd, hcd->regs + reg_base
  1341. + i * sizeof(ptd), sizeof(ptd));
  1342. qtd = ints->qtd;
  1343. clean_up_qtdlist(qtd);
  1344. free_mem(priv, ints->payload);
  1345. ints->urb = NULL;
  1346. ints->qh = NULL;
  1347. ints->qtd = NULL;
  1348. ints->data_buffer = NULL;
  1349. ints->payload = 0;
  1350. isp1760_urb_done(priv, urb, status);
  1351. break;
  1352. }
  1353. ints++;
  1354. }
  1355. spin_unlock_irqrestore(&priv->lock, flags);
  1356. return 0;
  1357. }
  1358. static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd)
  1359. {
  1360. struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
  1361. u32 imask;
  1362. irqreturn_t irqret = IRQ_NONE;
  1363. spin_lock(&priv->lock);
  1364. if (!(usb_hcd->state & HC_STATE_RUNNING))
  1365. goto leave;
  1366. imask = isp1760_readl(usb_hcd->regs + HC_INTERRUPT_REG);
  1367. if (unlikely(!imask))
  1368. goto leave;
  1369. isp1760_writel(imask, usb_hcd->regs + HC_INTERRUPT_REG);
  1370. if (imask & HC_ATL_INT)
  1371. do_atl_int(usb_hcd);
  1372. if (imask & HC_INTL_INT)
  1373. do_intl_int(usb_hcd);
  1374. irqret = IRQ_HANDLED;
  1375. leave:
  1376. spin_unlock(&priv->lock);
  1377. return irqret;
  1378. }
  1379. static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
  1380. {
  1381. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  1382. u32 temp, status = 0;
  1383. u32 mask;
  1384. int retval = 1;
  1385. unsigned long flags;
  1386. /* if !USB_SUSPEND, root hub timers won't get shut down ... */
  1387. if (!HC_IS_RUNNING(hcd->state))
  1388. return 0;
  1389. /* init status to no-changes */
  1390. buf[0] = 0;
  1391. mask = PORT_CSC;
  1392. spin_lock_irqsave(&priv->lock, flags);
  1393. temp = isp1760_readl(hcd->regs + HC_PORTSC1);
  1394. if (temp & PORT_OWNER) {
  1395. if (temp & PORT_CSC) {
  1396. temp &= ~PORT_CSC;
  1397. isp1760_writel(temp, hcd->regs + HC_PORTSC1);
  1398. goto done;
  1399. }
  1400. }
  1401. /*
  1402. * Return status information even for ports with OWNER set.
  1403. * Otherwise khubd wouldn't see the disconnect event when a
  1404. * high-speed device is switched over to the companion
  1405. * controller by the user.
  1406. */
  1407. if ((temp & mask) != 0
  1408. || ((temp & PORT_RESUME) != 0
  1409. && time_after_eq(jiffies,
  1410. priv->reset_done))) {
  1411. buf [0] |= 1 << (0 + 1);
  1412. status = STS_PCD;
  1413. }
  1414. /* FIXME autosuspend idle root hubs */
  1415. done:
  1416. spin_unlock_irqrestore(&priv->lock, flags);
  1417. return status ? retval : 0;
  1418. }
  1419. static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
  1420. struct usb_hub_descriptor *desc)
  1421. {
  1422. int ports = HCS_N_PORTS(priv->hcs_params);
  1423. u16 temp;
  1424. desc->bDescriptorType = 0x29;
  1425. /* priv 1.0, 2.3.9 says 20ms max */
  1426. desc->bPwrOn2PwrGood = 10;
  1427. desc->bHubContrCurrent = 0;
  1428. desc->bNbrPorts = ports;
  1429. temp = 1 + (ports / 8);
  1430. desc->bDescLength = 7 + 2 * temp;
  1431. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  1432. memset(&desc->bitmap[0], 0, temp);
  1433. memset(&desc->bitmap[temp], 0xff, temp);
  1434. /* per-port overcurrent reporting */
  1435. temp = 0x0008;
  1436. if (HCS_PPC(priv->hcs_params))
  1437. /* per-port power control */
  1438. temp |= 0x0001;
  1439. else
  1440. /* no power switching */
  1441. temp |= 0x0002;
  1442. desc->wHubCharacteristics = cpu_to_le16(temp);
  1443. }
  1444. #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
  1445. static int check_reset_complete(struct isp1760_hcd *priv, int index,
  1446. u32 __iomem *status_reg, int port_status)
  1447. {
  1448. if (!(port_status & PORT_CONNECT))
  1449. return port_status;
  1450. /* if reset finished and it's still not enabled -- handoff */
  1451. if (!(port_status & PORT_PE)) {
  1452. printk(KERN_ERR "port %d full speed --> companion\n",
  1453. index + 1);
  1454. port_status |= PORT_OWNER;
  1455. port_status &= ~PORT_RWC_BITS;
  1456. isp1760_writel(port_status, status_reg);
  1457. } else
  1458. printk(KERN_ERR "port %d high speed\n", index + 1);
  1459. return port_status;
  1460. }
  1461. static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
  1462. u16 wValue, u16 wIndex, char *buf, u16 wLength)
  1463. {
  1464. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  1465. int ports = HCS_N_PORTS(priv->hcs_params);
  1466. u32 __iomem *status_reg = hcd->regs + HC_PORTSC1;
  1467. u32 temp, status;
  1468. unsigned long flags;
  1469. int retval = 0;
  1470. unsigned selector;
  1471. /*
  1472. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  1473. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  1474. * (track current state ourselves) ... blink for diagnostics,
  1475. * power, "this is the one", etc. EHCI spec supports this.
  1476. */
  1477. spin_lock_irqsave(&priv->lock, flags);
  1478. switch (typeReq) {
  1479. case ClearHubFeature:
  1480. switch (wValue) {
  1481. case C_HUB_LOCAL_POWER:
  1482. case C_HUB_OVER_CURRENT:
  1483. /* no hub-wide feature/status flags */
  1484. break;
  1485. default:
  1486. goto error;
  1487. }
  1488. break;
  1489. case ClearPortFeature:
  1490. if (!wIndex || wIndex > ports)
  1491. goto error;
  1492. wIndex--;
  1493. temp = isp1760_readl(status_reg);
  1494. /*
  1495. * Even if OWNER is set, so the port is owned by the
  1496. * companion controller, khubd needs to be able to clear
  1497. * the port-change status bits (especially
  1498. * USB_PORT_FEAT_C_CONNECTION).
  1499. */
  1500. switch (wValue) {
  1501. case USB_PORT_FEAT_ENABLE:
  1502. isp1760_writel(temp & ~PORT_PE, status_reg);
  1503. break;
  1504. case USB_PORT_FEAT_C_ENABLE:
  1505. /* XXX error? */
  1506. break;
  1507. case USB_PORT_FEAT_SUSPEND:
  1508. if (temp & PORT_RESET)
  1509. goto error;
  1510. if (temp & PORT_SUSPEND) {
  1511. if ((temp & PORT_PE) == 0)
  1512. goto error;
  1513. /* resume signaling for 20 msec */
  1514. temp &= ~(PORT_RWC_BITS);
  1515. isp1760_writel(temp | PORT_RESUME,
  1516. status_reg);
  1517. priv->reset_done = jiffies +
  1518. msecs_to_jiffies(20);
  1519. }
  1520. break;
  1521. case USB_PORT_FEAT_C_SUSPEND:
  1522. /* we auto-clear this feature */
  1523. break;
  1524. case USB_PORT_FEAT_POWER:
  1525. if (HCS_PPC(priv->hcs_params))
  1526. isp1760_writel(temp & ~PORT_POWER, status_reg);
  1527. break;
  1528. case USB_PORT_FEAT_C_CONNECTION:
  1529. isp1760_writel(temp | PORT_CSC,
  1530. status_reg);
  1531. break;
  1532. case USB_PORT_FEAT_C_OVER_CURRENT:
  1533. /* XXX error ?*/
  1534. break;
  1535. case USB_PORT_FEAT_C_RESET:
  1536. /* GetPortStatus clears reset */
  1537. break;
  1538. default:
  1539. goto error;
  1540. }
  1541. isp1760_readl(hcd->regs + HC_USBCMD);
  1542. break;
  1543. case GetHubDescriptor:
  1544. isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
  1545. buf);
  1546. break;
  1547. case GetHubStatus:
  1548. /* no hub-wide feature/status flags */
  1549. memset(buf, 0, 4);
  1550. break;
  1551. case GetPortStatus:
  1552. if (!wIndex || wIndex > ports)
  1553. goto error;
  1554. wIndex--;
  1555. status = 0;
  1556. temp = isp1760_readl(status_reg);
  1557. /* wPortChange bits */
  1558. if (temp & PORT_CSC)
  1559. status |= 1 << USB_PORT_FEAT_C_CONNECTION;
  1560. /* whoever resumes must GetPortStatus to complete it!! */
  1561. if (temp & PORT_RESUME) {
  1562. printk(KERN_ERR "Port resume should be skipped.\n");
  1563. /* Remote Wakeup received? */
  1564. if (!priv->reset_done) {
  1565. /* resume signaling for 20 msec */
  1566. priv->reset_done = jiffies
  1567. + msecs_to_jiffies(20);
  1568. /* check the port again */
  1569. mod_timer(&priv_to_hcd(priv)->rh_timer,
  1570. priv->reset_done);
  1571. }
  1572. /* resume completed? */
  1573. else if (time_after_eq(jiffies,
  1574. priv->reset_done)) {
  1575. status |= 1 << USB_PORT_FEAT_C_SUSPEND;
  1576. priv->reset_done = 0;
  1577. /* stop resume signaling */
  1578. temp = isp1760_readl(status_reg);
  1579. isp1760_writel(
  1580. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  1581. status_reg);
  1582. retval = handshake(priv, status_reg,
  1583. PORT_RESUME, 0, 2000 /* 2msec */);
  1584. if (retval != 0) {
  1585. isp1760_err(priv,
  1586. "port %d resume error %d\n",
  1587. wIndex + 1, retval);
  1588. goto error;
  1589. }
  1590. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  1591. }
  1592. }
  1593. /* whoever resets must GetPortStatus to complete it!! */
  1594. if ((temp & PORT_RESET)
  1595. && time_after_eq(jiffies,
  1596. priv->reset_done)) {
  1597. status |= 1 << USB_PORT_FEAT_C_RESET;
  1598. priv->reset_done = 0;
  1599. /* force reset to complete */
  1600. isp1760_writel(temp & ~PORT_RESET,
  1601. status_reg);
  1602. /* REVISIT: some hardware needs 550+ usec to clear
  1603. * this bit; seems too long to spin routinely...
  1604. */
  1605. retval = handshake(priv, status_reg,
  1606. PORT_RESET, 0, 750);
  1607. if (retval != 0) {
  1608. isp1760_err(priv, "port %d reset error %d\n",
  1609. wIndex + 1, retval);
  1610. goto error;
  1611. }
  1612. /* see what we found out */
  1613. temp = check_reset_complete(priv, wIndex, status_reg,
  1614. isp1760_readl(status_reg));
  1615. }
  1616. /*
  1617. * Even if OWNER is set, there's no harm letting khubd
  1618. * see the wPortStatus values (they should all be 0 except
  1619. * for PORT_POWER anyway).
  1620. */
  1621. if (temp & PORT_OWNER)
  1622. printk(KERN_ERR "Warning: PORT_OWNER is set\n");
  1623. if (temp & PORT_CONNECT) {
  1624. status |= 1 << USB_PORT_FEAT_CONNECTION;
  1625. /* status may be from integrated TT */
  1626. status |= ehci_port_speed(priv, temp);
  1627. }
  1628. if (temp & PORT_PE)
  1629. status |= 1 << USB_PORT_FEAT_ENABLE;
  1630. if (temp & (PORT_SUSPEND|PORT_RESUME))
  1631. status |= 1 << USB_PORT_FEAT_SUSPEND;
  1632. if (temp & PORT_RESET)
  1633. status |= 1 << USB_PORT_FEAT_RESET;
  1634. if (temp & PORT_POWER)
  1635. status |= 1 << USB_PORT_FEAT_POWER;
  1636. put_unaligned(cpu_to_le32(status), (__le32 *) buf);
  1637. break;
  1638. case SetHubFeature:
  1639. switch (wValue) {
  1640. case C_HUB_LOCAL_POWER:
  1641. case C_HUB_OVER_CURRENT:
  1642. /* no hub-wide feature/status flags */
  1643. break;
  1644. default:
  1645. goto error;
  1646. }
  1647. break;
  1648. case SetPortFeature:
  1649. selector = wIndex >> 8;
  1650. wIndex &= 0xff;
  1651. if (!wIndex || wIndex > ports)
  1652. goto error;
  1653. wIndex--;
  1654. temp = isp1760_readl(status_reg);
  1655. if (temp & PORT_OWNER)
  1656. break;
  1657. /* temp &= ~PORT_RWC_BITS; */
  1658. switch (wValue) {
  1659. case USB_PORT_FEAT_ENABLE:
  1660. isp1760_writel(temp | PORT_PE, status_reg);
  1661. break;
  1662. case USB_PORT_FEAT_SUSPEND:
  1663. if ((temp & PORT_PE) == 0
  1664. || (temp & PORT_RESET) != 0)
  1665. goto error;
  1666. isp1760_writel(temp | PORT_SUSPEND, status_reg);
  1667. break;
  1668. case USB_PORT_FEAT_POWER:
  1669. if (HCS_PPC(priv->hcs_params))
  1670. isp1760_writel(temp | PORT_POWER,
  1671. status_reg);
  1672. break;
  1673. case USB_PORT_FEAT_RESET:
  1674. if (temp & PORT_RESUME)
  1675. goto error;
  1676. /* line status bits may report this as low speed,
  1677. * which can be fine if this root hub has a
  1678. * transaction translator built in.
  1679. */
  1680. if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
  1681. && PORT_USB11(temp)) {
  1682. temp |= PORT_OWNER;
  1683. } else {
  1684. temp |= PORT_RESET;
  1685. temp &= ~PORT_PE;
  1686. /*
  1687. * caller must wait, then call GetPortStatus
  1688. * usb 2.0 spec says 50 ms resets on root
  1689. */
  1690. priv->reset_done = jiffies +
  1691. msecs_to_jiffies(50);
  1692. }
  1693. isp1760_writel(temp, status_reg);
  1694. break;
  1695. default:
  1696. goto error;
  1697. }
  1698. isp1760_readl(hcd->regs + HC_USBCMD);
  1699. break;
  1700. default:
  1701. error:
  1702. /* "stall" on error */
  1703. retval = -EPIPE;
  1704. }
  1705. spin_unlock_irqrestore(&priv->lock, flags);
  1706. return retval;
  1707. }
  1708. static void isp1760_endpoint_disable(struct usb_hcd *usb_hcd,
  1709. struct usb_host_endpoint *ep)
  1710. {
  1711. struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
  1712. struct isp1760_qh *qh;
  1713. struct isp1760_qtd *qtd;
  1714. u32 flags;
  1715. spin_lock_irqsave(&priv->lock, flags);
  1716. qh = ep->hcpriv;
  1717. if (!qh)
  1718. goto out;
  1719. ep->hcpriv = NULL;
  1720. do {
  1721. /* more than entry might get removed */
  1722. if (list_empty(&qh->qtd_list))
  1723. break;
  1724. qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd,
  1725. qtd_list);
  1726. if (qtd->status & URB_ENQUEUED) {
  1727. spin_unlock_irqrestore(&priv->lock, flags);
  1728. isp1760_urb_dequeue(usb_hcd, qtd->urb, -ECONNRESET);
  1729. spin_lock_irqsave(&priv->lock, flags);
  1730. } else {
  1731. struct urb *urb;
  1732. urb = qtd->urb;
  1733. clean_up_qtdlist(qtd);
  1734. isp1760_urb_done(priv, urb, -ECONNRESET);
  1735. }
  1736. } while (1);
  1737. qh_destroy(qh);
  1738. /* remove requests and leak them.
  1739. * ATL are pretty fast done, INT could take a while...
  1740. * The latter shoule be removed
  1741. */
  1742. out:
  1743. spin_unlock_irqrestore(&priv->lock, flags);
  1744. }
  1745. static int isp1760_get_frame(struct usb_hcd *hcd)
  1746. {
  1747. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  1748. u32 fr;
  1749. fr = isp1760_readl(hcd->regs + HC_FRINDEX);
  1750. return (fr >> 3) % priv->periodic_size;
  1751. }
  1752. static void isp1760_stop(struct usb_hcd *hcd)
  1753. {
  1754. struct isp1760_hcd *priv = hcd_to_priv(hcd);
  1755. isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
  1756. NULL, 0);
  1757. mdelay(20);
  1758. spin_lock_irq(&priv->lock);
  1759. ehci_reset(priv);
  1760. /* Disable IRQ */
  1761. isp1760_writel(HW_DATA_BUS_32BIT, hcd->regs + HC_HW_MODE_CTRL);
  1762. spin_unlock_irq(&priv->lock);
  1763. isp1760_writel(0, hcd->regs + HC_CONFIGFLAG);
  1764. }
  1765. static void isp1760_shutdown(struct usb_hcd *hcd)
  1766. {
  1767. u32 command;
  1768. isp1760_stop(hcd);
  1769. isp1760_writel(HW_DATA_BUS_32BIT, hcd->regs + HC_HW_MODE_CTRL);
  1770. command = isp1760_readl(hcd->regs + HC_USBCMD);
  1771. command &= ~CMD_RUN;
  1772. isp1760_writel(command, hcd->regs + HC_USBCMD);
  1773. }
  1774. static const struct hc_driver isp1760_hc_driver = {
  1775. .description = "isp1760-hcd",
  1776. .product_desc = "NXP ISP1760 USB Host Controller",
  1777. .hcd_priv_size = sizeof(struct isp1760_hcd),
  1778. .irq = isp1760_irq,
  1779. .flags = HCD_MEMORY | HCD_USB2,
  1780. .reset = isp1760_hc_setup,
  1781. .start = isp1760_run,
  1782. .stop = isp1760_stop,
  1783. .shutdown = isp1760_shutdown,
  1784. .urb_enqueue = isp1760_urb_enqueue,
  1785. .urb_dequeue = isp1760_urb_dequeue,
  1786. .endpoint_disable = isp1760_endpoint_disable,
  1787. .get_frame_number = isp1760_get_frame,
  1788. .hub_status_data = isp1760_hub_status_data,
  1789. .hub_control = isp1760_hub_control,
  1790. };
  1791. int __init init_kmem_once(void)
  1792. {
  1793. qtd_cachep = kmem_cache_create("isp1760_qtd",
  1794. sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
  1795. SLAB_MEM_SPREAD, NULL);
  1796. if (!qtd_cachep)
  1797. return -ENOMEM;
  1798. qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
  1799. 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
  1800. if (!qh_cachep) {
  1801. kmem_cache_destroy(qtd_cachep);
  1802. return -ENOMEM;
  1803. }
  1804. return 0;
  1805. }
  1806. void deinit_kmem_cache(void)
  1807. {
  1808. kmem_cache_destroy(qtd_cachep);
  1809. kmem_cache_destroy(qh_cachep);
  1810. }
  1811. struct usb_hcd *isp1760_register(u64 res_start, u64 res_len, int irq,
  1812. u64 irqflags, struct device *dev, const char *busname)
  1813. {
  1814. struct usb_hcd *hcd;
  1815. struct isp1760_hcd *priv;
  1816. int ret;
  1817. if (usb_disabled())
  1818. return ERR_PTR(-ENODEV);
  1819. /* prevent usb-core allocating DMA pages */
  1820. dev->dma_mask = NULL;
  1821. hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev->bus_id);
  1822. if (!hcd)
  1823. return ERR_PTR(-ENOMEM);
  1824. priv = hcd_to_priv(hcd);
  1825. init_memory(priv);
  1826. hcd->regs = ioremap(res_start, res_len);
  1827. if (!hcd->regs) {
  1828. ret = -EIO;
  1829. goto err_put;
  1830. }
  1831. ret = usb_add_hcd(hcd, irq, irqflags);
  1832. if (ret)
  1833. goto err_unmap;
  1834. hcd->irq = irq;
  1835. hcd->rsrc_start = res_start;
  1836. hcd->rsrc_len = res_len;
  1837. return hcd;
  1838. err_unmap:
  1839. iounmap(hcd->regs);
  1840. err_put:
  1841. usb_put_hcd(hcd);
  1842. return ERR_PTR(ret);
  1843. }
  1844. MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
  1845. MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
  1846. MODULE_LICENSE("GPL v2");