patch_hdmi.c 66 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. /*
  45. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46. * could support N independent pipes, each of them can be connected to one or
  47. * more ports (DVI, HDMI or DisplayPort).
  48. *
  49. * The HDA correspondence of pipes/ports are converter/pin nodes.
  50. */
  51. #define MAX_HDMI_CVTS 8
  52. #define MAX_HDMI_PINS 8
  53. struct hdmi_spec_per_cvt {
  54. hda_nid_t cvt_nid;
  55. int assigned;
  56. unsigned int channels_min;
  57. unsigned int channels_max;
  58. u32 rates;
  59. u64 formats;
  60. unsigned int maxbps;
  61. };
  62. struct hdmi_spec_per_pin {
  63. hda_nid_t pin_nid;
  64. int num_mux_nids;
  65. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  66. struct hda_codec *codec;
  67. struct hdmi_eld sink_eld;
  68. struct delayed_work work;
  69. int repoll_count;
  70. bool non_pcm;
  71. bool chmap_set; /* channel-map override by ALSA API? */
  72. unsigned char chmap[8]; /* ALSA API channel-map */
  73. };
  74. struct hdmi_spec {
  75. int num_cvts;
  76. struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  77. int num_pins;
  78. struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  79. struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  80. unsigned int channels_max; /* max over all cvts */
  81. /*
  82. * Non-generic ATI/NVIDIA specific
  83. */
  84. struct hda_multi_out multiout;
  85. struct hda_pcm_stream pcm_playback;
  86. };
  87. struct hdmi_audio_infoframe {
  88. u8 type; /* 0x84 */
  89. u8 ver; /* 0x01 */
  90. u8 len; /* 0x0a */
  91. u8 checksum;
  92. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  93. u8 SS01_SF24;
  94. u8 CXT04;
  95. u8 CA;
  96. u8 LFEPBL01_LSV36_DM_INH7;
  97. };
  98. struct dp_audio_infoframe {
  99. u8 type; /* 0x84 */
  100. u8 len; /* 0x1b */
  101. u8 ver; /* 0x11 << 2 */
  102. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  103. u8 SS01_SF24;
  104. u8 CXT04;
  105. u8 CA;
  106. u8 LFEPBL01_LSV36_DM_INH7;
  107. };
  108. union audio_infoframe {
  109. struct hdmi_audio_infoframe hdmi;
  110. struct dp_audio_infoframe dp;
  111. u8 bytes[0];
  112. };
  113. /*
  114. * CEA speaker placement:
  115. *
  116. * FLH FCH FRH
  117. * FLW FL FLC FC FRC FR FRW
  118. *
  119. * LFE
  120. * TC
  121. *
  122. * RL RLC RC RRC RR
  123. *
  124. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  125. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  126. */
  127. enum cea_speaker_placement {
  128. FL = (1 << 0), /* Front Left */
  129. FC = (1 << 1), /* Front Center */
  130. FR = (1 << 2), /* Front Right */
  131. FLC = (1 << 3), /* Front Left Center */
  132. FRC = (1 << 4), /* Front Right Center */
  133. RL = (1 << 5), /* Rear Left */
  134. RC = (1 << 6), /* Rear Center */
  135. RR = (1 << 7), /* Rear Right */
  136. RLC = (1 << 8), /* Rear Left Center */
  137. RRC = (1 << 9), /* Rear Right Center */
  138. LFE = (1 << 10), /* Low Frequency Effect */
  139. FLW = (1 << 11), /* Front Left Wide */
  140. FRW = (1 << 12), /* Front Right Wide */
  141. FLH = (1 << 13), /* Front Left High */
  142. FCH = (1 << 14), /* Front Center High */
  143. FRH = (1 << 15), /* Front Right High */
  144. TC = (1 << 16), /* Top Center */
  145. };
  146. /*
  147. * ELD SA bits in the CEA Speaker Allocation data block
  148. */
  149. static int eld_speaker_allocation_bits[] = {
  150. [0] = FL | FR,
  151. [1] = LFE,
  152. [2] = FC,
  153. [3] = RL | RR,
  154. [4] = RC,
  155. [5] = FLC | FRC,
  156. [6] = RLC | RRC,
  157. /* the following are not defined in ELD yet */
  158. [7] = FLW | FRW,
  159. [8] = FLH | FRH,
  160. [9] = TC,
  161. [10] = FCH,
  162. };
  163. struct cea_channel_speaker_allocation {
  164. int ca_index;
  165. int speakers[8];
  166. /* derived values, just for convenience */
  167. int channels;
  168. int spk_mask;
  169. };
  170. /*
  171. * ALSA sequence is:
  172. *
  173. * surround40 surround41 surround50 surround51 surround71
  174. * ch0 front left = = = =
  175. * ch1 front right = = = =
  176. * ch2 rear left = = = =
  177. * ch3 rear right = = = =
  178. * ch4 LFE center center center
  179. * ch5 LFE LFE
  180. * ch6 side left
  181. * ch7 side right
  182. *
  183. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  184. */
  185. static int hdmi_channel_mapping[0x32][8] = {
  186. /* stereo */
  187. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  188. /* 2.1 */
  189. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  190. /* Dolby Surround */
  191. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  192. /* surround40 */
  193. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  194. /* 4ch */
  195. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  196. /* surround41 */
  197. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  198. /* surround50 */
  199. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  200. /* surround51 */
  201. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  202. /* 7.1 */
  203. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  204. };
  205. /*
  206. * This is an ordered list!
  207. *
  208. * The preceding ones have better chances to be selected by
  209. * hdmi_channel_allocation().
  210. */
  211. static struct cea_channel_speaker_allocation channel_allocations[] = {
  212. /* channel: 7 6 5 4 3 2 1 0 */
  213. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  214. /* 2.1 */
  215. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  216. /* Dolby Surround */
  217. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  218. /* surround40 */
  219. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  220. /* surround41 */
  221. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  222. /* surround50 */
  223. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  224. /* surround51 */
  225. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  226. /* 6.1 */
  227. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  228. /* surround71 */
  229. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  230. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  231. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  232. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  233. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  234. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  235. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  236. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  237. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  238. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  239. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  240. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  241. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  242. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  243. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  244. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  245. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  246. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  247. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  248. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  249. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  250. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  251. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  252. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  253. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  254. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  255. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  256. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  257. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  258. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  259. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  260. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  261. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  262. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  263. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  264. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  265. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  266. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  267. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  268. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  269. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  270. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  271. };
  272. /*
  273. * HDMI routines
  274. */
  275. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  276. {
  277. int pin_idx;
  278. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  279. if (spec->pins[pin_idx].pin_nid == pin_nid)
  280. return pin_idx;
  281. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  282. return -EINVAL;
  283. }
  284. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  285. struct hda_pcm_stream *hinfo)
  286. {
  287. int pin_idx;
  288. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  289. if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
  290. return pin_idx;
  291. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  292. return -EINVAL;
  293. }
  294. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  295. {
  296. int cvt_idx;
  297. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  298. if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
  299. return cvt_idx;
  300. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  301. return -EINVAL;
  302. }
  303. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  304. struct snd_ctl_elem_info *uinfo)
  305. {
  306. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  307. struct hdmi_spec *spec;
  308. int pin_idx;
  309. spec = codec->spec;
  310. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  311. pin_idx = kcontrol->private_value;
  312. uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
  313. return 0;
  314. }
  315. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  316. struct snd_ctl_elem_value *ucontrol)
  317. {
  318. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  319. struct hdmi_spec *spec;
  320. int pin_idx;
  321. spec = codec->spec;
  322. pin_idx = kcontrol->private_value;
  323. memcpy(ucontrol->value.bytes.data,
  324. spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
  325. return 0;
  326. }
  327. static struct snd_kcontrol_new eld_bytes_ctl = {
  328. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  329. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  330. .name = "ELD",
  331. .info = hdmi_eld_ctl_info,
  332. .get = hdmi_eld_ctl_get,
  333. };
  334. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  335. int device)
  336. {
  337. struct snd_kcontrol *kctl;
  338. struct hdmi_spec *spec = codec->spec;
  339. int err;
  340. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  341. if (!kctl)
  342. return -ENOMEM;
  343. kctl->private_value = pin_idx;
  344. kctl->id.device = device;
  345. err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
  346. if (err < 0)
  347. return err;
  348. return 0;
  349. }
  350. #ifdef BE_PARANOID
  351. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  352. int *packet_index, int *byte_index)
  353. {
  354. int val;
  355. val = snd_hda_codec_read(codec, pin_nid, 0,
  356. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  357. *packet_index = val >> 5;
  358. *byte_index = val & 0x1f;
  359. }
  360. #endif
  361. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  362. int packet_index, int byte_index)
  363. {
  364. int val;
  365. val = (packet_index << 5) | (byte_index & 0x1f);
  366. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  367. }
  368. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  369. unsigned char val)
  370. {
  371. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  372. }
  373. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  374. {
  375. /* Unmute */
  376. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  377. snd_hda_codec_write(codec, pin_nid, 0,
  378. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  379. /* Disable pin out until stream is active*/
  380. snd_hda_codec_write(codec, pin_nid, 0,
  381. AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
  382. }
  383. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  384. {
  385. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  386. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  387. }
  388. static void hdmi_set_channel_count(struct hda_codec *codec,
  389. hda_nid_t cvt_nid, int chs)
  390. {
  391. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  392. snd_hda_codec_write(codec, cvt_nid, 0,
  393. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  394. }
  395. /*
  396. * Channel mapping routines
  397. */
  398. /*
  399. * Compute derived values in channel_allocations[].
  400. */
  401. static void init_channel_allocations(void)
  402. {
  403. int i, j;
  404. struct cea_channel_speaker_allocation *p;
  405. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  406. p = channel_allocations + i;
  407. p->channels = 0;
  408. p->spk_mask = 0;
  409. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  410. if (p->speakers[j]) {
  411. p->channels++;
  412. p->spk_mask |= p->speakers[j];
  413. }
  414. }
  415. }
  416. static int get_channel_allocation_order(int ca)
  417. {
  418. int i;
  419. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  420. if (channel_allocations[i].ca_index == ca)
  421. break;
  422. }
  423. return i;
  424. }
  425. /*
  426. * The transformation takes two steps:
  427. *
  428. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  429. * spk_mask => (channel_allocations[]) => ai->CA
  430. *
  431. * TODO: it could select the wrong CA from multiple candidates.
  432. */
  433. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  434. {
  435. int i;
  436. int ca = 0;
  437. int spk_mask = 0;
  438. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  439. /*
  440. * CA defaults to 0 for basic stereo audio
  441. */
  442. if (channels <= 2)
  443. return 0;
  444. /*
  445. * expand ELD's speaker allocation mask
  446. *
  447. * ELD tells the speaker mask in a compact(paired) form,
  448. * expand ELD's notions to match the ones used by Audio InfoFrame.
  449. */
  450. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  451. if (eld->spk_alloc & (1 << i))
  452. spk_mask |= eld_speaker_allocation_bits[i];
  453. }
  454. /* search for the first working match in the CA table */
  455. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  456. if (channels == channel_allocations[i].channels &&
  457. (spk_mask & channel_allocations[i].spk_mask) ==
  458. channel_allocations[i].spk_mask) {
  459. ca = channel_allocations[i].ca_index;
  460. break;
  461. }
  462. }
  463. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  464. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  465. ca, channels, buf);
  466. return ca;
  467. }
  468. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  469. hda_nid_t pin_nid)
  470. {
  471. #ifdef CONFIG_SND_DEBUG_VERBOSE
  472. int i;
  473. int slot;
  474. for (i = 0; i < 8; i++) {
  475. slot = snd_hda_codec_read(codec, pin_nid, 0,
  476. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  477. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  478. slot >> 4, slot & 0xf);
  479. }
  480. #endif
  481. }
  482. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  483. hda_nid_t pin_nid,
  484. bool non_pcm,
  485. int ca)
  486. {
  487. int i;
  488. int err;
  489. int order;
  490. int non_pcm_mapping[8];
  491. order = get_channel_allocation_order(ca);
  492. if (hdmi_channel_mapping[ca][1] == 0) {
  493. for (i = 0; i < channel_allocations[order].channels; i++)
  494. hdmi_channel_mapping[ca][i] = i | (i << 4);
  495. for (; i < 8; i++)
  496. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  497. }
  498. if (non_pcm) {
  499. for (i = 0; i < channel_allocations[order].channels; i++)
  500. non_pcm_mapping[i] = i | (i << 4);
  501. for (; i < 8; i++)
  502. non_pcm_mapping[i] = 0xf | (i << 4);
  503. }
  504. for (i = 0; i < 8; i++) {
  505. err = snd_hda_codec_write(codec, pin_nid, 0,
  506. AC_VERB_SET_HDMI_CHAN_SLOT,
  507. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  508. if (err) {
  509. snd_printdd(KERN_NOTICE
  510. "HDMI: channel mapping failed\n");
  511. break;
  512. }
  513. }
  514. hdmi_debug_channel_mapping(codec, pin_nid);
  515. }
  516. struct channel_map_table {
  517. unsigned char map; /* ALSA API channel map position */
  518. unsigned char cea_slot; /* CEA slot value */
  519. int spk_mask; /* speaker position bit mask */
  520. };
  521. static struct channel_map_table map_tables[] = {
  522. { SNDRV_CHMAP_FL, 0x00, FL },
  523. { SNDRV_CHMAP_FR, 0x01, FR },
  524. { SNDRV_CHMAP_RL, 0x04, RL },
  525. { SNDRV_CHMAP_RR, 0x05, RR },
  526. { SNDRV_CHMAP_LFE, 0x02, LFE },
  527. { SNDRV_CHMAP_FC, 0x03, FC },
  528. { SNDRV_CHMAP_RLC, 0x06, RLC },
  529. { SNDRV_CHMAP_RRC, 0x07, RRC },
  530. {} /* terminator */
  531. };
  532. /* from ALSA API channel position to speaker bit mask */
  533. static int to_spk_mask(unsigned char c)
  534. {
  535. struct channel_map_table *t = map_tables;
  536. for (; t->map; t++) {
  537. if (t->map == c)
  538. return t->spk_mask;
  539. }
  540. return 0;
  541. }
  542. /* from ALSA API channel position to CEA slot */
  543. static int to_cea_slot(unsigned char c)
  544. {
  545. struct channel_map_table *t = map_tables;
  546. for (; t->map; t++) {
  547. if (t->map == c)
  548. return t->cea_slot;
  549. }
  550. return 0x0f;
  551. }
  552. /* from CEA slot to ALSA API channel position */
  553. static int from_cea_slot(unsigned char c)
  554. {
  555. struct channel_map_table *t = map_tables;
  556. for (; t->map; t++) {
  557. if (t->cea_slot == c)
  558. return t->map;
  559. }
  560. return 0;
  561. }
  562. /* from speaker bit mask to ALSA API channel position */
  563. static int spk_to_chmap(int spk)
  564. {
  565. struct channel_map_table *t = map_tables;
  566. for (; t->map; t++) {
  567. if (t->spk_mask == spk)
  568. return t->map;
  569. }
  570. return 0;
  571. }
  572. /* get the CA index corresponding to the given ALSA API channel map */
  573. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  574. {
  575. int i, spks = 0, spk_mask = 0;
  576. for (i = 0; i < chs; i++) {
  577. int mask = to_spk_mask(map[i]);
  578. if (mask) {
  579. spk_mask |= mask;
  580. spks++;
  581. }
  582. }
  583. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  584. if ((chs == channel_allocations[i].channels ||
  585. spks == channel_allocations[i].channels) &&
  586. (spk_mask & channel_allocations[i].spk_mask) ==
  587. channel_allocations[i].spk_mask)
  588. return channel_allocations[i].ca_index;
  589. }
  590. return -1;
  591. }
  592. /* set up the channel slots for the given ALSA API channel map */
  593. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  594. hda_nid_t pin_nid,
  595. int chs, unsigned char *map)
  596. {
  597. int i;
  598. for (i = 0; i < 8; i++) {
  599. int val, err;
  600. if (i < chs)
  601. val = to_cea_slot(map[i]);
  602. else
  603. val = 0xf;
  604. val |= (i << 4);
  605. err = snd_hda_codec_write(codec, pin_nid, 0,
  606. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  607. if (err)
  608. return -EINVAL;
  609. }
  610. return 0;
  611. }
  612. /* store ALSA API channel map from the current default map */
  613. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  614. {
  615. int i;
  616. for (i = 0; i < 8; i++) {
  617. if (i < channel_allocations[ca].channels)
  618. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  619. else
  620. map[i] = 0;
  621. }
  622. }
  623. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  624. hda_nid_t pin_nid, bool non_pcm, int ca,
  625. int channels, unsigned char *map)
  626. {
  627. if (!non_pcm && map) {
  628. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  629. channels, map);
  630. } else {
  631. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  632. hdmi_setup_fake_chmap(map, ca);
  633. }
  634. }
  635. /*
  636. * Audio InfoFrame routines
  637. */
  638. /*
  639. * Enable Audio InfoFrame Transmission
  640. */
  641. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  642. hda_nid_t pin_nid)
  643. {
  644. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  645. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  646. AC_DIPXMIT_BEST);
  647. }
  648. /*
  649. * Disable Audio InfoFrame Transmission
  650. */
  651. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  652. hda_nid_t pin_nid)
  653. {
  654. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  655. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  656. AC_DIPXMIT_DISABLE);
  657. }
  658. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  659. {
  660. #ifdef CONFIG_SND_DEBUG_VERBOSE
  661. int i;
  662. int size;
  663. size = snd_hdmi_get_eld_size(codec, pin_nid);
  664. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  665. for (i = 0; i < 8; i++) {
  666. size = snd_hda_codec_read(codec, pin_nid, 0,
  667. AC_VERB_GET_HDMI_DIP_SIZE, i);
  668. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  669. }
  670. #endif
  671. }
  672. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  673. {
  674. #ifdef BE_PARANOID
  675. int i, j;
  676. int size;
  677. int pi, bi;
  678. for (i = 0; i < 8; i++) {
  679. size = snd_hda_codec_read(codec, pin_nid, 0,
  680. AC_VERB_GET_HDMI_DIP_SIZE, i);
  681. if (size == 0)
  682. continue;
  683. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  684. for (j = 1; j < 1000; j++) {
  685. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  686. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  687. if (pi != i)
  688. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  689. bi, pi, i);
  690. if (bi == 0) /* byte index wrapped around */
  691. break;
  692. }
  693. snd_printd(KERN_INFO
  694. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  695. i, size, j);
  696. }
  697. #endif
  698. }
  699. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  700. {
  701. u8 *bytes = (u8 *)hdmi_ai;
  702. u8 sum = 0;
  703. int i;
  704. hdmi_ai->checksum = 0;
  705. for (i = 0; i < sizeof(*hdmi_ai); i++)
  706. sum += bytes[i];
  707. hdmi_ai->checksum = -sum;
  708. }
  709. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  710. hda_nid_t pin_nid,
  711. u8 *dip, int size)
  712. {
  713. int i;
  714. hdmi_debug_dip_size(codec, pin_nid);
  715. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  716. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  717. for (i = 0; i < size; i++)
  718. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  719. }
  720. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  721. u8 *dip, int size)
  722. {
  723. u8 val;
  724. int i;
  725. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  726. != AC_DIPXMIT_BEST)
  727. return false;
  728. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  729. for (i = 0; i < size; i++) {
  730. val = snd_hda_codec_read(codec, pin_nid, 0,
  731. AC_VERB_GET_HDMI_DIP_DATA, 0);
  732. if (val != dip[i])
  733. return false;
  734. }
  735. return true;
  736. }
  737. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
  738. bool non_pcm,
  739. struct snd_pcm_substream *substream)
  740. {
  741. struct hdmi_spec *spec = codec->spec;
  742. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  743. hda_nid_t pin_nid = per_pin->pin_nid;
  744. int channels = substream->runtime->channels;
  745. struct hdmi_eld *eld;
  746. int ca;
  747. union audio_infoframe ai;
  748. eld = &spec->pins[pin_idx].sink_eld;
  749. if (!eld->monitor_present)
  750. return;
  751. if (!non_pcm && per_pin->chmap_set)
  752. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  753. else
  754. ca = hdmi_channel_allocation(eld, channels);
  755. if (ca < 0)
  756. ca = 0;
  757. memset(&ai, 0, sizeof(ai));
  758. if (eld->conn_type == 0) { /* HDMI */
  759. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  760. hdmi_ai->type = 0x84;
  761. hdmi_ai->ver = 0x01;
  762. hdmi_ai->len = 0x0a;
  763. hdmi_ai->CC02_CT47 = channels - 1;
  764. hdmi_ai->CA = ca;
  765. hdmi_checksum_audio_infoframe(hdmi_ai);
  766. } else if (eld->conn_type == 1) { /* DisplayPort */
  767. struct dp_audio_infoframe *dp_ai = &ai.dp;
  768. dp_ai->type = 0x84;
  769. dp_ai->len = 0x1b;
  770. dp_ai->ver = 0x11 << 2;
  771. dp_ai->CC02_CT47 = channels - 1;
  772. dp_ai->CA = ca;
  773. } else {
  774. snd_printd("HDMI: unknown connection type at pin %d\n",
  775. pin_nid);
  776. return;
  777. }
  778. /*
  779. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  780. * sizeof(*dp_ai) to avoid partial match/update problems when
  781. * the user switches between HDMI/DP monitors.
  782. */
  783. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  784. sizeof(ai))) {
  785. snd_printdd("hdmi_setup_audio_infoframe: "
  786. "pin=%d channels=%d\n",
  787. pin_nid,
  788. channels);
  789. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  790. channels, per_pin->chmap);
  791. hdmi_stop_infoframe_trans(codec, pin_nid);
  792. hdmi_fill_audio_infoframe(codec, pin_nid,
  793. ai.bytes, sizeof(ai));
  794. hdmi_start_infoframe_trans(codec, pin_nid);
  795. } else {
  796. /* For non-pcm audio switch, setup new channel mapping
  797. * accordingly */
  798. if (per_pin->non_pcm != non_pcm)
  799. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  800. channels, per_pin->chmap);
  801. }
  802. per_pin->non_pcm = non_pcm;
  803. }
  804. /*
  805. * Unsolicited events
  806. */
  807. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  808. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  809. {
  810. struct hdmi_spec *spec = codec->spec;
  811. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  812. int pin_nid;
  813. int pin_idx;
  814. struct hda_jack_tbl *jack;
  815. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  816. if (!jack)
  817. return;
  818. pin_nid = jack->nid;
  819. jack->jack_dirty = 1;
  820. _snd_printd(SND_PR_VERBOSE,
  821. "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  822. codec->addr, pin_nid,
  823. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  824. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  825. if (pin_idx < 0)
  826. return;
  827. hdmi_present_sense(&spec->pins[pin_idx], 1);
  828. snd_hda_jack_report_sync(codec);
  829. }
  830. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  831. {
  832. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  833. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  834. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  835. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  836. printk(KERN_INFO
  837. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  838. codec->addr,
  839. tag,
  840. subtag,
  841. cp_state,
  842. cp_ready);
  843. /* TODO */
  844. if (cp_state)
  845. ;
  846. if (cp_ready)
  847. ;
  848. }
  849. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  850. {
  851. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  852. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  853. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  854. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  855. return;
  856. }
  857. if (subtag == 0)
  858. hdmi_intrinsic_event(codec, res);
  859. else
  860. hdmi_non_intrinsic_event(codec, res);
  861. }
  862. /*
  863. * Callbacks
  864. */
  865. /* HBR should be Non-PCM, 8 channels */
  866. #define is_hbr_format(format) \
  867. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  868. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  869. hda_nid_t pin_nid, u32 stream_tag, int format)
  870. {
  871. int pinctl;
  872. int new_pinctl = 0;
  873. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  874. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  875. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  876. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  877. if (is_hbr_format(format))
  878. new_pinctl |= AC_PINCTL_EPT_HBR;
  879. else
  880. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  881. snd_printdd("hdmi_setup_stream: "
  882. "NID=0x%x, %spinctl=0x%x\n",
  883. pin_nid,
  884. pinctl == new_pinctl ? "" : "new-",
  885. new_pinctl);
  886. if (pinctl != new_pinctl)
  887. snd_hda_codec_write(codec, pin_nid, 0,
  888. AC_VERB_SET_PIN_WIDGET_CONTROL,
  889. new_pinctl);
  890. }
  891. if (is_hbr_format(format) && !new_pinctl) {
  892. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  893. return -EINVAL;
  894. }
  895. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  896. return 0;
  897. }
  898. /*
  899. * HDA PCM callbacks
  900. */
  901. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  902. struct hda_codec *codec,
  903. struct snd_pcm_substream *substream)
  904. {
  905. struct hdmi_spec *spec = codec->spec;
  906. struct snd_pcm_runtime *runtime = substream->runtime;
  907. int pin_idx, cvt_idx, mux_idx = 0;
  908. struct hdmi_spec_per_pin *per_pin;
  909. struct hdmi_eld *eld;
  910. struct hdmi_spec_per_cvt *per_cvt = NULL;
  911. /* Validate hinfo */
  912. pin_idx = hinfo_to_pin_index(spec, hinfo);
  913. if (snd_BUG_ON(pin_idx < 0))
  914. return -EINVAL;
  915. per_pin = &spec->pins[pin_idx];
  916. eld = &per_pin->sink_eld;
  917. /* Dynamically assign converter to stream */
  918. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  919. per_cvt = &spec->cvts[cvt_idx];
  920. /* Must not already be assigned */
  921. if (per_cvt->assigned)
  922. continue;
  923. /* Must be in pin's mux's list of converters */
  924. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  925. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  926. break;
  927. /* Not in mux list */
  928. if (mux_idx == per_pin->num_mux_nids)
  929. continue;
  930. break;
  931. }
  932. /* No free converters */
  933. if (cvt_idx == spec->num_cvts)
  934. return -ENODEV;
  935. /* Claim converter */
  936. per_cvt->assigned = 1;
  937. hinfo->nid = per_cvt->cvt_nid;
  938. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  939. AC_VERB_SET_CONNECT_SEL,
  940. mux_idx);
  941. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  942. /* Initially set the converter's capabilities */
  943. hinfo->channels_min = per_cvt->channels_min;
  944. hinfo->channels_max = per_cvt->channels_max;
  945. hinfo->rates = per_cvt->rates;
  946. hinfo->formats = per_cvt->formats;
  947. hinfo->maxbps = per_cvt->maxbps;
  948. /* Restrict capabilities by ELD if this isn't disabled */
  949. if (!static_hdmi_pcm && eld->eld_valid) {
  950. snd_hdmi_eld_update_pcm_info(eld, hinfo);
  951. if (hinfo->channels_min > hinfo->channels_max ||
  952. !hinfo->rates || !hinfo->formats)
  953. return -ENODEV;
  954. }
  955. /* Store the updated parameters */
  956. runtime->hw.channels_min = hinfo->channels_min;
  957. runtime->hw.channels_max = hinfo->channels_max;
  958. runtime->hw.formats = hinfo->formats;
  959. runtime->hw.rates = hinfo->rates;
  960. snd_pcm_hw_constraint_step(substream->runtime, 0,
  961. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  962. return 0;
  963. }
  964. /*
  965. * HDA/HDMI auto parsing
  966. */
  967. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  968. {
  969. struct hdmi_spec *spec = codec->spec;
  970. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  971. hda_nid_t pin_nid = per_pin->pin_nid;
  972. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  973. snd_printk(KERN_WARNING
  974. "HDMI: pin %d wcaps %#x "
  975. "does not support connection list\n",
  976. pin_nid, get_wcaps(codec, pin_nid));
  977. return -EINVAL;
  978. }
  979. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  980. per_pin->mux_nids,
  981. HDA_MAX_CONNECTIONS);
  982. return 0;
  983. }
  984. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  985. {
  986. struct hda_codec *codec = per_pin->codec;
  987. struct hdmi_eld *eld = &per_pin->sink_eld;
  988. hda_nid_t pin_nid = per_pin->pin_nid;
  989. /*
  990. * Always execute a GetPinSense verb here, even when called from
  991. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  992. * response's PD bit is not the real PD value, but indicates that
  993. * the real PD value changed. An older version of the HD-audio
  994. * specification worked this way. Hence, we just ignore the data in
  995. * the unsolicited response to avoid custom WARs.
  996. */
  997. int present = snd_hda_pin_sense(codec, pin_nid);
  998. bool eld_valid = false;
  999. memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
  1000. eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1001. if (eld->monitor_present)
  1002. eld_valid = !!(present & AC_PINSENSE_ELDV);
  1003. _snd_printd(SND_PR_VERBOSE,
  1004. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1005. codec->addr, pin_nid, eld->monitor_present, eld_valid);
  1006. if (eld_valid) {
  1007. if (!snd_hdmi_get_eld(eld, codec, pin_nid))
  1008. snd_hdmi_show_eld(eld);
  1009. else if (repoll) {
  1010. queue_delayed_work(codec->bus->workq,
  1011. &per_pin->work,
  1012. msecs_to_jiffies(300));
  1013. }
  1014. }
  1015. }
  1016. static void hdmi_repoll_eld(struct work_struct *work)
  1017. {
  1018. struct hdmi_spec_per_pin *per_pin =
  1019. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1020. if (per_pin->repoll_count++ > 6)
  1021. per_pin->repoll_count = 0;
  1022. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1023. }
  1024. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1025. {
  1026. struct hdmi_spec *spec = codec->spec;
  1027. unsigned int caps, config;
  1028. int pin_idx;
  1029. struct hdmi_spec_per_pin *per_pin;
  1030. int err;
  1031. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1032. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1033. return 0;
  1034. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1035. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1036. return 0;
  1037. if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
  1038. return -E2BIG;
  1039. pin_idx = spec->num_pins;
  1040. per_pin = &spec->pins[pin_idx];
  1041. per_pin->pin_nid = pin_nid;
  1042. per_pin->non_pcm = false;
  1043. err = hdmi_read_pin_conn(codec, pin_idx);
  1044. if (err < 0)
  1045. return err;
  1046. spec->num_pins++;
  1047. return 0;
  1048. }
  1049. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1050. {
  1051. struct hdmi_spec *spec = codec->spec;
  1052. int cvt_idx;
  1053. struct hdmi_spec_per_cvt *per_cvt;
  1054. unsigned int chans;
  1055. int err;
  1056. if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
  1057. return -E2BIG;
  1058. chans = get_wcaps(codec, cvt_nid);
  1059. chans = get_wcaps_channels(chans);
  1060. cvt_idx = spec->num_cvts;
  1061. per_cvt = &spec->cvts[cvt_idx];
  1062. per_cvt->cvt_nid = cvt_nid;
  1063. per_cvt->channels_min = 2;
  1064. if (chans <= 16) {
  1065. per_cvt->channels_max = chans;
  1066. if (chans > spec->channels_max)
  1067. spec->channels_max = chans;
  1068. }
  1069. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1070. &per_cvt->rates,
  1071. &per_cvt->formats,
  1072. &per_cvt->maxbps);
  1073. if (err < 0)
  1074. return err;
  1075. spec->num_cvts++;
  1076. return 0;
  1077. }
  1078. static int hdmi_parse_codec(struct hda_codec *codec)
  1079. {
  1080. hda_nid_t nid;
  1081. int i, nodes;
  1082. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1083. if (!nid || nodes < 0) {
  1084. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1085. return -EINVAL;
  1086. }
  1087. for (i = 0; i < nodes; i++, nid++) {
  1088. unsigned int caps;
  1089. unsigned int type;
  1090. caps = get_wcaps(codec, nid);
  1091. type = get_wcaps_type(caps);
  1092. if (!(caps & AC_WCAP_DIGITAL))
  1093. continue;
  1094. switch (type) {
  1095. case AC_WID_AUD_OUT:
  1096. hdmi_add_cvt(codec, nid);
  1097. break;
  1098. case AC_WID_PIN:
  1099. hdmi_add_pin(codec, nid);
  1100. break;
  1101. }
  1102. }
  1103. #ifdef CONFIG_PM
  1104. /* We're seeing some problems with unsolicited hot plug events on
  1105. * PantherPoint after S3, if this is not enabled */
  1106. if (codec->vendor_id == 0x80862806)
  1107. codec->bus->power_keep_link_on = 1;
  1108. /*
  1109. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1110. * can be lost and presence sense verb will become inaccurate if the
  1111. * HDA link is powered off at hot plug or hw initialization time.
  1112. */
  1113. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1114. AC_PWRST_EPSS))
  1115. codec->bus->power_keep_link_on = 1;
  1116. #endif
  1117. return 0;
  1118. }
  1119. /*
  1120. */
  1121. static char *get_hdmi_pcm_name(int idx)
  1122. {
  1123. static char names[MAX_HDMI_PINS][8];
  1124. sprintf(&names[idx][0], "HDMI %d", idx);
  1125. return &names[idx][0];
  1126. }
  1127. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1128. {
  1129. struct hda_spdif_out *spdif;
  1130. bool non_pcm;
  1131. mutex_lock(&codec->spdif_mutex);
  1132. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1133. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1134. mutex_unlock(&codec->spdif_mutex);
  1135. return non_pcm;
  1136. }
  1137. /*
  1138. * HDMI callbacks
  1139. */
  1140. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1141. struct hda_codec *codec,
  1142. unsigned int stream_tag,
  1143. unsigned int format,
  1144. struct snd_pcm_substream *substream)
  1145. {
  1146. hda_nid_t cvt_nid = hinfo->nid;
  1147. struct hdmi_spec *spec = codec->spec;
  1148. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1149. hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
  1150. int pinctl;
  1151. bool non_pcm;
  1152. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1153. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1154. hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
  1155. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  1156. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  1157. snd_hda_codec_write(codec, pin_nid, 0,
  1158. AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT);
  1159. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1160. }
  1161. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1162. struct hda_codec *codec,
  1163. struct snd_pcm_substream *substream)
  1164. {
  1165. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1166. return 0;
  1167. }
  1168. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1169. struct hda_codec *codec,
  1170. struct snd_pcm_substream *substream)
  1171. {
  1172. struct hdmi_spec *spec = codec->spec;
  1173. int cvt_idx, pin_idx;
  1174. struct hdmi_spec_per_cvt *per_cvt;
  1175. struct hdmi_spec_per_pin *per_pin;
  1176. int pinctl;
  1177. if (hinfo->nid) {
  1178. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1179. if (snd_BUG_ON(cvt_idx < 0))
  1180. return -EINVAL;
  1181. per_cvt = &spec->cvts[cvt_idx];
  1182. snd_BUG_ON(!per_cvt->assigned);
  1183. per_cvt->assigned = 0;
  1184. hinfo->nid = 0;
  1185. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1186. if (snd_BUG_ON(pin_idx < 0))
  1187. return -EINVAL;
  1188. per_pin = &spec->pins[pin_idx];
  1189. pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
  1190. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  1191. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  1192. AC_VERB_SET_PIN_WIDGET_CONTROL,
  1193. pinctl & ~PIN_OUT);
  1194. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1195. per_pin->chmap_set = false;
  1196. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1197. }
  1198. return 0;
  1199. }
  1200. static const struct hda_pcm_ops generic_ops = {
  1201. .open = hdmi_pcm_open,
  1202. .close = hdmi_pcm_close,
  1203. .prepare = generic_hdmi_playback_pcm_prepare,
  1204. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1205. };
  1206. /*
  1207. * ALSA API channel-map control callbacks
  1208. */
  1209. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1210. struct snd_ctl_elem_info *uinfo)
  1211. {
  1212. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1213. struct hda_codec *codec = info->private_data;
  1214. struct hdmi_spec *spec = codec->spec;
  1215. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1216. uinfo->count = spec->channels_max;
  1217. uinfo->value.integer.min = 0;
  1218. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1219. return 0;
  1220. }
  1221. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1222. unsigned int size, unsigned int __user *tlv)
  1223. {
  1224. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1225. struct hda_codec *codec = info->private_data;
  1226. struct hdmi_spec *spec = codec->spec;
  1227. const unsigned int valid_mask =
  1228. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1229. unsigned int __user *dst;
  1230. int chs, count = 0;
  1231. if (size < 8)
  1232. return -ENOMEM;
  1233. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1234. return -EFAULT;
  1235. size -= 8;
  1236. dst = tlv + 2;
  1237. for (chs = 2; chs <= spec->channels_max; chs++) {
  1238. int i, c;
  1239. struct cea_channel_speaker_allocation *cap;
  1240. cap = channel_allocations;
  1241. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1242. int chs_bytes = chs * 4;
  1243. if (cap->channels != chs)
  1244. continue;
  1245. if (cap->spk_mask & ~valid_mask)
  1246. continue;
  1247. if (size < 8)
  1248. return -ENOMEM;
  1249. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1250. put_user(chs_bytes, dst + 1))
  1251. return -EFAULT;
  1252. dst += 2;
  1253. size -= 8;
  1254. count += 8;
  1255. if (size < chs_bytes)
  1256. return -ENOMEM;
  1257. size -= chs_bytes;
  1258. count += chs_bytes;
  1259. for (c = 7; c >= 0; c--) {
  1260. int spk = cap->speakers[c];
  1261. if (!spk)
  1262. continue;
  1263. if (put_user(spk_to_chmap(spk), dst))
  1264. return -EFAULT;
  1265. dst++;
  1266. }
  1267. }
  1268. }
  1269. if (put_user(count, tlv + 1))
  1270. return -EFAULT;
  1271. return 0;
  1272. }
  1273. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1274. struct snd_ctl_elem_value *ucontrol)
  1275. {
  1276. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1277. struct hda_codec *codec = info->private_data;
  1278. struct hdmi_spec *spec = codec->spec;
  1279. int pin_idx = kcontrol->private_value;
  1280. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1281. int i;
  1282. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1283. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1284. return 0;
  1285. }
  1286. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1287. struct snd_ctl_elem_value *ucontrol)
  1288. {
  1289. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1290. struct hda_codec *codec = info->private_data;
  1291. struct hdmi_spec *spec = codec->spec;
  1292. int pin_idx = kcontrol->private_value;
  1293. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1294. unsigned int ctl_idx;
  1295. struct snd_pcm_substream *substream;
  1296. unsigned char chmap[8];
  1297. int i, ca, prepared = 0;
  1298. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1299. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1300. if (!substream || !substream->runtime)
  1301. return -EBADFD;
  1302. switch (substream->runtime->status->state) {
  1303. case SNDRV_PCM_STATE_OPEN:
  1304. case SNDRV_PCM_STATE_SETUP:
  1305. break;
  1306. case SNDRV_PCM_STATE_PREPARED:
  1307. prepared = 1;
  1308. break;
  1309. default:
  1310. return -EBUSY;
  1311. }
  1312. memset(chmap, 0, sizeof(chmap));
  1313. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1314. chmap[i] = ucontrol->value.integer.value[i];
  1315. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1316. return 0;
  1317. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1318. if (ca < 0)
  1319. return -EINVAL;
  1320. per_pin->chmap_set = true;
  1321. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1322. if (prepared)
  1323. hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
  1324. substream);
  1325. return 0;
  1326. }
  1327. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1328. {
  1329. struct hdmi_spec *spec = codec->spec;
  1330. int pin_idx;
  1331. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1332. struct hda_pcm *info;
  1333. struct hda_pcm_stream *pstr;
  1334. info = &spec->pcm_rec[pin_idx];
  1335. info->name = get_hdmi_pcm_name(pin_idx);
  1336. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1337. info->own_chmap = true;
  1338. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1339. pstr->substreams = 1;
  1340. pstr->ops = generic_ops;
  1341. /* other pstr fields are set in open */
  1342. }
  1343. codec->num_pcms = spec->num_pins;
  1344. codec->pcm_info = spec->pcm_rec;
  1345. return 0;
  1346. }
  1347. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1348. {
  1349. char hdmi_str[32] = "HDMI/DP";
  1350. struct hdmi_spec *spec = codec->spec;
  1351. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1352. int pcmdev = spec->pcm_rec[pin_idx].device;
  1353. if (pcmdev > 0)
  1354. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1355. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1356. }
  1357. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1358. {
  1359. struct hdmi_spec *spec = codec->spec;
  1360. int err;
  1361. int pin_idx;
  1362. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1363. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1364. err = generic_hdmi_build_jack(codec, pin_idx);
  1365. if (err < 0)
  1366. return err;
  1367. err = snd_hda_create_dig_out_ctls(codec,
  1368. per_pin->pin_nid,
  1369. per_pin->mux_nids[0],
  1370. HDA_PCM_TYPE_HDMI);
  1371. if (err < 0)
  1372. return err;
  1373. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1374. /* add control for ELD Bytes */
  1375. err = hdmi_create_eld_ctl(codec,
  1376. pin_idx,
  1377. spec->pcm_rec[pin_idx].device);
  1378. if (err < 0)
  1379. return err;
  1380. hdmi_present_sense(per_pin, 0);
  1381. }
  1382. /* add channel maps */
  1383. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1384. struct snd_pcm_chmap *chmap;
  1385. struct snd_kcontrol *kctl;
  1386. int i;
  1387. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1388. SNDRV_PCM_STREAM_PLAYBACK,
  1389. NULL, 0, pin_idx, &chmap);
  1390. if (err < 0)
  1391. return err;
  1392. /* override handlers */
  1393. chmap->private_data = codec;
  1394. kctl = chmap->kctl;
  1395. for (i = 0; i < kctl->count; i++)
  1396. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1397. kctl->info = hdmi_chmap_ctl_info;
  1398. kctl->get = hdmi_chmap_ctl_get;
  1399. kctl->put = hdmi_chmap_ctl_put;
  1400. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1401. }
  1402. return 0;
  1403. }
  1404. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1405. {
  1406. struct hdmi_spec *spec = codec->spec;
  1407. int pin_idx;
  1408. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1409. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1410. struct hdmi_eld *eld = &per_pin->sink_eld;
  1411. per_pin->codec = codec;
  1412. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1413. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1414. }
  1415. return 0;
  1416. }
  1417. static int generic_hdmi_init(struct hda_codec *codec)
  1418. {
  1419. struct hdmi_spec *spec = codec->spec;
  1420. int pin_idx;
  1421. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1422. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1423. hda_nid_t pin_nid = per_pin->pin_nid;
  1424. hdmi_init_pin(codec, pin_nid);
  1425. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1426. }
  1427. return 0;
  1428. }
  1429. static void generic_hdmi_free(struct hda_codec *codec)
  1430. {
  1431. struct hdmi_spec *spec = codec->spec;
  1432. int pin_idx;
  1433. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1434. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1435. struct hdmi_eld *eld = &per_pin->sink_eld;
  1436. cancel_delayed_work(&per_pin->work);
  1437. snd_hda_eld_proc_free(codec, eld);
  1438. }
  1439. flush_workqueue(codec->bus->workq);
  1440. kfree(spec);
  1441. }
  1442. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1443. .init = generic_hdmi_init,
  1444. .free = generic_hdmi_free,
  1445. .build_pcms = generic_hdmi_build_pcms,
  1446. .build_controls = generic_hdmi_build_controls,
  1447. .unsol_event = hdmi_unsol_event,
  1448. };
  1449. static int patch_generic_hdmi(struct hda_codec *codec)
  1450. {
  1451. struct hdmi_spec *spec;
  1452. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1453. if (spec == NULL)
  1454. return -ENOMEM;
  1455. codec->spec = spec;
  1456. if (hdmi_parse_codec(codec) < 0) {
  1457. codec->spec = NULL;
  1458. kfree(spec);
  1459. return -EINVAL;
  1460. }
  1461. codec->patch_ops = generic_hdmi_patch_ops;
  1462. generic_hdmi_init_per_pins(codec);
  1463. init_channel_allocations();
  1464. return 0;
  1465. }
  1466. /*
  1467. * Shared non-generic implementations
  1468. */
  1469. static int simple_playback_build_pcms(struct hda_codec *codec)
  1470. {
  1471. struct hdmi_spec *spec = codec->spec;
  1472. struct hda_pcm *info = spec->pcm_rec;
  1473. unsigned int chans;
  1474. struct hda_pcm_stream *pstr;
  1475. codec->num_pcms = 1;
  1476. codec->pcm_info = info;
  1477. chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
  1478. chans = get_wcaps_channels(chans);
  1479. info->name = get_hdmi_pcm_name(0);
  1480. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1481. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1482. *pstr = spec->pcm_playback;
  1483. pstr->nid = spec->cvts[0].cvt_nid;
  1484. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1485. pstr->channels_max = chans;
  1486. return 0;
  1487. }
  1488. /* unsolicited event for jack sensing */
  1489. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1490. unsigned int res)
  1491. {
  1492. snd_hda_jack_set_dirty_all(codec);
  1493. snd_hda_jack_report_sync(codec);
  1494. }
  1495. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1496. * as long as spec->pins[] is set correctly
  1497. */
  1498. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1499. static int simple_playback_build_controls(struct hda_codec *codec)
  1500. {
  1501. struct hdmi_spec *spec = codec->spec;
  1502. int err;
  1503. err = snd_hda_create_spdif_out_ctls(codec,
  1504. spec->cvts[0].cvt_nid,
  1505. spec->cvts[0].cvt_nid);
  1506. if (err < 0)
  1507. return err;
  1508. return simple_hdmi_build_jack(codec, 0);
  1509. }
  1510. static int simple_playback_init(struct hda_codec *codec)
  1511. {
  1512. struct hdmi_spec *spec = codec->spec;
  1513. hda_nid_t pin = spec->pins[0].pin_nid;
  1514. snd_hda_codec_write(codec, pin, 0,
  1515. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1516. /* some codecs require to unmute the pin */
  1517. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1518. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1519. AMP_OUT_UNMUTE);
  1520. snd_hda_jack_detect_enable(codec, pin, pin);
  1521. return 0;
  1522. }
  1523. static void simple_playback_free(struct hda_codec *codec)
  1524. {
  1525. struct hdmi_spec *spec = codec->spec;
  1526. kfree(spec);
  1527. }
  1528. /*
  1529. * Nvidia specific implementations
  1530. */
  1531. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1532. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1533. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1534. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1535. #define nvhdmi_master_con_nid_7x 0x04
  1536. #define nvhdmi_master_pin_nid_7x 0x05
  1537. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1538. /*front, rear, clfe, rear_surr */
  1539. 0x6, 0x8, 0xa, 0xc,
  1540. };
  1541. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1542. /* set audio protect on */
  1543. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1544. /* enable digital output on pin widget */
  1545. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1546. {} /* terminator */
  1547. };
  1548. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1549. /* set audio protect on */
  1550. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1551. /* enable digital output on pin widget */
  1552. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1553. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1554. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1555. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1556. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1557. {} /* terminator */
  1558. };
  1559. #ifdef LIMITED_RATE_FMT_SUPPORT
  1560. /* support only the safe format and rate */
  1561. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1562. #define SUPPORTED_MAXBPS 16
  1563. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1564. #else
  1565. /* support all rates and formats */
  1566. #define SUPPORTED_RATES \
  1567. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1568. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1569. SNDRV_PCM_RATE_192000)
  1570. #define SUPPORTED_MAXBPS 24
  1571. #define SUPPORTED_FORMATS \
  1572. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1573. #endif
  1574. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1575. {
  1576. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1577. return 0;
  1578. }
  1579. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1580. {
  1581. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1582. return 0;
  1583. }
  1584. static unsigned int channels_2_6_8[] = {
  1585. 2, 6, 8
  1586. };
  1587. static unsigned int channels_2_8[] = {
  1588. 2, 8
  1589. };
  1590. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1591. .count = ARRAY_SIZE(channels_2_6_8),
  1592. .list = channels_2_6_8,
  1593. .mask = 0,
  1594. };
  1595. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1596. .count = ARRAY_SIZE(channels_2_8),
  1597. .list = channels_2_8,
  1598. .mask = 0,
  1599. };
  1600. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1601. struct hda_codec *codec,
  1602. struct snd_pcm_substream *substream)
  1603. {
  1604. struct hdmi_spec *spec = codec->spec;
  1605. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1606. switch (codec->preset->id) {
  1607. case 0x10de0002:
  1608. case 0x10de0003:
  1609. case 0x10de0005:
  1610. case 0x10de0006:
  1611. hw_constraints_channels = &hw_constraints_2_8_channels;
  1612. break;
  1613. case 0x10de0007:
  1614. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1615. break;
  1616. default:
  1617. break;
  1618. }
  1619. if (hw_constraints_channels != NULL) {
  1620. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1621. SNDRV_PCM_HW_PARAM_CHANNELS,
  1622. hw_constraints_channels);
  1623. } else {
  1624. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1625. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1626. }
  1627. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1628. }
  1629. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1630. struct hda_codec *codec,
  1631. struct snd_pcm_substream *substream)
  1632. {
  1633. struct hdmi_spec *spec = codec->spec;
  1634. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1635. }
  1636. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1637. struct hda_codec *codec,
  1638. unsigned int stream_tag,
  1639. unsigned int format,
  1640. struct snd_pcm_substream *substream)
  1641. {
  1642. struct hdmi_spec *spec = codec->spec;
  1643. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1644. stream_tag, format, substream);
  1645. }
  1646. static const struct hda_pcm_stream simple_pcm_playback = {
  1647. .substreams = 1,
  1648. .channels_min = 2,
  1649. .channels_max = 2,
  1650. .ops = {
  1651. .open = simple_playback_pcm_open,
  1652. .close = simple_playback_pcm_close,
  1653. .prepare = simple_playback_pcm_prepare
  1654. },
  1655. };
  1656. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1657. .build_controls = simple_playback_build_controls,
  1658. .build_pcms = simple_playback_build_pcms,
  1659. .init = simple_playback_init,
  1660. .free = simple_playback_free,
  1661. .unsol_event = simple_hdmi_unsol_event,
  1662. };
  1663. static int patch_simple_hdmi(struct hda_codec *codec,
  1664. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1665. {
  1666. struct hdmi_spec *spec;
  1667. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1668. if (!spec)
  1669. return -ENOMEM;
  1670. codec->spec = spec;
  1671. spec->multiout.num_dacs = 0; /* no analog */
  1672. spec->multiout.max_channels = 2;
  1673. spec->multiout.dig_out_nid = cvt_nid;
  1674. spec->num_cvts = 1;
  1675. spec->num_pins = 1;
  1676. spec->cvts[0].cvt_nid = cvt_nid;
  1677. spec->pins[0].pin_nid = pin_nid;
  1678. spec->pcm_playback = simple_pcm_playback;
  1679. codec->patch_ops = simple_hdmi_patch_ops;
  1680. return 0;
  1681. }
  1682. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1683. int channels)
  1684. {
  1685. unsigned int chanmask;
  1686. int chan = channels ? (channels - 1) : 1;
  1687. switch (channels) {
  1688. default:
  1689. case 0:
  1690. case 2:
  1691. chanmask = 0x00;
  1692. break;
  1693. case 4:
  1694. chanmask = 0x08;
  1695. break;
  1696. case 6:
  1697. chanmask = 0x0b;
  1698. break;
  1699. case 8:
  1700. chanmask = 0x13;
  1701. break;
  1702. }
  1703. /* Set the audio infoframe channel allocation and checksum fields. The
  1704. * channel count is computed implicitly by the hardware. */
  1705. snd_hda_codec_write(codec, 0x1, 0,
  1706. Nv_VERB_SET_Channel_Allocation, chanmask);
  1707. snd_hda_codec_write(codec, 0x1, 0,
  1708. Nv_VERB_SET_Info_Frame_Checksum,
  1709. (0x71 - chan - chanmask));
  1710. }
  1711. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1712. struct hda_codec *codec,
  1713. struct snd_pcm_substream *substream)
  1714. {
  1715. struct hdmi_spec *spec = codec->spec;
  1716. int i;
  1717. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1718. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1719. for (i = 0; i < 4; i++) {
  1720. /* set the stream id */
  1721. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1722. AC_VERB_SET_CHANNEL_STREAMID, 0);
  1723. /* set the stream format */
  1724. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1725. AC_VERB_SET_STREAM_FORMAT, 0);
  1726. }
  1727. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  1728. * streams are disabled. */
  1729. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1730. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1731. }
  1732. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  1733. struct hda_codec *codec,
  1734. unsigned int stream_tag,
  1735. unsigned int format,
  1736. struct snd_pcm_substream *substream)
  1737. {
  1738. int chs;
  1739. unsigned int dataDCC2, channel_id;
  1740. int i;
  1741. struct hdmi_spec *spec = codec->spec;
  1742. struct hda_spdif_out *spdif;
  1743. mutex_lock(&codec->spdif_mutex);
  1744. spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
  1745. chs = substream->runtime->channels;
  1746. dataDCC2 = 0x2;
  1747. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  1748. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  1749. snd_hda_codec_write(codec,
  1750. nvhdmi_master_con_nid_7x,
  1751. 0,
  1752. AC_VERB_SET_DIGI_CONVERT_1,
  1753. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1754. /* set the stream id */
  1755. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1756. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  1757. /* set the stream format */
  1758. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1759. AC_VERB_SET_STREAM_FORMAT, format);
  1760. /* turn on again (if needed) */
  1761. /* enable and set the channel status audio/data flag */
  1762. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  1763. snd_hda_codec_write(codec,
  1764. nvhdmi_master_con_nid_7x,
  1765. 0,
  1766. AC_VERB_SET_DIGI_CONVERT_1,
  1767. spdif->ctls & 0xff);
  1768. snd_hda_codec_write(codec,
  1769. nvhdmi_master_con_nid_7x,
  1770. 0,
  1771. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1772. }
  1773. for (i = 0; i < 4; i++) {
  1774. if (chs == 2)
  1775. channel_id = 0;
  1776. else
  1777. channel_id = i * 2;
  1778. /* turn off SPDIF once;
  1779. *otherwise the IEC958 bits won't be updated
  1780. */
  1781. if (codec->spdif_status_reset &&
  1782. (spdif->ctls & AC_DIG1_ENABLE))
  1783. snd_hda_codec_write(codec,
  1784. nvhdmi_con_nids_7x[i],
  1785. 0,
  1786. AC_VERB_SET_DIGI_CONVERT_1,
  1787. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1788. /* set the stream id */
  1789. snd_hda_codec_write(codec,
  1790. nvhdmi_con_nids_7x[i],
  1791. 0,
  1792. AC_VERB_SET_CHANNEL_STREAMID,
  1793. (stream_tag << 4) | channel_id);
  1794. /* set the stream format */
  1795. snd_hda_codec_write(codec,
  1796. nvhdmi_con_nids_7x[i],
  1797. 0,
  1798. AC_VERB_SET_STREAM_FORMAT,
  1799. format);
  1800. /* turn on again (if needed) */
  1801. /* enable and set the channel status audio/data flag */
  1802. if (codec->spdif_status_reset &&
  1803. (spdif->ctls & AC_DIG1_ENABLE)) {
  1804. snd_hda_codec_write(codec,
  1805. nvhdmi_con_nids_7x[i],
  1806. 0,
  1807. AC_VERB_SET_DIGI_CONVERT_1,
  1808. spdif->ctls & 0xff);
  1809. snd_hda_codec_write(codec,
  1810. nvhdmi_con_nids_7x[i],
  1811. 0,
  1812. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1813. }
  1814. }
  1815. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  1816. mutex_unlock(&codec->spdif_mutex);
  1817. return 0;
  1818. }
  1819. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  1820. .substreams = 1,
  1821. .channels_min = 2,
  1822. .channels_max = 8,
  1823. .nid = nvhdmi_master_con_nid_7x,
  1824. .rates = SUPPORTED_RATES,
  1825. .maxbps = SUPPORTED_MAXBPS,
  1826. .formats = SUPPORTED_FORMATS,
  1827. .ops = {
  1828. .open = simple_playback_pcm_open,
  1829. .close = nvhdmi_8ch_7x_pcm_close,
  1830. .prepare = nvhdmi_8ch_7x_pcm_prepare
  1831. },
  1832. };
  1833. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  1834. {
  1835. struct hdmi_spec *spec;
  1836. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  1837. nvhdmi_master_pin_nid_7x);
  1838. if (err < 0)
  1839. return err;
  1840. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  1841. /* override the PCM rates, etc, as the codec doesn't give full list */
  1842. spec = codec->spec;
  1843. spec->pcm_playback.rates = SUPPORTED_RATES;
  1844. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  1845. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  1846. return 0;
  1847. }
  1848. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  1849. {
  1850. struct hdmi_spec *spec = codec->spec;
  1851. int err = simple_playback_build_pcms(codec);
  1852. spec->pcm_rec[0].own_chmap = true;
  1853. return err;
  1854. }
  1855. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  1856. {
  1857. struct hdmi_spec *spec = codec->spec;
  1858. struct snd_pcm_chmap *chmap;
  1859. int err;
  1860. err = simple_playback_build_controls(codec);
  1861. if (err < 0)
  1862. return err;
  1863. /* add channel maps */
  1864. err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
  1865. SNDRV_PCM_STREAM_PLAYBACK,
  1866. snd_pcm_alt_chmaps, 8, 0, &chmap);
  1867. if (err < 0)
  1868. return err;
  1869. switch (codec->preset->id) {
  1870. case 0x10de0002:
  1871. case 0x10de0003:
  1872. case 0x10de0005:
  1873. case 0x10de0006:
  1874. chmap->channel_mask = (1U << 2) | (1U << 8);
  1875. break;
  1876. case 0x10de0007:
  1877. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  1878. }
  1879. return 0;
  1880. }
  1881. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  1882. {
  1883. struct hdmi_spec *spec;
  1884. int err = patch_nvhdmi_2ch(codec);
  1885. if (err < 0)
  1886. return err;
  1887. spec = codec->spec;
  1888. spec->multiout.max_channels = 8;
  1889. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  1890. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  1891. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  1892. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  1893. /* Initialize the audio infoframe channel mask and checksum to something
  1894. * valid */
  1895. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1896. return 0;
  1897. }
  1898. /*
  1899. * ATI-specific implementations
  1900. *
  1901. * FIXME: we may omit the whole this and use the generic code once after
  1902. * it's confirmed to work.
  1903. */
  1904. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  1905. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  1906. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1907. struct hda_codec *codec,
  1908. unsigned int stream_tag,
  1909. unsigned int format,
  1910. struct snd_pcm_substream *substream)
  1911. {
  1912. struct hdmi_spec *spec = codec->spec;
  1913. int chans = substream->runtime->channels;
  1914. int i, err;
  1915. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  1916. substream);
  1917. if (err < 0)
  1918. return err;
  1919. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  1920. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  1921. /* FIXME: XXX */
  1922. for (i = 0; i < chans; i++) {
  1923. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  1924. AC_VERB_SET_HDMI_CHAN_SLOT,
  1925. (i << 4) | i);
  1926. }
  1927. return 0;
  1928. }
  1929. static int patch_atihdmi(struct hda_codec *codec)
  1930. {
  1931. struct hdmi_spec *spec;
  1932. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  1933. if (err < 0)
  1934. return err;
  1935. spec = codec->spec;
  1936. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  1937. return 0;
  1938. }
  1939. /* VIA HDMI Implementation */
  1940. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  1941. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  1942. static int patch_via_hdmi(struct hda_codec *codec)
  1943. {
  1944. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  1945. }
  1946. /*
  1947. * patch entries
  1948. */
  1949. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  1950. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  1951. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  1952. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  1953. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  1954. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  1955. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  1956. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  1957. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1958. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1959. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1960. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1961. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  1962. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  1963. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  1964. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  1965. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  1966. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  1967. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  1968. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  1969. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  1970. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  1971. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  1972. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  1973. /* 17 is known to be absent */
  1974. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  1975. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  1976. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  1977. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  1978. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  1979. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  1980. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  1981. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  1982. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  1983. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  1984. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  1985. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  1986. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  1987. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  1988. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  1989. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  1990. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  1991. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  1992. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  1993. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  1994. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  1995. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  1996. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  1997. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  1998. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  1999. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2000. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2001. {} /* terminator */
  2002. };
  2003. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2004. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2005. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2006. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2007. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2008. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2009. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2010. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2011. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2012. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2013. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2014. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2015. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2016. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2017. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2018. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2019. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2020. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2021. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2022. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2023. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2024. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2025. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2026. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2027. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2028. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2029. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2030. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2031. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2032. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2033. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2034. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2035. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2036. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2037. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2038. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2039. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2040. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2041. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2042. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2043. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2044. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2045. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2046. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2047. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2048. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2049. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2050. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2051. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2052. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2053. MODULE_LICENSE("GPL");
  2054. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2055. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2056. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2057. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2058. static struct hda_codec_preset_list intel_list = {
  2059. .preset = snd_hda_preset_hdmi,
  2060. .owner = THIS_MODULE,
  2061. };
  2062. static int __init patch_hdmi_init(void)
  2063. {
  2064. return snd_hda_add_codec_preset(&intel_list);
  2065. }
  2066. static void __exit patch_hdmi_exit(void)
  2067. {
  2068. snd_hda_delete_codec_preset(&intel_list);
  2069. }
  2070. module_init(patch_hdmi_init)
  2071. module_exit(patch_hdmi_exit)