bfin_uart.c 40 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2011 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #define DRIVER_NAME "bfin-uart"
  14. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/ioport.h>
  17. #include <linux/gfp.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/console.h>
  21. #include <linux/sysrq.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/serial_core.h>
  26. #include <linux/gpio.h>
  27. #include <linux/irq.h>
  28. #include <linux/kgdb.h>
  29. #include <linux/slab.h>
  30. #include <linux/dma-mapping.h>
  31. #include <asm/portmux.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/dma.h>
  34. #include <asm/bfin_serial.h>
  35. #ifdef CONFIG_SERIAL_BFIN_MODULE
  36. # undef CONFIG_EARLY_PRINTK
  37. #endif
  38. #ifdef CONFIG_SERIAL_BFIN_MODULE
  39. # undef CONFIG_EARLY_PRINTK
  40. #endif
  41. /* UART name and device definitions */
  42. #define BFIN_SERIAL_DEV_NAME "ttyBF"
  43. #define BFIN_SERIAL_MAJOR 204
  44. #define BFIN_SERIAL_MINOR 64
  45. static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  46. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  47. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  48. # ifndef CONFIG_SERIAL_BFIN_PIO
  49. # error KGDB only support UART in PIO mode.
  50. # endif
  51. static int kgdboc_port_line;
  52. static int kgdboc_break_enabled;
  53. #endif
  54. /*
  55. * Setup for console. Argument comes from the menuconfig
  56. */
  57. #define DMA_RX_XCOUNT 512
  58. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  59. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  60. #ifdef CONFIG_SERIAL_BFIN_DMA
  61. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  62. #else
  63. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  64. #endif
  65. static void bfin_serial_reset_irda(struct uart_port *port);
  66. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  67. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  68. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  69. {
  70. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  71. if (uart->cts_pin < 0)
  72. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  73. /* CTS PIN is negative assertive. */
  74. if (UART_GET_CTS(uart))
  75. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  76. else
  77. return TIOCM_DSR | TIOCM_CAR;
  78. }
  79. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  80. {
  81. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  82. if (uart->rts_pin < 0)
  83. return;
  84. /* RTS PIN is negative assertive. */
  85. if (mctrl & TIOCM_RTS)
  86. UART_ENABLE_RTS(uart);
  87. else
  88. UART_DISABLE_RTS(uart);
  89. }
  90. /*
  91. * Handle any change of modem status signal.
  92. */
  93. static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
  94. {
  95. struct bfin_serial_port *uart = dev_id;
  96. unsigned int status = bfin_serial_get_mctrl(&uart->port);
  97. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  98. struct tty_struct *tty = uart->port.state->port.tty;
  99. UART_CLEAR_SCTS(uart);
  100. if (tty->hw_stopped) {
  101. if (status) {
  102. tty->hw_stopped = 0;
  103. uart_write_wakeup(&uart->port);
  104. }
  105. } else {
  106. if (!status)
  107. tty->hw_stopped = 1;
  108. }
  109. #endif
  110. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  111. return IRQ_HANDLED;
  112. }
  113. #else
  114. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  115. {
  116. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  117. }
  118. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  119. {
  120. }
  121. #endif
  122. /*
  123. * interrupts are disabled on entry
  124. */
  125. static void bfin_serial_stop_tx(struct uart_port *port)
  126. {
  127. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  128. #ifdef CONFIG_SERIAL_BFIN_DMA
  129. struct circ_buf *xmit = &uart->port.state->xmit;
  130. #endif
  131. while (!(UART_GET_LSR(uart) & TEMT))
  132. cpu_relax();
  133. #ifdef CONFIG_SERIAL_BFIN_DMA
  134. disable_dma(uart->tx_dma_channel);
  135. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  136. uart->port.icount.tx += uart->tx_count;
  137. uart->tx_count = 0;
  138. uart->tx_done = 1;
  139. #else
  140. #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  141. /* Clear TFI bit */
  142. UART_PUT_LSR(uart, TFI);
  143. #endif
  144. UART_CLEAR_IER(uart, ETBEI);
  145. #endif
  146. }
  147. /*
  148. * port is locked and interrupts are disabled
  149. */
  150. static void bfin_serial_start_tx(struct uart_port *port)
  151. {
  152. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  153. struct tty_struct *tty = uart->port.state->port.tty;
  154. /*
  155. * To avoid losting RX interrupt, we reset IR function
  156. * before sending data.
  157. */
  158. if (tty->termios.c_line == N_IRDA)
  159. bfin_serial_reset_irda(port);
  160. #ifdef CONFIG_SERIAL_BFIN_DMA
  161. if (uart->tx_done)
  162. bfin_serial_dma_tx_chars(uart);
  163. #else
  164. UART_SET_IER(uart, ETBEI);
  165. bfin_serial_tx_chars(uart);
  166. #endif
  167. }
  168. /*
  169. * Interrupts are enabled
  170. */
  171. static void bfin_serial_stop_rx(struct uart_port *port)
  172. {
  173. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  174. UART_CLEAR_IER(uart, ERBFI);
  175. }
  176. /*
  177. * Set the modem control timer to fire immediately.
  178. */
  179. static void bfin_serial_enable_ms(struct uart_port *port)
  180. {
  181. }
  182. #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
  183. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  184. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  185. #else
  186. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  187. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  188. #endif
  189. #ifdef CONFIG_SERIAL_BFIN_PIO
  190. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  191. {
  192. struct tty_struct *tty = NULL;
  193. unsigned int status, ch, flg;
  194. static struct timeval anomaly_start = { .tv_sec = 0 };
  195. status = UART_GET_LSR(uart);
  196. UART_CLEAR_LSR(uart);
  197. ch = UART_GET_CHAR(uart);
  198. uart->port.icount.rx++;
  199. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  200. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  201. if (kgdb_connected && kgdboc_port_line == uart->port.line
  202. && kgdboc_break_enabled)
  203. if (ch == 0x3) {/* Ctrl + C */
  204. kgdb_breakpoint();
  205. return;
  206. }
  207. if (!uart->port.state || !uart->port.state->port.tty)
  208. return;
  209. #endif
  210. tty = uart->port.state->port.tty;
  211. if (ANOMALY_05000363) {
  212. /* The BF533 (and BF561) family of processors have a nice anomaly
  213. * where they continuously generate characters for a "single" break.
  214. * We have to basically ignore this flood until the "next" valid
  215. * character comes across. Due to the nature of the flood, it is
  216. * not possible to reliably catch bytes that are sent too quickly
  217. * after this break. So application code talking to the Blackfin
  218. * which sends a break signal must allow at least 1.5 character
  219. * times after the end of the break for things to stabilize. This
  220. * timeout was picked as it must absolutely be larger than 1
  221. * character time +/- some percent. So 1.5 sounds good. All other
  222. * Blackfin families operate properly. Woo.
  223. */
  224. if (anomaly_start.tv_sec) {
  225. struct timeval curr;
  226. suseconds_t usecs;
  227. if ((~ch & (~ch + 1)) & 0xff)
  228. goto known_good_char;
  229. do_gettimeofday(&curr);
  230. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  231. goto known_good_char;
  232. usecs = 0;
  233. if (curr.tv_sec != anomaly_start.tv_sec)
  234. usecs += USEC_PER_SEC;
  235. usecs += curr.tv_usec - anomaly_start.tv_usec;
  236. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  237. goto known_good_char;
  238. if (ch)
  239. anomaly_start.tv_sec = 0;
  240. else
  241. anomaly_start = curr;
  242. return;
  243. known_good_char:
  244. status &= ~BI;
  245. anomaly_start.tv_sec = 0;
  246. }
  247. }
  248. if (status & BI) {
  249. if (ANOMALY_05000363)
  250. if (bfin_revid() < 5)
  251. do_gettimeofday(&anomaly_start);
  252. uart->port.icount.brk++;
  253. if (uart_handle_break(&uart->port))
  254. goto ignore_char;
  255. status &= ~(PE | FE);
  256. }
  257. if (status & PE)
  258. uart->port.icount.parity++;
  259. if (status & OE)
  260. uart->port.icount.overrun++;
  261. if (status & FE)
  262. uart->port.icount.frame++;
  263. status &= uart->port.read_status_mask;
  264. if (status & BI)
  265. flg = TTY_BREAK;
  266. else if (status & PE)
  267. flg = TTY_PARITY;
  268. else if (status & FE)
  269. flg = TTY_FRAME;
  270. else
  271. flg = TTY_NORMAL;
  272. if (uart_handle_sysrq_char(&uart->port, ch))
  273. goto ignore_char;
  274. uart_insert_char(&uart->port, status, OE, ch, flg);
  275. ignore_char:
  276. tty_flip_buffer_push(tty);
  277. }
  278. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  279. {
  280. struct circ_buf *xmit = &uart->port.state->xmit;
  281. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  282. #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
  283. /* Clear TFI bit */
  284. UART_PUT_LSR(uart, TFI);
  285. #endif
  286. /* Anomaly notes:
  287. * 05000215 - we always clear ETBEI within last UART TX
  288. * interrupt to end a string. It is always set
  289. * when start a new tx.
  290. */
  291. UART_CLEAR_IER(uart, ETBEI);
  292. return;
  293. }
  294. if (uart->port.x_char) {
  295. UART_PUT_CHAR(uart, uart->port.x_char);
  296. uart->port.icount.tx++;
  297. uart->port.x_char = 0;
  298. }
  299. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  300. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  301. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  302. uart->port.icount.tx++;
  303. }
  304. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  305. uart_write_wakeup(&uart->port);
  306. }
  307. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  308. {
  309. struct bfin_serial_port *uart = dev_id;
  310. while (UART_GET_LSR(uart) & DR)
  311. bfin_serial_rx_chars(uart);
  312. return IRQ_HANDLED;
  313. }
  314. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  315. {
  316. struct bfin_serial_port *uart = dev_id;
  317. spin_lock(&uart->port.lock);
  318. if (UART_GET_LSR(uart) & THRE)
  319. bfin_serial_tx_chars(uart);
  320. spin_unlock(&uart->port.lock);
  321. return IRQ_HANDLED;
  322. }
  323. #endif
  324. #ifdef CONFIG_SERIAL_BFIN_DMA
  325. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  326. {
  327. struct circ_buf *xmit = &uart->port.state->xmit;
  328. uart->tx_done = 0;
  329. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  330. uart->tx_count = 0;
  331. uart->tx_done = 1;
  332. return;
  333. }
  334. if (uart->port.x_char) {
  335. UART_PUT_CHAR(uart, uart->port.x_char);
  336. uart->port.icount.tx++;
  337. uart->port.x_char = 0;
  338. }
  339. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  340. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  341. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  342. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  343. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  344. set_dma_config(uart->tx_dma_channel,
  345. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  346. INTR_ON_BUF,
  347. DIMENSION_LINEAR,
  348. DATA_SIZE_8,
  349. DMA_SYNC_RESTART));
  350. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  351. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  352. set_dma_x_modify(uart->tx_dma_channel, 1);
  353. SSYNC();
  354. enable_dma(uart->tx_dma_channel);
  355. UART_SET_IER(uart, ETBEI);
  356. }
  357. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  358. {
  359. struct tty_struct *tty = uart->port.state->port.tty;
  360. int i, flg, status;
  361. status = UART_GET_LSR(uart);
  362. UART_CLEAR_LSR(uart);
  363. uart->port.icount.rx +=
  364. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  365. UART_XMIT_SIZE);
  366. if (status & BI) {
  367. uart->port.icount.brk++;
  368. if (uart_handle_break(&uart->port))
  369. goto dma_ignore_char;
  370. status &= ~(PE | FE);
  371. }
  372. if (status & PE)
  373. uart->port.icount.parity++;
  374. if (status & OE)
  375. uart->port.icount.overrun++;
  376. if (status & FE)
  377. uart->port.icount.frame++;
  378. status &= uart->port.read_status_mask;
  379. if (status & BI)
  380. flg = TTY_BREAK;
  381. else if (status & PE)
  382. flg = TTY_PARITY;
  383. else if (status & FE)
  384. flg = TTY_FRAME;
  385. else
  386. flg = TTY_NORMAL;
  387. for (i = uart->rx_dma_buf.tail; ; i++) {
  388. if (i >= UART_XMIT_SIZE)
  389. i = 0;
  390. if (i == uart->rx_dma_buf.head)
  391. break;
  392. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  393. uart_insert_char(&uart->port, status, OE,
  394. uart->rx_dma_buf.buf[i], flg);
  395. }
  396. dma_ignore_char:
  397. tty_flip_buffer_push(tty);
  398. }
  399. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  400. {
  401. int x_pos, pos;
  402. unsigned long flags;
  403. spin_lock_irqsave(&uart->rx_lock, flags);
  404. /* 2D DMA RX buffer ring is used. Because curr_y_count and
  405. * curr_x_count can't be read as an atomic operation,
  406. * curr_y_count should be read before curr_x_count. When
  407. * curr_x_count is read, curr_y_count may already indicate
  408. * next buffer line. But, the position calculated here is
  409. * still indicate the old line. The wrong position data may
  410. * be smaller than current buffer tail, which cause garbages
  411. * are received if it is not prohibit.
  412. */
  413. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  414. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  415. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  416. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  417. uart->rx_dma_nrows = 0;
  418. x_pos = DMA_RX_XCOUNT - x_pos;
  419. if (x_pos == DMA_RX_XCOUNT)
  420. x_pos = 0;
  421. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  422. /* Ignore receiving data if new position is in the same line of
  423. * current buffer tail and small.
  424. */
  425. if (pos > uart->rx_dma_buf.tail ||
  426. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  427. uart->rx_dma_buf.head = pos;
  428. bfin_serial_dma_rx_chars(uart);
  429. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  430. }
  431. spin_unlock_irqrestore(&uart->rx_lock, flags);
  432. mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
  433. }
  434. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  435. {
  436. struct bfin_serial_port *uart = dev_id;
  437. struct circ_buf *xmit = &uart->port.state->xmit;
  438. spin_lock(&uart->port.lock);
  439. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  440. disable_dma(uart->tx_dma_channel);
  441. clear_dma_irqstat(uart->tx_dma_channel);
  442. /* Anomaly notes:
  443. * 05000215 - we always clear ETBEI within last UART TX
  444. * interrupt to end a string. It is always set
  445. * when start a new tx.
  446. */
  447. UART_CLEAR_IER(uart, ETBEI);
  448. uart->port.icount.tx += uart->tx_count;
  449. if (!(xmit->tail == 0 && xmit->head == 0)) {
  450. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  451. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  452. uart_write_wakeup(&uart->port);
  453. }
  454. bfin_serial_dma_tx_chars(uart);
  455. }
  456. spin_unlock(&uart->port.lock);
  457. return IRQ_HANDLED;
  458. }
  459. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  460. {
  461. struct bfin_serial_port *uart = dev_id;
  462. unsigned int irqstat;
  463. int x_pos, pos;
  464. spin_lock(&uart->rx_lock);
  465. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  466. clear_dma_irqstat(uart->rx_dma_channel);
  467. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  468. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  469. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  470. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  471. uart->rx_dma_nrows = 0;
  472. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
  473. if (pos > uart->rx_dma_buf.tail ||
  474. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  475. uart->rx_dma_buf.head = pos;
  476. bfin_serial_dma_rx_chars(uart);
  477. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  478. }
  479. spin_unlock(&uart->rx_lock);
  480. return IRQ_HANDLED;
  481. }
  482. #endif
  483. /*
  484. * Return TIOCSER_TEMT when transmitter is not busy.
  485. */
  486. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  487. {
  488. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  489. unsigned int lsr;
  490. lsr = UART_GET_LSR(uart);
  491. if (lsr & TEMT)
  492. return TIOCSER_TEMT;
  493. else
  494. return 0;
  495. }
  496. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  497. {
  498. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  499. u32 lcr = UART_GET_LCR(uart);
  500. if (break_state)
  501. lcr |= SB;
  502. else
  503. lcr &= ~SB;
  504. UART_PUT_LCR(uart, lcr);
  505. SSYNC();
  506. }
  507. static int bfin_serial_startup(struct uart_port *port)
  508. {
  509. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  510. #ifdef CONFIG_SERIAL_BFIN_DMA
  511. dma_addr_t dma_handle;
  512. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  513. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  514. return -EBUSY;
  515. }
  516. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  517. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  518. free_dma(uart->rx_dma_channel);
  519. return -EBUSY;
  520. }
  521. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  522. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  523. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  524. uart->rx_dma_buf.head = 0;
  525. uart->rx_dma_buf.tail = 0;
  526. uart->rx_dma_nrows = 0;
  527. set_dma_config(uart->rx_dma_channel,
  528. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  529. INTR_ON_ROW, DIMENSION_2D,
  530. DATA_SIZE_8,
  531. DMA_SYNC_RESTART));
  532. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  533. set_dma_x_modify(uart->rx_dma_channel, 1);
  534. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  535. set_dma_y_modify(uart->rx_dma_channel, 1);
  536. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  537. enable_dma(uart->rx_dma_channel);
  538. uart->rx_dma_timer.data = (unsigned long)(uart);
  539. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  540. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  541. add_timer(&(uart->rx_dma_timer));
  542. #else
  543. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  544. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  545. if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
  546. kgdboc_break_enabled = 0;
  547. else {
  548. # endif
  549. if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
  550. "BFIN_UART_RX", uart)) {
  551. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  552. return -EBUSY;
  553. }
  554. if (request_irq
  555. (uart->tx_irq, bfin_serial_tx_int, 0,
  556. "BFIN_UART_TX", uart)) {
  557. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  558. free_irq(uart->rx_irq, uart);
  559. return -EBUSY;
  560. }
  561. # ifdef CONFIG_BF54x
  562. {
  563. /*
  564. * UART2 and UART3 on BF548 share interrupt PINs and DMA
  565. * controllers with SPORT2 and SPORT3. UART rx and tx
  566. * interrupts are generated in PIO mode only when configure
  567. * their peripheral mapping registers properly, which means
  568. * request corresponding DMA channels in PIO mode as well.
  569. */
  570. unsigned uart_dma_ch_rx, uart_dma_ch_tx;
  571. switch (uart->rx_irq) {
  572. case IRQ_UART3_RX:
  573. uart_dma_ch_rx = CH_UART3_RX;
  574. uart_dma_ch_tx = CH_UART3_TX;
  575. break;
  576. case IRQ_UART2_RX:
  577. uart_dma_ch_rx = CH_UART2_RX;
  578. uart_dma_ch_tx = CH_UART2_TX;
  579. break;
  580. default:
  581. uart_dma_ch_rx = uart_dma_ch_tx = 0;
  582. break;
  583. };
  584. if (uart_dma_ch_rx &&
  585. request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
  586. printk(KERN_NOTICE"Fail to attach UART interrupt\n");
  587. free_irq(uart->rx_irq, uart);
  588. free_irq(uart->tx_irq, uart);
  589. return -EBUSY;
  590. }
  591. if (uart_dma_ch_tx &&
  592. request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
  593. printk(KERN_NOTICE "Fail to attach UART interrupt\n");
  594. free_dma(uart_dma_ch_rx);
  595. free_irq(uart->rx_irq, uart);
  596. free_irq(uart->tx_irq, uart);
  597. return -EBUSY;
  598. }
  599. }
  600. # endif
  601. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  602. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  603. }
  604. # endif
  605. #endif
  606. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  607. if (uart->cts_pin >= 0) {
  608. if (request_irq(gpio_to_irq(uart->cts_pin),
  609. bfin_serial_mctrl_cts_int,
  610. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
  611. 0, "BFIN_UART_CTS", uart)) {
  612. uart->cts_pin = -1;
  613. pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
  614. }
  615. }
  616. if (uart->rts_pin >= 0) {
  617. if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
  618. pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
  619. uart->rts_pin = -1;
  620. } else
  621. gpio_direction_output(uart->rts_pin, 0);
  622. }
  623. #endif
  624. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  625. if (uart->cts_pin >= 0) {
  626. if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
  627. IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
  628. uart->cts_pin = -1;
  629. dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
  630. }
  631. /* CTS RTS PINs are negative assertive. */
  632. UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
  633. UART_SET_IER(uart, EDSSI);
  634. }
  635. #endif
  636. UART_SET_IER(uart, ERBFI);
  637. return 0;
  638. }
  639. static void bfin_serial_shutdown(struct uart_port *port)
  640. {
  641. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  642. #ifdef CONFIG_SERIAL_BFIN_DMA
  643. disable_dma(uart->tx_dma_channel);
  644. free_dma(uart->tx_dma_channel);
  645. disable_dma(uart->rx_dma_channel);
  646. free_dma(uart->rx_dma_channel);
  647. del_timer(&(uart->rx_dma_timer));
  648. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  649. #else
  650. #ifdef CONFIG_BF54x
  651. switch (uart->port.irq) {
  652. case IRQ_UART3_RX:
  653. free_dma(CH_UART3_RX);
  654. free_dma(CH_UART3_TX);
  655. break;
  656. case IRQ_UART2_RX:
  657. free_dma(CH_UART2_RX);
  658. free_dma(CH_UART2_TX);
  659. break;
  660. default:
  661. break;
  662. };
  663. #endif
  664. free_irq(uart->rx_irq, uart);
  665. free_irq(uart->tx_irq, uart);
  666. #endif
  667. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  668. if (uart->cts_pin >= 0)
  669. free_irq(gpio_to_irq(uart->cts_pin), uart);
  670. if (uart->rts_pin >= 0)
  671. gpio_free(uart->rts_pin);
  672. #endif
  673. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  674. if (uart->cts_pin >= 0)
  675. free_irq(uart->status_irq, uart);
  676. #endif
  677. }
  678. static void
  679. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  680. struct ktermios *old)
  681. {
  682. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  683. unsigned long flags;
  684. unsigned int baud, quot;
  685. unsigned int ier, lcr = 0;
  686. switch (termios->c_cflag & CSIZE) {
  687. case CS8:
  688. lcr = WLS(8);
  689. break;
  690. case CS7:
  691. lcr = WLS(7);
  692. break;
  693. case CS6:
  694. lcr = WLS(6);
  695. break;
  696. case CS5:
  697. lcr = WLS(5);
  698. break;
  699. default:
  700. printk(KERN_ERR "%s: word lengh not supported\n",
  701. __func__);
  702. }
  703. /* Anomaly notes:
  704. * 05000231 - STOP bit is always set to 1 whatever the user is set.
  705. */
  706. if (termios->c_cflag & CSTOPB) {
  707. if (ANOMALY_05000231)
  708. printk(KERN_WARNING "STOP bits other than 1 is not "
  709. "supported in case of anomaly 05000231.\n");
  710. else
  711. lcr |= STB;
  712. }
  713. if (termios->c_cflag & PARENB)
  714. lcr |= PEN;
  715. if (!(termios->c_cflag & PARODD))
  716. lcr |= EPS;
  717. if (termios->c_cflag & CMSPAR)
  718. lcr |= STP;
  719. spin_lock_irqsave(&uart->port.lock, flags);
  720. port->read_status_mask = OE;
  721. if (termios->c_iflag & INPCK)
  722. port->read_status_mask |= (FE | PE);
  723. if (termios->c_iflag & (BRKINT | PARMRK))
  724. port->read_status_mask |= BI;
  725. /*
  726. * Characters to ignore
  727. */
  728. port->ignore_status_mask = 0;
  729. if (termios->c_iflag & IGNPAR)
  730. port->ignore_status_mask |= FE | PE;
  731. if (termios->c_iflag & IGNBRK) {
  732. port->ignore_status_mask |= BI;
  733. /*
  734. * If we're ignoring parity and break indicators,
  735. * ignore overruns too (for real raw support).
  736. */
  737. if (termios->c_iflag & IGNPAR)
  738. port->ignore_status_mask |= OE;
  739. }
  740. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  741. quot = uart_get_divisor(port, baud);
  742. /* If discipline is not IRDA, apply ANOMALY_05000230 */
  743. if (termios->c_line != N_IRDA)
  744. quot -= ANOMALY_05000230;
  745. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  746. /* Disable UART */
  747. ier = UART_GET_IER(uart);
  748. UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
  749. UART_DISABLE_INTS(uart);
  750. /* Set DLAB in LCR to Access CLK */
  751. UART_SET_DLAB(uart);
  752. UART_PUT_CLK(uart, quot);
  753. SSYNC();
  754. /* Clear DLAB in LCR to Access THR RBR IER */
  755. UART_CLEAR_DLAB(uart);
  756. UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
  757. /* Enable UART */
  758. UART_ENABLE_INTS(uart, ier);
  759. UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
  760. /* Port speed changed, update the per-port timeout. */
  761. uart_update_timeout(port, termios->c_cflag, baud);
  762. spin_unlock_irqrestore(&uart->port.lock, flags);
  763. }
  764. static const char *bfin_serial_type(struct uart_port *port)
  765. {
  766. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  767. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  768. }
  769. /*
  770. * Release the memory region(s) being used by 'port'.
  771. */
  772. static void bfin_serial_release_port(struct uart_port *port)
  773. {
  774. }
  775. /*
  776. * Request the memory region(s) being used by 'port'.
  777. */
  778. static int bfin_serial_request_port(struct uart_port *port)
  779. {
  780. return 0;
  781. }
  782. /*
  783. * Configure/autoconfigure the port.
  784. */
  785. static void bfin_serial_config_port(struct uart_port *port, int flags)
  786. {
  787. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  788. if (flags & UART_CONFIG_TYPE &&
  789. bfin_serial_request_port(&uart->port) == 0)
  790. uart->port.type = PORT_BFIN;
  791. }
  792. /*
  793. * Verify the new serial_struct (for TIOCSSERIAL).
  794. * The only change we allow are to the flags and type, and
  795. * even then only between PORT_BFIN and PORT_UNKNOWN
  796. */
  797. static int
  798. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  799. {
  800. return 0;
  801. }
  802. /*
  803. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  804. * In other cases, disable IrDA function.
  805. */
  806. static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
  807. {
  808. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  809. unsigned int val;
  810. switch (ld) {
  811. case N_IRDA:
  812. val = UART_GET_GCTL(uart);
  813. val |= (UMOD_IRDA | RPOLC);
  814. UART_PUT_GCTL(uart, val);
  815. break;
  816. default:
  817. val = UART_GET_GCTL(uart);
  818. val &= ~(UMOD_MASK | RPOLC);
  819. UART_PUT_GCTL(uart, val);
  820. }
  821. }
  822. static void bfin_serial_reset_irda(struct uart_port *port)
  823. {
  824. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  825. unsigned int val;
  826. val = UART_GET_GCTL(uart);
  827. val &= ~(UMOD_MASK | RPOLC);
  828. UART_PUT_GCTL(uart, val);
  829. SSYNC();
  830. val |= (UMOD_IRDA | RPOLC);
  831. UART_PUT_GCTL(uart, val);
  832. SSYNC();
  833. }
  834. #ifdef CONFIG_CONSOLE_POLL
  835. /* Anomaly notes:
  836. * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
  837. * losing other bits of UART_LSR is not a problem here.
  838. */
  839. static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
  840. {
  841. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  842. while (!(UART_GET_LSR(uart) & THRE))
  843. cpu_relax();
  844. UART_CLEAR_DLAB(uart);
  845. UART_PUT_CHAR(uart, (unsigned char)chr);
  846. }
  847. static int bfin_serial_poll_get_char(struct uart_port *port)
  848. {
  849. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  850. unsigned char chr;
  851. while (!(UART_GET_LSR(uart) & DR))
  852. cpu_relax();
  853. UART_CLEAR_DLAB(uart);
  854. chr = UART_GET_CHAR(uart);
  855. return chr;
  856. }
  857. #endif
  858. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  859. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  860. static void bfin_kgdboc_port_shutdown(struct uart_port *port)
  861. {
  862. if (kgdboc_break_enabled) {
  863. kgdboc_break_enabled = 0;
  864. bfin_serial_shutdown(port);
  865. }
  866. }
  867. static int bfin_kgdboc_port_startup(struct uart_port *port)
  868. {
  869. kgdboc_port_line = port->line;
  870. kgdboc_break_enabled = !bfin_serial_startup(port);
  871. return 0;
  872. }
  873. #endif
  874. static struct uart_ops bfin_serial_pops = {
  875. .tx_empty = bfin_serial_tx_empty,
  876. .set_mctrl = bfin_serial_set_mctrl,
  877. .get_mctrl = bfin_serial_get_mctrl,
  878. .stop_tx = bfin_serial_stop_tx,
  879. .start_tx = bfin_serial_start_tx,
  880. .stop_rx = bfin_serial_stop_rx,
  881. .enable_ms = bfin_serial_enable_ms,
  882. .break_ctl = bfin_serial_break_ctl,
  883. .startup = bfin_serial_startup,
  884. .shutdown = bfin_serial_shutdown,
  885. .set_termios = bfin_serial_set_termios,
  886. .set_ldisc = bfin_serial_set_ldisc,
  887. .type = bfin_serial_type,
  888. .release_port = bfin_serial_release_port,
  889. .request_port = bfin_serial_request_port,
  890. .config_port = bfin_serial_config_port,
  891. .verify_port = bfin_serial_verify_port,
  892. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  893. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  894. .kgdboc_port_startup = bfin_kgdboc_port_startup,
  895. .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
  896. #endif
  897. #ifdef CONFIG_CONSOLE_POLL
  898. .poll_put_char = bfin_serial_poll_put_char,
  899. .poll_get_char = bfin_serial_poll_get_char,
  900. #endif
  901. };
  902. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  903. /*
  904. * If the port was already initialised (eg, by a boot loader),
  905. * try to determine the current setup.
  906. */
  907. static void __init
  908. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  909. int *parity, int *bits)
  910. {
  911. unsigned int status;
  912. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  913. if (status == (ERBFI | ETBEI)) {
  914. /* ok, the port was enabled */
  915. u32 lcr, clk;
  916. lcr = UART_GET_LCR(uart);
  917. *parity = 'n';
  918. if (lcr & PEN) {
  919. if (lcr & EPS)
  920. *parity = 'e';
  921. else
  922. *parity = 'o';
  923. }
  924. *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
  925. /* Set DLAB in LCR to Access CLK */
  926. UART_SET_DLAB(uart);
  927. clk = UART_GET_CLK(uart);
  928. /* Clear DLAB in LCR to Access THR RBR IER */
  929. UART_CLEAR_DLAB(uart);
  930. *baud = get_sclk() / (16*clk);
  931. }
  932. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
  933. }
  934. static struct uart_driver bfin_serial_reg;
  935. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  936. {
  937. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  938. while (!(UART_GET_LSR(uart) & THRE))
  939. barrier();
  940. UART_PUT_CHAR(uart, ch);
  941. }
  942. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  943. defined (CONFIG_EARLY_PRINTK) */
  944. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  945. #define CLASS_BFIN_CONSOLE "bfin-console"
  946. /*
  947. * Interrupts are disabled on entering
  948. */
  949. static void
  950. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  951. {
  952. struct bfin_serial_port *uart = bfin_serial_ports[co->index];
  953. unsigned long flags;
  954. spin_lock_irqsave(&uart->port.lock, flags);
  955. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  956. spin_unlock_irqrestore(&uart->port.lock, flags);
  957. }
  958. static int __init
  959. bfin_serial_console_setup(struct console *co, char *options)
  960. {
  961. struct bfin_serial_port *uart;
  962. int baud = 57600;
  963. int bits = 8;
  964. int parity = 'n';
  965. # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  966. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  967. int flow = 'r';
  968. # else
  969. int flow = 'n';
  970. # endif
  971. /*
  972. * Check whether an invalid uart number has been specified, and
  973. * if so, search for the first available port that does have
  974. * console support.
  975. */
  976. if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
  977. return -ENODEV;
  978. uart = bfin_serial_ports[co->index];
  979. if (!uart)
  980. return -ENODEV;
  981. if (options)
  982. uart_parse_options(options, &baud, &parity, &bits, &flow);
  983. else
  984. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  985. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  986. }
  987. static struct console bfin_serial_console = {
  988. .name = BFIN_SERIAL_DEV_NAME,
  989. .write = bfin_serial_console_write,
  990. .device = uart_console_device,
  991. .setup = bfin_serial_console_setup,
  992. .flags = CON_PRINTBUFFER,
  993. .index = -1,
  994. .data = &bfin_serial_reg,
  995. };
  996. #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
  997. #else
  998. #define BFIN_SERIAL_CONSOLE NULL
  999. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1000. #ifdef CONFIG_EARLY_PRINTK
  1001. static struct bfin_serial_port bfin_earlyprintk_port;
  1002. #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
  1003. /*
  1004. * Interrupts are disabled on entering
  1005. */
  1006. static void
  1007. bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
  1008. {
  1009. unsigned long flags;
  1010. if (bfin_earlyprintk_port.port.line != co->index)
  1011. return;
  1012. spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
  1013. uart_console_write(&bfin_earlyprintk_port.port, s, count,
  1014. bfin_serial_console_putchar);
  1015. spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
  1016. }
  1017. /*
  1018. * This should have a .setup or .early_setup in it, but then things get called
  1019. * without the command line options, and the baud rate gets messed up - so
  1020. * don't let the common infrastructure play with things. (see calls to setup
  1021. * & earlysetup in ./kernel/printk.c:register_console()
  1022. */
  1023. static struct __initdata console bfin_early_serial_console = {
  1024. .name = "early_BFuart",
  1025. .write = bfin_earlyprintk_console_write,
  1026. .device = uart_console_device,
  1027. .flags = CON_PRINTBUFFER,
  1028. .index = -1,
  1029. .data = &bfin_serial_reg,
  1030. };
  1031. #endif
  1032. static struct uart_driver bfin_serial_reg = {
  1033. .owner = THIS_MODULE,
  1034. .driver_name = DRIVER_NAME,
  1035. .dev_name = BFIN_SERIAL_DEV_NAME,
  1036. .major = BFIN_SERIAL_MAJOR,
  1037. .minor = BFIN_SERIAL_MINOR,
  1038. .nr = BFIN_UART_NR_PORTS,
  1039. .cons = BFIN_SERIAL_CONSOLE,
  1040. };
  1041. static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
  1042. {
  1043. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1044. return uart_suspend_port(&bfin_serial_reg, &uart->port);
  1045. }
  1046. static int bfin_serial_resume(struct platform_device *pdev)
  1047. {
  1048. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1049. return uart_resume_port(&bfin_serial_reg, &uart->port);
  1050. }
  1051. static int bfin_serial_probe(struct platform_device *pdev)
  1052. {
  1053. struct resource *res;
  1054. struct bfin_serial_port *uart = NULL;
  1055. int ret = 0;
  1056. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1057. dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
  1058. return -ENOENT;
  1059. }
  1060. if (bfin_serial_ports[pdev->id] == NULL) {
  1061. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  1062. if (!uart) {
  1063. dev_err(&pdev->dev,
  1064. "fail to malloc bfin_serial_port\n");
  1065. return -ENOMEM;
  1066. }
  1067. bfin_serial_ports[pdev->id] = uart;
  1068. #ifdef CONFIG_EARLY_PRINTK
  1069. if (!(bfin_earlyprintk_port.port.membase
  1070. && bfin_earlyprintk_port.port.line == pdev->id)) {
  1071. /*
  1072. * If the peripheral PINs of current port is allocated
  1073. * in earlyprintk probe stage, don't do it again.
  1074. */
  1075. #endif
  1076. ret = peripheral_request_list(
  1077. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1078. if (ret) {
  1079. dev_err(&pdev->dev,
  1080. "fail to request bfin serial peripherals\n");
  1081. goto out_error_free_mem;
  1082. }
  1083. #ifdef CONFIG_EARLY_PRINTK
  1084. }
  1085. #endif
  1086. spin_lock_init(&uart->port.lock);
  1087. uart->port.uartclk = get_sclk();
  1088. uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1089. uart->port.ops = &bfin_serial_pops;
  1090. uart->port.line = pdev->id;
  1091. uart->port.iotype = UPIO_MEM;
  1092. uart->port.flags = UPF_BOOT_AUTOCONF;
  1093. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1094. if (res == NULL) {
  1095. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1096. ret = -ENOENT;
  1097. goto out_error_free_peripherals;
  1098. }
  1099. uart->port.membase = ioremap(res->start, resource_size(res));
  1100. if (!uart->port.membase) {
  1101. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1102. ret = -ENXIO;
  1103. goto out_error_free_peripherals;
  1104. }
  1105. uart->port.mapbase = res->start;
  1106. uart->tx_irq = platform_get_irq(pdev, 0);
  1107. if (uart->tx_irq < 0) {
  1108. dev_err(&pdev->dev, "No uart TX IRQ specified\n");
  1109. ret = -ENOENT;
  1110. goto out_error_unmap;
  1111. }
  1112. uart->rx_irq = platform_get_irq(pdev, 1);
  1113. if (uart->rx_irq < 0) {
  1114. dev_err(&pdev->dev, "No uart RX IRQ specified\n");
  1115. ret = -ENOENT;
  1116. goto out_error_unmap;
  1117. }
  1118. uart->port.irq = uart->rx_irq;
  1119. uart->status_irq = platform_get_irq(pdev, 2);
  1120. if (uart->status_irq < 0) {
  1121. dev_err(&pdev->dev, "No uart status IRQ specified\n");
  1122. ret = -ENOENT;
  1123. goto out_error_unmap;
  1124. }
  1125. #ifdef CONFIG_SERIAL_BFIN_DMA
  1126. spin_lock_init(&uart->rx_lock);
  1127. uart->tx_done = 1;
  1128. uart->tx_count = 0;
  1129. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  1130. if (res == NULL) {
  1131. dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
  1132. ret = -ENOENT;
  1133. goto out_error_unmap;
  1134. }
  1135. uart->tx_dma_channel = res->start;
  1136. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  1137. if (res == NULL) {
  1138. dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
  1139. ret = -ENOENT;
  1140. goto out_error_unmap;
  1141. }
  1142. uart->rx_dma_channel = res->start;
  1143. init_timer(&(uart->rx_dma_timer));
  1144. #endif
  1145. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  1146. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  1147. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1148. if (res == NULL)
  1149. uart->cts_pin = -1;
  1150. else {
  1151. uart->cts_pin = res->start;
  1152. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1153. uart->port.flags |= ASYNC_CTS_FLOW;
  1154. #endif
  1155. }
  1156. res = platform_get_resource(pdev, IORESOURCE_IO, 1);
  1157. if (res == NULL)
  1158. uart->rts_pin = -1;
  1159. else
  1160. uart->rts_pin = res->start;
  1161. #endif
  1162. }
  1163. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1164. if (!is_early_platform_device(pdev)) {
  1165. #endif
  1166. uart = bfin_serial_ports[pdev->id];
  1167. uart->port.dev = &pdev->dev;
  1168. dev_set_drvdata(&pdev->dev, uart);
  1169. ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
  1170. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1171. }
  1172. #endif
  1173. if (!ret)
  1174. return 0;
  1175. if (uart) {
  1176. out_error_unmap:
  1177. iounmap(uart->port.membase);
  1178. out_error_free_peripherals:
  1179. peripheral_free_list(
  1180. (unsigned short *)pdev->dev.platform_data);
  1181. out_error_free_mem:
  1182. kfree(uart);
  1183. bfin_serial_ports[pdev->id] = NULL;
  1184. }
  1185. return ret;
  1186. }
  1187. static int __devexit bfin_serial_remove(struct platform_device *pdev)
  1188. {
  1189. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1190. dev_set_drvdata(&pdev->dev, NULL);
  1191. if (uart) {
  1192. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1193. iounmap(uart->port.membase);
  1194. peripheral_free_list(
  1195. (unsigned short *)pdev->dev.platform_data);
  1196. kfree(uart);
  1197. bfin_serial_ports[pdev->id] = NULL;
  1198. }
  1199. return 0;
  1200. }
  1201. static struct platform_driver bfin_serial_driver = {
  1202. .probe = bfin_serial_probe,
  1203. .remove = __devexit_p(bfin_serial_remove),
  1204. .suspend = bfin_serial_suspend,
  1205. .resume = bfin_serial_resume,
  1206. .driver = {
  1207. .name = DRIVER_NAME,
  1208. .owner = THIS_MODULE,
  1209. },
  1210. };
  1211. #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
  1212. static __initdata struct early_platform_driver early_bfin_serial_driver = {
  1213. .class_str = CLASS_BFIN_CONSOLE,
  1214. .pdrv = &bfin_serial_driver,
  1215. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1216. };
  1217. static int __init bfin_serial_rs_console_init(void)
  1218. {
  1219. early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
  1220. early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
  1221. register_console(&bfin_serial_console);
  1222. return 0;
  1223. }
  1224. console_initcall(bfin_serial_rs_console_init);
  1225. #endif
  1226. #ifdef CONFIG_EARLY_PRINTK
  1227. /*
  1228. * Memory can't be allocated dynamically during earlyprink init stage.
  1229. * So, do individual probe for earlyprink with a static uart port variable.
  1230. */
  1231. static int bfin_earlyprintk_probe(struct platform_device *pdev)
  1232. {
  1233. struct resource *res;
  1234. int ret;
  1235. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1236. dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
  1237. return -ENOENT;
  1238. }
  1239. ret = peripheral_request_list(
  1240. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1241. if (ret) {
  1242. dev_err(&pdev->dev,
  1243. "fail to request bfin serial peripherals\n");
  1244. return ret;
  1245. }
  1246. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1247. if (res == NULL) {
  1248. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1249. ret = -ENOENT;
  1250. goto out_error_free_peripherals;
  1251. }
  1252. bfin_earlyprintk_port.port.membase = ioremap(res->start,
  1253. resource_size(res));
  1254. if (!bfin_earlyprintk_port.port.membase) {
  1255. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1256. ret = -ENXIO;
  1257. goto out_error_free_peripherals;
  1258. }
  1259. bfin_earlyprintk_port.port.mapbase = res->start;
  1260. bfin_earlyprintk_port.port.line = pdev->id;
  1261. bfin_earlyprintk_port.port.uartclk = get_sclk();
  1262. bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1263. spin_lock_init(&bfin_earlyprintk_port.port.lock);
  1264. return 0;
  1265. out_error_free_peripherals:
  1266. peripheral_free_list(
  1267. (unsigned short *)pdev->dev.platform_data);
  1268. return ret;
  1269. }
  1270. static struct platform_driver bfin_earlyprintk_driver = {
  1271. .probe = bfin_earlyprintk_probe,
  1272. .driver = {
  1273. .name = DRIVER_NAME,
  1274. .owner = THIS_MODULE,
  1275. },
  1276. };
  1277. static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
  1278. .class_str = CLASS_BFIN_EARLYPRINTK,
  1279. .pdrv = &bfin_earlyprintk_driver,
  1280. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1281. };
  1282. struct console __init *bfin_earlyserial_init(unsigned int port,
  1283. unsigned int cflag)
  1284. {
  1285. struct ktermios t;
  1286. char port_name[20];
  1287. if (port < 0 || port >= BFIN_UART_NR_PORTS)
  1288. return NULL;
  1289. /*
  1290. * Only probe resource of the given port in earlyprintk boot arg.
  1291. * The expected port id should be indicated in port name string.
  1292. */
  1293. snprintf(port_name, 20, DRIVER_NAME ".%d", port);
  1294. early_platform_driver_register(&early_bfin_earlyprintk_driver,
  1295. port_name);
  1296. early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
  1297. if (!bfin_earlyprintk_port.port.membase)
  1298. return NULL;
  1299. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1300. /*
  1301. * If we are using early serial, don't let the normal console rewind
  1302. * log buffer, since that causes things to be printed multiple times
  1303. */
  1304. bfin_serial_console.flags &= ~CON_PRINTBUFFER;
  1305. #endif
  1306. bfin_early_serial_console.index = port;
  1307. t.c_cflag = cflag;
  1308. t.c_iflag = 0;
  1309. t.c_oflag = 0;
  1310. t.c_lflag = ICANON;
  1311. t.c_line = port;
  1312. bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
  1313. return &bfin_early_serial_console;
  1314. }
  1315. #endif /* CONFIG_EARLY_PRINTK */
  1316. static int __init bfin_serial_init(void)
  1317. {
  1318. int ret;
  1319. pr_info("Blackfin serial driver\n");
  1320. ret = uart_register_driver(&bfin_serial_reg);
  1321. if (ret) {
  1322. pr_err("failed to register %s:%d\n",
  1323. bfin_serial_reg.driver_name, ret);
  1324. }
  1325. ret = platform_driver_register(&bfin_serial_driver);
  1326. if (ret) {
  1327. pr_err("fail to register bfin uart\n");
  1328. uart_unregister_driver(&bfin_serial_reg);
  1329. }
  1330. return ret;
  1331. }
  1332. static void __exit bfin_serial_exit(void)
  1333. {
  1334. platform_driver_unregister(&bfin_serial_driver);
  1335. uart_unregister_driver(&bfin_serial_reg);
  1336. }
  1337. module_init(bfin_serial_init);
  1338. module_exit(bfin_serial_exit);
  1339. MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
  1340. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1341. MODULE_LICENSE("GPL");
  1342. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1343. MODULE_ALIAS("platform:bfin-uart");