cx23885-cards.c 19 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. /* ------------------------------------------------------------------ */
  29. /* board config info */
  30. struct cx23885_board cx23885_boards[] = {
  31. [CX23885_BOARD_UNKNOWN] = {
  32. .name = "UNKNOWN/GENERIC",
  33. /* Ensure safe default for unknown boards */
  34. .clk_freq = 0,
  35. .input = {{
  36. .type = CX23885_VMUX_COMPOSITE1,
  37. .vmux = 0,
  38. }, {
  39. .type = CX23885_VMUX_COMPOSITE2,
  40. .vmux = 1,
  41. }, {
  42. .type = CX23885_VMUX_COMPOSITE3,
  43. .vmux = 2,
  44. }, {
  45. .type = CX23885_VMUX_COMPOSITE4,
  46. .vmux = 3,
  47. } },
  48. },
  49. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  50. .name = "Hauppauge WinTV-HVR1800lp",
  51. .portc = CX23885_MPEG_DVB,
  52. .input = {{
  53. .type = CX23885_VMUX_TELEVISION,
  54. .vmux = 0,
  55. .gpio0 = 0xff00,
  56. }, {
  57. .type = CX23885_VMUX_DEBUG,
  58. .vmux = 0,
  59. .gpio0 = 0xff01,
  60. }, {
  61. .type = CX23885_VMUX_COMPOSITE1,
  62. .vmux = 1,
  63. .gpio0 = 0xff02,
  64. }, {
  65. .type = CX23885_VMUX_SVIDEO,
  66. .vmux = 2,
  67. .gpio0 = 0xff02,
  68. } },
  69. },
  70. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  71. .name = "Hauppauge WinTV-HVR1800",
  72. .porta = CX23885_ANALOG_VIDEO,
  73. .portb = CX23885_MPEG_ENCODER,
  74. .portc = CX23885_MPEG_DVB,
  75. .tuner_type = TUNER_PHILIPS_TDA8290,
  76. .tuner_addr = 0x42, /* 0x84 >> 1 */
  77. .input = {{
  78. .type = CX23885_VMUX_TELEVISION,
  79. .vmux = CX25840_VIN7_CH3 |
  80. CX25840_VIN5_CH2 |
  81. CX25840_VIN2_CH1,
  82. .gpio0 = 0,
  83. }, {
  84. .type = CX23885_VMUX_COMPOSITE1,
  85. .vmux = CX25840_VIN7_CH3 |
  86. CX25840_VIN4_CH2 |
  87. CX25840_VIN6_CH1,
  88. .gpio0 = 0,
  89. }, {
  90. .type = CX23885_VMUX_SVIDEO,
  91. .vmux = CX25840_VIN7_CH3 |
  92. CX25840_VIN4_CH2 |
  93. CX25840_VIN8_CH1 |
  94. CX25840_SVIDEO_ON,
  95. .gpio0 = 0,
  96. } },
  97. },
  98. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  99. .name = "Hauppauge WinTV-HVR1250",
  100. .portc = CX23885_MPEG_DVB,
  101. .input = {{
  102. .type = CX23885_VMUX_TELEVISION,
  103. .vmux = 0,
  104. .gpio0 = 0xff00,
  105. }, {
  106. .type = CX23885_VMUX_DEBUG,
  107. .vmux = 0,
  108. .gpio0 = 0xff01,
  109. }, {
  110. .type = CX23885_VMUX_COMPOSITE1,
  111. .vmux = 1,
  112. .gpio0 = 0xff02,
  113. }, {
  114. .type = CX23885_VMUX_SVIDEO,
  115. .vmux = 2,
  116. .gpio0 = 0xff02,
  117. } },
  118. },
  119. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  120. .name = "DViCO FusionHDTV5 Express",
  121. .portb = CX23885_MPEG_DVB,
  122. },
  123. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  124. .name = "Hauppauge WinTV-HVR1500Q",
  125. .portc = CX23885_MPEG_DVB,
  126. },
  127. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  128. .name = "Hauppauge WinTV-HVR1500",
  129. .portc = CX23885_MPEG_DVB,
  130. },
  131. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  132. .name = "Hauppauge WinTV-HVR1200",
  133. .portc = CX23885_MPEG_DVB,
  134. },
  135. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  136. .name = "Hauppauge WinTV-HVR1700",
  137. .portc = CX23885_MPEG_DVB,
  138. },
  139. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  140. .name = "Hauppauge WinTV-HVR1400",
  141. .portc = CX23885_MPEG_DVB,
  142. },
  143. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  144. .name = "DViCO FusionHDTV7 Dual Express",
  145. .portb = CX23885_MPEG_DVB,
  146. .portc = CX23885_MPEG_DVB,
  147. },
  148. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  149. .name = "DViCO FusionHDTV DVB-T Dual Express",
  150. .portb = CX23885_MPEG_DVB,
  151. .portc = CX23885_MPEG_DVB,
  152. },
  153. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  154. .name = "Leadtek Winfast PxDVR3200 H",
  155. .portc = CX23885_MPEG_DVB,
  156. },
  157. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  158. .name = "Compro VideoMate E650F",
  159. .portc = CX23885_MPEG_DVB,
  160. },
  161. [CX23885_BOARD_TBS_6920] = {
  162. .name = "TurboSight TBS 6920",
  163. .portb = CX23885_MPEG_DVB,
  164. },
  165. };
  166. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  167. /* ------------------------------------------------------------------ */
  168. /* PCI subsystem IDs */
  169. struct cx23885_subid cx23885_subids[] = {
  170. {
  171. .subvendor = 0x0070,
  172. .subdevice = 0x3400,
  173. .card = CX23885_BOARD_UNKNOWN,
  174. }, {
  175. .subvendor = 0x0070,
  176. .subdevice = 0x7600,
  177. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  178. }, {
  179. .subvendor = 0x0070,
  180. .subdevice = 0x7800,
  181. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  182. }, {
  183. .subvendor = 0x0070,
  184. .subdevice = 0x7801,
  185. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  186. }, {
  187. .subvendor = 0x0070,
  188. .subdevice = 0x7809,
  189. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  190. }, {
  191. .subvendor = 0x0070,
  192. .subdevice = 0x7911,
  193. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  194. }, {
  195. .subvendor = 0x18ac,
  196. .subdevice = 0xd500,
  197. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  198. }, {
  199. .subvendor = 0x0070,
  200. .subdevice = 0x7790,
  201. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  202. }, {
  203. .subvendor = 0x0070,
  204. .subdevice = 0x7797,
  205. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  206. }, {
  207. .subvendor = 0x0070,
  208. .subdevice = 0x7710,
  209. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  210. }, {
  211. .subvendor = 0x0070,
  212. .subdevice = 0x7717,
  213. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  214. }, {
  215. .subvendor = 0x0070,
  216. .subdevice = 0x71d1,
  217. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  218. }, {
  219. .subvendor = 0x0070,
  220. .subdevice = 0x71d3,
  221. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  222. }, {
  223. .subvendor = 0x0070,
  224. .subdevice = 0x8101,
  225. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  226. }, {
  227. .subvendor = 0x0070,
  228. .subdevice = 0x8010,
  229. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  230. }, {
  231. .subvendor = 0x18ac,
  232. .subdevice = 0xd618,
  233. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  234. }, {
  235. .subvendor = 0x18ac,
  236. .subdevice = 0xdb78,
  237. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  238. }, {
  239. .subvendor = 0x107d,
  240. .subdevice = 0x6681,
  241. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  242. }, {
  243. .subvendor = 0x185b,
  244. .subdevice = 0xe800,
  245. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  246. }, {
  247. .subvendor = 0x6920,
  248. .subdevice = 0x8888,
  249. .card = CX23885_BOARD_TBS_6920,
  250. },
  251. };
  252. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  253. void cx23885_card_list(struct cx23885_dev *dev)
  254. {
  255. int i;
  256. if (0 == dev->pci->subsystem_vendor &&
  257. 0 == dev->pci->subsystem_device) {
  258. printk(KERN_INFO
  259. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  260. "%s: be autodetected. Pass card=<n> insmod option\n"
  261. "%s: to workaround that. Redirect complaints to the\n"
  262. "%s: vendor of the TV card. Best regards,\n"
  263. "%s: -- tux\n",
  264. dev->name, dev->name, dev->name, dev->name, dev->name);
  265. } else {
  266. printk(KERN_INFO
  267. "%s: Your board isn't known (yet) to the driver.\n"
  268. "%s: Try to pick one of the existing card configs via\n"
  269. "%s: card=<n> insmod option. Updating to the latest\n"
  270. "%s: version might help as well.\n",
  271. dev->name, dev->name, dev->name, dev->name);
  272. }
  273. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  274. dev->name);
  275. for (i = 0; i < cx23885_bcount; i++)
  276. printk(KERN_INFO "%s: card=%d -> %s\n",
  277. dev->name, i, cx23885_boards[i].name);
  278. }
  279. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  280. {
  281. struct tveeprom tv;
  282. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  283. eeprom_data);
  284. /* Make sure we support the board model */
  285. switch (tv.model) {
  286. case 71009:
  287. /* WinTV-HVR1200 (PCIe, Retail, full height)
  288. * DVB-T and basic analog */
  289. case 71359:
  290. /* WinTV-HVR1200 (PCIe, OEM, half height)
  291. * DVB-T and basic analog */
  292. case 71439:
  293. /* WinTV-HVR1200 (PCIe, OEM, half height)
  294. * DVB-T and basic analog */
  295. case 71449:
  296. /* WinTV-HVR1200 (PCIe, OEM, full height)
  297. * DVB-T and basic analog */
  298. case 71939:
  299. /* WinTV-HVR1200 (PCIe, OEM, half height)
  300. * DVB-T and basic analog */
  301. case 71949:
  302. /* WinTV-HVR1200 (PCIe, OEM, full height)
  303. * DVB-T and basic analog */
  304. case 71959:
  305. /* WinTV-HVR1200 (PCIe, OEM, full height)
  306. * DVB-T and basic analog */
  307. case 71979:
  308. /* WinTV-HVR1200 (PCIe, OEM, half height)
  309. * DVB-T and basic analog */
  310. case 71999:
  311. /* WinTV-HVR1200 (PCIe, OEM, full height)
  312. * DVB-T and basic analog */
  313. case 76601:
  314. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  315. channel ATSC and MPEG2 HW Encoder */
  316. case 77001:
  317. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  318. and Basic analog */
  319. case 77011:
  320. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  321. and Basic analog */
  322. case 77041:
  323. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  324. and Basic analog */
  325. case 77051:
  326. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  327. and Basic analog */
  328. case 78011:
  329. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  330. Dual channel ATSC and MPEG2 HW Encoder */
  331. case 78501:
  332. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  333. Dual channel ATSC and MPEG2 HW Encoder */
  334. case 78521:
  335. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  336. Dual channel ATSC and MPEG2 HW Encoder */
  337. case 78531:
  338. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  339. Dual channel ATSC and MPEG2 HW Encoder */
  340. case 78631:
  341. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  342. Dual channel ATSC and MPEG2 HW Encoder */
  343. case 79001:
  344. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  345. ATSC and Basic analog */
  346. case 79101:
  347. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  348. ATSC and Basic analog */
  349. case 79561:
  350. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  351. ATSC and Basic analog */
  352. case 79571:
  353. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  354. ATSC and Basic analog */
  355. case 79671:
  356. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  357. ATSC and Basic analog */
  358. case 80019:
  359. /* WinTV-HVR1400 (Express Card, Retail, IR,
  360. * DVB-T and Basic analog */
  361. case 81509:
  362. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  363. * DVB-T and MPEG2 HW Encoder */
  364. case 81519:
  365. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  366. * DVB-T and MPEG2 HW Encoder */
  367. break;
  368. default:
  369. printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
  370. dev->name, tv.model);
  371. break;
  372. }
  373. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  374. dev->name, tv.model);
  375. }
  376. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  377. {
  378. struct cx23885_tsport *port = priv;
  379. struct cx23885_dev *dev = port->dev;
  380. u32 bitmask = 0;
  381. if (command == XC2028_RESET_CLK)
  382. return 0;
  383. if (command != 0) {
  384. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  385. __func__, command);
  386. return -EINVAL;
  387. }
  388. switch (dev->board) {
  389. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  390. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  391. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  392. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  393. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  394. /* Tuner Reset Command */
  395. bitmask = 0x04;
  396. break;
  397. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  398. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  399. /* Two identical tuners on two different i2c buses,
  400. * we need to reset the correct gpio. */
  401. if (port->nr == 0)
  402. bitmask = 0x01;
  403. else if (port->nr == 1)
  404. bitmask = 0x04;
  405. break;
  406. }
  407. if (bitmask) {
  408. /* Drive the tuner into reset and back out */
  409. cx_clear(GP0_IO, bitmask);
  410. mdelay(200);
  411. cx_set(GP0_IO, bitmask);
  412. }
  413. return 0;
  414. }
  415. void cx23885_gpio_setup(struct cx23885_dev *dev)
  416. {
  417. switch (dev->board) {
  418. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  419. /* GPIO-0 cx24227 demodulator reset */
  420. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  421. break;
  422. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  423. /* GPIO-0 cx24227 demodulator */
  424. /* GPIO-2 xc3028 tuner */
  425. /* Put the parts into reset */
  426. cx_set(GP0_IO, 0x00050000);
  427. cx_clear(GP0_IO, 0x00000005);
  428. msleep(5);
  429. /* Bring the parts out of reset */
  430. cx_set(GP0_IO, 0x00050005);
  431. break;
  432. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  433. /* GPIO-0 cx24227 demodulator reset */
  434. /* GPIO-2 xc5000 tuner reset */
  435. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  436. break;
  437. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  438. /* GPIO-0 656_CLK */
  439. /* GPIO-1 656_D0 */
  440. /* GPIO-2 8295A Reset */
  441. /* GPIO-3-10 cx23417 data0-7 */
  442. /* GPIO-11-14 cx23417 addr0-3 */
  443. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  444. /* GPIO-19 IR_RX */
  445. /* CX23417 GPIO's */
  446. /* EIO15 Zilog Reset */
  447. /* EIO14 S5H1409/CX24227 Reset */
  448. /* Force the TDA8295A into reset and back */
  449. cx_set(GP0_IO, 0x00040004);
  450. mdelay(20);
  451. cx_clear(GP0_IO, 0x00000004);
  452. mdelay(20);
  453. cx_set(GP0_IO, 0x00040004);
  454. mdelay(20);
  455. break;
  456. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  457. /* GPIO-0 tda10048 demodulator reset */
  458. /* GPIO-2 tda18271 tuner reset */
  459. /* Put the parts into reset and back */
  460. cx_set(GP0_IO, 0x00050000);
  461. mdelay(20);
  462. cx_clear(GP0_IO, 0x00000005);
  463. mdelay(20);
  464. cx_set(GP0_IO, 0x00050005);
  465. break;
  466. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  467. /* GPIO-0 TDA10048 demodulator reset */
  468. /* GPIO-2 TDA8295A Reset */
  469. /* GPIO-3-10 cx23417 data0-7 */
  470. /* GPIO-11-14 cx23417 addr0-3 */
  471. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  472. /* The following GPIO's are on the interna AVCore (cx25840) */
  473. /* GPIO-19 IR_RX */
  474. /* GPIO-20 IR_TX 416/DVBT Select */
  475. /* GPIO-21 IIS DAT */
  476. /* GPIO-22 IIS WCLK */
  477. /* GPIO-23 IIS BCLK */
  478. /* Put the parts into reset and back */
  479. cx_set(GP0_IO, 0x00050000);
  480. mdelay(20);
  481. cx_clear(GP0_IO, 0x00000005);
  482. mdelay(20);
  483. cx_set(GP0_IO, 0x00050005);
  484. break;
  485. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  486. /* GPIO-0 Dibcom7000p demodulator reset */
  487. /* GPIO-2 xc3028L tuner reset */
  488. /* GPIO-13 LED */
  489. /* Put the parts into reset and back */
  490. cx_set(GP0_IO, 0x00050000);
  491. mdelay(20);
  492. cx_clear(GP0_IO, 0x00000005);
  493. mdelay(20);
  494. cx_set(GP0_IO, 0x00050005);
  495. break;
  496. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  497. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  498. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  499. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  500. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  501. /* Put the parts into reset and back */
  502. cx_set(GP0_IO, 0x000f0000);
  503. mdelay(20);
  504. cx_clear(GP0_IO, 0x0000000f);
  505. mdelay(20);
  506. cx_set(GP0_IO, 0x000f000f);
  507. break;
  508. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  509. /* GPIO-0 portb xc3028 reset */
  510. /* GPIO-1 portb zl10353 reset */
  511. /* GPIO-2 portc xc3028 reset */
  512. /* GPIO-3 portc zl10353 reset */
  513. /* Put the parts into reset and back */
  514. cx_set(GP0_IO, 0x000f0000);
  515. mdelay(20);
  516. cx_clear(GP0_IO, 0x0000000f);
  517. mdelay(20);
  518. cx_set(GP0_IO, 0x000f000f);
  519. break;
  520. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  521. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  522. /* GPIO-2 xc3028 tuner reset */
  523. /* The following GPIO's are on the internal AVCore (cx25840) */
  524. /* GPIO-? zl10353 demod reset */
  525. /* Put the parts into reset and back */
  526. cx_set(GP0_IO, 0x00040000);
  527. mdelay(20);
  528. cx_clear(GP0_IO, 0x00000004);
  529. mdelay(20);
  530. cx_set(GP0_IO, 0x00040004);
  531. break;
  532. case CX23885_BOARD_TBS_6920:
  533. cx_write(MC417_CTL, 0x00000036);
  534. cx_write(MC417_OEN, 0x00001000);
  535. cx_write(MC417_RWD, 0x00001800);
  536. break;
  537. }
  538. }
  539. int cx23885_ir_init(struct cx23885_dev *dev)
  540. {
  541. switch (dev->board) {
  542. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  543. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  544. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  545. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  546. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  547. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  548. /* FIXME: Implement me */
  549. break;
  550. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  551. request_module("ir-kbd-i2c");
  552. break;
  553. }
  554. return 0;
  555. }
  556. void cx23885_card_setup(struct cx23885_dev *dev)
  557. {
  558. struct cx23885_tsport *ts1 = &dev->ts1;
  559. struct cx23885_tsport *ts2 = &dev->ts2;
  560. static u8 eeprom[256];
  561. if (dev->i2c_bus[0].i2c_rc == 0) {
  562. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  563. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  564. eeprom, sizeof(eeprom));
  565. }
  566. switch (dev->board) {
  567. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  568. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  569. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  570. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  571. if (dev->i2c_bus[0].i2c_rc == 0)
  572. hauppauge_eeprom(dev, eeprom+0x80);
  573. break;
  574. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  575. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  576. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  577. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  578. if (dev->i2c_bus[0].i2c_rc == 0)
  579. hauppauge_eeprom(dev, eeprom+0xc0);
  580. break;
  581. }
  582. switch (dev->board) {
  583. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  584. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  585. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  586. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  587. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  588. /* break omitted intentionally */
  589. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  590. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  591. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  592. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  593. break;
  594. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  595. /* Defaults for VID B - Analog encoder */
  596. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  597. ts1->gen_ctrl_val = 0x10e;
  598. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  599. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  600. /* APB_TSVALERR_POL (active low)*/
  601. ts1->vld_misc_val = 0x2000;
  602. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  603. /* Defaults for VID C */
  604. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  605. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  606. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  607. break;
  608. case CX23885_BOARD_TBS_6920:
  609. ts1->gen_ctrl_val = 0x5; /* Parallel */
  610. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  611. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  612. break;
  613. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  614. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  615. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  616. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  617. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  618. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  619. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  620. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  621. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  622. default:
  623. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  624. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  625. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  626. }
  627. /* Certain boards support analog, or require the avcore to be
  628. * loaded, ensure this happens.
  629. */
  630. switch (dev->board) {
  631. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  632. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  633. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  634. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  635. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  636. request_module("cx25840");
  637. break;
  638. }
  639. }
  640. /* ------------------------------------------------------------------ */