devs.c 39 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/amba/pl330.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/slab.h>
  23. #include <linux/string.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/fb.h>
  26. #include <linux/gfp.h>
  27. #include <linux/mtd/mtd.h>
  28. #include <linux/mtd/onenand.h>
  29. #include <linux/mtd/partitions.h>
  30. #include <linux/mmc/host.h>
  31. #include <linux/ioport.h>
  32. #include <linux/platform_data/s3c-hsudc.h>
  33. #include <linux/platform_data/s3c-hsotg.h>
  34. #include <media/s5p_hdmi.h>
  35. #include <asm/irq.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/irq.h>
  39. #include <mach/hardware.h>
  40. #include <mach/dma.h>
  41. #include <mach/irqs.h>
  42. #include <mach/map.h>
  43. #include <plat/cpu.h>
  44. #include <plat/devs.h>
  45. #include <plat/adc.h>
  46. #include <linux/platform_data/ata-samsung_cf.h>
  47. #include <linux/platform_data/usb-ehci-s5p.h>
  48. #include <plat/fb.h>
  49. #include <plat/fb-s3c2410.h>
  50. #include <plat/hdmi.h>
  51. #include <linux/platform_data/hwmon-s3c.h>
  52. #include <linux/platform_data/i2c-s3c2410.h>
  53. #include <plat/keypad.h>
  54. #include <linux/platform_data/mmc-s3cmci.h>
  55. #include <linux/platform_data/mtd-nand-s3c2410.h>
  56. #include <plat/pwm-core.h>
  57. #include <plat/sdhci.h>
  58. #include <linux/platform_data/touchscreen-s3c2410.h>
  59. #include <linux/platform_data/usb-s3c2410_udc.h>
  60. #include <linux/platform_data/usb-ohci-s3c2410.h>
  61. #include <plat/usb-phy.h>
  62. #include <plat/regs-serial.h>
  63. #include <plat/regs-spi.h>
  64. #include <linux/platform_data/spi-s3c64xx.h>
  65. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  66. /* AC97 */
  67. #ifdef CONFIG_CPU_S3C2440
  68. static struct resource s3c_ac97_resource[] = {
  69. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  70. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  71. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  72. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  73. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  74. };
  75. struct platform_device s3c_device_ac97 = {
  76. .name = "samsung-ac97",
  77. .id = -1,
  78. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  79. .resource = s3c_ac97_resource,
  80. .dev = {
  81. .dma_mask = &samsung_device_dma_mask,
  82. .coherent_dma_mask = DMA_BIT_MASK(32),
  83. }
  84. };
  85. #endif /* CONFIG_CPU_S3C2440 */
  86. /* ADC */
  87. #ifdef CONFIG_PLAT_S3C24XX
  88. static struct resource s3c_adc_resource[] = {
  89. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  90. [1] = DEFINE_RES_IRQ(IRQ_TC),
  91. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  92. };
  93. struct platform_device s3c_device_adc = {
  94. .name = "s3c24xx-adc",
  95. .id = -1,
  96. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  97. .resource = s3c_adc_resource,
  98. };
  99. #endif /* CONFIG_PLAT_S3C24XX */
  100. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  101. static struct resource s3c_adc_resource[] = {
  102. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  103. [1] = DEFINE_RES_IRQ(IRQ_TC),
  104. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  105. };
  106. struct platform_device s3c_device_adc = {
  107. .name = "samsung-adc",
  108. .id = -1,
  109. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  110. .resource = s3c_adc_resource,
  111. };
  112. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  113. /* Camif Controller */
  114. #ifdef CONFIG_CPU_S3C2440
  115. static struct resource s3c_camif_resource[] = {
  116. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  117. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  118. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  119. };
  120. struct platform_device s3c_device_camif = {
  121. .name = "s3c2440-camif",
  122. .id = -1,
  123. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  124. .resource = s3c_camif_resource,
  125. .dev = {
  126. .dma_mask = &samsung_device_dma_mask,
  127. .coherent_dma_mask = DMA_BIT_MASK(32),
  128. }
  129. };
  130. #endif /* CONFIG_CPU_S3C2440 */
  131. /* ASOC DMA */
  132. #ifdef CONFIG_PLAT_S5P
  133. static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0);
  134. struct platform_device samsung_asoc_idma = {
  135. .name = "samsung-idma",
  136. .id = -1,
  137. .num_resources = 1,
  138. .resource = &samsung_asoc_idma_resource,
  139. .dev = {
  140. .dma_mask = &samsung_device_dma_mask,
  141. .coherent_dma_mask = DMA_BIT_MASK(32),
  142. }
  143. };
  144. #endif
  145. /* FB */
  146. #ifdef CONFIG_S3C_DEV_FB
  147. static struct resource s3c_fb_resource[] = {
  148. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  149. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  150. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  151. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  152. };
  153. struct platform_device s3c_device_fb = {
  154. .name = "s3c-fb",
  155. .id = -1,
  156. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  157. .resource = s3c_fb_resource,
  158. .dev = {
  159. .dma_mask = &samsung_device_dma_mask,
  160. .coherent_dma_mask = DMA_BIT_MASK(32),
  161. },
  162. };
  163. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  164. {
  165. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  166. &s3c_device_fb);
  167. }
  168. #endif /* CONFIG_S3C_DEV_FB */
  169. /* FIMC */
  170. #ifdef CONFIG_S5P_DEV_FIMC0
  171. static struct resource s5p_fimc0_resource[] = {
  172. [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
  173. [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
  174. };
  175. struct platform_device s5p_device_fimc0 = {
  176. .name = "s5p-fimc",
  177. .id = 0,
  178. .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
  179. .resource = s5p_fimc0_resource,
  180. .dev = {
  181. .dma_mask = &samsung_device_dma_mask,
  182. .coherent_dma_mask = DMA_BIT_MASK(32),
  183. },
  184. };
  185. struct platform_device s5p_device_fimc_md = {
  186. .name = "s5p-fimc-md",
  187. .id = -1,
  188. };
  189. #endif /* CONFIG_S5P_DEV_FIMC0 */
  190. #ifdef CONFIG_S5P_DEV_FIMC1
  191. static struct resource s5p_fimc1_resource[] = {
  192. [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
  193. [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
  194. };
  195. struct platform_device s5p_device_fimc1 = {
  196. .name = "s5p-fimc",
  197. .id = 1,
  198. .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
  199. .resource = s5p_fimc1_resource,
  200. .dev = {
  201. .dma_mask = &samsung_device_dma_mask,
  202. .coherent_dma_mask = DMA_BIT_MASK(32),
  203. },
  204. };
  205. #endif /* CONFIG_S5P_DEV_FIMC1 */
  206. #ifdef CONFIG_S5P_DEV_FIMC2
  207. static struct resource s5p_fimc2_resource[] = {
  208. [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
  209. [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
  210. };
  211. struct platform_device s5p_device_fimc2 = {
  212. .name = "s5p-fimc",
  213. .id = 2,
  214. .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
  215. .resource = s5p_fimc2_resource,
  216. .dev = {
  217. .dma_mask = &samsung_device_dma_mask,
  218. .coherent_dma_mask = DMA_BIT_MASK(32),
  219. },
  220. };
  221. #endif /* CONFIG_S5P_DEV_FIMC2 */
  222. #ifdef CONFIG_S5P_DEV_FIMC3
  223. static struct resource s5p_fimc3_resource[] = {
  224. [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
  225. [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
  226. };
  227. struct platform_device s5p_device_fimc3 = {
  228. .name = "s5p-fimc",
  229. .id = 3,
  230. .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
  231. .resource = s5p_fimc3_resource,
  232. .dev = {
  233. .dma_mask = &samsung_device_dma_mask,
  234. .coherent_dma_mask = DMA_BIT_MASK(32),
  235. },
  236. };
  237. #endif /* CONFIG_S5P_DEV_FIMC3 */
  238. /* G2D */
  239. #ifdef CONFIG_S5P_DEV_G2D
  240. static struct resource s5p_g2d_resource[] = {
  241. [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
  242. [1] = DEFINE_RES_IRQ(IRQ_2D),
  243. };
  244. struct platform_device s5p_device_g2d = {
  245. .name = "s5p-g2d",
  246. .id = 0,
  247. .num_resources = ARRAY_SIZE(s5p_g2d_resource),
  248. .resource = s5p_g2d_resource,
  249. .dev = {
  250. .dma_mask = &samsung_device_dma_mask,
  251. .coherent_dma_mask = DMA_BIT_MASK(32),
  252. },
  253. };
  254. #endif /* CONFIG_S5P_DEV_G2D */
  255. #ifdef CONFIG_S5P_DEV_JPEG
  256. static struct resource s5p_jpeg_resource[] = {
  257. [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
  258. [1] = DEFINE_RES_IRQ(IRQ_JPEG),
  259. };
  260. struct platform_device s5p_device_jpeg = {
  261. .name = "s5p-jpeg",
  262. .id = 0,
  263. .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
  264. .resource = s5p_jpeg_resource,
  265. .dev = {
  266. .dma_mask = &samsung_device_dma_mask,
  267. .coherent_dma_mask = DMA_BIT_MASK(32),
  268. },
  269. };
  270. #endif /* CONFIG_S5P_DEV_JPEG */
  271. /* FIMD0 */
  272. #ifdef CONFIG_S5P_DEV_FIMD0
  273. static struct resource s5p_fimd0_resource[] = {
  274. [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
  275. [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"),
  276. [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"),
  277. [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"),
  278. };
  279. struct platform_device s5p_device_fimd0 = {
  280. .name = "s5p-fb",
  281. .id = 0,
  282. .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
  283. .resource = s5p_fimd0_resource,
  284. .dev = {
  285. .dma_mask = &samsung_device_dma_mask,
  286. .coherent_dma_mask = DMA_BIT_MASK(32),
  287. },
  288. };
  289. void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
  290. {
  291. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  292. &s5p_device_fimd0);
  293. }
  294. #endif /* CONFIG_S5P_DEV_FIMD0 */
  295. /* HWMON */
  296. #ifdef CONFIG_S3C_DEV_HWMON
  297. struct platform_device s3c_device_hwmon = {
  298. .name = "s3c-hwmon",
  299. .id = -1,
  300. .dev.parent = &s3c_device_adc.dev,
  301. };
  302. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  303. {
  304. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  305. &s3c_device_hwmon);
  306. }
  307. #endif /* CONFIG_S3C_DEV_HWMON */
  308. /* HSMMC */
  309. #ifdef CONFIG_S3C_DEV_HSMMC
  310. static struct resource s3c_hsmmc_resource[] = {
  311. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  312. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  313. };
  314. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  315. .max_width = 4,
  316. .host_caps = (MMC_CAP_4_BIT_DATA |
  317. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  318. };
  319. struct platform_device s3c_device_hsmmc0 = {
  320. .name = "s3c-sdhci",
  321. .id = 0,
  322. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  323. .resource = s3c_hsmmc_resource,
  324. .dev = {
  325. .dma_mask = &samsung_device_dma_mask,
  326. .coherent_dma_mask = DMA_BIT_MASK(32),
  327. .platform_data = &s3c_hsmmc0_def_platdata,
  328. },
  329. };
  330. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  331. {
  332. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  333. }
  334. #endif /* CONFIG_S3C_DEV_HSMMC */
  335. #ifdef CONFIG_S3C_DEV_HSMMC1
  336. static struct resource s3c_hsmmc1_resource[] = {
  337. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  338. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  339. };
  340. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  341. .max_width = 4,
  342. .host_caps = (MMC_CAP_4_BIT_DATA |
  343. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  344. };
  345. struct platform_device s3c_device_hsmmc1 = {
  346. .name = "s3c-sdhci",
  347. .id = 1,
  348. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  349. .resource = s3c_hsmmc1_resource,
  350. .dev = {
  351. .dma_mask = &samsung_device_dma_mask,
  352. .coherent_dma_mask = DMA_BIT_MASK(32),
  353. .platform_data = &s3c_hsmmc1_def_platdata,
  354. },
  355. };
  356. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  357. {
  358. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  359. }
  360. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  361. /* HSMMC2 */
  362. #ifdef CONFIG_S3C_DEV_HSMMC2
  363. static struct resource s3c_hsmmc2_resource[] = {
  364. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  365. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  366. };
  367. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  368. .max_width = 4,
  369. .host_caps = (MMC_CAP_4_BIT_DATA |
  370. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  371. };
  372. struct platform_device s3c_device_hsmmc2 = {
  373. .name = "s3c-sdhci",
  374. .id = 2,
  375. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  376. .resource = s3c_hsmmc2_resource,
  377. .dev = {
  378. .dma_mask = &samsung_device_dma_mask,
  379. .coherent_dma_mask = DMA_BIT_MASK(32),
  380. .platform_data = &s3c_hsmmc2_def_platdata,
  381. },
  382. };
  383. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  384. {
  385. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  386. }
  387. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  388. #ifdef CONFIG_S3C_DEV_HSMMC3
  389. static struct resource s3c_hsmmc3_resource[] = {
  390. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  391. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  392. };
  393. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  394. .max_width = 4,
  395. .host_caps = (MMC_CAP_4_BIT_DATA |
  396. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  397. };
  398. struct platform_device s3c_device_hsmmc3 = {
  399. .name = "s3c-sdhci",
  400. .id = 3,
  401. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  402. .resource = s3c_hsmmc3_resource,
  403. .dev = {
  404. .dma_mask = &samsung_device_dma_mask,
  405. .coherent_dma_mask = DMA_BIT_MASK(32),
  406. .platform_data = &s3c_hsmmc3_def_platdata,
  407. },
  408. };
  409. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  410. {
  411. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  412. }
  413. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  414. /* I2C */
  415. static struct resource s3c_i2c0_resource[] = {
  416. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  417. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  418. };
  419. struct platform_device s3c_device_i2c0 = {
  420. .name = "s3c2410-i2c",
  421. .id = 0,
  422. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  423. .resource = s3c_i2c0_resource,
  424. };
  425. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  426. .flags = 0,
  427. .slave_addr = 0x10,
  428. .frequency = 100*1000,
  429. .sda_delay = 100,
  430. };
  431. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  432. {
  433. struct s3c2410_platform_i2c *npd;
  434. if (!pd) {
  435. pd = &default_i2c_data;
  436. pd->bus_num = 0;
  437. }
  438. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  439. &s3c_device_i2c0);
  440. if (!npd->cfg_gpio)
  441. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  442. }
  443. #ifdef CONFIG_S3C_DEV_I2C1
  444. static struct resource s3c_i2c1_resource[] = {
  445. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  446. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  447. };
  448. struct platform_device s3c_device_i2c1 = {
  449. .name = "s3c2410-i2c",
  450. .id = 1,
  451. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  452. .resource = s3c_i2c1_resource,
  453. };
  454. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  455. {
  456. struct s3c2410_platform_i2c *npd;
  457. if (!pd) {
  458. pd = &default_i2c_data;
  459. pd->bus_num = 1;
  460. }
  461. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  462. &s3c_device_i2c1);
  463. if (!npd->cfg_gpio)
  464. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  465. }
  466. #endif /* CONFIG_S3C_DEV_I2C1 */
  467. #ifdef CONFIG_S3C_DEV_I2C2
  468. static struct resource s3c_i2c2_resource[] = {
  469. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  470. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  471. };
  472. struct platform_device s3c_device_i2c2 = {
  473. .name = "s3c2410-i2c",
  474. .id = 2,
  475. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  476. .resource = s3c_i2c2_resource,
  477. };
  478. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  479. {
  480. struct s3c2410_platform_i2c *npd;
  481. if (!pd) {
  482. pd = &default_i2c_data;
  483. pd->bus_num = 2;
  484. }
  485. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  486. &s3c_device_i2c2);
  487. if (!npd->cfg_gpio)
  488. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  489. }
  490. #endif /* CONFIG_S3C_DEV_I2C2 */
  491. #ifdef CONFIG_S3C_DEV_I2C3
  492. static struct resource s3c_i2c3_resource[] = {
  493. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  494. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  495. };
  496. struct platform_device s3c_device_i2c3 = {
  497. .name = "s3c2440-i2c",
  498. .id = 3,
  499. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  500. .resource = s3c_i2c3_resource,
  501. };
  502. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  503. {
  504. struct s3c2410_platform_i2c *npd;
  505. if (!pd) {
  506. pd = &default_i2c_data;
  507. pd->bus_num = 3;
  508. }
  509. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  510. &s3c_device_i2c3);
  511. if (!npd->cfg_gpio)
  512. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  513. }
  514. #endif /*CONFIG_S3C_DEV_I2C3 */
  515. #ifdef CONFIG_S3C_DEV_I2C4
  516. static struct resource s3c_i2c4_resource[] = {
  517. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  518. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  519. };
  520. struct platform_device s3c_device_i2c4 = {
  521. .name = "s3c2440-i2c",
  522. .id = 4,
  523. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  524. .resource = s3c_i2c4_resource,
  525. };
  526. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  527. {
  528. struct s3c2410_platform_i2c *npd;
  529. if (!pd) {
  530. pd = &default_i2c_data;
  531. pd->bus_num = 4;
  532. }
  533. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  534. &s3c_device_i2c4);
  535. if (!npd->cfg_gpio)
  536. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  537. }
  538. #endif /*CONFIG_S3C_DEV_I2C4 */
  539. #ifdef CONFIG_S3C_DEV_I2C5
  540. static struct resource s3c_i2c5_resource[] = {
  541. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  542. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  543. };
  544. struct platform_device s3c_device_i2c5 = {
  545. .name = "s3c2440-i2c",
  546. .id = 5,
  547. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  548. .resource = s3c_i2c5_resource,
  549. };
  550. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  551. {
  552. struct s3c2410_platform_i2c *npd;
  553. if (!pd) {
  554. pd = &default_i2c_data;
  555. pd->bus_num = 5;
  556. }
  557. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  558. &s3c_device_i2c5);
  559. if (!npd->cfg_gpio)
  560. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  561. }
  562. #endif /*CONFIG_S3C_DEV_I2C5 */
  563. #ifdef CONFIG_S3C_DEV_I2C6
  564. static struct resource s3c_i2c6_resource[] = {
  565. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  566. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  567. };
  568. struct platform_device s3c_device_i2c6 = {
  569. .name = "s3c2440-i2c",
  570. .id = 6,
  571. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  572. .resource = s3c_i2c6_resource,
  573. };
  574. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  575. {
  576. struct s3c2410_platform_i2c *npd;
  577. if (!pd) {
  578. pd = &default_i2c_data;
  579. pd->bus_num = 6;
  580. }
  581. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  582. &s3c_device_i2c6);
  583. if (!npd->cfg_gpio)
  584. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  585. }
  586. #endif /* CONFIG_S3C_DEV_I2C6 */
  587. #ifdef CONFIG_S3C_DEV_I2C7
  588. static struct resource s3c_i2c7_resource[] = {
  589. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  590. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  591. };
  592. struct platform_device s3c_device_i2c7 = {
  593. .name = "s3c2440-i2c",
  594. .id = 7,
  595. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  596. .resource = s3c_i2c7_resource,
  597. };
  598. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  599. {
  600. struct s3c2410_platform_i2c *npd;
  601. if (!pd) {
  602. pd = &default_i2c_data;
  603. pd->bus_num = 7;
  604. }
  605. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  606. &s3c_device_i2c7);
  607. if (!npd->cfg_gpio)
  608. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  609. }
  610. #endif /* CONFIG_S3C_DEV_I2C7 */
  611. /* I2C HDMIPHY */
  612. #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
  613. static struct resource s5p_i2c_resource[] = {
  614. [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
  615. [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
  616. };
  617. struct platform_device s5p_device_i2c_hdmiphy = {
  618. .name = "s3c2440-hdmiphy-i2c",
  619. .id = -1,
  620. .num_resources = ARRAY_SIZE(s5p_i2c_resource),
  621. .resource = s5p_i2c_resource,
  622. };
  623. void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
  624. {
  625. struct s3c2410_platform_i2c *npd;
  626. if (!pd) {
  627. pd = &default_i2c_data;
  628. if (soc_is_exynos4210() ||
  629. soc_is_exynos4212() || soc_is_exynos4412())
  630. pd->bus_num = 8;
  631. else if (soc_is_s5pv210())
  632. pd->bus_num = 3;
  633. else
  634. pd->bus_num = 0;
  635. }
  636. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  637. &s5p_device_i2c_hdmiphy);
  638. }
  639. static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
  640. void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
  641. struct i2c_board_info *mhl_info, int mhl_bus)
  642. {
  643. struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
  644. if (soc_is_exynos4210() ||
  645. soc_is_exynos4212() || soc_is_exynos4412())
  646. pd->hdmiphy_bus = 8;
  647. else if (soc_is_s5pv210())
  648. pd->hdmiphy_bus = 3;
  649. else
  650. pd->hdmiphy_bus = 0;
  651. pd->hdmiphy_info = hdmiphy_info;
  652. pd->mhl_info = mhl_info;
  653. pd->mhl_bus = mhl_bus;
  654. s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
  655. &s5p_device_hdmi);
  656. }
  657. #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
  658. /* I2S */
  659. #ifdef CONFIG_PLAT_S3C24XX
  660. static struct resource s3c_iis_resource[] = {
  661. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  662. };
  663. struct platform_device s3c_device_iis = {
  664. .name = "s3c24xx-iis",
  665. .id = -1,
  666. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  667. .resource = s3c_iis_resource,
  668. .dev = {
  669. .dma_mask = &samsung_device_dma_mask,
  670. .coherent_dma_mask = DMA_BIT_MASK(32),
  671. }
  672. };
  673. #endif /* CONFIG_PLAT_S3C24XX */
  674. /* IDE CFCON */
  675. #ifdef CONFIG_SAMSUNG_DEV_IDE
  676. static struct resource s3c_cfcon_resource[] = {
  677. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  678. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  679. };
  680. struct platform_device s3c_device_cfcon = {
  681. .id = 0,
  682. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  683. .resource = s3c_cfcon_resource,
  684. };
  685. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  686. {
  687. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  688. &s3c_device_cfcon);
  689. }
  690. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  691. /* KEYPAD */
  692. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  693. static struct resource samsung_keypad_resources[] = {
  694. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  695. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  696. };
  697. struct platform_device samsung_device_keypad = {
  698. .name = "samsung-keypad",
  699. .id = -1,
  700. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  701. .resource = samsung_keypad_resources,
  702. };
  703. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  704. {
  705. struct samsung_keypad_platdata *npd;
  706. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  707. &samsung_device_keypad);
  708. if (!npd->cfg_gpio)
  709. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  710. }
  711. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  712. /* LCD Controller */
  713. #ifdef CONFIG_PLAT_S3C24XX
  714. static struct resource s3c_lcd_resource[] = {
  715. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  716. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  717. };
  718. struct platform_device s3c_device_lcd = {
  719. .name = "s3c2410-lcd",
  720. .id = -1,
  721. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  722. .resource = s3c_lcd_resource,
  723. .dev = {
  724. .dma_mask = &samsung_device_dma_mask,
  725. .coherent_dma_mask = DMA_BIT_MASK(32),
  726. }
  727. };
  728. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  729. {
  730. struct s3c2410fb_mach_info *npd;
  731. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  732. if (npd) {
  733. npd->displays = kmemdup(pd->displays,
  734. sizeof(struct s3c2410fb_display) * npd->num_displays,
  735. GFP_KERNEL);
  736. if (!npd->displays)
  737. printk(KERN_ERR "no memory for LCD display data\n");
  738. } else {
  739. printk(KERN_ERR "no memory for LCD platform data\n");
  740. }
  741. }
  742. #endif /* CONFIG_PLAT_S3C24XX */
  743. /* MIPI CSIS */
  744. #ifdef CONFIG_S5P_DEV_CSIS0
  745. static struct resource s5p_mipi_csis0_resource[] = {
  746. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
  747. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
  748. };
  749. struct platform_device s5p_device_mipi_csis0 = {
  750. .name = "s5p-mipi-csis",
  751. .id = 0,
  752. .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
  753. .resource = s5p_mipi_csis0_resource,
  754. };
  755. #endif /* CONFIG_S5P_DEV_CSIS0 */
  756. #ifdef CONFIG_S5P_DEV_CSIS1
  757. static struct resource s5p_mipi_csis1_resource[] = {
  758. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
  759. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
  760. };
  761. struct platform_device s5p_device_mipi_csis1 = {
  762. .name = "s5p-mipi-csis",
  763. .id = 1,
  764. .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
  765. .resource = s5p_mipi_csis1_resource,
  766. };
  767. #endif
  768. /* NAND */
  769. #ifdef CONFIG_S3C_DEV_NAND
  770. static struct resource s3c_nand_resource[] = {
  771. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  772. };
  773. struct platform_device s3c_device_nand = {
  774. .name = "s3c2410-nand",
  775. .id = -1,
  776. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  777. .resource = s3c_nand_resource,
  778. };
  779. /*
  780. * s3c_nand_copy_set() - copy nand set data
  781. * @set: The new structure, directly copied from the old.
  782. *
  783. * Copy all the fields from the NAND set field from what is probably __initdata
  784. * to new kernel memory. The code returns 0 if the copy happened correctly or
  785. * an error code for the calling function to display.
  786. *
  787. * Note, we currently do not try and look to see if we've already copied the
  788. * data in a previous set.
  789. */
  790. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  791. {
  792. void *ptr;
  793. int size;
  794. size = sizeof(struct mtd_partition) * set->nr_partitions;
  795. if (size) {
  796. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  797. set->partitions = ptr;
  798. if (!ptr)
  799. return -ENOMEM;
  800. }
  801. if (set->nr_map && set->nr_chips) {
  802. size = sizeof(int) * set->nr_chips;
  803. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  804. set->nr_map = ptr;
  805. if (!ptr)
  806. return -ENOMEM;
  807. }
  808. if (set->ecc_layout) {
  809. ptr = kmemdup(set->ecc_layout,
  810. sizeof(struct nand_ecclayout), GFP_KERNEL);
  811. set->ecc_layout = ptr;
  812. if (!ptr)
  813. return -ENOMEM;
  814. }
  815. return 0;
  816. }
  817. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  818. {
  819. struct s3c2410_platform_nand *npd;
  820. int size;
  821. int ret;
  822. /* note, if we get a failure in allocation, we simply drop out of the
  823. * function. If there is so little memory available at initialisation
  824. * time then there is little chance the system is going to run.
  825. */
  826. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  827. &s3c_device_nand);
  828. if (!npd)
  829. return;
  830. /* now see if we need to copy any of the nand set data */
  831. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  832. if (size) {
  833. struct s3c2410_nand_set *from = npd->sets;
  834. struct s3c2410_nand_set *to;
  835. int i;
  836. to = kmemdup(from, size, GFP_KERNEL);
  837. npd->sets = to; /* set, even if we failed */
  838. if (!to) {
  839. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  840. return;
  841. }
  842. for (i = 0; i < npd->nr_sets; i++) {
  843. ret = s3c_nand_copy_set(to);
  844. if (ret) {
  845. printk(KERN_ERR "%s: failed to copy set %d\n",
  846. __func__, i);
  847. return;
  848. }
  849. to++;
  850. }
  851. }
  852. }
  853. #endif /* CONFIG_S3C_DEV_NAND */
  854. /* ONENAND */
  855. #ifdef CONFIG_S3C_DEV_ONENAND
  856. static struct resource s3c_onenand_resources[] = {
  857. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  858. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  859. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  860. };
  861. struct platform_device s3c_device_onenand = {
  862. .name = "samsung-onenand",
  863. .id = 0,
  864. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  865. .resource = s3c_onenand_resources,
  866. };
  867. #endif /* CONFIG_S3C_DEV_ONENAND */
  868. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  869. static struct resource s3c64xx_onenand1_resources[] = {
  870. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  871. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  872. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  873. };
  874. struct platform_device s3c64xx_device_onenand1 = {
  875. .name = "samsung-onenand",
  876. .id = 1,
  877. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  878. .resource = s3c64xx_onenand1_resources,
  879. };
  880. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  881. {
  882. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  883. &s3c64xx_device_onenand1);
  884. }
  885. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  886. #ifdef CONFIG_S5P_DEV_ONENAND
  887. static struct resource s5p_onenand_resources[] = {
  888. [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
  889. [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
  890. [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
  891. };
  892. struct platform_device s5p_device_onenand = {
  893. .name = "s5pc110-onenand",
  894. .id = -1,
  895. .num_resources = ARRAY_SIZE(s5p_onenand_resources),
  896. .resource = s5p_onenand_resources,
  897. };
  898. #endif /* CONFIG_S5P_DEV_ONENAND */
  899. /* PMU */
  900. #if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
  901. static struct resource s5p_pmu_resource[] = {
  902. DEFINE_RES_IRQ(IRQ_PMU)
  903. };
  904. static struct platform_device s5p_device_pmu = {
  905. .name = "arm-pmu",
  906. .id = -1,
  907. .num_resources = ARRAY_SIZE(s5p_pmu_resource),
  908. .resource = s5p_pmu_resource,
  909. };
  910. static int __init s5p_pmu_init(void)
  911. {
  912. platform_device_register(&s5p_device_pmu);
  913. return 0;
  914. }
  915. arch_initcall(s5p_pmu_init);
  916. #endif /* CONFIG_PLAT_S5P */
  917. /* PWM Timer */
  918. #ifdef CONFIG_SAMSUNG_DEV_PWM
  919. #define TIMER_RESOURCE_SIZE (1)
  920. #define TIMER_RESOURCE(_tmr, _irq) \
  921. (struct resource [TIMER_RESOURCE_SIZE]) { \
  922. [0] = { \
  923. .start = _irq, \
  924. .end = _irq, \
  925. .flags = IORESOURCE_IRQ \
  926. } \
  927. }
  928. #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
  929. .name = "s3c24xx-pwm", \
  930. .id = _tmr_no, \
  931. .num_resources = TIMER_RESOURCE_SIZE, \
  932. .resource = TIMER_RESOURCE(_tmr_no, _irq), \
  933. /*
  934. * since we already have an static mapping for the timer,
  935. * we do not bother setting any IO resource for the base.
  936. */
  937. struct platform_device s3c_device_timer[] = {
  938. [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
  939. [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
  940. [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
  941. [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  942. [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  943. };
  944. static struct resource samsung_pwm_resource[] = {
  945. DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
  946. };
  947. struct platform_device samsung_device_pwm = {
  948. .name = "samsung-pwm",
  949. .id = -1,
  950. .num_resources = ARRAY_SIZE(samsung_pwm_resource),
  951. .resource = samsung_pwm_resource,
  952. };
  953. void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
  954. {
  955. samsung_device_pwm.dev.platform_data = pd;
  956. }
  957. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  958. /* RTC */
  959. #ifdef CONFIG_PLAT_S3C24XX
  960. static struct resource s3c_rtc_resource[] = {
  961. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  962. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  963. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  964. };
  965. struct platform_device s3c_device_rtc = {
  966. .name = "s3c2410-rtc",
  967. .id = -1,
  968. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  969. .resource = s3c_rtc_resource,
  970. };
  971. #endif /* CONFIG_PLAT_S3C24XX */
  972. #ifdef CONFIG_S3C_DEV_RTC
  973. static struct resource s3c_rtc_resource[] = {
  974. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  975. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  976. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  977. };
  978. struct platform_device s3c_device_rtc = {
  979. .name = "s3c64xx-rtc",
  980. .id = -1,
  981. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  982. .resource = s3c_rtc_resource,
  983. };
  984. #endif /* CONFIG_S3C_DEV_RTC */
  985. /* SDI */
  986. #ifdef CONFIG_PLAT_S3C24XX
  987. static struct resource s3c_sdi_resource[] = {
  988. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  989. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  990. };
  991. struct platform_device s3c_device_sdi = {
  992. .name = "s3c2410-sdi",
  993. .id = -1,
  994. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  995. .resource = s3c_sdi_resource,
  996. };
  997. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  998. {
  999. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  1000. &s3c_device_sdi);
  1001. }
  1002. #endif /* CONFIG_PLAT_S3C24XX */
  1003. /* SPI */
  1004. #ifdef CONFIG_PLAT_S3C24XX
  1005. static struct resource s3c_spi0_resource[] = {
  1006. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  1007. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  1008. };
  1009. struct platform_device s3c_device_spi0 = {
  1010. .name = "s3c2410-spi",
  1011. .id = 0,
  1012. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  1013. .resource = s3c_spi0_resource,
  1014. .dev = {
  1015. .dma_mask = &samsung_device_dma_mask,
  1016. .coherent_dma_mask = DMA_BIT_MASK(32),
  1017. }
  1018. };
  1019. static struct resource s3c_spi1_resource[] = {
  1020. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  1021. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  1022. };
  1023. struct platform_device s3c_device_spi1 = {
  1024. .name = "s3c2410-spi",
  1025. .id = 1,
  1026. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  1027. .resource = s3c_spi1_resource,
  1028. .dev = {
  1029. .dma_mask = &samsung_device_dma_mask,
  1030. .coherent_dma_mask = DMA_BIT_MASK(32),
  1031. }
  1032. };
  1033. #endif /* CONFIG_PLAT_S3C24XX */
  1034. /* Touchscreen */
  1035. #ifdef CONFIG_PLAT_S3C24XX
  1036. static struct resource s3c_ts_resource[] = {
  1037. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  1038. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1039. };
  1040. struct platform_device s3c_device_ts = {
  1041. .name = "s3c2410-ts",
  1042. .id = -1,
  1043. .dev.parent = &s3c_device_adc.dev,
  1044. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1045. .resource = s3c_ts_resource,
  1046. };
  1047. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  1048. {
  1049. s3c_set_platdata(hard_s3c2410ts_info,
  1050. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  1051. }
  1052. #endif /* CONFIG_PLAT_S3C24XX */
  1053. #ifdef CONFIG_SAMSUNG_DEV_TS
  1054. static struct resource s3c_ts_resource[] = {
  1055. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  1056. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1057. };
  1058. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  1059. .delay = 10000,
  1060. .presc = 49,
  1061. .oversampling_shift = 2,
  1062. };
  1063. struct platform_device s3c_device_ts = {
  1064. .name = "s3c64xx-ts",
  1065. .id = -1,
  1066. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1067. .resource = s3c_ts_resource,
  1068. };
  1069. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  1070. {
  1071. if (!pd)
  1072. pd = &default_ts_data;
  1073. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  1074. &s3c_device_ts);
  1075. }
  1076. #endif /* CONFIG_SAMSUNG_DEV_TS */
  1077. /* TV */
  1078. #ifdef CONFIG_S5P_DEV_TV
  1079. static struct resource s5p_hdmi_resources[] = {
  1080. [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
  1081. [1] = DEFINE_RES_IRQ(IRQ_HDMI),
  1082. };
  1083. struct platform_device s5p_device_hdmi = {
  1084. .name = "s5p-hdmi",
  1085. .id = -1,
  1086. .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
  1087. .resource = s5p_hdmi_resources,
  1088. };
  1089. static struct resource s5p_sdo_resources[] = {
  1090. [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
  1091. [1] = DEFINE_RES_IRQ(IRQ_SDO),
  1092. };
  1093. struct platform_device s5p_device_sdo = {
  1094. .name = "s5p-sdo",
  1095. .id = -1,
  1096. .num_resources = ARRAY_SIZE(s5p_sdo_resources),
  1097. .resource = s5p_sdo_resources,
  1098. };
  1099. static struct resource s5p_mixer_resources[] = {
  1100. [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
  1101. [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
  1102. [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
  1103. };
  1104. struct platform_device s5p_device_mixer = {
  1105. .name = "s5p-mixer",
  1106. .id = -1,
  1107. .num_resources = ARRAY_SIZE(s5p_mixer_resources),
  1108. .resource = s5p_mixer_resources,
  1109. .dev = {
  1110. .dma_mask = &samsung_device_dma_mask,
  1111. .coherent_dma_mask = DMA_BIT_MASK(32),
  1112. }
  1113. };
  1114. #endif /* CONFIG_S5P_DEV_TV */
  1115. /* USB */
  1116. #ifdef CONFIG_S3C_DEV_USB_HOST
  1117. static struct resource s3c_usb_resource[] = {
  1118. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  1119. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  1120. };
  1121. struct platform_device s3c_device_ohci = {
  1122. .name = "s3c2410-ohci",
  1123. .id = -1,
  1124. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  1125. .resource = s3c_usb_resource,
  1126. .dev = {
  1127. .dma_mask = &samsung_device_dma_mask,
  1128. .coherent_dma_mask = DMA_BIT_MASK(32),
  1129. }
  1130. };
  1131. /*
  1132. * s3c_ohci_set_platdata - initialise OHCI device platform data
  1133. * @info: The platform data.
  1134. *
  1135. * This call copies the @info passed in and sets the device .platform_data
  1136. * field to that copy. The @info is copied so that the original can be marked
  1137. * __initdata.
  1138. */
  1139. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  1140. {
  1141. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  1142. &s3c_device_ohci);
  1143. }
  1144. #endif /* CONFIG_S3C_DEV_USB_HOST */
  1145. /* USB Device (Gadget) */
  1146. #ifdef CONFIG_PLAT_S3C24XX
  1147. static struct resource s3c_usbgadget_resource[] = {
  1148. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  1149. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1150. };
  1151. struct platform_device s3c_device_usbgadget = {
  1152. .name = "s3c2410-usbgadget",
  1153. .id = -1,
  1154. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  1155. .resource = s3c_usbgadget_resource,
  1156. };
  1157. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  1158. {
  1159. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  1160. }
  1161. #endif /* CONFIG_PLAT_S3C24XX */
  1162. /* USB EHCI Host Controller */
  1163. #ifdef CONFIG_S5P_DEV_USB_EHCI
  1164. static struct resource s5p_ehci_resource[] = {
  1165. [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
  1166. [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
  1167. };
  1168. struct platform_device s5p_device_ehci = {
  1169. .name = "s5p-ehci",
  1170. .id = -1,
  1171. .num_resources = ARRAY_SIZE(s5p_ehci_resource),
  1172. .resource = s5p_ehci_resource,
  1173. .dev = {
  1174. .dma_mask = &samsung_device_dma_mask,
  1175. .coherent_dma_mask = DMA_BIT_MASK(32),
  1176. }
  1177. };
  1178. void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
  1179. {
  1180. struct s5p_ehci_platdata *npd;
  1181. npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
  1182. &s5p_device_ehci);
  1183. if (!npd->phy_init)
  1184. npd->phy_init = s5p_usb_phy_init;
  1185. if (!npd->phy_exit)
  1186. npd->phy_exit = s5p_usb_phy_exit;
  1187. }
  1188. #endif /* CONFIG_S5P_DEV_USB_EHCI */
  1189. /* USB HSOTG */
  1190. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  1191. static struct resource s3c_usb_hsotg_resources[] = {
  1192. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  1193. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  1194. };
  1195. struct platform_device s3c_device_usb_hsotg = {
  1196. .name = "s3c-hsotg",
  1197. .id = -1,
  1198. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  1199. .resource = s3c_usb_hsotg_resources,
  1200. .dev = {
  1201. .dma_mask = &samsung_device_dma_mask,
  1202. .coherent_dma_mask = DMA_BIT_MASK(32),
  1203. },
  1204. };
  1205. void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
  1206. {
  1207. struct s3c_hsotg_plat *npd;
  1208. npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
  1209. &s3c_device_usb_hsotg);
  1210. if (!npd->phy_init)
  1211. npd->phy_init = s5p_usb_phy_init;
  1212. if (!npd->phy_exit)
  1213. npd->phy_exit = s5p_usb_phy_exit;
  1214. }
  1215. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  1216. /* USB High Spped 2.0 Device (Gadget) */
  1217. #ifdef CONFIG_PLAT_S3C24XX
  1218. static struct resource s3c_hsudc_resource[] = {
  1219. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  1220. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1221. };
  1222. struct platform_device s3c_device_usb_hsudc = {
  1223. .name = "s3c-hsudc",
  1224. .id = -1,
  1225. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  1226. .resource = s3c_hsudc_resource,
  1227. .dev = {
  1228. .dma_mask = &samsung_device_dma_mask,
  1229. .coherent_dma_mask = DMA_BIT_MASK(32),
  1230. },
  1231. };
  1232. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  1233. {
  1234. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  1235. }
  1236. #endif /* CONFIG_PLAT_S3C24XX */
  1237. /* WDT */
  1238. #ifdef CONFIG_S3C_DEV_WDT
  1239. static struct resource s3c_wdt_resource[] = {
  1240. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  1241. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  1242. };
  1243. struct platform_device s3c_device_wdt = {
  1244. .name = "s3c2410-wdt",
  1245. .id = -1,
  1246. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  1247. .resource = s3c_wdt_resource,
  1248. };
  1249. #endif /* CONFIG_S3C_DEV_WDT */
  1250. #ifdef CONFIG_S3C64XX_DEV_SPI0
  1251. static struct resource s3c64xx_spi0_resource[] = {
  1252. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  1253. [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
  1254. [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
  1255. [3] = DEFINE_RES_IRQ(IRQ_SPI0),
  1256. };
  1257. struct platform_device s3c64xx_device_spi0 = {
  1258. .name = "s3c6410-spi",
  1259. .id = 0,
  1260. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  1261. .resource = s3c64xx_spi0_resource,
  1262. .dev = {
  1263. .dma_mask = &samsung_device_dma_mask,
  1264. .coherent_dma_mask = DMA_BIT_MASK(32),
  1265. },
  1266. };
  1267. void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1268. int num_cs)
  1269. {
  1270. struct s3c64xx_spi_info pd;
  1271. /* Reject invalid configuration */
  1272. if (!num_cs || src_clk_nr < 0) {
  1273. pr_err("%s: Invalid SPI configuration\n", __func__);
  1274. return;
  1275. }
  1276. pd.num_cs = num_cs;
  1277. pd.src_clk_nr = src_clk_nr;
  1278. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
  1279. #ifdef CONFIG_PL330_DMA
  1280. pd.filter = pl330_filter;
  1281. #endif
  1282. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  1283. }
  1284. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  1285. #ifdef CONFIG_S3C64XX_DEV_SPI1
  1286. static struct resource s3c64xx_spi1_resource[] = {
  1287. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  1288. [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
  1289. [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
  1290. [3] = DEFINE_RES_IRQ(IRQ_SPI1),
  1291. };
  1292. struct platform_device s3c64xx_device_spi1 = {
  1293. .name = "s3c6410-spi",
  1294. .id = 1,
  1295. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  1296. .resource = s3c64xx_spi1_resource,
  1297. .dev = {
  1298. .dma_mask = &samsung_device_dma_mask,
  1299. .coherent_dma_mask = DMA_BIT_MASK(32),
  1300. },
  1301. };
  1302. void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1303. int num_cs)
  1304. {
  1305. struct s3c64xx_spi_info pd;
  1306. /* Reject invalid configuration */
  1307. if (!num_cs || src_clk_nr < 0) {
  1308. pr_err("%s: Invalid SPI configuration\n", __func__);
  1309. return;
  1310. }
  1311. pd.num_cs = num_cs;
  1312. pd.src_clk_nr = src_clk_nr;
  1313. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
  1314. #ifdef CONFIG_PL330_DMA
  1315. pd.filter = pl330_filter;
  1316. #endif
  1317. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
  1318. }
  1319. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  1320. #ifdef CONFIG_S3C64XX_DEV_SPI2
  1321. static struct resource s3c64xx_spi2_resource[] = {
  1322. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  1323. [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
  1324. [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
  1325. [3] = DEFINE_RES_IRQ(IRQ_SPI2),
  1326. };
  1327. struct platform_device s3c64xx_device_spi2 = {
  1328. .name = "s3c6410-spi",
  1329. .id = 2,
  1330. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  1331. .resource = s3c64xx_spi2_resource,
  1332. .dev = {
  1333. .dma_mask = &samsung_device_dma_mask,
  1334. .coherent_dma_mask = DMA_BIT_MASK(32),
  1335. },
  1336. };
  1337. void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1338. int num_cs)
  1339. {
  1340. struct s3c64xx_spi_info pd;
  1341. /* Reject invalid configuration */
  1342. if (!num_cs || src_clk_nr < 0) {
  1343. pr_err("%s: Invalid SPI configuration\n", __func__);
  1344. return;
  1345. }
  1346. pd.num_cs = num_cs;
  1347. pd.src_clk_nr = src_clk_nr;
  1348. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
  1349. #ifdef CONFIG_PL330_DMA
  1350. pd.filter = pl330_filter;
  1351. #endif
  1352. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
  1353. }
  1354. #endif /* CONFIG_S3C64XX_DEV_SPI2 */