acpi-cpufreq.c 20 KB

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  1. /*
  2. * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
  8. *
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. *
  25. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpufreq.h>
  33. #include <linux/compiler.h>
  34. #include <linux/dmi.h>
  35. #include <linux/acpi.h>
  36. #include <acpi/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/msr.h>
  39. #include <asm/processor.h>
  40. #include <asm/cpufeature.h>
  41. #include <asm/delay.h>
  42. #include <asm/uaccess.h>
  43. #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
  44. MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  45. MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  46. MODULE_LICENSE("GPL");
  47. enum {
  48. UNDEFINED_CAPABLE = 0,
  49. SYSTEM_INTEL_MSR_CAPABLE,
  50. SYSTEM_IO_CAPABLE,
  51. };
  52. #define INTEL_MSR_RANGE (0xffff)
  53. #define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1)
  54. struct acpi_cpufreq_data {
  55. struct acpi_processor_performance *acpi_data;
  56. struct cpufreq_frequency_table *freq_table;
  57. unsigned int max_freq;
  58. unsigned int resume;
  59. unsigned int cpu_feature;
  60. };
  61. static struct acpi_cpufreq_data *drv_data[NR_CPUS];
  62. static struct acpi_processor_performance *acpi_perf_data[NR_CPUS];
  63. static struct cpufreq_driver acpi_cpufreq_driver;
  64. static unsigned int acpi_pstate_strict;
  65. static int check_est_cpu(unsigned int cpuid)
  66. {
  67. struct cpuinfo_x86 *cpu = &cpu_data[cpuid];
  68. if (cpu->x86_vendor != X86_VENDOR_INTEL ||
  69. !cpu_has(cpu, X86_FEATURE_EST))
  70. return 0;
  71. return 1;
  72. }
  73. static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
  74. {
  75. struct acpi_processor_performance *perf;
  76. int i;
  77. perf = data->acpi_data;
  78. for (i=0; i<perf->state_count; i++) {
  79. if (value == perf->states[i].status)
  80. return data->freq_table[i].frequency;
  81. }
  82. return 0;
  83. }
  84. static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
  85. {
  86. int i;
  87. struct acpi_processor_performance *perf;
  88. msr &= INTEL_MSR_RANGE;
  89. perf = data->acpi_data;
  90. for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
  91. if (msr == perf->states[data->freq_table[i].index].status)
  92. return data->freq_table[i].frequency;
  93. }
  94. return data->freq_table[0].frequency;
  95. }
  96. static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
  97. {
  98. switch (data->cpu_feature) {
  99. case SYSTEM_INTEL_MSR_CAPABLE:
  100. return extract_msr(val, data);
  101. case SYSTEM_IO_CAPABLE:
  102. return extract_io(val, data);
  103. default:
  104. return 0;
  105. }
  106. }
  107. static void wrport(u16 port, u8 bit_width, u32 value)
  108. {
  109. if (bit_width <= 8)
  110. outb(value, port);
  111. else if (bit_width <= 16)
  112. outw(value, port);
  113. else if (bit_width <= 32)
  114. outl(value, port);
  115. }
  116. static void rdport(u16 port, u8 bit_width, u32 * ret)
  117. {
  118. *ret = 0;
  119. if (bit_width <= 8)
  120. *ret = inb(port);
  121. else if (bit_width <= 16)
  122. *ret = inw(port);
  123. else if (bit_width <= 32)
  124. *ret = inl(port);
  125. }
  126. struct msr_addr {
  127. u32 reg;
  128. };
  129. struct io_addr {
  130. u16 port;
  131. u8 bit_width;
  132. };
  133. typedef union {
  134. struct msr_addr msr;
  135. struct io_addr io;
  136. } drv_addr_union;
  137. struct drv_cmd {
  138. unsigned int type;
  139. cpumask_t mask;
  140. drv_addr_union addr;
  141. u32 val;
  142. };
  143. static void do_drv_read(struct drv_cmd *cmd)
  144. {
  145. u32 h;
  146. switch (cmd->type) {
  147. case SYSTEM_INTEL_MSR_CAPABLE:
  148. rdmsr(cmd->addr.msr.reg, cmd->val, h);
  149. break;
  150. case SYSTEM_IO_CAPABLE:
  151. rdport(cmd->addr.io.port, cmd->addr.io.bit_width, &cmd->val);
  152. break;
  153. default:
  154. break;
  155. }
  156. }
  157. static void do_drv_write(struct drv_cmd *cmd)
  158. {
  159. u32 h = 0;
  160. switch (cmd->type) {
  161. case SYSTEM_INTEL_MSR_CAPABLE:
  162. wrmsr(cmd->addr.msr.reg, cmd->val, h);
  163. break;
  164. case SYSTEM_IO_CAPABLE:
  165. wrport(cmd->addr.io.port, cmd->addr.io.bit_width, cmd->val);
  166. break;
  167. default:
  168. break;
  169. }
  170. }
  171. static void drv_read(struct drv_cmd *cmd)
  172. {
  173. cpumask_t saved_mask = current->cpus_allowed;
  174. cmd->val = 0;
  175. set_cpus_allowed(current, cmd->mask);
  176. do_drv_read(cmd);
  177. set_cpus_allowed(current, saved_mask);
  178. }
  179. static void drv_write(struct drv_cmd *cmd)
  180. {
  181. cpumask_t saved_mask = current->cpus_allowed;
  182. unsigned int i;
  183. for_each_cpu_mask(i, cmd->mask) {
  184. set_cpus_allowed(current, cpumask_of_cpu(i));
  185. do_drv_write(cmd);
  186. }
  187. set_cpus_allowed(current, saved_mask);
  188. return;
  189. }
  190. static u32 get_cur_val(cpumask_t mask)
  191. {
  192. struct acpi_processor_performance *perf;
  193. struct drv_cmd cmd;
  194. if (unlikely(cpus_empty(mask)))
  195. return 0;
  196. switch (drv_data[first_cpu(mask)]->cpu_feature) {
  197. case SYSTEM_INTEL_MSR_CAPABLE:
  198. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  199. cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
  200. break;
  201. case SYSTEM_IO_CAPABLE:
  202. cmd.type = SYSTEM_IO_CAPABLE;
  203. perf = drv_data[first_cpu(mask)]->acpi_data;
  204. cmd.addr.io.port = perf->control_register.address;
  205. cmd.addr.io.bit_width = perf->control_register.bit_width;
  206. break;
  207. default:
  208. return 0;
  209. }
  210. cmd.mask = mask;
  211. drv_read(&cmd);
  212. dprintk("get_cur_val = %u\n", cmd.val);
  213. return cmd.val;
  214. }
  215. /*
  216. * Return the measured active (C0) frequency on this CPU since last call
  217. * to this function.
  218. * Input: cpu number
  219. * Return: Average CPU frequency in terms of max frequency (zero on error)
  220. *
  221. * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
  222. * over a period of time, while CPU is in C0 state.
  223. * IA32_MPERF counts at the rate of max advertised frequency
  224. * IA32_APERF counts at the rate of actual CPU frequency
  225. * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
  226. * no meaning should be associated with absolute values of these MSRs.
  227. */
  228. static unsigned int get_measured_perf(unsigned int cpu)
  229. {
  230. union {
  231. struct {
  232. u32 lo;
  233. u32 hi;
  234. } split;
  235. u64 whole;
  236. } aperf_cur, mperf_cur;
  237. cpumask_t saved_mask;
  238. unsigned int perf_percent;
  239. unsigned int retval;
  240. saved_mask = current->cpus_allowed;
  241. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  242. if (get_cpu() != cpu) {
  243. /* We were not able to run on requested processor */
  244. put_cpu();
  245. return 0;
  246. }
  247. rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi);
  248. rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi);
  249. wrmsr(MSR_IA32_APERF, 0,0);
  250. wrmsr(MSR_IA32_MPERF, 0,0);
  251. #ifdef __i386__
  252. /*
  253. * We dont want to do 64 bit divide with 32 bit kernel
  254. * Get an approximate value. Return failure in case we cannot get
  255. * an approximate value.
  256. */
  257. if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) {
  258. int shift_count;
  259. u32 h;
  260. h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi);
  261. shift_count = fls(h);
  262. aperf_cur.whole >>= shift_count;
  263. mperf_cur.whole >>= shift_count;
  264. }
  265. if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) {
  266. int shift_count = 7;
  267. aperf_cur.split.lo >>= shift_count;
  268. mperf_cur.split.lo >>= shift_count;
  269. }
  270. if (aperf_cur.split.lo && mperf_cur.split.lo)
  271. perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo;
  272. else
  273. perf_percent = 0;
  274. #else
  275. if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) {
  276. int shift_count = 7;
  277. aperf_cur.whole >>= shift_count;
  278. mperf_cur.whole >>= shift_count;
  279. }
  280. if (aperf_cur.whole && mperf_cur.whole)
  281. perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole;
  282. else
  283. perf_percent = 0;
  284. #endif
  285. retval = drv_data[cpu]->max_freq * perf_percent / 100;
  286. put_cpu();
  287. set_cpus_allowed(current, saved_mask);
  288. dprintk("cpu %d: performance percent %d\n", cpu, perf_percent);
  289. return retval;
  290. }
  291. static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
  292. {
  293. struct acpi_cpufreq_data *data = drv_data[cpu];
  294. unsigned int freq;
  295. dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
  296. if (unlikely(data == NULL ||
  297. data->acpi_data == NULL || data->freq_table == NULL)) {
  298. return 0;
  299. }
  300. freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data);
  301. dprintk("cur freq = %u\n", freq);
  302. return freq;
  303. }
  304. static unsigned int check_freqs(cpumask_t mask, unsigned int freq,
  305. struct acpi_cpufreq_data *data)
  306. {
  307. unsigned int cur_freq;
  308. unsigned int i;
  309. for (i=0; i<100; i++) {
  310. cur_freq = extract_freq(get_cur_val(mask), data);
  311. if (cur_freq == freq)
  312. return 1;
  313. udelay(10);
  314. }
  315. return 0;
  316. }
  317. static int acpi_cpufreq_target(struct cpufreq_policy *policy,
  318. unsigned int target_freq, unsigned int relation)
  319. {
  320. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  321. struct acpi_processor_performance *perf;
  322. struct cpufreq_freqs freqs;
  323. cpumask_t online_policy_cpus;
  324. struct drv_cmd cmd;
  325. unsigned int msr;
  326. unsigned int next_state = 0;
  327. unsigned int next_perf_state = 0;
  328. unsigned int i;
  329. int result = 0;
  330. dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
  331. if (unlikely(data == NULL ||
  332. data->acpi_data == NULL || data->freq_table == NULL)) {
  333. return -ENODEV;
  334. }
  335. perf = data->acpi_data;
  336. result = cpufreq_frequency_table_target(policy,
  337. data->freq_table,
  338. target_freq,
  339. relation, &next_state);
  340. if (unlikely(result))
  341. return -ENODEV;
  342. #ifdef CONFIG_HOTPLUG_CPU
  343. /* cpufreq holds the hotplug lock, so we are safe from here on */
  344. cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
  345. #else
  346. online_policy_cpus = policy->cpus;
  347. #endif
  348. next_perf_state = data->freq_table[next_state].index;
  349. if (perf->state == next_perf_state) {
  350. if (unlikely(data->resume)) {
  351. dprintk("Called after resume, resetting to P%d\n",
  352. next_perf_state);
  353. data->resume = 0;
  354. } else {
  355. dprintk("Already at target state (P%d)\n",
  356. next_perf_state);
  357. return 0;
  358. }
  359. }
  360. switch (data->cpu_feature) {
  361. case SYSTEM_INTEL_MSR_CAPABLE:
  362. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  363. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  364. msr =
  365. (u32) perf->states[next_perf_state].
  366. control & INTEL_MSR_RANGE;
  367. cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr;
  368. break;
  369. case SYSTEM_IO_CAPABLE:
  370. cmd.type = SYSTEM_IO_CAPABLE;
  371. cmd.addr.io.port = perf->control_register.address;
  372. cmd.addr.io.bit_width = perf->control_register.bit_width;
  373. cmd.val = (u32) perf->states[next_perf_state].control;
  374. break;
  375. default:
  376. return -ENODEV;
  377. }
  378. cpus_clear(cmd.mask);
  379. if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
  380. cmd.mask = online_policy_cpus;
  381. else
  382. cpu_set(policy->cpu, cmd.mask);
  383. freqs.old = data->freq_table[perf->state].frequency;
  384. freqs.new = data->freq_table[next_perf_state].frequency;
  385. for_each_cpu_mask(i, cmd.mask) {
  386. freqs.cpu = i;
  387. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  388. }
  389. drv_write(&cmd);
  390. if (acpi_pstate_strict) {
  391. if (!check_freqs(cmd.mask, freqs.new, data)) {
  392. dprintk("acpi_cpufreq_target failed (%d)\n",
  393. policy->cpu);
  394. return -EAGAIN;
  395. }
  396. }
  397. for_each_cpu_mask(i, cmd.mask) {
  398. freqs.cpu = i;
  399. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  400. }
  401. perf->state = next_perf_state;
  402. return result;
  403. }
  404. static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
  405. {
  406. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  407. dprintk("acpi_cpufreq_verify\n");
  408. return cpufreq_frequency_table_verify(policy, data->freq_table);
  409. }
  410. static unsigned long
  411. acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  412. {
  413. struct acpi_processor_performance *perf = data->acpi_data;
  414. if (cpu_khz) {
  415. /* search the closest match to cpu_khz */
  416. unsigned int i;
  417. unsigned long freq;
  418. unsigned long freqn = perf->states[0].core_frequency * 1000;
  419. for (i=0; i<(perf->state_count-1); i++) {
  420. freq = freqn;
  421. freqn = perf->states[i+1].core_frequency * 1000;
  422. if ((2 * cpu_khz) > (freqn + freq)) {
  423. perf->state = i;
  424. return freq;
  425. }
  426. }
  427. perf->state = perf->state_count-1;
  428. return freqn;
  429. } else {
  430. /* assume CPU is at P0... */
  431. perf->state = 0;
  432. return perf->states[0].core_frequency * 1000;
  433. }
  434. }
  435. /*
  436. * acpi_cpufreq_early_init - initialize ACPI P-States library
  437. *
  438. * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
  439. * in order to determine correct frequency and voltage pairings. We can
  440. * do _PDC and _PSD and find out the processor dependency for the
  441. * actual init that will happen later...
  442. */
  443. static int acpi_cpufreq_early_init(void)
  444. {
  445. struct acpi_processor_performance *data;
  446. cpumask_t covered;
  447. unsigned int i, j;
  448. dprintk("acpi_cpufreq_early_init\n");
  449. for_each_possible_cpu(i) {
  450. data = kzalloc(sizeof(struct acpi_processor_performance),
  451. GFP_KERNEL);
  452. if (!data) {
  453. for_each_cpu_mask(j, covered) {
  454. kfree(acpi_perf_data[j]);
  455. acpi_perf_data[j] = NULL;
  456. }
  457. return -ENOMEM;
  458. }
  459. acpi_perf_data[i] = data;
  460. cpu_set(i, covered);
  461. }
  462. /* Do initialization in ACPI core */
  463. acpi_processor_preregister_performance(acpi_perf_data);
  464. return 0;
  465. }
  466. /*
  467. * Some BIOSes do SW_ANY coordination internally, either set it up in hw
  468. * or do it in BIOS firmware and won't inform about it to OS. If not
  469. * detected, this has a side effect of making CPU run at a different speed
  470. * than OS intended it to run at. Detect it and handle it cleanly.
  471. */
  472. static int bios_with_sw_any_bug;
  473. static int sw_any_bug_found(struct dmi_system_id *d)
  474. {
  475. bios_with_sw_any_bug = 1;
  476. return 0;
  477. }
  478. static struct dmi_system_id sw_any_bug_dmi_table[] = {
  479. {
  480. .callback = sw_any_bug_found,
  481. .ident = "Supermicro Server X6DLP",
  482. .matches = {
  483. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  484. DMI_MATCH(DMI_BIOS_VERSION, "080010"),
  485. DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
  486. },
  487. },
  488. { }
  489. };
  490. static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
  491. {
  492. unsigned int i;
  493. unsigned int valid_states = 0;
  494. unsigned int cpu = policy->cpu;
  495. struct acpi_cpufreq_data *data;
  496. unsigned int result = 0;
  497. struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
  498. struct acpi_processor_performance *perf;
  499. dprintk("acpi_cpufreq_cpu_init\n");
  500. if (!acpi_perf_data[cpu])
  501. return -ENODEV;
  502. data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
  503. if (!data)
  504. return -ENOMEM;
  505. data->acpi_data = acpi_perf_data[cpu];
  506. drv_data[cpu] = data;
  507. if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
  508. acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
  509. result = acpi_processor_register_performance(data->acpi_data, cpu);
  510. if (result)
  511. goto err_free;
  512. perf = data->acpi_data;
  513. policy->shared_type = perf->shared_type;
  514. /*
  515. * Will let policy->cpus know about dependency only when software
  516. * coordination is required.
  517. */
  518. if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
  519. policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
  520. policy->cpus = perf->shared_cpu_map;
  521. }
  522. #ifdef CONFIG_SMP
  523. dmi_check_system(sw_any_bug_dmi_table);
  524. if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) {
  525. policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  526. policy->cpus = cpu_core_map[cpu];
  527. }
  528. #endif
  529. /* capability check */
  530. if (perf->state_count <= 1) {
  531. dprintk("No P-States\n");
  532. result = -ENODEV;
  533. goto err_unreg;
  534. }
  535. if (perf->control_register.space_id != perf->status_register.space_id) {
  536. result = -ENODEV;
  537. goto err_unreg;
  538. }
  539. switch (perf->control_register.space_id) {
  540. case ACPI_ADR_SPACE_SYSTEM_IO:
  541. dprintk("SYSTEM IO addr space\n");
  542. data->cpu_feature = SYSTEM_IO_CAPABLE;
  543. break;
  544. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  545. dprintk("HARDWARE addr space\n");
  546. if (!check_est_cpu(cpu)) {
  547. result = -ENODEV;
  548. goto err_unreg;
  549. }
  550. data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
  551. break;
  552. default:
  553. dprintk("Unknown addr space %d\n",
  554. (u32) (perf->control_register.space_id));
  555. result = -ENODEV;
  556. goto err_unreg;
  557. }
  558. data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
  559. (perf->state_count+1), GFP_KERNEL);
  560. if (!data->freq_table) {
  561. result = -ENOMEM;
  562. goto err_unreg;
  563. }
  564. /* detect transition latency */
  565. policy->cpuinfo.transition_latency = 0;
  566. for (i=0; i<perf->state_count; i++) {
  567. if ((perf->states[i].transition_latency * 1000) >
  568. policy->cpuinfo.transition_latency)
  569. policy->cpuinfo.transition_latency =
  570. perf->states[i].transition_latency * 1000;
  571. }
  572. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  573. data->max_freq = perf->states[0].core_frequency * 1000;
  574. /* table init */
  575. for (i=0; i<perf->state_count; i++) {
  576. if (i>0 && perf->states[i].core_frequency ==
  577. perf->states[i-1].core_frequency)
  578. continue;
  579. data->freq_table[valid_states].index = i;
  580. data->freq_table[valid_states].frequency =
  581. perf->states[i].core_frequency * 1000;
  582. valid_states++;
  583. }
  584. data->freq_table[perf->state_count].frequency = CPUFREQ_TABLE_END;
  585. result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
  586. if (result)
  587. goto err_freqfree;
  588. switch (data->cpu_feature) {
  589. case ACPI_ADR_SPACE_SYSTEM_IO:
  590. /* Current speed is unknown and not detectable by IO port */
  591. policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
  592. break;
  593. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  594. acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
  595. get_cur_freq_on_cpu(cpu);
  596. break;
  597. default:
  598. break;
  599. }
  600. /* notify BIOS that we exist */
  601. acpi_processor_notify_smm(THIS_MODULE);
  602. /* Check for APERF/MPERF support in hardware */
  603. if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
  604. unsigned int ecx;
  605. ecx = cpuid_ecx(6);
  606. if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
  607. acpi_cpufreq_driver.getavg = get_measured_perf;
  608. }
  609. dprintk("CPU%u - ACPI performance management activated.\n", cpu);
  610. for (i = 0; i < perf->state_count; i++)
  611. dprintk(" %cP%d: %d MHz, %d mW, %d uS\n",
  612. (i == perf->state ? '*' : ' '), i,
  613. (u32) perf->states[i].core_frequency,
  614. (u32) perf->states[i].power,
  615. (u32) perf->states[i].transition_latency);
  616. cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
  617. /*
  618. * the first call to ->target() should result in us actually
  619. * writing something to the appropriate registers.
  620. */
  621. data->resume = 1;
  622. return result;
  623. err_freqfree:
  624. kfree(data->freq_table);
  625. err_unreg:
  626. acpi_processor_unregister_performance(perf, cpu);
  627. err_free:
  628. kfree(data);
  629. drv_data[cpu] = NULL;
  630. return result;
  631. }
  632. static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  633. {
  634. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  635. dprintk("acpi_cpufreq_cpu_exit\n");
  636. if (data) {
  637. cpufreq_frequency_table_put_attr(policy->cpu);
  638. drv_data[policy->cpu] = NULL;
  639. acpi_processor_unregister_performance(data->acpi_data,
  640. policy->cpu);
  641. kfree(data);
  642. }
  643. return 0;
  644. }
  645. static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
  646. {
  647. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  648. dprintk("acpi_cpufreq_resume\n");
  649. data->resume = 1;
  650. return 0;
  651. }
  652. static struct freq_attr *acpi_cpufreq_attr[] = {
  653. &cpufreq_freq_attr_scaling_available_freqs,
  654. NULL,
  655. };
  656. static struct cpufreq_driver acpi_cpufreq_driver = {
  657. .verify = acpi_cpufreq_verify,
  658. .target = acpi_cpufreq_target,
  659. .init = acpi_cpufreq_cpu_init,
  660. .exit = acpi_cpufreq_cpu_exit,
  661. .resume = acpi_cpufreq_resume,
  662. .name = "acpi-cpufreq",
  663. .owner = THIS_MODULE,
  664. .attr = acpi_cpufreq_attr,
  665. };
  666. static int __init acpi_cpufreq_init(void)
  667. {
  668. dprintk("acpi_cpufreq_init\n");
  669. acpi_cpufreq_early_init();
  670. return cpufreq_register_driver(&acpi_cpufreq_driver);
  671. }
  672. static void __exit acpi_cpufreq_exit(void)
  673. {
  674. unsigned int i;
  675. dprintk("acpi_cpufreq_exit\n");
  676. cpufreq_unregister_driver(&acpi_cpufreq_driver);
  677. for_each_possible_cpu(i) {
  678. kfree(acpi_perf_data[i]);
  679. acpi_perf_data[i] = NULL;
  680. }
  681. return;
  682. }
  683. module_param(acpi_pstate_strict, uint, 0644);
  684. MODULE_PARM_DESC(acpi_pstate_strict,
  685. "value 0 or non-zero. non-zero -> strict ACPI checks are "
  686. "performed during frequency changes.");
  687. late_initcall(acpi_cpufreq_init);
  688. module_exit(acpi_cpufreq_exit);
  689. MODULE_ALIAS("acpi");