edac_mc_sysfs.c 28 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005-2007 Linux Networx (http://lnxi.com)
  4. *
  5. * This file may be distributed under the terms of the
  6. * GNU General Public License.
  7. *
  8. * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
  9. *
  10. * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
  11. * The entire API were re-written, and ported to use struct device
  12. *
  13. */
  14. #include <linux/ctype.h>
  15. #include <linux/slab.h>
  16. #include <linux/edac.h>
  17. #include <linux/bug.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/uaccess.h>
  20. #include "edac_core.h"
  21. #include "edac_module.h"
  22. /* MC EDAC Controls, setable by module parameter, and sysfs */
  23. static int edac_mc_log_ue = 1;
  24. static int edac_mc_log_ce = 1;
  25. static int edac_mc_panic_on_ue;
  26. static int edac_mc_poll_msec = 1000;
  27. /* Getter functions for above */
  28. int edac_mc_get_log_ue(void)
  29. {
  30. return edac_mc_log_ue;
  31. }
  32. int edac_mc_get_log_ce(void)
  33. {
  34. return edac_mc_log_ce;
  35. }
  36. int edac_mc_get_panic_on_ue(void)
  37. {
  38. return edac_mc_panic_on_ue;
  39. }
  40. /* this is temporary */
  41. int edac_mc_get_poll_msec(void)
  42. {
  43. return edac_mc_poll_msec;
  44. }
  45. static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
  46. {
  47. long l;
  48. int ret;
  49. if (!val)
  50. return -EINVAL;
  51. ret = strict_strtol(val, 0, &l);
  52. if (ret == -EINVAL || ((int)l != l))
  53. return -EINVAL;
  54. *((int *)kp->arg) = l;
  55. /* notify edac_mc engine to reset the poll period */
  56. edac_mc_reset_delay_period(l);
  57. return 0;
  58. }
  59. /* Parameter declarations for above */
  60. module_param(edac_mc_panic_on_ue, int, 0644);
  61. MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  62. module_param(edac_mc_log_ue, int, 0644);
  63. MODULE_PARM_DESC(edac_mc_log_ue,
  64. "Log uncorrectable error to console: 0=off 1=on");
  65. module_param(edac_mc_log_ce, int, 0644);
  66. MODULE_PARM_DESC(edac_mc_log_ce,
  67. "Log correctable error to console: 0=off 1=on");
  68. module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
  69. &edac_mc_poll_msec, 0644);
  70. MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
  71. static struct device *mci_pdev;
  72. /*
  73. * various constants for Memory Controllers
  74. */
  75. static const char *mem_types[] = {
  76. [MEM_EMPTY] = "Empty",
  77. [MEM_RESERVED] = "Reserved",
  78. [MEM_UNKNOWN] = "Unknown",
  79. [MEM_FPM] = "FPM",
  80. [MEM_EDO] = "EDO",
  81. [MEM_BEDO] = "BEDO",
  82. [MEM_SDR] = "Unbuffered-SDR",
  83. [MEM_RDR] = "Registered-SDR",
  84. [MEM_DDR] = "Unbuffered-DDR",
  85. [MEM_RDDR] = "Registered-DDR",
  86. [MEM_RMBS] = "RMBS",
  87. [MEM_DDR2] = "Unbuffered-DDR2",
  88. [MEM_FB_DDR2] = "FullyBuffered-DDR2",
  89. [MEM_RDDR2] = "Registered-DDR2",
  90. [MEM_XDR] = "XDR",
  91. [MEM_DDR3] = "Unbuffered-DDR3",
  92. [MEM_RDDR3] = "Registered-DDR3"
  93. };
  94. static const char *dev_types[] = {
  95. [DEV_UNKNOWN] = "Unknown",
  96. [DEV_X1] = "x1",
  97. [DEV_X2] = "x2",
  98. [DEV_X4] = "x4",
  99. [DEV_X8] = "x8",
  100. [DEV_X16] = "x16",
  101. [DEV_X32] = "x32",
  102. [DEV_X64] = "x64"
  103. };
  104. static const char *edac_caps[] = {
  105. [EDAC_UNKNOWN] = "Unknown",
  106. [EDAC_NONE] = "None",
  107. [EDAC_RESERVED] = "Reserved",
  108. [EDAC_PARITY] = "PARITY",
  109. [EDAC_EC] = "EC",
  110. [EDAC_SECDED] = "SECDED",
  111. [EDAC_S2ECD2ED] = "S2ECD2ED",
  112. [EDAC_S4ECD4ED] = "S4ECD4ED",
  113. [EDAC_S8ECD8ED] = "S8ECD8ED",
  114. [EDAC_S16ECD16ED] = "S16ECD16ED"
  115. };
  116. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  117. /*
  118. * EDAC sysfs CSROW data structures and methods
  119. */
  120. #define to_csrow(k) container_of(k, struct csrow_info, dev)
  121. /*
  122. * We need it to avoid namespace conflicts between the legacy API
  123. * and the per-dimm/per-rank one
  124. */
  125. #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
  126. struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
  127. struct dev_ch_attribute {
  128. struct device_attribute attr;
  129. int channel;
  130. };
  131. #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
  132. struct dev_ch_attribute dev_attr_legacy_##_name = \
  133. { __ATTR(_name, _mode, _show, _store), (_var) }
  134. #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
  135. /* Set of more default csrow<id> attribute show/store functions */
  136. static ssize_t csrow_ue_count_show(struct device *dev,
  137. struct device_attribute *mattr, char *data)
  138. {
  139. struct csrow_info *csrow = to_csrow(dev);
  140. return sprintf(data, "%u\n", csrow->ue_count);
  141. }
  142. static ssize_t csrow_ce_count_show(struct device *dev,
  143. struct device_attribute *mattr, char *data)
  144. {
  145. struct csrow_info *csrow = to_csrow(dev);
  146. return sprintf(data, "%u\n", csrow->ce_count);
  147. }
  148. static ssize_t csrow_size_show(struct device *dev,
  149. struct device_attribute *mattr, char *data)
  150. {
  151. struct csrow_info *csrow = to_csrow(dev);
  152. int i;
  153. u32 nr_pages = 0;
  154. for (i = 0; i < csrow->nr_channels; i++)
  155. nr_pages += csrow->channels[i]->dimm->nr_pages;
  156. return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
  157. }
  158. static ssize_t csrow_mem_type_show(struct device *dev,
  159. struct device_attribute *mattr, char *data)
  160. {
  161. struct csrow_info *csrow = to_csrow(dev);
  162. return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
  163. }
  164. static ssize_t csrow_dev_type_show(struct device *dev,
  165. struct device_attribute *mattr, char *data)
  166. {
  167. struct csrow_info *csrow = to_csrow(dev);
  168. return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
  169. }
  170. static ssize_t csrow_edac_mode_show(struct device *dev,
  171. struct device_attribute *mattr,
  172. char *data)
  173. {
  174. struct csrow_info *csrow = to_csrow(dev);
  175. return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
  176. }
  177. /* show/store functions for DIMM Label attributes */
  178. static ssize_t channel_dimm_label_show(struct device *dev,
  179. struct device_attribute *mattr,
  180. char *data)
  181. {
  182. struct csrow_info *csrow = to_csrow(dev);
  183. unsigned chan = to_channel(mattr);
  184. struct rank_info *rank = csrow->channels[chan];
  185. /* if field has not been initialized, there is nothing to send */
  186. if (!rank->dimm->label[0])
  187. return 0;
  188. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
  189. rank->dimm->label);
  190. }
  191. static ssize_t channel_dimm_label_store(struct device *dev,
  192. struct device_attribute *mattr,
  193. const char *data, size_t count)
  194. {
  195. struct csrow_info *csrow = to_csrow(dev);
  196. unsigned chan = to_channel(mattr);
  197. struct rank_info *rank = csrow->channels[chan];
  198. ssize_t max_size = 0;
  199. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  200. strncpy(rank->dimm->label, data, max_size);
  201. rank->dimm->label[max_size] = '\0';
  202. return max_size;
  203. }
  204. /* show function for dynamic chX_ce_count attribute */
  205. static ssize_t channel_ce_count_show(struct device *dev,
  206. struct device_attribute *mattr, char *data)
  207. {
  208. struct csrow_info *csrow = to_csrow(dev);
  209. unsigned chan = to_channel(mattr);
  210. struct rank_info *rank = csrow->channels[chan];
  211. return sprintf(data, "%u\n", rank->ce_count);
  212. }
  213. /* cwrow<id>/attribute files */
  214. DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
  215. DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
  216. DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
  217. DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
  218. DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
  219. DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
  220. /* default attributes of the CSROW<id> object */
  221. static struct attribute *csrow_attrs[] = {
  222. &dev_attr_legacy_dev_type.attr,
  223. &dev_attr_legacy_mem_type.attr,
  224. &dev_attr_legacy_edac_mode.attr,
  225. &dev_attr_legacy_size_mb.attr,
  226. &dev_attr_legacy_ue_count.attr,
  227. &dev_attr_legacy_ce_count.attr,
  228. NULL,
  229. };
  230. static struct attribute_group csrow_attr_grp = {
  231. .attrs = csrow_attrs,
  232. };
  233. static const struct attribute_group *csrow_attr_groups[] = {
  234. &csrow_attr_grp,
  235. NULL
  236. };
  237. static void csrow_attr_release(struct device *dev)
  238. {
  239. struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
  240. edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
  241. kfree(csrow);
  242. }
  243. static struct device_type csrow_attr_type = {
  244. .groups = csrow_attr_groups,
  245. .release = csrow_attr_release,
  246. };
  247. /*
  248. * possible dynamic channel DIMM Label attribute files
  249. *
  250. */
  251. #define EDAC_NR_CHANNELS 6
  252. DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
  253. channel_dimm_label_show, channel_dimm_label_store, 0);
  254. DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
  255. channel_dimm_label_show, channel_dimm_label_store, 1);
  256. DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
  257. channel_dimm_label_show, channel_dimm_label_store, 2);
  258. DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
  259. channel_dimm_label_show, channel_dimm_label_store, 3);
  260. DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
  261. channel_dimm_label_show, channel_dimm_label_store, 4);
  262. DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
  263. channel_dimm_label_show, channel_dimm_label_store, 5);
  264. /* Total possible dynamic DIMM Label attribute file table */
  265. static struct device_attribute *dynamic_csrow_dimm_attr[] = {
  266. &dev_attr_legacy_ch0_dimm_label.attr,
  267. &dev_attr_legacy_ch1_dimm_label.attr,
  268. &dev_attr_legacy_ch2_dimm_label.attr,
  269. &dev_attr_legacy_ch3_dimm_label.attr,
  270. &dev_attr_legacy_ch4_dimm_label.attr,
  271. &dev_attr_legacy_ch5_dimm_label.attr
  272. };
  273. /* possible dynamic channel ce_count attribute files */
  274. DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
  275. channel_ce_count_show, NULL, 0);
  276. DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
  277. channel_ce_count_show, NULL, 1);
  278. DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
  279. channel_ce_count_show, NULL, 2);
  280. DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
  281. channel_ce_count_show, NULL, 3);
  282. DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
  283. channel_ce_count_show, NULL, 4);
  284. DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
  285. channel_ce_count_show, NULL, 5);
  286. /* Total possible dynamic ce_count attribute file table */
  287. static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
  288. &dev_attr_legacy_ch0_ce_count.attr,
  289. &dev_attr_legacy_ch1_ce_count.attr,
  290. &dev_attr_legacy_ch2_ce_count.attr,
  291. &dev_attr_legacy_ch3_ce_count.attr,
  292. &dev_attr_legacy_ch4_ce_count.attr,
  293. &dev_attr_legacy_ch5_ce_count.attr
  294. };
  295. static inline int nr_pages_per_csrow(struct csrow_info *csrow)
  296. {
  297. int chan, nr_pages = 0;
  298. for (chan = 0; chan < csrow->nr_channels; chan++)
  299. nr_pages += csrow->channels[chan]->dimm->nr_pages;
  300. return nr_pages;
  301. }
  302. /* Create a CSROW object under specifed edac_mc_device */
  303. static int edac_create_csrow_object(struct mem_ctl_info *mci,
  304. struct csrow_info *csrow, int index)
  305. {
  306. int err, chan;
  307. if (csrow->nr_channels >= EDAC_NR_CHANNELS)
  308. return -ENODEV;
  309. csrow->dev.type = &csrow_attr_type;
  310. csrow->dev.bus = &mci->bus;
  311. device_initialize(&csrow->dev);
  312. csrow->dev.parent = &mci->dev;
  313. dev_set_name(&csrow->dev, "csrow%d", index);
  314. dev_set_drvdata(&csrow->dev, csrow);
  315. edac_dbg(0, "creating (virtual) csrow node %s\n",
  316. dev_name(&csrow->dev));
  317. err = device_add(&csrow->dev);
  318. if (err < 0)
  319. return err;
  320. for (chan = 0; chan < csrow->nr_channels; chan++) {
  321. /* Only expose populated DIMMs */
  322. if (!csrow->channels[chan]->dimm->nr_pages)
  323. continue;
  324. err = device_create_file(&csrow->dev,
  325. dynamic_csrow_dimm_attr[chan]);
  326. if (err < 0)
  327. goto error;
  328. err = device_create_file(&csrow->dev,
  329. dynamic_csrow_ce_count_attr[chan]);
  330. if (err < 0) {
  331. device_remove_file(&csrow->dev,
  332. dynamic_csrow_dimm_attr[chan]);
  333. goto error;
  334. }
  335. }
  336. return 0;
  337. error:
  338. for (--chan; chan >= 0; chan--) {
  339. device_remove_file(&csrow->dev,
  340. dynamic_csrow_dimm_attr[chan]);
  341. device_remove_file(&csrow->dev,
  342. dynamic_csrow_ce_count_attr[chan]);
  343. }
  344. put_device(&csrow->dev);
  345. return err;
  346. }
  347. /* Create a CSROW object under specifed edac_mc_device */
  348. static int edac_create_csrow_objects(struct mem_ctl_info *mci)
  349. {
  350. int err, i, chan;
  351. struct csrow_info *csrow;
  352. for (i = 0; i < mci->nr_csrows; i++) {
  353. csrow = mci->csrows[i];
  354. if (!nr_pages_per_csrow(csrow))
  355. continue;
  356. err = edac_create_csrow_object(mci, mci->csrows[i], i);
  357. if (err < 0)
  358. goto error;
  359. }
  360. return 0;
  361. error:
  362. for (--i; i >= 0; i--) {
  363. csrow = mci->csrows[i];
  364. if (!nr_pages_per_csrow(csrow))
  365. continue;
  366. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  367. if (!csrow->channels[chan]->dimm->nr_pages)
  368. continue;
  369. device_remove_file(&csrow->dev,
  370. dynamic_csrow_dimm_attr[chan]);
  371. device_remove_file(&csrow->dev,
  372. dynamic_csrow_ce_count_attr[chan]);
  373. }
  374. put_device(&mci->csrows[i]->dev);
  375. }
  376. return err;
  377. }
  378. static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
  379. {
  380. int i, chan;
  381. struct csrow_info *csrow;
  382. for (i = mci->nr_csrows - 1; i >= 0; i--) {
  383. csrow = mci->csrows[i];
  384. if (!nr_pages_per_csrow(csrow))
  385. continue;
  386. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  387. if (!csrow->channels[chan]->dimm->nr_pages)
  388. continue;
  389. edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
  390. i, chan);
  391. device_remove_file(&csrow->dev,
  392. dynamic_csrow_dimm_attr[chan]);
  393. device_remove_file(&csrow->dev,
  394. dynamic_csrow_ce_count_attr[chan]);
  395. }
  396. put_device(&mci->csrows[i]->dev);
  397. device_del(&mci->csrows[i]->dev);
  398. }
  399. }
  400. #endif
  401. /*
  402. * Per-dimm (or per-rank) devices
  403. */
  404. #define to_dimm(k) container_of(k, struct dimm_info, dev)
  405. /* show/store functions for DIMM Label attributes */
  406. static ssize_t dimmdev_location_show(struct device *dev,
  407. struct device_attribute *mattr, char *data)
  408. {
  409. struct dimm_info *dimm = to_dimm(dev);
  410. struct mem_ctl_info *mci = dimm->mci;
  411. int i;
  412. char *p = data;
  413. for (i = 0; i < mci->n_layers; i++) {
  414. p += sprintf(p, "%s %d ",
  415. edac_layer_name[mci->layers[i].type],
  416. dimm->location[i]);
  417. }
  418. return p - data;
  419. }
  420. static ssize_t dimmdev_label_show(struct device *dev,
  421. struct device_attribute *mattr, char *data)
  422. {
  423. struct dimm_info *dimm = to_dimm(dev);
  424. /* if field has not been initialized, there is nothing to send */
  425. if (!dimm->label[0])
  426. return 0;
  427. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
  428. }
  429. static ssize_t dimmdev_label_store(struct device *dev,
  430. struct device_attribute *mattr,
  431. const char *data,
  432. size_t count)
  433. {
  434. struct dimm_info *dimm = to_dimm(dev);
  435. ssize_t max_size = 0;
  436. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  437. strncpy(dimm->label, data, max_size);
  438. dimm->label[max_size] = '\0';
  439. return max_size;
  440. }
  441. static ssize_t dimmdev_size_show(struct device *dev,
  442. struct device_attribute *mattr, char *data)
  443. {
  444. struct dimm_info *dimm = to_dimm(dev);
  445. return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
  446. }
  447. static ssize_t dimmdev_mem_type_show(struct device *dev,
  448. struct device_attribute *mattr, char *data)
  449. {
  450. struct dimm_info *dimm = to_dimm(dev);
  451. return sprintf(data, "%s\n", mem_types[dimm->mtype]);
  452. }
  453. static ssize_t dimmdev_dev_type_show(struct device *dev,
  454. struct device_attribute *mattr, char *data)
  455. {
  456. struct dimm_info *dimm = to_dimm(dev);
  457. return sprintf(data, "%s\n", dev_types[dimm->dtype]);
  458. }
  459. static ssize_t dimmdev_edac_mode_show(struct device *dev,
  460. struct device_attribute *mattr,
  461. char *data)
  462. {
  463. struct dimm_info *dimm = to_dimm(dev);
  464. return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
  465. }
  466. /* dimm/rank attribute files */
  467. static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
  468. dimmdev_label_show, dimmdev_label_store);
  469. static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
  470. static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
  471. static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
  472. static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
  473. static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
  474. /* attributes of the dimm<id>/rank<id> object */
  475. static struct attribute *dimm_attrs[] = {
  476. &dev_attr_dimm_label.attr,
  477. &dev_attr_dimm_location.attr,
  478. &dev_attr_size.attr,
  479. &dev_attr_dimm_mem_type.attr,
  480. &dev_attr_dimm_dev_type.attr,
  481. &dev_attr_dimm_edac_mode.attr,
  482. NULL,
  483. };
  484. static struct attribute_group dimm_attr_grp = {
  485. .attrs = dimm_attrs,
  486. };
  487. static const struct attribute_group *dimm_attr_groups[] = {
  488. &dimm_attr_grp,
  489. NULL
  490. };
  491. static void dimm_attr_release(struct device *dev)
  492. {
  493. struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
  494. edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
  495. kfree(dimm);
  496. }
  497. static struct device_type dimm_attr_type = {
  498. .groups = dimm_attr_groups,
  499. .release = dimm_attr_release,
  500. };
  501. /* Create a DIMM object under specifed memory controller device */
  502. static int edac_create_dimm_object(struct mem_ctl_info *mci,
  503. struct dimm_info *dimm,
  504. int index)
  505. {
  506. int err;
  507. dimm->mci = mci;
  508. dimm->dev.type = &dimm_attr_type;
  509. dimm->dev.bus = &mci->bus;
  510. device_initialize(&dimm->dev);
  511. dimm->dev.parent = &mci->dev;
  512. if (mci->mem_is_per_rank)
  513. dev_set_name(&dimm->dev, "rank%d", index);
  514. else
  515. dev_set_name(&dimm->dev, "dimm%d", index);
  516. dev_set_drvdata(&dimm->dev, dimm);
  517. pm_runtime_forbid(&mci->dev);
  518. err = device_add(&dimm->dev);
  519. edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
  520. return err;
  521. }
  522. /*
  523. * Memory controller device
  524. */
  525. #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
  526. static ssize_t mci_reset_counters_store(struct device *dev,
  527. struct device_attribute *mattr,
  528. const char *data, size_t count)
  529. {
  530. struct mem_ctl_info *mci = to_mci(dev);
  531. int cnt, row, chan, i;
  532. mci->ue_mc = 0;
  533. mci->ce_mc = 0;
  534. mci->ue_noinfo_count = 0;
  535. mci->ce_noinfo_count = 0;
  536. for (row = 0; row < mci->nr_csrows; row++) {
  537. struct csrow_info *ri = mci->csrows[row];
  538. ri->ue_count = 0;
  539. ri->ce_count = 0;
  540. for (chan = 0; chan < ri->nr_channels; chan++)
  541. ri->channels[chan]->ce_count = 0;
  542. }
  543. cnt = 1;
  544. for (i = 0; i < mci->n_layers; i++) {
  545. cnt *= mci->layers[i].size;
  546. memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
  547. memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
  548. }
  549. mci->start_time = jiffies;
  550. return count;
  551. }
  552. /* Memory scrubbing interface:
  553. *
  554. * A MC driver can limit the scrubbing bandwidth based on the CPU type.
  555. * Therefore, ->set_sdram_scrub_rate should be made to return the actual
  556. * bandwidth that is accepted or 0 when scrubbing is to be disabled.
  557. *
  558. * Negative value still means that an error has occurred while setting
  559. * the scrub rate.
  560. */
  561. static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
  562. struct device_attribute *mattr,
  563. const char *data, size_t count)
  564. {
  565. struct mem_ctl_info *mci = to_mci(dev);
  566. unsigned long bandwidth = 0;
  567. int new_bw = 0;
  568. if (!mci->set_sdram_scrub_rate)
  569. return -ENODEV;
  570. if (strict_strtoul(data, 10, &bandwidth) < 0)
  571. return -EINVAL;
  572. new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
  573. if (new_bw < 0) {
  574. edac_printk(KERN_WARNING, EDAC_MC,
  575. "Error setting scrub rate to: %lu\n", bandwidth);
  576. return -EINVAL;
  577. }
  578. return count;
  579. }
  580. /*
  581. * ->get_sdram_scrub_rate() return value semantics same as above.
  582. */
  583. static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
  584. struct device_attribute *mattr,
  585. char *data)
  586. {
  587. struct mem_ctl_info *mci = to_mci(dev);
  588. int bandwidth = 0;
  589. if (!mci->get_sdram_scrub_rate)
  590. return -ENODEV;
  591. bandwidth = mci->get_sdram_scrub_rate(mci);
  592. if (bandwidth < 0) {
  593. edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
  594. return bandwidth;
  595. }
  596. return sprintf(data, "%d\n", bandwidth);
  597. }
  598. /* default attribute files for the MCI object */
  599. static ssize_t mci_ue_count_show(struct device *dev,
  600. struct device_attribute *mattr,
  601. char *data)
  602. {
  603. struct mem_ctl_info *mci = to_mci(dev);
  604. return sprintf(data, "%d\n", mci->ue_mc);
  605. }
  606. static ssize_t mci_ce_count_show(struct device *dev,
  607. struct device_attribute *mattr,
  608. char *data)
  609. {
  610. struct mem_ctl_info *mci = to_mci(dev);
  611. return sprintf(data, "%d\n", mci->ce_mc);
  612. }
  613. static ssize_t mci_ce_noinfo_show(struct device *dev,
  614. struct device_attribute *mattr,
  615. char *data)
  616. {
  617. struct mem_ctl_info *mci = to_mci(dev);
  618. return sprintf(data, "%d\n", mci->ce_noinfo_count);
  619. }
  620. static ssize_t mci_ue_noinfo_show(struct device *dev,
  621. struct device_attribute *mattr,
  622. char *data)
  623. {
  624. struct mem_ctl_info *mci = to_mci(dev);
  625. return sprintf(data, "%d\n", mci->ue_noinfo_count);
  626. }
  627. static ssize_t mci_seconds_show(struct device *dev,
  628. struct device_attribute *mattr,
  629. char *data)
  630. {
  631. struct mem_ctl_info *mci = to_mci(dev);
  632. return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
  633. }
  634. static ssize_t mci_ctl_name_show(struct device *dev,
  635. struct device_attribute *mattr,
  636. char *data)
  637. {
  638. struct mem_ctl_info *mci = to_mci(dev);
  639. return sprintf(data, "%s\n", mci->ctl_name);
  640. }
  641. static ssize_t mci_size_mb_show(struct device *dev,
  642. struct device_attribute *mattr,
  643. char *data)
  644. {
  645. struct mem_ctl_info *mci = to_mci(dev);
  646. int total_pages = 0, csrow_idx, j;
  647. for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
  648. struct csrow_info *csrow = mci->csrows[csrow_idx];
  649. for (j = 0; j < csrow->nr_channels; j++) {
  650. struct dimm_info *dimm = csrow->channels[j]->dimm;
  651. total_pages += dimm->nr_pages;
  652. }
  653. }
  654. return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
  655. }
  656. static ssize_t mci_max_location_show(struct device *dev,
  657. struct device_attribute *mattr,
  658. char *data)
  659. {
  660. struct mem_ctl_info *mci = to_mci(dev);
  661. int i;
  662. char *p = data;
  663. for (i = 0; i < mci->n_layers; i++) {
  664. p += sprintf(p, "%s %d ",
  665. edac_layer_name[mci->layers[i].type],
  666. mci->layers[i].size - 1);
  667. }
  668. return p - data;
  669. }
  670. #ifdef CONFIG_EDAC_DEBUG
  671. static ssize_t edac_fake_inject_write(struct file *file,
  672. const char __user *data,
  673. size_t count, loff_t *ppos)
  674. {
  675. struct device *dev = file->private_data;
  676. struct mem_ctl_info *mci = to_mci(dev);
  677. static enum hw_event_mc_err_type type;
  678. type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
  679. : HW_EVENT_ERR_CORRECTED;
  680. printk(KERN_DEBUG
  681. "Generating a %s fake error to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
  682. (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
  683. mci->fake_inject_layer[0],
  684. mci->fake_inject_layer[1],
  685. mci->fake_inject_layer[2]
  686. );
  687. edac_mc_handle_error(type, mci, 0, 0, 0,
  688. mci->fake_inject_layer[0],
  689. mci->fake_inject_layer[1],
  690. mci->fake_inject_layer[2],
  691. "FAKE ERROR", "for EDAC testing only", NULL);
  692. return count;
  693. }
  694. static int debugfs_open(struct inode *inode, struct file *file)
  695. {
  696. file->private_data = inode->i_private;
  697. return 0;
  698. }
  699. static const struct file_operations debug_fake_inject_fops = {
  700. .open = debugfs_open,
  701. .write = edac_fake_inject_write,
  702. .llseek = generic_file_llseek,
  703. };
  704. #endif
  705. /* default Control file */
  706. DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
  707. /* default Attribute files */
  708. DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
  709. DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
  710. DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
  711. DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
  712. DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
  713. DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
  714. DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
  715. DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
  716. /* memory scrubber attribute file */
  717. DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
  718. mci_sdram_scrub_rate_store);
  719. static struct attribute *mci_attrs[] = {
  720. &dev_attr_reset_counters.attr,
  721. &dev_attr_mc_name.attr,
  722. &dev_attr_size_mb.attr,
  723. &dev_attr_seconds_since_reset.attr,
  724. &dev_attr_ue_noinfo_count.attr,
  725. &dev_attr_ce_noinfo_count.attr,
  726. &dev_attr_ue_count.attr,
  727. &dev_attr_ce_count.attr,
  728. &dev_attr_sdram_scrub_rate.attr,
  729. &dev_attr_max_location.attr,
  730. NULL
  731. };
  732. static struct attribute_group mci_attr_grp = {
  733. .attrs = mci_attrs,
  734. };
  735. static const struct attribute_group *mci_attr_groups[] = {
  736. &mci_attr_grp,
  737. NULL
  738. };
  739. static void mci_attr_release(struct device *dev)
  740. {
  741. struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
  742. edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
  743. kfree(mci);
  744. }
  745. static struct device_type mci_attr_type = {
  746. .groups = mci_attr_groups,
  747. .release = mci_attr_release,
  748. };
  749. #ifdef CONFIG_EDAC_DEBUG
  750. int edac_create_debug_nodes(struct mem_ctl_info *mci)
  751. {
  752. struct dentry *d, *parent;
  753. char name[80];
  754. int i;
  755. d = debugfs_create_dir(mci->dev.kobj.name, mci->debugfs);
  756. if (!d)
  757. return -ENOMEM;
  758. parent = d;
  759. for (i = 0; i < mci->n_layers; i++) {
  760. sprintf(name, "fake_inject_%s",
  761. edac_layer_name[mci->layers[i].type]);
  762. d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
  763. &mci->fake_inject_layer[i]);
  764. if (!d)
  765. goto nomem;
  766. }
  767. d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
  768. &mci->fake_inject_ue);
  769. if (!d)
  770. goto nomem;
  771. d = debugfs_create_file("fake_inject", S_IWUSR, parent,
  772. &mci->dev,
  773. &debug_fake_inject_fops);
  774. if (!d)
  775. goto nomem;
  776. return 0;
  777. nomem:
  778. debugfs_remove(mci->debugfs);
  779. return -ENOMEM;
  780. }
  781. #endif
  782. /*
  783. * Create a new Memory Controller kobject instance,
  784. * mc<id> under the 'mc' directory
  785. *
  786. * Return:
  787. * 0 Success
  788. * !0 Failure
  789. */
  790. int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  791. {
  792. int i, err;
  793. /*
  794. * The memory controller needs its own bus, in order to avoid
  795. * namespace conflicts at /sys/bus/edac.
  796. */
  797. mci->bus.name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
  798. if (!mci->bus.name)
  799. return -ENOMEM;
  800. edac_dbg(0, "creating bus %s\n", mci->bus.name);
  801. err = bus_register(&mci->bus);
  802. if (err < 0)
  803. return err;
  804. /* get the /sys/devices/system/edac subsys reference */
  805. mci->dev.type = &mci_attr_type;
  806. device_initialize(&mci->dev);
  807. mci->dev.parent = mci_pdev;
  808. mci->dev.bus = &mci->bus;
  809. dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
  810. dev_set_drvdata(&mci->dev, mci);
  811. pm_runtime_forbid(&mci->dev);
  812. edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
  813. err = device_add(&mci->dev);
  814. if (err < 0) {
  815. bus_unregister(&mci->bus);
  816. kfree(mci->bus.name);
  817. return err;
  818. }
  819. /*
  820. * Create the dimm/rank devices
  821. */
  822. for (i = 0; i < mci->tot_dimms; i++) {
  823. struct dimm_info *dimm = mci->dimms[i];
  824. /* Only expose populated DIMMs */
  825. if (dimm->nr_pages == 0)
  826. continue;
  827. #ifdef CONFIG_EDAC_DEBUG
  828. edac_dbg(1, "creating dimm%d, located at ", i);
  829. if (edac_debug_level >= 1) {
  830. int lay;
  831. for (lay = 0; lay < mci->n_layers; lay++)
  832. printk(KERN_CONT "%s %d ",
  833. edac_layer_name[mci->layers[lay].type],
  834. dimm->location[lay]);
  835. printk(KERN_CONT "\n");
  836. }
  837. #endif
  838. err = edac_create_dimm_object(mci, dimm, i);
  839. if (err) {
  840. edac_dbg(1, "failure: create dimm %d obj\n", i);
  841. goto fail;
  842. }
  843. }
  844. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  845. err = edac_create_csrow_objects(mci);
  846. if (err < 0)
  847. goto fail;
  848. #endif
  849. #ifdef CONFIG_EDAC_DEBUG
  850. edac_create_debug_nodes(mci);
  851. #endif
  852. return 0;
  853. fail:
  854. for (i--; i >= 0; i--) {
  855. struct dimm_info *dimm = mci->dimms[i];
  856. if (dimm->nr_pages == 0)
  857. continue;
  858. put_device(&dimm->dev);
  859. device_del(&dimm->dev);
  860. }
  861. put_device(&mci->dev);
  862. device_del(&mci->dev);
  863. bus_unregister(&mci->bus);
  864. kfree(mci->bus.name);
  865. return err;
  866. }
  867. /*
  868. * remove a Memory Controller instance
  869. */
  870. void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  871. {
  872. int i;
  873. edac_dbg(0, "\n");
  874. #ifdef CONFIG_EDAC_DEBUG
  875. debugfs_remove(mci->debugfs);
  876. #endif
  877. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  878. edac_delete_csrow_objects(mci);
  879. #endif
  880. for (i = 0; i < mci->tot_dimms; i++) {
  881. struct dimm_info *dimm = mci->dimms[i];
  882. if (dimm->nr_pages == 0)
  883. continue;
  884. edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
  885. put_device(&dimm->dev);
  886. device_del(&dimm->dev);
  887. }
  888. }
  889. void edac_unregister_sysfs(struct mem_ctl_info *mci)
  890. {
  891. edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
  892. put_device(&mci->dev);
  893. device_del(&mci->dev);
  894. bus_unregister(&mci->bus);
  895. kfree(mci->bus.name);
  896. }
  897. static void mc_attr_release(struct device *dev)
  898. {
  899. /*
  900. * There's no container structure here, as this is just the mci
  901. * parent device, used to create the /sys/devices/mc sysfs node.
  902. * So, there are no attributes on it.
  903. */
  904. edac_dbg(1, "Releasing device %s\n", dev_name(dev));
  905. kfree(dev);
  906. }
  907. static struct device_type mc_attr_type = {
  908. .release = mc_attr_release,
  909. };
  910. /*
  911. * Init/exit code for the module. Basically, creates/removes /sys/class/rc
  912. */
  913. int __init edac_mc_sysfs_init(void)
  914. {
  915. struct bus_type *edac_subsys;
  916. int err;
  917. /* get the /sys/devices/system/edac subsys reference */
  918. edac_subsys = edac_get_sysfs_subsys();
  919. if (edac_subsys == NULL) {
  920. edac_dbg(1, "no edac_subsys\n");
  921. return -EINVAL;
  922. }
  923. mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
  924. mci_pdev->bus = edac_subsys;
  925. mci_pdev->type = &mc_attr_type;
  926. device_initialize(mci_pdev);
  927. dev_set_name(mci_pdev, "mc");
  928. err = device_add(mci_pdev);
  929. if (err < 0)
  930. return err;
  931. edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
  932. return 0;
  933. }
  934. void __exit edac_mc_sysfs_exit(void)
  935. {
  936. put_device(mci_pdev);
  937. device_del(mci_pdev);
  938. edac_put_sysfs_subsys();
  939. }