mwl8k.c 104 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Module parameters */
  30. static unsigned ap_mode_default;
  31. module_param(ap_mode_default, bool, 0);
  32. MODULE_PARM_DESC(ap_mode_default,
  33. "Set to 1 to make ap mode the default instead of sta mode");
  34. /* Register definitions */
  35. #define MWL8K_HIU_GEN_PTR 0x00000c10
  36. #define MWL8K_MODE_STA 0x0000005a
  37. #define MWL8K_MODE_AP 0x000000a5
  38. #define MWL8K_HIU_INT_CODE 0x00000c14
  39. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  40. #define MWL8K_FWAP_READY 0xf1f2f4a5
  41. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  42. #define MWL8K_HIU_SCRATCH 0x00000c40
  43. /* Host->device communications */
  44. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  45. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  46. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  47. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  49. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  50. #define MWL8K_H2A_INT_RESET (1 << 15)
  51. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  52. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  53. /* Device->host communications */
  54. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  55. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  56. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  57. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  59. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  60. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  61. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  62. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  63. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  64. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  65. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  66. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  67. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  68. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  69. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  70. MWL8K_A2H_INT_CHNL_SWITCHED | \
  71. MWL8K_A2H_INT_QUEUE_EMPTY | \
  72. MWL8K_A2H_INT_RADAR_DETECT | \
  73. MWL8K_A2H_INT_RADIO_ON | \
  74. MWL8K_A2H_INT_RADIO_OFF | \
  75. MWL8K_A2H_INT_MAC_EVENT | \
  76. MWL8K_A2H_INT_OPC_DONE | \
  77. MWL8K_A2H_INT_RX_READY | \
  78. MWL8K_A2H_INT_TX_DONE)
  79. #define MWL8K_RX_QUEUES 1
  80. #define MWL8K_TX_QUEUES 4
  81. struct rxd_ops {
  82. int rxd_size;
  83. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  84. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  85. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  86. __le16 *qos, s8 *noise);
  87. };
  88. struct mwl8k_device_info {
  89. char *part_name;
  90. char *helper_image;
  91. char *fw_image_sta;
  92. char *fw_image_ap;
  93. struct rxd_ops *ap_rxd_ops;
  94. u32 fw_api_ap;
  95. };
  96. struct mwl8k_rx_queue {
  97. int rxd_count;
  98. /* hw receives here */
  99. int head;
  100. /* refill descs here */
  101. int tail;
  102. void *rxd;
  103. dma_addr_t rxd_dma;
  104. struct {
  105. struct sk_buff *skb;
  106. DEFINE_DMA_UNMAP_ADDR(dma);
  107. } *buf;
  108. };
  109. struct mwl8k_tx_queue {
  110. /* hw transmits here */
  111. int head;
  112. /* sw appends here */
  113. int tail;
  114. unsigned int len;
  115. struct mwl8k_tx_desc *txd;
  116. dma_addr_t txd_dma;
  117. struct sk_buff **skb;
  118. };
  119. struct mwl8k_priv {
  120. struct ieee80211_hw *hw;
  121. struct pci_dev *pdev;
  122. struct mwl8k_device_info *device_info;
  123. void __iomem *sram;
  124. void __iomem *regs;
  125. /* firmware */
  126. struct firmware *fw_helper;
  127. struct firmware *fw_ucode;
  128. /* hardware/firmware parameters */
  129. bool ap_fw;
  130. struct rxd_ops *rxd_ops;
  131. struct ieee80211_supported_band band_24;
  132. struct ieee80211_channel channels_24[14];
  133. struct ieee80211_rate rates_24[14];
  134. struct ieee80211_supported_band band_50;
  135. struct ieee80211_channel channels_50[4];
  136. struct ieee80211_rate rates_50[9];
  137. u32 ap_macids_supported;
  138. u32 sta_macids_supported;
  139. /* firmware access */
  140. struct mutex fw_mutex;
  141. struct task_struct *fw_mutex_owner;
  142. int fw_mutex_depth;
  143. struct completion *hostcmd_wait;
  144. /* lock held over TX and TX reap */
  145. spinlock_t tx_lock;
  146. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  147. struct completion *tx_wait;
  148. /* List of interfaces. */
  149. u32 macids_used;
  150. struct list_head vif_list;
  151. /* power management status cookie from firmware */
  152. u32 *cookie;
  153. dma_addr_t cookie_dma;
  154. u16 num_mcaddrs;
  155. u8 hw_rev;
  156. u32 fw_rev;
  157. /*
  158. * Running count of TX packets in flight, to avoid
  159. * iterating over the transmit rings each time.
  160. */
  161. int pending_tx_pkts;
  162. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  163. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  164. bool radio_on;
  165. bool radio_short_preamble;
  166. bool sniffer_enabled;
  167. bool wmm_enabled;
  168. /* XXX need to convert this to handle multiple interfaces */
  169. bool capture_beacon;
  170. u8 capture_bssid[ETH_ALEN];
  171. struct sk_buff *beacon_skb;
  172. /*
  173. * This FJ worker has to be global as it is scheduled from the
  174. * RX handler. At this point we don't know which interface it
  175. * belongs to until the list of bssids waiting to complete join
  176. * is checked.
  177. */
  178. struct work_struct finalize_join_worker;
  179. /* Tasklet to perform TX reclaim. */
  180. struct tasklet_struct poll_tx_task;
  181. /* Tasklet to perform RX. */
  182. struct tasklet_struct poll_rx_task;
  183. /* Most recently reported noise in dBm */
  184. s8 noise;
  185. /*
  186. * preserve the queue configurations so they can be restored if/when
  187. * the firmware image is swapped.
  188. */
  189. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
  190. };
  191. /* Per interface specific private data */
  192. struct mwl8k_vif {
  193. struct list_head list;
  194. struct ieee80211_vif *vif;
  195. /* Firmware macid for this vif. */
  196. int macid;
  197. /* Non AMPDU sequence number assigned by driver. */
  198. u16 seqno;
  199. };
  200. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  201. struct mwl8k_sta {
  202. /* Index into station database. Returned by UPDATE_STADB. */
  203. u8 peer_id;
  204. };
  205. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  206. static const struct ieee80211_channel mwl8k_channels_24[] = {
  207. { .center_freq = 2412, .hw_value = 1, },
  208. { .center_freq = 2417, .hw_value = 2, },
  209. { .center_freq = 2422, .hw_value = 3, },
  210. { .center_freq = 2427, .hw_value = 4, },
  211. { .center_freq = 2432, .hw_value = 5, },
  212. { .center_freq = 2437, .hw_value = 6, },
  213. { .center_freq = 2442, .hw_value = 7, },
  214. { .center_freq = 2447, .hw_value = 8, },
  215. { .center_freq = 2452, .hw_value = 9, },
  216. { .center_freq = 2457, .hw_value = 10, },
  217. { .center_freq = 2462, .hw_value = 11, },
  218. { .center_freq = 2467, .hw_value = 12, },
  219. { .center_freq = 2472, .hw_value = 13, },
  220. { .center_freq = 2484, .hw_value = 14, },
  221. };
  222. static const struct ieee80211_rate mwl8k_rates_24[] = {
  223. { .bitrate = 10, .hw_value = 2, },
  224. { .bitrate = 20, .hw_value = 4, },
  225. { .bitrate = 55, .hw_value = 11, },
  226. { .bitrate = 110, .hw_value = 22, },
  227. { .bitrate = 220, .hw_value = 44, },
  228. { .bitrate = 60, .hw_value = 12, },
  229. { .bitrate = 90, .hw_value = 18, },
  230. { .bitrate = 120, .hw_value = 24, },
  231. { .bitrate = 180, .hw_value = 36, },
  232. { .bitrate = 240, .hw_value = 48, },
  233. { .bitrate = 360, .hw_value = 72, },
  234. { .bitrate = 480, .hw_value = 96, },
  235. { .bitrate = 540, .hw_value = 108, },
  236. { .bitrate = 720, .hw_value = 144, },
  237. };
  238. static const struct ieee80211_channel mwl8k_channels_50[] = {
  239. { .center_freq = 5180, .hw_value = 36, },
  240. { .center_freq = 5200, .hw_value = 40, },
  241. { .center_freq = 5220, .hw_value = 44, },
  242. { .center_freq = 5240, .hw_value = 48, },
  243. };
  244. static const struct ieee80211_rate mwl8k_rates_50[] = {
  245. { .bitrate = 60, .hw_value = 12, },
  246. { .bitrate = 90, .hw_value = 18, },
  247. { .bitrate = 120, .hw_value = 24, },
  248. { .bitrate = 180, .hw_value = 36, },
  249. { .bitrate = 240, .hw_value = 48, },
  250. { .bitrate = 360, .hw_value = 72, },
  251. { .bitrate = 480, .hw_value = 96, },
  252. { .bitrate = 540, .hw_value = 108, },
  253. { .bitrate = 720, .hw_value = 144, },
  254. };
  255. /* Set or get info from Firmware */
  256. #define MWL8K_CMD_GET 0x0000
  257. #define MWL8K_CMD_SET 0x0001
  258. #define MWL8K_CMD_SET_LIST 0x0002
  259. /* Firmware command codes */
  260. #define MWL8K_CMD_CODE_DNLD 0x0001
  261. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  262. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  263. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  264. #define MWL8K_CMD_GET_STAT 0x0014
  265. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  266. #define MWL8K_CMD_RF_TX_POWER 0x001e
  267. #define MWL8K_CMD_TX_POWER 0x001f
  268. #define MWL8K_CMD_RF_ANTENNA 0x0020
  269. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  270. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  271. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  272. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  273. #define MWL8K_CMD_SET_AID 0x010d
  274. #define MWL8K_CMD_SET_RATE 0x0110
  275. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  276. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  277. #define MWL8K_CMD_SET_SLOT 0x0114
  278. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  279. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  280. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  281. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  282. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  283. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  284. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  285. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  286. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  287. #define MWL8K_CMD_UPDATE_STADB 0x1123
  288. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  289. {
  290. u16 command = le16_to_cpu(cmd);
  291. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  292. snprintf(buf, bufsize, "%s", #x);\
  293. return buf;\
  294. } while (0)
  295. switch (command & ~0x8000) {
  296. MWL8K_CMDNAME(CODE_DNLD);
  297. MWL8K_CMDNAME(GET_HW_SPEC);
  298. MWL8K_CMDNAME(SET_HW_SPEC);
  299. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  300. MWL8K_CMDNAME(GET_STAT);
  301. MWL8K_CMDNAME(RADIO_CONTROL);
  302. MWL8K_CMDNAME(RF_TX_POWER);
  303. MWL8K_CMDNAME(TX_POWER);
  304. MWL8K_CMDNAME(RF_ANTENNA);
  305. MWL8K_CMDNAME(SET_BEACON);
  306. MWL8K_CMDNAME(SET_PRE_SCAN);
  307. MWL8K_CMDNAME(SET_POST_SCAN);
  308. MWL8K_CMDNAME(SET_RF_CHANNEL);
  309. MWL8K_CMDNAME(SET_AID);
  310. MWL8K_CMDNAME(SET_RATE);
  311. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  312. MWL8K_CMDNAME(RTS_THRESHOLD);
  313. MWL8K_CMDNAME(SET_SLOT);
  314. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  315. MWL8K_CMDNAME(SET_WMM_MODE);
  316. MWL8K_CMDNAME(MIMO_CONFIG);
  317. MWL8K_CMDNAME(USE_FIXED_RATE);
  318. MWL8K_CMDNAME(ENABLE_SNIFFER);
  319. MWL8K_CMDNAME(SET_MAC_ADDR);
  320. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  321. MWL8K_CMDNAME(BSS_START);
  322. MWL8K_CMDNAME(SET_NEW_STN);
  323. MWL8K_CMDNAME(UPDATE_STADB);
  324. default:
  325. snprintf(buf, bufsize, "0x%x", cmd);
  326. }
  327. #undef MWL8K_CMDNAME
  328. return buf;
  329. }
  330. /* Hardware and firmware reset */
  331. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  332. {
  333. iowrite32(MWL8K_H2A_INT_RESET,
  334. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  335. iowrite32(MWL8K_H2A_INT_RESET,
  336. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  337. msleep(20);
  338. }
  339. /* Release fw image */
  340. static void mwl8k_release_fw(struct firmware **fw)
  341. {
  342. if (*fw == NULL)
  343. return;
  344. release_firmware(*fw);
  345. *fw = NULL;
  346. }
  347. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  348. {
  349. mwl8k_release_fw(&priv->fw_ucode);
  350. mwl8k_release_fw(&priv->fw_helper);
  351. }
  352. /* Request fw image */
  353. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  354. const char *fname, struct firmware **fw)
  355. {
  356. /* release current image */
  357. if (*fw != NULL)
  358. mwl8k_release_fw(fw);
  359. return request_firmware((const struct firmware **)fw,
  360. fname, &priv->pdev->dev);
  361. }
  362. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image)
  363. {
  364. struct mwl8k_device_info *di = priv->device_info;
  365. int rc;
  366. if (di->helper_image != NULL) {
  367. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  368. if (rc) {
  369. printk(KERN_ERR "%s: Error requesting helper "
  370. "firmware file %s\n", pci_name(priv->pdev),
  371. di->helper_image);
  372. return rc;
  373. }
  374. }
  375. rc = mwl8k_request_fw(priv, fw_image, &priv->fw_ucode);
  376. if (rc) {
  377. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  378. pci_name(priv->pdev), fw_image);
  379. mwl8k_release_fw(&priv->fw_helper);
  380. return rc;
  381. }
  382. return 0;
  383. }
  384. struct mwl8k_cmd_pkt {
  385. __le16 code;
  386. __le16 length;
  387. __u8 seq_num;
  388. __u8 macid;
  389. __le16 result;
  390. char payload[0];
  391. } __packed;
  392. /*
  393. * Firmware loading.
  394. */
  395. static int
  396. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  397. {
  398. void __iomem *regs = priv->regs;
  399. dma_addr_t dma_addr;
  400. int loops;
  401. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  402. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  403. return -ENOMEM;
  404. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  405. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  406. iowrite32(MWL8K_H2A_INT_DOORBELL,
  407. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  408. iowrite32(MWL8K_H2A_INT_DUMMY,
  409. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  410. loops = 1000;
  411. do {
  412. u32 int_code;
  413. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  414. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  415. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  416. break;
  417. }
  418. cond_resched();
  419. udelay(1);
  420. } while (--loops);
  421. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  422. return loops ? 0 : -ETIMEDOUT;
  423. }
  424. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  425. const u8 *data, size_t length)
  426. {
  427. struct mwl8k_cmd_pkt *cmd;
  428. int done;
  429. int rc = 0;
  430. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  431. if (cmd == NULL)
  432. return -ENOMEM;
  433. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  434. cmd->seq_num = 0;
  435. cmd->macid = 0;
  436. cmd->result = 0;
  437. done = 0;
  438. while (length) {
  439. int block_size = length > 256 ? 256 : length;
  440. memcpy(cmd->payload, data + done, block_size);
  441. cmd->length = cpu_to_le16(block_size);
  442. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  443. sizeof(*cmd) + block_size);
  444. if (rc)
  445. break;
  446. done += block_size;
  447. length -= block_size;
  448. }
  449. if (!rc) {
  450. cmd->length = 0;
  451. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  452. }
  453. kfree(cmd);
  454. return rc;
  455. }
  456. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  457. const u8 *data, size_t length)
  458. {
  459. unsigned char *buffer;
  460. int may_continue, rc = 0;
  461. u32 done, prev_block_size;
  462. buffer = kmalloc(1024, GFP_KERNEL);
  463. if (buffer == NULL)
  464. return -ENOMEM;
  465. done = 0;
  466. prev_block_size = 0;
  467. may_continue = 1000;
  468. while (may_continue > 0) {
  469. u32 block_size;
  470. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  471. if (block_size & 1) {
  472. block_size &= ~1;
  473. may_continue--;
  474. } else {
  475. done += prev_block_size;
  476. length -= prev_block_size;
  477. }
  478. if (block_size > 1024 || block_size > length) {
  479. rc = -EOVERFLOW;
  480. break;
  481. }
  482. if (length == 0) {
  483. rc = 0;
  484. break;
  485. }
  486. if (block_size == 0) {
  487. rc = -EPROTO;
  488. may_continue--;
  489. udelay(1);
  490. continue;
  491. }
  492. prev_block_size = block_size;
  493. memcpy(buffer, data + done, block_size);
  494. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  495. if (rc)
  496. break;
  497. }
  498. if (!rc && length != 0)
  499. rc = -EREMOTEIO;
  500. kfree(buffer);
  501. return rc;
  502. }
  503. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  504. {
  505. struct mwl8k_priv *priv = hw->priv;
  506. struct firmware *fw = priv->fw_ucode;
  507. int rc;
  508. int loops;
  509. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  510. struct firmware *helper = priv->fw_helper;
  511. if (helper == NULL) {
  512. printk(KERN_ERR "%s: helper image needed but none "
  513. "given\n", pci_name(priv->pdev));
  514. return -EINVAL;
  515. }
  516. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  517. if (rc) {
  518. printk(KERN_ERR "%s: unable to load firmware "
  519. "helper image\n", pci_name(priv->pdev));
  520. return rc;
  521. }
  522. msleep(5);
  523. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  524. } else {
  525. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  526. }
  527. if (rc) {
  528. printk(KERN_ERR "%s: unable to load firmware image\n",
  529. pci_name(priv->pdev));
  530. return rc;
  531. }
  532. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  533. loops = 500000;
  534. do {
  535. u32 ready_code;
  536. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  537. if (ready_code == MWL8K_FWAP_READY) {
  538. priv->ap_fw = 1;
  539. break;
  540. } else if (ready_code == MWL8K_FWSTA_READY) {
  541. priv->ap_fw = 0;
  542. break;
  543. }
  544. cond_resched();
  545. udelay(1);
  546. } while (--loops);
  547. return loops ? 0 : -ETIMEDOUT;
  548. }
  549. /* DMA header used by firmware and hardware. */
  550. struct mwl8k_dma_data {
  551. __le16 fwlen;
  552. struct ieee80211_hdr wh;
  553. char data[0];
  554. } __packed;
  555. /* Routines to add/remove DMA header from skb. */
  556. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  557. {
  558. struct mwl8k_dma_data *tr;
  559. int hdrlen;
  560. tr = (struct mwl8k_dma_data *)skb->data;
  561. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  562. if (hdrlen != sizeof(tr->wh)) {
  563. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  564. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  565. *((__le16 *)(tr->data - 2)) = qos;
  566. } else {
  567. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  568. }
  569. }
  570. if (hdrlen != sizeof(*tr))
  571. skb_pull(skb, sizeof(*tr) - hdrlen);
  572. }
  573. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  574. {
  575. struct ieee80211_hdr *wh;
  576. int hdrlen;
  577. struct mwl8k_dma_data *tr;
  578. /*
  579. * Add a firmware DMA header; the firmware requires that we
  580. * present a 2-byte payload length followed by a 4-address
  581. * header (without QoS field), followed (optionally) by any
  582. * WEP/ExtIV header (but only filled in for CCMP).
  583. */
  584. wh = (struct ieee80211_hdr *)skb->data;
  585. hdrlen = ieee80211_hdrlen(wh->frame_control);
  586. if (hdrlen != sizeof(*tr))
  587. skb_push(skb, sizeof(*tr) - hdrlen);
  588. if (ieee80211_is_data_qos(wh->frame_control))
  589. hdrlen -= 2;
  590. tr = (struct mwl8k_dma_data *)skb->data;
  591. if (wh != &tr->wh)
  592. memmove(&tr->wh, wh, hdrlen);
  593. if (hdrlen != sizeof(tr->wh))
  594. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  595. /*
  596. * Firmware length is the length of the fully formed "802.11
  597. * payload". That is, everything except for the 802.11 header.
  598. * This includes all crypto material including the MIC.
  599. */
  600. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  601. }
  602. /*
  603. * Packet reception for 88w8366 AP firmware.
  604. */
  605. struct mwl8k_rxd_8366_ap {
  606. __le16 pkt_len;
  607. __u8 sq2;
  608. __u8 rate;
  609. __le32 pkt_phys_addr;
  610. __le32 next_rxd_phys_addr;
  611. __le16 qos_control;
  612. __le16 htsig2;
  613. __le32 hw_rssi_info;
  614. __le32 hw_noise_floor_info;
  615. __u8 noise_floor;
  616. __u8 pad0[3];
  617. __u8 rssi;
  618. __u8 rx_status;
  619. __u8 channel;
  620. __u8 rx_ctrl;
  621. } __packed;
  622. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  623. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  624. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  625. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  626. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  627. {
  628. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  629. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  630. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  631. }
  632. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  633. {
  634. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  635. rxd->pkt_len = cpu_to_le16(len);
  636. rxd->pkt_phys_addr = cpu_to_le32(addr);
  637. wmb();
  638. rxd->rx_ctrl = 0;
  639. }
  640. static int
  641. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  642. __le16 *qos, s8 *noise)
  643. {
  644. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  645. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  646. return -1;
  647. rmb();
  648. memset(status, 0, sizeof(*status));
  649. status->signal = -rxd->rssi;
  650. *noise = -rxd->noise_floor;
  651. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  652. status->flag |= RX_FLAG_HT;
  653. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  654. status->flag |= RX_FLAG_40MHZ;
  655. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  656. } else {
  657. int i;
  658. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  659. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  660. status->rate_idx = i;
  661. break;
  662. }
  663. }
  664. }
  665. if (rxd->channel > 14) {
  666. status->band = IEEE80211_BAND_5GHZ;
  667. if (!(status->flag & RX_FLAG_HT))
  668. status->rate_idx -= 5;
  669. } else {
  670. status->band = IEEE80211_BAND_2GHZ;
  671. }
  672. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  673. *qos = rxd->qos_control;
  674. return le16_to_cpu(rxd->pkt_len);
  675. }
  676. static struct rxd_ops rxd_8366_ap_ops = {
  677. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  678. .rxd_init = mwl8k_rxd_8366_ap_init,
  679. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  680. .rxd_process = mwl8k_rxd_8366_ap_process,
  681. };
  682. /*
  683. * Packet reception for STA firmware.
  684. */
  685. struct mwl8k_rxd_sta {
  686. __le16 pkt_len;
  687. __u8 link_quality;
  688. __u8 noise_level;
  689. __le32 pkt_phys_addr;
  690. __le32 next_rxd_phys_addr;
  691. __le16 qos_control;
  692. __le16 rate_info;
  693. __le32 pad0[4];
  694. __u8 rssi;
  695. __u8 channel;
  696. __le16 pad1;
  697. __u8 rx_ctrl;
  698. __u8 rx_status;
  699. __u8 pad2[2];
  700. } __packed;
  701. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  702. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  703. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  704. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  705. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  706. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  707. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  708. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  709. {
  710. struct mwl8k_rxd_sta *rxd = _rxd;
  711. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  712. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  713. }
  714. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  715. {
  716. struct mwl8k_rxd_sta *rxd = _rxd;
  717. rxd->pkt_len = cpu_to_le16(len);
  718. rxd->pkt_phys_addr = cpu_to_le32(addr);
  719. wmb();
  720. rxd->rx_ctrl = 0;
  721. }
  722. static int
  723. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  724. __le16 *qos, s8 *noise)
  725. {
  726. struct mwl8k_rxd_sta *rxd = _rxd;
  727. u16 rate_info;
  728. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  729. return -1;
  730. rmb();
  731. rate_info = le16_to_cpu(rxd->rate_info);
  732. memset(status, 0, sizeof(*status));
  733. status->signal = -rxd->rssi;
  734. *noise = -rxd->noise_level;
  735. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  736. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  737. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  738. status->flag |= RX_FLAG_SHORTPRE;
  739. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  740. status->flag |= RX_FLAG_40MHZ;
  741. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  742. status->flag |= RX_FLAG_SHORT_GI;
  743. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  744. status->flag |= RX_FLAG_HT;
  745. if (rxd->channel > 14) {
  746. status->band = IEEE80211_BAND_5GHZ;
  747. if (!(status->flag & RX_FLAG_HT))
  748. status->rate_idx -= 5;
  749. } else {
  750. status->band = IEEE80211_BAND_2GHZ;
  751. }
  752. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  753. *qos = rxd->qos_control;
  754. return le16_to_cpu(rxd->pkt_len);
  755. }
  756. static struct rxd_ops rxd_sta_ops = {
  757. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  758. .rxd_init = mwl8k_rxd_sta_init,
  759. .rxd_refill = mwl8k_rxd_sta_refill,
  760. .rxd_process = mwl8k_rxd_sta_process,
  761. };
  762. #define MWL8K_RX_DESCS 256
  763. #define MWL8K_RX_MAXSZ 3800
  764. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  765. {
  766. struct mwl8k_priv *priv = hw->priv;
  767. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  768. int size;
  769. int i;
  770. rxq->rxd_count = 0;
  771. rxq->head = 0;
  772. rxq->tail = 0;
  773. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  774. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  775. if (rxq->rxd == NULL) {
  776. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  777. return -ENOMEM;
  778. }
  779. memset(rxq->rxd, 0, size);
  780. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  781. if (rxq->buf == NULL) {
  782. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  783. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  784. return -ENOMEM;
  785. }
  786. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  787. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  788. int desc_size;
  789. void *rxd;
  790. int nexti;
  791. dma_addr_t next_dma_addr;
  792. desc_size = priv->rxd_ops->rxd_size;
  793. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  794. nexti = i + 1;
  795. if (nexti == MWL8K_RX_DESCS)
  796. nexti = 0;
  797. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  798. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  799. }
  800. return 0;
  801. }
  802. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  803. {
  804. struct mwl8k_priv *priv = hw->priv;
  805. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  806. int refilled;
  807. refilled = 0;
  808. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  809. struct sk_buff *skb;
  810. dma_addr_t addr;
  811. int rx;
  812. void *rxd;
  813. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  814. if (skb == NULL)
  815. break;
  816. addr = pci_map_single(priv->pdev, skb->data,
  817. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  818. rxq->rxd_count++;
  819. rx = rxq->tail++;
  820. if (rxq->tail == MWL8K_RX_DESCS)
  821. rxq->tail = 0;
  822. rxq->buf[rx].skb = skb;
  823. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  824. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  825. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  826. refilled++;
  827. }
  828. return refilled;
  829. }
  830. /* Must be called only when the card's reception is completely halted */
  831. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  832. {
  833. struct mwl8k_priv *priv = hw->priv;
  834. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  835. int i;
  836. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  837. if (rxq->buf[i].skb != NULL) {
  838. pci_unmap_single(priv->pdev,
  839. dma_unmap_addr(&rxq->buf[i], dma),
  840. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  841. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  842. kfree_skb(rxq->buf[i].skb);
  843. rxq->buf[i].skb = NULL;
  844. }
  845. }
  846. kfree(rxq->buf);
  847. rxq->buf = NULL;
  848. pci_free_consistent(priv->pdev,
  849. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  850. rxq->rxd, rxq->rxd_dma);
  851. rxq->rxd = NULL;
  852. }
  853. /*
  854. * Scan a list of BSSIDs to process for finalize join.
  855. * Allows for extension to process multiple BSSIDs.
  856. */
  857. static inline int
  858. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  859. {
  860. return priv->capture_beacon &&
  861. ieee80211_is_beacon(wh->frame_control) &&
  862. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  863. }
  864. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  865. struct sk_buff *skb)
  866. {
  867. struct mwl8k_priv *priv = hw->priv;
  868. priv->capture_beacon = false;
  869. memset(priv->capture_bssid, 0, ETH_ALEN);
  870. /*
  871. * Use GFP_ATOMIC as rxq_process is called from
  872. * the primary interrupt handler, memory allocation call
  873. * must not sleep.
  874. */
  875. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  876. if (priv->beacon_skb != NULL)
  877. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  878. }
  879. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  880. {
  881. struct mwl8k_priv *priv = hw->priv;
  882. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  883. int processed;
  884. processed = 0;
  885. while (rxq->rxd_count && limit--) {
  886. struct sk_buff *skb;
  887. void *rxd;
  888. int pkt_len;
  889. struct ieee80211_rx_status status;
  890. __le16 qos;
  891. skb = rxq->buf[rxq->head].skb;
  892. if (skb == NULL)
  893. break;
  894. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  895. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  896. &priv->noise);
  897. if (pkt_len < 0)
  898. break;
  899. rxq->buf[rxq->head].skb = NULL;
  900. pci_unmap_single(priv->pdev,
  901. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  902. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  903. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  904. rxq->head++;
  905. if (rxq->head == MWL8K_RX_DESCS)
  906. rxq->head = 0;
  907. rxq->rxd_count--;
  908. skb_put(skb, pkt_len);
  909. mwl8k_remove_dma_header(skb, qos);
  910. /*
  911. * Check for a pending join operation. Save a
  912. * copy of the beacon and schedule a tasklet to
  913. * send a FINALIZE_JOIN command to the firmware.
  914. */
  915. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  916. mwl8k_save_beacon(hw, skb);
  917. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  918. ieee80211_rx_irqsafe(hw, skb);
  919. processed++;
  920. }
  921. return processed;
  922. }
  923. /*
  924. * Packet transmission.
  925. */
  926. #define MWL8K_TXD_STATUS_OK 0x00000001
  927. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  928. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  929. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  930. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  931. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  932. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  933. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  934. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  935. #define MWL8K_QOS_EOSP 0x0010
  936. struct mwl8k_tx_desc {
  937. __le32 status;
  938. __u8 data_rate;
  939. __u8 tx_priority;
  940. __le16 qos_control;
  941. __le32 pkt_phys_addr;
  942. __le16 pkt_len;
  943. __u8 dest_MAC_addr[ETH_ALEN];
  944. __le32 next_txd_phys_addr;
  945. __le32 reserved;
  946. __le16 rate_info;
  947. __u8 peer_id;
  948. __u8 tx_frag_cnt;
  949. } __packed;
  950. #define MWL8K_TX_DESCS 128
  951. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  952. {
  953. struct mwl8k_priv *priv = hw->priv;
  954. struct mwl8k_tx_queue *txq = priv->txq + index;
  955. int size;
  956. int i;
  957. txq->len = 0;
  958. txq->head = 0;
  959. txq->tail = 0;
  960. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  961. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  962. if (txq->txd == NULL) {
  963. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  964. return -ENOMEM;
  965. }
  966. memset(txq->txd, 0, size);
  967. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  968. if (txq->skb == NULL) {
  969. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  970. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  971. return -ENOMEM;
  972. }
  973. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  974. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  975. struct mwl8k_tx_desc *tx_desc;
  976. int nexti;
  977. tx_desc = txq->txd + i;
  978. nexti = (i + 1) % MWL8K_TX_DESCS;
  979. tx_desc->status = 0;
  980. tx_desc->next_txd_phys_addr =
  981. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  982. }
  983. return 0;
  984. }
  985. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  986. {
  987. iowrite32(MWL8K_H2A_INT_PPA_READY,
  988. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  989. iowrite32(MWL8K_H2A_INT_DUMMY,
  990. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  991. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  992. }
  993. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  994. {
  995. struct mwl8k_priv *priv = hw->priv;
  996. int i;
  997. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  998. struct mwl8k_tx_queue *txq = priv->txq + i;
  999. int fw_owned = 0;
  1000. int drv_owned = 0;
  1001. int unused = 0;
  1002. int desc;
  1003. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1004. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1005. u32 status;
  1006. status = le32_to_cpu(tx_desc->status);
  1007. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1008. fw_owned++;
  1009. else
  1010. drv_owned++;
  1011. if (tx_desc->pkt_len == 0)
  1012. unused++;
  1013. }
  1014. wiphy_err(hw->wiphy,
  1015. "txq[%d] len=%d head=%d tail=%d "
  1016. "fw_owned=%d drv_owned=%d unused=%d\n",
  1017. i,
  1018. txq->len, txq->head, txq->tail,
  1019. fw_owned, drv_owned, unused);
  1020. }
  1021. }
  1022. /*
  1023. * Must be called with priv->fw_mutex held and tx queues stopped.
  1024. */
  1025. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1026. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1027. {
  1028. struct mwl8k_priv *priv = hw->priv;
  1029. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1030. int retry;
  1031. int rc;
  1032. might_sleep();
  1033. /*
  1034. * The TX queues are stopped at this point, so this test
  1035. * doesn't need to take ->tx_lock.
  1036. */
  1037. if (!priv->pending_tx_pkts)
  1038. return 0;
  1039. retry = 0;
  1040. rc = 0;
  1041. spin_lock_bh(&priv->tx_lock);
  1042. priv->tx_wait = &tx_wait;
  1043. while (!rc) {
  1044. int oldcount;
  1045. unsigned long timeout;
  1046. oldcount = priv->pending_tx_pkts;
  1047. spin_unlock_bh(&priv->tx_lock);
  1048. timeout = wait_for_completion_timeout(&tx_wait,
  1049. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1050. spin_lock_bh(&priv->tx_lock);
  1051. if (timeout) {
  1052. WARN_ON(priv->pending_tx_pkts);
  1053. if (retry) {
  1054. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1055. }
  1056. break;
  1057. }
  1058. if (priv->pending_tx_pkts < oldcount) {
  1059. wiphy_notice(hw->wiphy,
  1060. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1061. oldcount, priv->pending_tx_pkts);
  1062. retry = 1;
  1063. continue;
  1064. }
  1065. priv->tx_wait = NULL;
  1066. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1067. MWL8K_TX_WAIT_TIMEOUT_MS);
  1068. mwl8k_dump_tx_rings(hw);
  1069. rc = -ETIMEDOUT;
  1070. }
  1071. spin_unlock_bh(&priv->tx_lock);
  1072. return rc;
  1073. }
  1074. #define MWL8K_TXD_SUCCESS(status) \
  1075. ((status) & (MWL8K_TXD_STATUS_OK | \
  1076. MWL8K_TXD_STATUS_OK_RETRY | \
  1077. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1078. static int
  1079. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1080. {
  1081. struct mwl8k_priv *priv = hw->priv;
  1082. struct mwl8k_tx_queue *txq = priv->txq + index;
  1083. int processed;
  1084. processed = 0;
  1085. while (txq->len > 0 && limit--) {
  1086. int tx;
  1087. struct mwl8k_tx_desc *tx_desc;
  1088. unsigned long addr;
  1089. int size;
  1090. struct sk_buff *skb;
  1091. struct ieee80211_tx_info *info;
  1092. u32 status;
  1093. tx = txq->head;
  1094. tx_desc = txq->txd + tx;
  1095. status = le32_to_cpu(tx_desc->status);
  1096. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1097. if (!force)
  1098. break;
  1099. tx_desc->status &=
  1100. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1101. }
  1102. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1103. BUG_ON(txq->len == 0);
  1104. txq->len--;
  1105. priv->pending_tx_pkts--;
  1106. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1107. size = le16_to_cpu(tx_desc->pkt_len);
  1108. skb = txq->skb[tx];
  1109. txq->skb[tx] = NULL;
  1110. BUG_ON(skb == NULL);
  1111. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1112. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1113. /* Mark descriptor as unused */
  1114. tx_desc->pkt_phys_addr = 0;
  1115. tx_desc->pkt_len = 0;
  1116. info = IEEE80211_SKB_CB(skb);
  1117. ieee80211_tx_info_clear_status(info);
  1118. if (MWL8K_TXD_SUCCESS(status))
  1119. info->flags |= IEEE80211_TX_STAT_ACK;
  1120. ieee80211_tx_status_irqsafe(hw, skb);
  1121. processed++;
  1122. }
  1123. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1124. ieee80211_wake_queue(hw, index);
  1125. return processed;
  1126. }
  1127. /* must be called only when the card's transmit is completely halted */
  1128. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1129. {
  1130. struct mwl8k_priv *priv = hw->priv;
  1131. struct mwl8k_tx_queue *txq = priv->txq + index;
  1132. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1133. kfree(txq->skb);
  1134. txq->skb = NULL;
  1135. pci_free_consistent(priv->pdev,
  1136. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1137. txq->txd, txq->txd_dma);
  1138. txq->txd = NULL;
  1139. }
  1140. static int
  1141. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1142. {
  1143. struct mwl8k_priv *priv = hw->priv;
  1144. struct ieee80211_tx_info *tx_info;
  1145. struct mwl8k_vif *mwl8k_vif;
  1146. struct ieee80211_hdr *wh;
  1147. struct mwl8k_tx_queue *txq;
  1148. struct mwl8k_tx_desc *tx;
  1149. dma_addr_t dma;
  1150. u32 txstatus;
  1151. u8 txdatarate;
  1152. u16 qos;
  1153. wh = (struct ieee80211_hdr *)skb->data;
  1154. if (ieee80211_is_data_qos(wh->frame_control))
  1155. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1156. else
  1157. qos = 0;
  1158. mwl8k_add_dma_header(skb);
  1159. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1160. tx_info = IEEE80211_SKB_CB(skb);
  1161. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1162. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1163. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1164. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1165. mwl8k_vif->seqno += 0x10;
  1166. }
  1167. /* Setup firmware control bit fields for each frame type. */
  1168. txstatus = 0;
  1169. txdatarate = 0;
  1170. if (ieee80211_is_mgmt(wh->frame_control) ||
  1171. ieee80211_is_ctl(wh->frame_control)) {
  1172. txdatarate = 0;
  1173. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1174. } else if (ieee80211_is_data(wh->frame_control)) {
  1175. txdatarate = 1;
  1176. if (is_multicast_ether_addr(wh->addr1))
  1177. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1178. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1179. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1180. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1181. else
  1182. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1183. }
  1184. dma = pci_map_single(priv->pdev, skb->data,
  1185. skb->len, PCI_DMA_TODEVICE);
  1186. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1187. wiphy_debug(hw->wiphy,
  1188. "failed to dma map skb, dropping TX frame.\n");
  1189. dev_kfree_skb(skb);
  1190. return NETDEV_TX_OK;
  1191. }
  1192. spin_lock_bh(&priv->tx_lock);
  1193. txq = priv->txq + index;
  1194. BUG_ON(txq->skb[txq->tail] != NULL);
  1195. txq->skb[txq->tail] = skb;
  1196. tx = txq->txd + txq->tail;
  1197. tx->data_rate = txdatarate;
  1198. tx->tx_priority = index;
  1199. tx->qos_control = cpu_to_le16(qos);
  1200. tx->pkt_phys_addr = cpu_to_le32(dma);
  1201. tx->pkt_len = cpu_to_le16(skb->len);
  1202. tx->rate_info = 0;
  1203. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1204. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1205. else
  1206. tx->peer_id = 0;
  1207. wmb();
  1208. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1209. txq->len++;
  1210. priv->pending_tx_pkts++;
  1211. txq->tail++;
  1212. if (txq->tail == MWL8K_TX_DESCS)
  1213. txq->tail = 0;
  1214. if (txq->head == txq->tail)
  1215. ieee80211_stop_queue(hw, index);
  1216. mwl8k_tx_start(priv);
  1217. spin_unlock_bh(&priv->tx_lock);
  1218. return NETDEV_TX_OK;
  1219. }
  1220. /*
  1221. * Firmware access.
  1222. *
  1223. * We have the following requirements for issuing firmware commands:
  1224. * - Some commands require that the packet transmit path is idle when
  1225. * the command is issued. (For simplicity, we'll just quiesce the
  1226. * transmit path for every command.)
  1227. * - There are certain sequences of commands that need to be issued to
  1228. * the hardware sequentially, with no other intervening commands.
  1229. *
  1230. * This leads to an implementation of a "firmware lock" as a mutex that
  1231. * can be taken recursively, and which is taken by both the low-level
  1232. * command submission function (mwl8k_post_cmd) as well as any users of
  1233. * that function that require issuing of an atomic sequence of commands,
  1234. * and quiesces the transmit path whenever it's taken.
  1235. */
  1236. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1237. {
  1238. struct mwl8k_priv *priv = hw->priv;
  1239. if (priv->fw_mutex_owner != current) {
  1240. int rc;
  1241. mutex_lock(&priv->fw_mutex);
  1242. ieee80211_stop_queues(hw);
  1243. rc = mwl8k_tx_wait_empty(hw);
  1244. if (rc) {
  1245. ieee80211_wake_queues(hw);
  1246. mutex_unlock(&priv->fw_mutex);
  1247. return rc;
  1248. }
  1249. priv->fw_mutex_owner = current;
  1250. }
  1251. priv->fw_mutex_depth++;
  1252. return 0;
  1253. }
  1254. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1255. {
  1256. struct mwl8k_priv *priv = hw->priv;
  1257. if (!--priv->fw_mutex_depth) {
  1258. ieee80211_wake_queues(hw);
  1259. priv->fw_mutex_owner = NULL;
  1260. mutex_unlock(&priv->fw_mutex);
  1261. }
  1262. }
  1263. /*
  1264. * Command processing.
  1265. */
  1266. /* Timeout firmware commands after 10s */
  1267. #define MWL8K_CMD_TIMEOUT_MS 10000
  1268. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1269. {
  1270. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1271. struct mwl8k_priv *priv = hw->priv;
  1272. void __iomem *regs = priv->regs;
  1273. dma_addr_t dma_addr;
  1274. unsigned int dma_size;
  1275. int rc;
  1276. unsigned long timeout = 0;
  1277. u8 buf[32];
  1278. cmd->result = (__force __le16) 0xffff;
  1279. dma_size = le16_to_cpu(cmd->length);
  1280. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1281. PCI_DMA_BIDIRECTIONAL);
  1282. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1283. return -ENOMEM;
  1284. rc = mwl8k_fw_lock(hw);
  1285. if (rc) {
  1286. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1287. PCI_DMA_BIDIRECTIONAL);
  1288. return rc;
  1289. }
  1290. priv->hostcmd_wait = &cmd_wait;
  1291. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1292. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1293. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1294. iowrite32(MWL8K_H2A_INT_DUMMY,
  1295. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1296. timeout = wait_for_completion_timeout(&cmd_wait,
  1297. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1298. priv->hostcmd_wait = NULL;
  1299. mwl8k_fw_unlock(hw);
  1300. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1301. PCI_DMA_BIDIRECTIONAL);
  1302. if (!timeout) {
  1303. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1304. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1305. MWL8K_CMD_TIMEOUT_MS);
  1306. rc = -ETIMEDOUT;
  1307. } else {
  1308. int ms;
  1309. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1310. rc = cmd->result ? -EINVAL : 0;
  1311. if (rc)
  1312. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1313. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1314. le16_to_cpu(cmd->result));
  1315. else if (ms > 2000)
  1316. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1317. mwl8k_cmd_name(cmd->code,
  1318. buf, sizeof(buf)),
  1319. ms);
  1320. }
  1321. return rc;
  1322. }
  1323. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1324. struct ieee80211_vif *vif,
  1325. struct mwl8k_cmd_pkt *cmd)
  1326. {
  1327. if (vif != NULL)
  1328. cmd->macid = MWL8K_VIF(vif)->macid;
  1329. return mwl8k_post_cmd(hw, cmd);
  1330. }
  1331. /*
  1332. * Setup code shared between STA and AP firmware images.
  1333. */
  1334. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1335. {
  1336. struct mwl8k_priv *priv = hw->priv;
  1337. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1338. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1339. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1340. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1341. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1342. priv->band_24.channels = priv->channels_24;
  1343. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1344. priv->band_24.bitrates = priv->rates_24;
  1345. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1346. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1347. }
  1348. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1349. {
  1350. struct mwl8k_priv *priv = hw->priv;
  1351. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1352. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1353. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1354. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1355. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1356. priv->band_50.channels = priv->channels_50;
  1357. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1358. priv->band_50.bitrates = priv->rates_50;
  1359. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1360. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1361. }
  1362. /*
  1363. * CMD_GET_HW_SPEC (STA version).
  1364. */
  1365. struct mwl8k_cmd_get_hw_spec_sta {
  1366. struct mwl8k_cmd_pkt header;
  1367. __u8 hw_rev;
  1368. __u8 host_interface;
  1369. __le16 num_mcaddrs;
  1370. __u8 perm_addr[ETH_ALEN];
  1371. __le16 region_code;
  1372. __le32 fw_rev;
  1373. __le32 ps_cookie;
  1374. __le32 caps;
  1375. __u8 mcs_bitmap[16];
  1376. __le32 rx_queue_ptr;
  1377. __le32 num_tx_queues;
  1378. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1379. __le32 caps2;
  1380. __le32 num_tx_desc_per_queue;
  1381. __le32 total_rxd;
  1382. } __packed;
  1383. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1384. #define MWL8K_CAP_GREENFIELD 0x08000000
  1385. #define MWL8K_CAP_AMPDU 0x04000000
  1386. #define MWL8K_CAP_RX_STBC 0x01000000
  1387. #define MWL8K_CAP_TX_STBC 0x00800000
  1388. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1389. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1390. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1391. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1392. #define MWL8K_CAP_DELAY_BA 0x00003000
  1393. #define MWL8K_CAP_MIMO 0x00000200
  1394. #define MWL8K_CAP_40MHZ 0x00000100
  1395. #define MWL8K_CAP_BAND_MASK 0x00000007
  1396. #define MWL8K_CAP_5GHZ 0x00000004
  1397. #define MWL8K_CAP_2GHZ4 0x00000001
  1398. static void
  1399. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1400. struct ieee80211_supported_band *band, u32 cap)
  1401. {
  1402. int rx_streams;
  1403. int tx_streams;
  1404. band->ht_cap.ht_supported = 1;
  1405. if (cap & MWL8K_CAP_MAX_AMSDU)
  1406. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1407. if (cap & MWL8K_CAP_GREENFIELD)
  1408. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1409. if (cap & MWL8K_CAP_AMPDU) {
  1410. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1411. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1412. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1413. }
  1414. if (cap & MWL8K_CAP_RX_STBC)
  1415. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1416. if (cap & MWL8K_CAP_TX_STBC)
  1417. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1418. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1419. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1420. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1421. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1422. if (cap & MWL8K_CAP_DELAY_BA)
  1423. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1424. if (cap & MWL8K_CAP_40MHZ)
  1425. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1426. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1427. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1428. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1429. if (rx_streams >= 2)
  1430. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1431. if (rx_streams >= 3)
  1432. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1433. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1434. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1435. if (rx_streams != tx_streams) {
  1436. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1437. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1438. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1439. }
  1440. }
  1441. static void
  1442. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1443. {
  1444. struct mwl8k_priv *priv = hw->priv;
  1445. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1446. mwl8k_setup_2ghz_band(hw);
  1447. if (caps & MWL8K_CAP_MIMO)
  1448. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1449. }
  1450. if (caps & MWL8K_CAP_5GHZ) {
  1451. mwl8k_setup_5ghz_band(hw);
  1452. if (caps & MWL8K_CAP_MIMO)
  1453. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1454. }
  1455. }
  1456. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1457. {
  1458. struct mwl8k_priv *priv = hw->priv;
  1459. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1460. int rc;
  1461. int i;
  1462. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1463. if (cmd == NULL)
  1464. return -ENOMEM;
  1465. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1466. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1467. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1468. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1469. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1470. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1471. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1472. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1473. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1474. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1475. rc = mwl8k_post_cmd(hw, &cmd->header);
  1476. if (!rc) {
  1477. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1478. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1479. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1480. priv->hw_rev = cmd->hw_rev;
  1481. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1482. priv->ap_macids_supported = 0x00000000;
  1483. priv->sta_macids_supported = 0x00000001;
  1484. }
  1485. kfree(cmd);
  1486. return rc;
  1487. }
  1488. /*
  1489. * CMD_GET_HW_SPEC (AP version).
  1490. */
  1491. struct mwl8k_cmd_get_hw_spec_ap {
  1492. struct mwl8k_cmd_pkt header;
  1493. __u8 hw_rev;
  1494. __u8 host_interface;
  1495. __le16 num_wcb;
  1496. __le16 num_mcaddrs;
  1497. __u8 perm_addr[ETH_ALEN];
  1498. __le16 region_code;
  1499. __le16 num_antenna;
  1500. __le32 fw_rev;
  1501. __le32 wcbbase0;
  1502. __le32 rxwrptr;
  1503. __le32 rxrdptr;
  1504. __le32 ps_cookie;
  1505. __le32 wcbbase1;
  1506. __le32 wcbbase2;
  1507. __le32 wcbbase3;
  1508. __le32 fw_api_version;
  1509. } __packed;
  1510. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1511. {
  1512. struct mwl8k_priv *priv = hw->priv;
  1513. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1514. int rc;
  1515. u32 api_version;
  1516. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1517. if (cmd == NULL)
  1518. return -ENOMEM;
  1519. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1520. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1521. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1522. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1523. rc = mwl8k_post_cmd(hw, &cmd->header);
  1524. if (!rc) {
  1525. int off;
  1526. api_version = le32_to_cpu(cmd->fw_api_version);
  1527. if (priv->device_info->fw_api_ap != api_version) {
  1528. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  1529. " Expected %d got %d.\n", MWL8K_NAME,
  1530. priv->device_info->part_name,
  1531. priv->device_info->fw_api_ap,
  1532. api_version);
  1533. rc = -EINVAL;
  1534. goto done;
  1535. }
  1536. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1537. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1538. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1539. priv->hw_rev = cmd->hw_rev;
  1540. mwl8k_setup_2ghz_band(hw);
  1541. priv->ap_macids_supported = 0x000000ff;
  1542. priv->sta_macids_supported = 0x00000000;
  1543. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1544. iowrite32(priv->txq[0].txd_dma, priv->sram + off);
  1545. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1546. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1547. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1548. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  1549. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1550. iowrite32(priv->txq[1].txd_dma, priv->sram + off);
  1551. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1552. iowrite32(priv->txq[2].txd_dma, priv->sram + off);
  1553. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1554. iowrite32(priv->txq[3].txd_dma, priv->sram + off);
  1555. }
  1556. done:
  1557. kfree(cmd);
  1558. return rc;
  1559. }
  1560. /*
  1561. * CMD_SET_HW_SPEC.
  1562. */
  1563. struct mwl8k_cmd_set_hw_spec {
  1564. struct mwl8k_cmd_pkt header;
  1565. __u8 hw_rev;
  1566. __u8 host_interface;
  1567. __le16 num_mcaddrs;
  1568. __u8 perm_addr[ETH_ALEN];
  1569. __le16 region_code;
  1570. __le32 fw_rev;
  1571. __le32 ps_cookie;
  1572. __le32 caps;
  1573. __le32 rx_queue_ptr;
  1574. __le32 num_tx_queues;
  1575. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1576. __le32 flags;
  1577. __le32 num_tx_desc_per_queue;
  1578. __le32 total_rxd;
  1579. } __packed;
  1580. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1581. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1582. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1583. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1584. {
  1585. struct mwl8k_priv *priv = hw->priv;
  1586. struct mwl8k_cmd_set_hw_spec *cmd;
  1587. int rc;
  1588. int i;
  1589. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1590. if (cmd == NULL)
  1591. return -ENOMEM;
  1592. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1593. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1594. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1595. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1596. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1597. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1598. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1599. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1600. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1601. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1602. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1603. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1604. rc = mwl8k_post_cmd(hw, &cmd->header);
  1605. kfree(cmd);
  1606. return rc;
  1607. }
  1608. /*
  1609. * CMD_MAC_MULTICAST_ADR.
  1610. */
  1611. struct mwl8k_cmd_mac_multicast_adr {
  1612. struct mwl8k_cmd_pkt header;
  1613. __le16 action;
  1614. __le16 numaddr;
  1615. __u8 addr[0][ETH_ALEN];
  1616. };
  1617. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1618. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1619. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1620. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1621. static struct mwl8k_cmd_pkt *
  1622. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1623. struct netdev_hw_addr_list *mc_list)
  1624. {
  1625. struct mwl8k_priv *priv = hw->priv;
  1626. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1627. int size;
  1628. int mc_count = 0;
  1629. if (mc_list)
  1630. mc_count = netdev_hw_addr_list_count(mc_list);
  1631. if (allmulti || mc_count > priv->num_mcaddrs) {
  1632. allmulti = 1;
  1633. mc_count = 0;
  1634. }
  1635. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1636. cmd = kzalloc(size, GFP_ATOMIC);
  1637. if (cmd == NULL)
  1638. return NULL;
  1639. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1640. cmd->header.length = cpu_to_le16(size);
  1641. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1642. MWL8K_ENABLE_RX_BROADCAST);
  1643. if (allmulti) {
  1644. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1645. } else if (mc_count) {
  1646. struct netdev_hw_addr *ha;
  1647. int i = 0;
  1648. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1649. cmd->numaddr = cpu_to_le16(mc_count);
  1650. netdev_hw_addr_list_for_each(ha, mc_list) {
  1651. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  1652. }
  1653. }
  1654. return &cmd->header;
  1655. }
  1656. /*
  1657. * CMD_GET_STAT.
  1658. */
  1659. struct mwl8k_cmd_get_stat {
  1660. struct mwl8k_cmd_pkt header;
  1661. __le32 stats[64];
  1662. } __packed;
  1663. #define MWL8K_STAT_ACK_FAILURE 9
  1664. #define MWL8K_STAT_RTS_FAILURE 12
  1665. #define MWL8K_STAT_FCS_ERROR 24
  1666. #define MWL8K_STAT_RTS_SUCCESS 11
  1667. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1668. struct ieee80211_low_level_stats *stats)
  1669. {
  1670. struct mwl8k_cmd_get_stat *cmd;
  1671. int rc;
  1672. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1673. if (cmd == NULL)
  1674. return -ENOMEM;
  1675. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1676. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1677. rc = mwl8k_post_cmd(hw, &cmd->header);
  1678. if (!rc) {
  1679. stats->dot11ACKFailureCount =
  1680. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1681. stats->dot11RTSFailureCount =
  1682. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1683. stats->dot11FCSErrorCount =
  1684. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1685. stats->dot11RTSSuccessCount =
  1686. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1687. }
  1688. kfree(cmd);
  1689. return rc;
  1690. }
  1691. /*
  1692. * CMD_RADIO_CONTROL.
  1693. */
  1694. struct mwl8k_cmd_radio_control {
  1695. struct mwl8k_cmd_pkt header;
  1696. __le16 action;
  1697. __le16 control;
  1698. __le16 radio_on;
  1699. } __packed;
  1700. static int
  1701. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1702. {
  1703. struct mwl8k_priv *priv = hw->priv;
  1704. struct mwl8k_cmd_radio_control *cmd;
  1705. int rc;
  1706. if (enable == priv->radio_on && !force)
  1707. return 0;
  1708. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1709. if (cmd == NULL)
  1710. return -ENOMEM;
  1711. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1712. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1713. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1714. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1715. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1716. rc = mwl8k_post_cmd(hw, &cmd->header);
  1717. kfree(cmd);
  1718. if (!rc)
  1719. priv->radio_on = enable;
  1720. return rc;
  1721. }
  1722. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1723. {
  1724. return mwl8k_cmd_radio_control(hw, 0, 0);
  1725. }
  1726. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1727. {
  1728. return mwl8k_cmd_radio_control(hw, 1, 0);
  1729. }
  1730. static int
  1731. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1732. {
  1733. struct mwl8k_priv *priv = hw->priv;
  1734. priv->radio_short_preamble = short_preamble;
  1735. return mwl8k_cmd_radio_control(hw, 1, 1);
  1736. }
  1737. /*
  1738. * CMD_RF_TX_POWER.
  1739. */
  1740. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  1741. struct mwl8k_cmd_rf_tx_power {
  1742. struct mwl8k_cmd_pkt header;
  1743. __le16 action;
  1744. __le16 support_level;
  1745. __le16 current_level;
  1746. __le16 reserved;
  1747. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  1748. } __packed;
  1749. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1750. {
  1751. struct mwl8k_cmd_rf_tx_power *cmd;
  1752. int rc;
  1753. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1754. if (cmd == NULL)
  1755. return -ENOMEM;
  1756. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1757. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1758. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1759. cmd->support_level = cpu_to_le16(dBm);
  1760. rc = mwl8k_post_cmd(hw, &cmd->header);
  1761. kfree(cmd);
  1762. return rc;
  1763. }
  1764. /*
  1765. * CMD_TX_POWER.
  1766. */
  1767. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  1768. struct mwl8k_cmd_tx_power {
  1769. struct mwl8k_cmd_pkt header;
  1770. __le16 action;
  1771. __le16 band;
  1772. __le16 channel;
  1773. __le16 bw;
  1774. __le16 sub_ch;
  1775. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1776. } __attribute__((packed));
  1777. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  1778. struct ieee80211_conf *conf,
  1779. unsigned short pwr)
  1780. {
  1781. struct ieee80211_channel *channel = conf->channel;
  1782. struct mwl8k_cmd_tx_power *cmd;
  1783. int rc;
  1784. int i;
  1785. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1786. if (cmd == NULL)
  1787. return -ENOMEM;
  1788. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  1789. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1790. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  1791. if (channel->band == IEEE80211_BAND_2GHZ)
  1792. cmd->band = cpu_to_le16(0x1);
  1793. else if (channel->band == IEEE80211_BAND_5GHZ)
  1794. cmd->band = cpu_to_le16(0x4);
  1795. cmd->channel = channel->hw_value;
  1796. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1797. conf->channel_type == NL80211_CHAN_HT20) {
  1798. cmd->bw = cpu_to_le16(0x2);
  1799. } else {
  1800. cmd->bw = cpu_to_le16(0x4);
  1801. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1802. cmd->sub_ch = cpu_to_le16(0x3);
  1803. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1804. cmd->sub_ch = cpu_to_le16(0x1);
  1805. }
  1806. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  1807. cmd->power_level_list[i] = cpu_to_le16(pwr);
  1808. rc = mwl8k_post_cmd(hw, &cmd->header);
  1809. kfree(cmd);
  1810. return rc;
  1811. }
  1812. /*
  1813. * CMD_RF_ANTENNA.
  1814. */
  1815. struct mwl8k_cmd_rf_antenna {
  1816. struct mwl8k_cmd_pkt header;
  1817. __le16 antenna;
  1818. __le16 mode;
  1819. } __packed;
  1820. #define MWL8K_RF_ANTENNA_RX 1
  1821. #define MWL8K_RF_ANTENNA_TX 2
  1822. static int
  1823. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1824. {
  1825. struct mwl8k_cmd_rf_antenna *cmd;
  1826. int rc;
  1827. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1828. if (cmd == NULL)
  1829. return -ENOMEM;
  1830. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1831. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1832. cmd->antenna = cpu_to_le16(antenna);
  1833. cmd->mode = cpu_to_le16(mask);
  1834. rc = mwl8k_post_cmd(hw, &cmd->header);
  1835. kfree(cmd);
  1836. return rc;
  1837. }
  1838. /*
  1839. * CMD_SET_BEACON.
  1840. */
  1841. struct mwl8k_cmd_set_beacon {
  1842. struct mwl8k_cmd_pkt header;
  1843. __le16 beacon_len;
  1844. __u8 beacon[0];
  1845. };
  1846. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  1847. struct ieee80211_vif *vif, u8 *beacon, int len)
  1848. {
  1849. struct mwl8k_cmd_set_beacon *cmd;
  1850. int rc;
  1851. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1852. if (cmd == NULL)
  1853. return -ENOMEM;
  1854. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1855. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1856. cmd->beacon_len = cpu_to_le16(len);
  1857. memcpy(cmd->beacon, beacon, len);
  1858. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  1859. kfree(cmd);
  1860. return rc;
  1861. }
  1862. /*
  1863. * CMD_SET_PRE_SCAN.
  1864. */
  1865. struct mwl8k_cmd_set_pre_scan {
  1866. struct mwl8k_cmd_pkt header;
  1867. } __packed;
  1868. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1869. {
  1870. struct mwl8k_cmd_set_pre_scan *cmd;
  1871. int rc;
  1872. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1873. if (cmd == NULL)
  1874. return -ENOMEM;
  1875. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1876. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1877. rc = mwl8k_post_cmd(hw, &cmd->header);
  1878. kfree(cmd);
  1879. return rc;
  1880. }
  1881. /*
  1882. * CMD_SET_POST_SCAN.
  1883. */
  1884. struct mwl8k_cmd_set_post_scan {
  1885. struct mwl8k_cmd_pkt header;
  1886. __le32 isibss;
  1887. __u8 bssid[ETH_ALEN];
  1888. } __packed;
  1889. static int
  1890. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1891. {
  1892. struct mwl8k_cmd_set_post_scan *cmd;
  1893. int rc;
  1894. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1895. if (cmd == NULL)
  1896. return -ENOMEM;
  1897. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1898. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1899. cmd->isibss = 0;
  1900. memcpy(cmd->bssid, mac, ETH_ALEN);
  1901. rc = mwl8k_post_cmd(hw, &cmd->header);
  1902. kfree(cmd);
  1903. return rc;
  1904. }
  1905. /*
  1906. * CMD_SET_RF_CHANNEL.
  1907. */
  1908. struct mwl8k_cmd_set_rf_channel {
  1909. struct mwl8k_cmd_pkt header;
  1910. __le16 action;
  1911. __u8 current_channel;
  1912. __le32 channel_flags;
  1913. } __packed;
  1914. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1915. struct ieee80211_conf *conf)
  1916. {
  1917. struct ieee80211_channel *channel = conf->channel;
  1918. struct mwl8k_cmd_set_rf_channel *cmd;
  1919. int rc;
  1920. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1921. if (cmd == NULL)
  1922. return -ENOMEM;
  1923. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1924. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1925. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1926. cmd->current_channel = channel->hw_value;
  1927. if (channel->band == IEEE80211_BAND_2GHZ)
  1928. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1929. else if (channel->band == IEEE80211_BAND_5GHZ)
  1930. cmd->channel_flags |= cpu_to_le32(0x00000004);
  1931. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1932. conf->channel_type == NL80211_CHAN_HT20)
  1933. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1934. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1935. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1936. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1937. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1938. rc = mwl8k_post_cmd(hw, &cmd->header);
  1939. kfree(cmd);
  1940. return rc;
  1941. }
  1942. /*
  1943. * CMD_SET_AID.
  1944. */
  1945. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1946. #define MWL8K_FRAME_PROT_11G 0x07
  1947. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1948. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1949. struct mwl8k_cmd_update_set_aid {
  1950. struct mwl8k_cmd_pkt header;
  1951. __le16 aid;
  1952. /* AP's MAC address (BSSID) */
  1953. __u8 bssid[ETH_ALEN];
  1954. __le16 protection_mode;
  1955. __u8 supp_rates[14];
  1956. } __packed;
  1957. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1958. {
  1959. int i;
  1960. int j;
  1961. /*
  1962. * Clear nonstandard rates 4 and 13.
  1963. */
  1964. mask &= 0x1fef;
  1965. for (i = 0, j = 0; i < 14; i++) {
  1966. if (mask & (1 << i))
  1967. rates[j++] = mwl8k_rates_24[i].hw_value;
  1968. }
  1969. }
  1970. static int
  1971. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1972. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1973. {
  1974. struct mwl8k_cmd_update_set_aid *cmd;
  1975. u16 prot_mode;
  1976. int rc;
  1977. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1978. if (cmd == NULL)
  1979. return -ENOMEM;
  1980. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1981. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1982. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1983. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1984. if (vif->bss_conf.use_cts_prot) {
  1985. prot_mode = MWL8K_FRAME_PROT_11G;
  1986. } else {
  1987. switch (vif->bss_conf.ht_operation_mode &
  1988. IEEE80211_HT_OP_MODE_PROTECTION) {
  1989. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1990. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1991. break;
  1992. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1993. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1994. break;
  1995. default:
  1996. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1997. break;
  1998. }
  1999. }
  2000. cmd->protection_mode = cpu_to_le16(prot_mode);
  2001. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2002. rc = mwl8k_post_cmd(hw, &cmd->header);
  2003. kfree(cmd);
  2004. return rc;
  2005. }
  2006. /*
  2007. * CMD_SET_RATE.
  2008. */
  2009. struct mwl8k_cmd_set_rate {
  2010. struct mwl8k_cmd_pkt header;
  2011. __u8 legacy_rates[14];
  2012. /* Bitmap for supported MCS codes. */
  2013. __u8 mcs_set[16];
  2014. __u8 reserved[16];
  2015. } __packed;
  2016. static int
  2017. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2018. u32 legacy_rate_mask, u8 *mcs_rates)
  2019. {
  2020. struct mwl8k_cmd_set_rate *cmd;
  2021. int rc;
  2022. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2023. if (cmd == NULL)
  2024. return -ENOMEM;
  2025. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2026. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2027. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2028. memcpy(cmd->mcs_set, mcs_rates, 16);
  2029. rc = mwl8k_post_cmd(hw, &cmd->header);
  2030. kfree(cmd);
  2031. return rc;
  2032. }
  2033. /*
  2034. * CMD_FINALIZE_JOIN.
  2035. */
  2036. #define MWL8K_FJ_BEACON_MAXLEN 128
  2037. struct mwl8k_cmd_finalize_join {
  2038. struct mwl8k_cmd_pkt header;
  2039. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2040. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2041. } __packed;
  2042. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2043. int framelen, int dtim)
  2044. {
  2045. struct mwl8k_cmd_finalize_join *cmd;
  2046. struct ieee80211_mgmt *payload = frame;
  2047. int payload_len;
  2048. int rc;
  2049. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2050. if (cmd == NULL)
  2051. return -ENOMEM;
  2052. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2053. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2054. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2055. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2056. if (payload_len < 0)
  2057. payload_len = 0;
  2058. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2059. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2060. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2061. rc = mwl8k_post_cmd(hw, &cmd->header);
  2062. kfree(cmd);
  2063. return rc;
  2064. }
  2065. /*
  2066. * CMD_SET_RTS_THRESHOLD.
  2067. */
  2068. struct mwl8k_cmd_set_rts_threshold {
  2069. struct mwl8k_cmd_pkt header;
  2070. __le16 action;
  2071. __le16 threshold;
  2072. } __packed;
  2073. static int
  2074. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2075. {
  2076. struct mwl8k_cmd_set_rts_threshold *cmd;
  2077. int rc;
  2078. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2079. if (cmd == NULL)
  2080. return -ENOMEM;
  2081. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2082. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2083. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2084. cmd->threshold = cpu_to_le16(rts_thresh);
  2085. rc = mwl8k_post_cmd(hw, &cmd->header);
  2086. kfree(cmd);
  2087. return rc;
  2088. }
  2089. /*
  2090. * CMD_SET_SLOT.
  2091. */
  2092. struct mwl8k_cmd_set_slot {
  2093. struct mwl8k_cmd_pkt header;
  2094. __le16 action;
  2095. __u8 short_slot;
  2096. } __packed;
  2097. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2098. {
  2099. struct mwl8k_cmd_set_slot *cmd;
  2100. int rc;
  2101. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2102. if (cmd == NULL)
  2103. return -ENOMEM;
  2104. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2105. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2106. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2107. cmd->short_slot = short_slot_time;
  2108. rc = mwl8k_post_cmd(hw, &cmd->header);
  2109. kfree(cmd);
  2110. return rc;
  2111. }
  2112. /*
  2113. * CMD_SET_EDCA_PARAMS.
  2114. */
  2115. struct mwl8k_cmd_set_edca_params {
  2116. struct mwl8k_cmd_pkt header;
  2117. /* See MWL8K_SET_EDCA_XXX below */
  2118. __le16 action;
  2119. /* TX opportunity in units of 32 us */
  2120. __le16 txop;
  2121. union {
  2122. struct {
  2123. /* Log exponent of max contention period: 0...15 */
  2124. __le32 log_cw_max;
  2125. /* Log exponent of min contention period: 0...15 */
  2126. __le32 log_cw_min;
  2127. /* Adaptive interframe spacing in units of 32us */
  2128. __u8 aifs;
  2129. /* TX queue to configure */
  2130. __u8 txq;
  2131. } ap;
  2132. struct {
  2133. /* Log exponent of max contention period: 0...15 */
  2134. __u8 log_cw_max;
  2135. /* Log exponent of min contention period: 0...15 */
  2136. __u8 log_cw_min;
  2137. /* Adaptive interframe spacing in units of 32us */
  2138. __u8 aifs;
  2139. /* TX queue to configure */
  2140. __u8 txq;
  2141. } sta;
  2142. };
  2143. } __packed;
  2144. #define MWL8K_SET_EDCA_CW 0x01
  2145. #define MWL8K_SET_EDCA_TXOP 0x02
  2146. #define MWL8K_SET_EDCA_AIFS 0x04
  2147. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2148. MWL8K_SET_EDCA_TXOP | \
  2149. MWL8K_SET_EDCA_AIFS)
  2150. static int
  2151. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2152. __u16 cw_min, __u16 cw_max,
  2153. __u8 aifs, __u16 txop)
  2154. {
  2155. struct mwl8k_priv *priv = hw->priv;
  2156. struct mwl8k_cmd_set_edca_params *cmd;
  2157. int rc;
  2158. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2159. if (cmd == NULL)
  2160. return -ENOMEM;
  2161. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2162. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2163. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2164. cmd->txop = cpu_to_le16(txop);
  2165. if (priv->ap_fw) {
  2166. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2167. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2168. cmd->ap.aifs = aifs;
  2169. cmd->ap.txq = qnum;
  2170. } else {
  2171. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2172. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2173. cmd->sta.aifs = aifs;
  2174. cmd->sta.txq = qnum;
  2175. }
  2176. rc = mwl8k_post_cmd(hw, &cmd->header);
  2177. kfree(cmd);
  2178. return rc;
  2179. }
  2180. /*
  2181. * CMD_SET_WMM_MODE.
  2182. */
  2183. struct mwl8k_cmd_set_wmm_mode {
  2184. struct mwl8k_cmd_pkt header;
  2185. __le16 action;
  2186. } __packed;
  2187. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2188. {
  2189. struct mwl8k_priv *priv = hw->priv;
  2190. struct mwl8k_cmd_set_wmm_mode *cmd;
  2191. int rc;
  2192. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2193. if (cmd == NULL)
  2194. return -ENOMEM;
  2195. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2196. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2197. cmd->action = cpu_to_le16(!!enable);
  2198. rc = mwl8k_post_cmd(hw, &cmd->header);
  2199. kfree(cmd);
  2200. if (!rc)
  2201. priv->wmm_enabled = enable;
  2202. return rc;
  2203. }
  2204. /*
  2205. * CMD_MIMO_CONFIG.
  2206. */
  2207. struct mwl8k_cmd_mimo_config {
  2208. struct mwl8k_cmd_pkt header;
  2209. __le32 action;
  2210. __u8 rx_antenna_map;
  2211. __u8 tx_antenna_map;
  2212. } __packed;
  2213. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2214. {
  2215. struct mwl8k_cmd_mimo_config *cmd;
  2216. int rc;
  2217. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2218. if (cmd == NULL)
  2219. return -ENOMEM;
  2220. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2221. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2222. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2223. cmd->rx_antenna_map = rx;
  2224. cmd->tx_antenna_map = tx;
  2225. rc = mwl8k_post_cmd(hw, &cmd->header);
  2226. kfree(cmd);
  2227. return rc;
  2228. }
  2229. /*
  2230. * CMD_USE_FIXED_RATE (STA version).
  2231. */
  2232. struct mwl8k_cmd_use_fixed_rate_sta {
  2233. struct mwl8k_cmd_pkt header;
  2234. __le32 action;
  2235. __le32 allow_rate_drop;
  2236. __le32 num_rates;
  2237. struct {
  2238. __le32 is_ht_rate;
  2239. __le32 enable_retry;
  2240. __le32 rate;
  2241. __le32 retry_count;
  2242. } rate_entry[8];
  2243. __le32 rate_type;
  2244. __le32 reserved1;
  2245. __le32 reserved2;
  2246. } __packed;
  2247. #define MWL8K_USE_AUTO_RATE 0x0002
  2248. #define MWL8K_UCAST_RATE 0
  2249. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2250. {
  2251. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2252. int rc;
  2253. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2254. if (cmd == NULL)
  2255. return -ENOMEM;
  2256. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2257. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2258. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2259. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2260. rc = mwl8k_post_cmd(hw, &cmd->header);
  2261. kfree(cmd);
  2262. return rc;
  2263. }
  2264. /*
  2265. * CMD_USE_FIXED_RATE (AP version).
  2266. */
  2267. struct mwl8k_cmd_use_fixed_rate_ap {
  2268. struct mwl8k_cmd_pkt header;
  2269. __le32 action;
  2270. __le32 allow_rate_drop;
  2271. __le32 num_rates;
  2272. struct mwl8k_rate_entry_ap {
  2273. __le32 is_ht_rate;
  2274. __le32 enable_retry;
  2275. __le32 rate;
  2276. __le32 retry_count;
  2277. } rate_entry[4];
  2278. u8 multicast_rate;
  2279. u8 multicast_rate_type;
  2280. u8 management_rate;
  2281. } __packed;
  2282. static int
  2283. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2284. {
  2285. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2286. int rc;
  2287. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2288. if (cmd == NULL)
  2289. return -ENOMEM;
  2290. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2291. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2292. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2293. cmd->multicast_rate = mcast;
  2294. cmd->management_rate = mgmt;
  2295. rc = mwl8k_post_cmd(hw, &cmd->header);
  2296. kfree(cmd);
  2297. return rc;
  2298. }
  2299. /*
  2300. * CMD_ENABLE_SNIFFER.
  2301. */
  2302. struct mwl8k_cmd_enable_sniffer {
  2303. struct mwl8k_cmd_pkt header;
  2304. __le32 action;
  2305. } __packed;
  2306. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2307. {
  2308. struct mwl8k_cmd_enable_sniffer *cmd;
  2309. int rc;
  2310. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2311. if (cmd == NULL)
  2312. return -ENOMEM;
  2313. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2314. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2315. cmd->action = cpu_to_le32(!!enable);
  2316. rc = mwl8k_post_cmd(hw, &cmd->header);
  2317. kfree(cmd);
  2318. return rc;
  2319. }
  2320. /*
  2321. * CMD_SET_MAC_ADDR.
  2322. */
  2323. struct mwl8k_cmd_set_mac_addr {
  2324. struct mwl8k_cmd_pkt header;
  2325. union {
  2326. struct {
  2327. __le16 mac_type;
  2328. __u8 mac_addr[ETH_ALEN];
  2329. } mbss;
  2330. __u8 mac_addr[ETH_ALEN];
  2331. };
  2332. } __packed;
  2333. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2334. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2335. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2336. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2337. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2338. struct ieee80211_vif *vif, u8 *mac)
  2339. {
  2340. struct mwl8k_priv *priv = hw->priv;
  2341. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2342. struct mwl8k_cmd_set_mac_addr *cmd;
  2343. int mac_type;
  2344. int rc;
  2345. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2346. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2347. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2348. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2349. else
  2350. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2351. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2352. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2353. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2354. else
  2355. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2356. }
  2357. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2358. if (cmd == NULL)
  2359. return -ENOMEM;
  2360. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2361. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2362. if (priv->ap_fw) {
  2363. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2364. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2365. } else {
  2366. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2367. }
  2368. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2369. kfree(cmd);
  2370. return rc;
  2371. }
  2372. /*
  2373. * CMD_SET_RATEADAPT_MODE.
  2374. */
  2375. struct mwl8k_cmd_set_rate_adapt_mode {
  2376. struct mwl8k_cmd_pkt header;
  2377. __le16 action;
  2378. __le16 mode;
  2379. } __packed;
  2380. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2381. {
  2382. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2383. int rc;
  2384. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2385. if (cmd == NULL)
  2386. return -ENOMEM;
  2387. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2388. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2389. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2390. cmd->mode = cpu_to_le16(mode);
  2391. rc = mwl8k_post_cmd(hw, &cmd->header);
  2392. kfree(cmd);
  2393. return rc;
  2394. }
  2395. /*
  2396. * CMD_BSS_START.
  2397. */
  2398. struct mwl8k_cmd_bss_start {
  2399. struct mwl8k_cmd_pkt header;
  2400. __le32 enable;
  2401. } __packed;
  2402. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2403. struct ieee80211_vif *vif, int enable)
  2404. {
  2405. struct mwl8k_cmd_bss_start *cmd;
  2406. int rc;
  2407. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2408. if (cmd == NULL)
  2409. return -ENOMEM;
  2410. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2411. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2412. cmd->enable = cpu_to_le32(enable);
  2413. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2414. kfree(cmd);
  2415. return rc;
  2416. }
  2417. /*
  2418. * CMD_SET_NEW_STN.
  2419. */
  2420. struct mwl8k_cmd_set_new_stn {
  2421. struct mwl8k_cmd_pkt header;
  2422. __le16 aid;
  2423. __u8 mac_addr[6];
  2424. __le16 stn_id;
  2425. __le16 action;
  2426. __le16 rsvd;
  2427. __le32 legacy_rates;
  2428. __u8 ht_rates[4];
  2429. __le16 cap_info;
  2430. __le16 ht_capabilities_info;
  2431. __u8 mac_ht_param_info;
  2432. __u8 rev;
  2433. __u8 control_channel;
  2434. __u8 add_channel;
  2435. __le16 op_mode;
  2436. __le16 stbc;
  2437. __u8 add_qos_info;
  2438. __u8 is_qos_sta;
  2439. __le32 fw_sta_ptr;
  2440. } __packed;
  2441. #define MWL8K_STA_ACTION_ADD 0
  2442. #define MWL8K_STA_ACTION_REMOVE 2
  2443. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2444. struct ieee80211_vif *vif,
  2445. struct ieee80211_sta *sta)
  2446. {
  2447. struct mwl8k_cmd_set_new_stn *cmd;
  2448. u32 rates;
  2449. int rc;
  2450. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2451. if (cmd == NULL)
  2452. return -ENOMEM;
  2453. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2454. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2455. cmd->aid = cpu_to_le16(sta->aid);
  2456. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2457. cmd->stn_id = cpu_to_le16(sta->aid);
  2458. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2459. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2460. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2461. else
  2462. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2463. cmd->legacy_rates = cpu_to_le32(rates);
  2464. if (sta->ht_cap.ht_supported) {
  2465. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2466. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2467. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2468. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2469. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2470. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2471. ((sta->ht_cap.ampdu_density & 7) << 2);
  2472. cmd->is_qos_sta = 1;
  2473. }
  2474. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2475. kfree(cmd);
  2476. return rc;
  2477. }
  2478. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2479. struct ieee80211_vif *vif)
  2480. {
  2481. struct mwl8k_cmd_set_new_stn *cmd;
  2482. int rc;
  2483. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2484. if (cmd == NULL)
  2485. return -ENOMEM;
  2486. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2487. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2488. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2489. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2490. kfree(cmd);
  2491. return rc;
  2492. }
  2493. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2494. struct ieee80211_vif *vif, u8 *addr)
  2495. {
  2496. struct mwl8k_cmd_set_new_stn *cmd;
  2497. int rc;
  2498. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2499. if (cmd == NULL)
  2500. return -ENOMEM;
  2501. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2502. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2503. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2504. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2505. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2506. kfree(cmd);
  2507. return rc;
  2508. }
  2509. /*
  2510. * CMD_UPDATE_STADB.
  2511. */
  2512. struct ewc_ht_info {
  2513. __le16 control1;
  2514. __le16 control2;
  2515. __le16 control3;
  2516. } __packed;
  2517. struct peer_capability_info {
  2518. /* Peer type - AP vs. STA. */
  2519. __u8 peer_type;
  2520. /* Basic 802.11 capabilities from assoc resp. */
  2521. __le16 basic_caps;
  2522. /* Set if peer supports 802.11n high throughput (HT). */
  2523. __u8 ht_support;
  2524. /* Valid if HT is supported. */
  2525. __le16 ht_caps;
  2526. __u8 extended_ht_caps;
  2527. struct ewc_ht_info ewc_info;
  2528. /* Legacy rate table. Intersection of our rates and peer rates. */
  2529. __u8 legacy_rates[12];
  2530. /* HT rate table. Intersection of our rates and peer rates. */
  2531. __u8 ht_rates[16];
  2532. __u8 pad[16];
  2533. /* If set, interoperability mode, no proprietary extensions. */
  2534. __u8 interop;
  2535. __u8 pad2;
  2536. __u8 station_id;
  2537. __le16 amsdu_enabled;
  2538. } __packed;
  2539. struct mwl8k_cmd_update_stadb {
  2540. struct mwl8k_cmd_pkt header;
  2541. /* See STADB_ACTION_TYPE */
  2542. __le32 action;
  2543. /* Peer MAC address */
  2544. __u8 peer_addr[ETH_ALEN];
  2545. __le32 reserved;
  2546. /* Peer info - valid during add/update. */
  2547. struct peer_capability_info peer_info;
  2548. } __packed;
  2549. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2550. #define MWL8K_STA_DB_DEL_ENTRY 2
  2551. /* Peer Entry flags - used to define the type of the peer node */
  2552. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2553. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2554. struct ieee80211_vif *vif,
  2555. struct ieee80211_sta *sta)
  2556. {
  2557. struct mwl8k_cmd_update_stadb *cmd;
  2558. struct peer_capability_info *p;
  2559. u32 rates;
  2560. int rc;
  2561. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2562. if (cmd == NULL)
  2563. return -ENOMEM;
  2564. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2565. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2566. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2567. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2568. p = &cmd->peer_info;
  2569. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2570. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2571. p->ht_support = sta->ht_cap.ht_supported;
  2572. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  2573. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2574. ((sta->ht_cap.ampdu_density & 7) << 2);
  2575. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2576. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  2577. else
  2578. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2579. legacy_rate_mask_to_array(p->legacy_rates, rates);
  2580. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2581. p->interop = 1;
  2582. p->amsdu_enabled = 0;
  2583. rc = mwl8k_post_cmd(hw, &cmd->header);
  2584. kfree(cmd);
  2585. return rc ? rc : p->station_id;
  2586. }
  2587. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2588. struct ieee80211_vif *vif, u8 *addr)
  2589. {
  2590. struct mwl8k_cmd_update_stadb *cmd;
  2591. int rc;
  2592. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2593. if (cmd == NULL)
  2594. return -ENOMEM;
  2595. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2596. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2597. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2598. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2599. rc = mwl8k_post_cmd(hw, &cmd->header);
  2600. kfree(cmd);
  2601. return rc;
  2602. }
  2603. /*
  2604. * Interrupt handling.
  2605. */
  2606. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2607. {
  2608. struct ieee80211_hw *hw = dev_id;
  2609. struct mwl8k_priv *priv = hw->priv;
  2610. u32 status;
  2611. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2612. if (!status)
  2613. return IRQ_NONE;
  2614. if (status & MWL8K_A2H_INT_TX_DONE) {
  2615. status &= ~MWL8K_A2H_INT_TX_DONE;
  2616. tasklet_schedule(&priv->poll_tx_task);
  2617. }
  2618. if (status & MWL8K_A2H_INT_RX_READY) {
  2619. status &= ~MWL8K_A2H_INT_RX_READY;
  2620. tasklet_schedule(&priv->poll_rx_task);
  2621. }
  2622. if (status)
  2623. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2624. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2625. if (priv->hostcmd_wait != NULL)
  2626. complete(priv->hostcmd_wait);
  2627. }
  2628. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2629. if (!mutex_is_locked(&priv->fw_mutex) &&
  2630. priv->radio_on && priv->pending_tx_pkts)
  2631. mwl8k_tx_start(priv);
  2632. }
  2633. return IRQ_HANDLED;
  2634. }
  2635. static void mwl8k_tx_poll(unsigned long data)
  2636. {
  2637. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2638. struct mwl8k_priv *priv = hw->priv;
  2639. int limit;
  2640. int i;
  2641. limit = 32;
  2642. spin_lock_bh(&priv->tx_lock);
  2643. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2644. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2645. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2646. complete(priv->tx_wait);
  2647. priv->tx_wait = NULL;
  2648. }
  2649. spin_unlock_bh(&priv->tx_lock);
  2650. if (limit) {
  2651. writel(~MWL8K_A2H_INT_TX_DONE,
  2652. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2653. } else {
  2654. tasklet_schedule(&priv->poll_tx_task);
  2655. }
  2656. }
  2657. static void mwl8k_rx_poll(unsigned long data)
  2658. {
  2659. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2660. struct mwl8k_priv *priv = hw->priv;
  2661. int limit;
  2662. limit = 32;
  2663. limit -= rxq_process(hw, 0, limit);
  2664. limit -= rxq_refill(hw, 0, limit);
  2665. if (limit) {
  2666. writel(~MWL8K_A2H_INT_RX_READY,
  2667. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2668. } else {
  2669. tasklet_schedule(&priv->poll_rx_task);
  2670. }
  2671. }
  2672. /*
  2673. * Core driver operations.
  2674. */
  2675. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2676. {
  2677. struct mwl8k_priv *priv = hw->priv;
  2678. int index = skb_get_queue_mapping(skb);
  2679. int rc;
  2680. if (!priv->radio_on) {
  2681. wiphy_debug(hw->wiphy,
  2682. "dropped TX frame since radio disabled\n");
  2683. dev_kfree_skb(skb);
  2684. return NETDEV_TX_OK;
  2685. }
  2686. rc = mwl8k_txq_xmit(hw, index, skb);
  2687. return rc;
  2688. }
  2689. static int mwl8k_start(struct ieee80211_hw *hw)
  2690. {
  2691. struct mwl8k_priv *priv = hw->priv;
  2692. int rc;
  2693. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2694. IRQF_SHARED, MWL8K_NAME, hw);
  2695. if (rc) {
  2696. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  2697. return -EIO;
  2698. }
  2699. /* Enable TX reclaim and RX tasklets. */
  2700. tasklet_enable(&priv->poll_tx_task);
  2701. tasklet_enable(&priv->poll_rx_task);
  2702. /* Enable interrupts */
  2703. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2704. rc = mwl8k_fw_lock(hw);
  2705. if (!rc) {
  2706. rc = mwl8k_cmd_radio_enable(hw);
  2707. if (!priv->ap_fw) {
  2708. if (!rc)
  2709. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2710. if (!rc)
  2711. rc = mwl8k_cmd_set_pre_scan(hw);
  2712. if (!rc)
  2713. rc = mwl8k_cmd_set_post_scan(hw,
  2714. "\x00\x00\x00\x00\x00\x00");
  2715. }
  2716. if (!rc)
  2717. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2718. if (!rc)
  2719. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2720. mwl8k_fw_unlock(hw);
  2721. }
  2722. if (rc) {
  2723. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2724. free_irq(priv->pdev->irq, hw);
  2725. tasklet_disable(&priv->poll_tx_task);
  2726. tasklet_disable(&priv->poll_rx_task);
  2727. }
  2728. return rc;
  2729. }
  2730. static void mwl8k_stop(struct ieee80211_hw *hw)
  2731. {
  2732. struct mwl8k_priv *priv = hw->priv;
  2733. int i;
  2734. mwl8k_cmd_radio_disable(hw);
  2735. ieee80211_stop_queues(hw);
  2736. /* Disable interrupts */
  2737. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2738. free_irq(priv->pdev->irq, hw);
  2739. /* Stop finalize join worker */
  2740. cancel_work_sync(&priv->finalize_join_worker);
  2741. if (priv->beacon_skb != NULL)
  2742. dev_kfree_skb(priv->beacon_skb);
  2743. /* Stop TX reclaim and RX tasklets. */
  2744. tasklet_disable(&priv->poll_tx_task);
  2745. tasklet_disable(&priv->poll_rx_task);
  2746. /* Return all skbs to mac80211 */
  2747. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2748. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2749. }
  2750. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  2751. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2752. struct ieee80211_vif *vif)
  2753. {
  2754. struct mwl8k_priv *priv = hw->priv;
  2755. struct mwl8k_vif *mwl8k_vif;
  2756. u32 macids_supported;
  2757. int macid, rc;
  2758. struct mwl8k_device_info *di;
  2759. /*
  2760. * Reject interface creation if sniffer mode is active, as
  2761. * STA operation is mutually exclusive with hardware sniffer
  2762. * mode. (Sniffer mode is only used on STA firmware.)
  2763. */
  2764. if (priv->sniffer_enabled) {
  2765. wiphy_info(hw->wiphy,
  2766. "unable to create STA interface because sniffer mode is enabled\n");
  2767. return -EINVAL;
  2768. }
  2769. di = priv->device_info;
  2770. switch (vif->type) {
  2771. case NL80211_IFTYPE_AP:
  2772. if (!priv->ap_fw && di->fw_image_ap) {
  2773. /* we must load the ap fw to meet this request */
  2774. if (!list_empty(&priv->vif_list))
  2775. return -EBUSY;
  2776. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  2777. if (rc)
  2778. return rc;
  2779. }
  2780. macids_supported = priv->ap_macids_supported;
  2781. break;
  2782. case NL80211_IFTYPE_STATION:
  2783. if (priv->ap_fw && di->fw_image_sta) {
  2784. /* we must load the sta fw to meet this request */
  2785. if (!list_empty(&priv->vif_list))
  2786. return -EBUSY;
  2787. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  2788. if (rc)
  2789. return rc;
  2790. }
  2791. macids_supported = priv->sta_macids_supported;
  2792. break;
  2793. default:
  2794. return -EINVAL;
  2795. }
  2796. macid = ffs(macids_supported & ~priv->macids_used);
  2797. if (!macid--)
  2798. return -EBUSY;
  2799. /* Setup driver private area. */
  2800. mwl8k_vif = MWL8K_VIF(vif);
  2801. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2802. mwl8k_vif->vif = vif;
  2803. mwl8k_vif->macid = macid;
  2804. mwl8k_vif->seqno = 0;
  2805. /* Set the mac address. */
  2806. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  2807. if (priv->ap_fw)
  2808. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2809. priv->macids_used |= 1 << mwl8k_vif->macid;
  2810. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  2811. return 0;
  2812. }
  2813. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2814. struct ieee80211_vif *vif)
  2815. {
  2816. struct mwl8k_priv *priv = hw->priv;
  2817. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2818. if (priv->ap_fw)
  2819. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2820. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  2821. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  2822. list_del(&mwl8k_vif->list);
  2823. }
  2824. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2825. {
  2826. struct ieee80211_conf *conf = &hw->conf;
  2827. struct mwl8k_priv *priv = hw->priv;
  2828. int rc;
  2829. if (conf->flags & IEEE80211_CONF_IDLE) {
  2830. mwl8k_cmd_radio_disable(hw);
  2831. return 0;
  2832. }
  2833. rc = mwl8k_fw_lock(hw);
  2834. if (rc)
  2835. return rc;
  2836. rc = mwl8k_cmd_radio_enable(hw);
  2837. if (rc)
  2838. goto out;
  2839. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2840. if (rc)
  2841. goto out;
  2842. if (conf->power_level > 18)
  2843. conf->power_level = 18;
  2844. if (priv->ap_fw) {
  2845. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  2846. if (rc)
  2847. goto out;
  2848. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2849. if (!rc)
  2850. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2851. } else {
  2852. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2853. if (rc)
  2854. goto out;
  2855. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2856. }
  2857. out:
  2858. mwl8k_fw_unlock(hw);
  2859. return rc;
  2860. }
  2861. static void
  2862. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2863. struct ieee80211_bss_conf *info, u32 changed)
  2864. {
  2865. struct mwl8k_priv *priv = hw->priv;
  2866. u32 ap_legacy_rates;
  2867. u8 ap_mcs_rates[16];
  2868. int rc;
  2869. if (mwl8k_fw_lock(hw))
  2870. return;
  2871. /*
  2872. * No need to capture a beacon if we're no longer associated.
  2873. */
  2874. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2875. priv->capture_beacon = false;
  2876. /*
  2877. * Get the AP's legacy and MCS rates.
  2878. */
  2879. if (vif->bss_conf.assoc) {
  2880. struct ieee80211_sta *ap;
  2881. rcu_read_lock();
  2882. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2883. if (ap == NULL) {
  2884. rcu_read_unlock();
  2885. goto out;
  2886. }
  2887. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  2888. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2889. } else {
  2890. ap_legacy_rates =
  2891. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  2892. }
  2893. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2894. rcu_read_unlock();
  2895. }
  2896. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2897. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2898. if (rc)
  2899. goto out;
  2900. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2901. if (rc)
  2902. goto out;
  2903. }
  2904. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2905. rc = mwl8k_set_radio_preamble(hw,
  2906. vif->bss_conf.use_short_preamble);
  2907. if (rc)
  2908. goto out;
  2909. }
  2910. if (changed & BSS_CHANGED_ERP_SLOT) {
  2911. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2912. if (rc)
  2913. goto out;
  2914. }
  2915. if (vif->bss_conf.assoc &&
  2916. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  2917. BSS_CHANGED_HT))) {
  2918. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2919. if (rc)
  2920. goto out;
  2921. }
  2922. if (vif->bss_conf.assoc &&
  2923. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2924. /*
  2925. * Finalize the join. Tell rx handler to process
  2926. * next beacon from our BSSID.
  2927. */
  2928. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2929. priv->capture_beacon = true;
  2930. }
  2931. out:
  2932. mwl8k_fw_unlock(hw);
  2933. }
  2934. static void
  2935. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2936. struct ieee80211_bss_conf *info, u32 changed)
  2937. {
  2938. int rc;
  2939. if (mwl8k_fw_lock(hw))
  2940. return;
  2941. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2942. rc = mwl8k_set_radio_preamble(hw,
  2943. vif->bss_conf.use_short_preamble);
  2944. if (rc)
  2945. goto out;
  2946. }
  2947. if (changed & BSS_CHANGED_BASIC_RATES) {
  2948. int idx;
  2949. int rate;
  2950. /*
  2951. * Use lowest supported basic rate for multicasts
  2952. * and management frames (such as probe responses --
  2953. * beacons will always go out at 1 Mb/s).
  2954. */
  2955. idx = ffs(vif->bss_conf.basic_rates);
  2956. if (idx)
  2957. idx--;
  2958. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  2959. rate = mwl8k_rates_24[idx].hw_value;
  2960. else
  2961. rate = mwl8k_rates_50[idx].hw_value;
  2962. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2963. }
  2964. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2965. struct sk_buff *skb;
  2966. skb = ieee80211_beacon_get(hw, vif);
  2967. if (skb != NULL) {
  2968. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  2969. kfree_skb(skb);
  2970. }
  2971. }
  2972. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2973. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  2974. out:
  2975. mwl8k_fw_unlock(hw);
  2976. }
  2977. static void
  2978. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2979. struct ieee80211_bss_conf *info, u32 changed)
  2980. {
  2981. struct mwl8k_priv *priv = hw->priv;
  2982. if (!priv->ap_fw)
  2983. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2984. else
  2985. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2986. }
  2987. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2988. struct netdev_hw_addr_list *mc_list)
  2989. {
  2990. struct mwl8k_cmd_pkt *cmd;
  2991. /*
  2992. * Synthesize and return a command packet that programs the
  2993. * hardware multicast address filter. At this point we don't
  2994. * know whether FIF_ALLMULTI is being requested, but if it is,
  2995. * we'll end up throwing this packet away and creating a new
  2996. * one in mwl8k_configure_filter().
  2997. */
  2998. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  2999. return (unsigned long)cmd;
  3000. }
  3001. static int
  3002. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  3003. unsigned int changed_flags,
  3004. unsigned int *total_flags)
  3005. {
  3006. struct mwl8k_priv *priv = hw->priv;
  3007. /*
  3008. * Hardware sniffer mode is mutually exclusive with STA
  3009. * operation, so refuse to enable sniffer mode if a STA
  3010. * interface is active.
  3011. */
  3012. if (!list_empty(&priv->vif_list)) {
  3013. if (net_ratelimit())
  3014. wiphy_info(hw->wiphy,
  3015. "not enabling sniffer mode because STA interface is active\n");
  3016. return 0;
  3017. }
  3018. if (!priv->sniffer_enabled) {
  3019. if (mwl8k_cmd_enable_sniffer(hw, 1))
  3020. return 0;
  3021. priv->sniffer_enabled = true;
  3022. }
  3023. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  3024. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  3025. FIF_OTHER_BSS;
  3026. return 1;
  3027. }
  3028. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  3029. {
  3030. if (!list_empty(&priv->vif_list))
  3031. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  3032. return NULL;
  3033. }
  3034. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  3035. unsigned int changed_flags,
  3036. unsigned int *total_flags,
  3037. u64 multicast)
  3038. {
  3039. struct mwl8k_priv *priv = hw->priv;
  3040. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  3041. /*
  3042. * AP firmware doesn't allow fine-grained control over
  3043. * the receive filter.
  3044. */
  3045. if (priv->ap_fw) {
  3046. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3047. kfree(cmd);
  3048. return;
  3049. }
  3050. /*
  3051. * Enable hardware sniffer mode if FIF_CONTROL or
  3052. * FIF_OTHER_BSS is requested.
  3053. */
  3054. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  3055. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  3056. kfree(cmd);
  3057. return;
  3058. }
  3059. /* Clear unsupported feature flags */
  3060. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3061. if (mwl8k_fw_lock(hw)) {
  3062. kfree(cmd);
  3063. return;
  3064. }
  3065. if (priv->sniffer_enabled) {
  3066. mwl8k_cmd_enable_sniffer(hw, 0);
  3067. priv->sniffer_enabled = false;
  3068. }
  3069. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  3070. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  3071. /*
  3072. * Disable the BSS filter.
  3073. */
  3074. mwl8k_cmd_set_pre_scan(hw);
  3075. } else {
  3076. struct mwl8k_vif *mwl8k_vif;
  3077. const u8 *bssid;
  3078. /*
  3079. * Enable the BSS filter.
  3080. *
  3081. * If there is an active STA interface, use that
  3082. * interface's BSSID, otherwise use a dummy one
  3083. * (where the OUI part needs to be nonzero for
  3084. * the BSSID to be accepted by POST_SCAN).
  3085. */
  3086. mwl8k_vif = mwl8k_first_vif(priv);
  3087. if (mwl8k_vif != NULL)
  3088. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3089. else
  3090. bssid = "\x01\x00\x00\x00\x00\x00";
  3091. mwl8k_cmd_set_post_scan(hw, bssid);
  3092. }
  3093. }
  3094. /*
  3095. * If FIF_ALLMULTI is being requested, throw away the command
  3096. * packet that ->prepare_multicast() built and replace it with
  3097. * a command packet that enables reception of all multicast
  3098. * packets.
  3099. */
  3100. if (*total_flags & FIF_ALLMULTI) {
  3101. kfree(cmd);
  3102. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  3103. }
  3104. if (cmd != NULL) {
  3105. mwl8k_post_cmd(hw, cmd);
  3106. kfree(cmd);
  3107. }
  3108. mwl8k_fw_unlock(hw);
  3109. }
  3110. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  3111. {
  3112. return mwl8k_cmd_set_rts_threshold(hw, value);
  3113. }
  3114. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  3115. struct ieee80211_vif *vif,
  3116. struct ieee80211_sta *sta)
  3117. {
  3118. struct mwl8k_priv *priv = hw->priv;
  3119. if (priv->ap_fw)
  3120. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  3121. else
  3122. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  3123. }
  3124. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  3125. struct ieee80211_vif *vif,
  3126. struct ieee80211_sta *sta)
  3127. {
  3128. struct mwl8k_priv *priv = hw->priv;
  3129. int ret;
  3130. if (!priv->ap_fw) {
  3131. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  3132. if (ret >= 0) {
  3133. MWL8K_STA(sta)->peer_id = ret;
  3134. return 0;
  3135. }
  3136. return ret;
  3137. }
  3138. return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  3139. }
  3140. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3141. const struct ieee80211_tx_queue_params *params)
  3142. {
  3143. struct mwl8k_priv *priv = hw->priv;
  3144. int rc;
  3145. rc = mwl8k_fw_lock(hw);
  3146. if (!rc) {
  3147. BUG_ON(queue > MWL8K_TX_QUEUES - 1);
  3148. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  3149. if (!priv->wmm_enabled)
  3150. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  3151. if (!rc)
  3152. rc = mwl8k_cmd_set_edca_params(hw, queue,
  3153. params->cw_min,
  3154. params->cw_max,
  3155. params->aifs,
  3156. params->txop);
  3157. mwl8k_fw_unlock(hw);
  3158. }
  3159. return rc;
  3160. }
  3161. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  3162. struct ieee80211_low_level_stats *stats)
  3163. {
  3164. return mwl8k_cmd_get_stat(hw, stats);
  3165. }
  3166. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  3167. struct survey_info *survey)
  3168. {
  3169. struct mwl8k_priv *priv = hw->priv;
  3170. struct ieee80211_conf *conf = &hw->conf;
  3171. if (idx != 0)
  3172. return -ENOENT;
  3173. survey->channel = conf->channel;
  3174. survey->filled = SURVEY_INFO_NOISE_DBM;
  3175. survey->noise = priv->noise;
  3176. return 0;
  3177. }
  3178. static int
  3179. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3180. enum ieee80211_ampdu_mlme_action action,
  3181. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  3182. {
  3183. switch (action) {
  3184. case IEEE80211_AMPDU_RX_START:
  3185. case IEEE80211_AMPDU_RX_STOP:
  3186. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  3187. return -ENOTSUPP;
  3188. return 0;
  3189. default:
  3190. return -ENOTSUPP;
  3191. }
  3192. }
  3193. static const struct ieee80211_ops mwl8k_ops = {
  3194. .tx = mwl8k_tx,
  3195. .start = mwl8k_start,
  3196. .stop = mwl8k_stop,
  3197. .add_interface = mwl8k_add_interface,
  3198. .remove_interface = mwl8k_remove_interface,
  3199. .config = mwl8k_config,
  3200. .bss_info_changed = mwl8k_bss_info_changed,
  3201. .prepare_multicast = mwl8k_prepare_multicast,
  3202. .configure_filter = mwl8k_configure_filter,
  3203. .set_rts_threshold = mwl8k_set_rts_threshold,
  3204. .sta_add = mwl8k_sta_add,
  3205. .sta_remove = mwl8k_sta_remove,
  3206. .conf_tx = mwl8k_conf_tx,
  3207. .get_stats = mwl8k_get_stats,
  3208. .get_survey = mwl8k_get_survey,
  3209. .ampdu_action = mwl8k_ampdu_action,
  3210. };
  3211. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3212. {
  3213. struct mwl8k_priv *priv =
  3214. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3215. struct sk_buff *skb = priv->beacon_skb;
  3216. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  3217. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  3218. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  3219. mgmt->u.beacon.variable, len);
  3220. int dtim_period = 1;
  3221. if (tim && tim[1] >= 2)
  3222. dtim_period = tim[3];
  3223. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  3224. dev_kfree_skb(skb);
  3225. priv->beacon_skb = NULL;
  3226. }
  3227. enum {
  3228. MWL8363 = 0,
  3229. MWL8687,
  3230. MWL8366,
  3231. };
  3232. #define MWL8K_8366_AP_FW_API 1
  3233. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  3234. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  3235. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3236. [MWL8363] = {
  3237. .part_name = "88w8363",
  3238. .helper_image = "mwl8k/helper_8363.fw",
  3239. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  3240. },
  3241. [MWL8687] = {
  3242. .part_name = "88w8687",
  3243. .helper_image = "mwl8k/helper_8687.fw",
  3244. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  3245. },
  3246. [MWL8366] = {
  3247. .part_name = "88w8366",
  3248. .helper_image = "mwl8k/helper_8366.fw",
  3249. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  3250. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  3251. .fw_api_ap = MWL8K_8366_AP_FW_API,
  3252. .ap_rxd_ops = &rxd_8366_ap_ops,
  3253. },
  3254. };
  3255. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3256. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3257. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3258. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3259. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3260. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3261. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  3262. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3263. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  3264. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3265. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3266. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3267. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3268. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3269. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  3270. { },
  3271. };
  3272. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3273. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image)
  3274. {
  3275. struct mwl8k_priv *priv = hw->priv;
  3276. int rc;
  3277. /* Reset firmware and hardware */
  3278. mwl8k_hw_reset(priv);
  3279. /* Ask userland hotplug daemon for the device firmware */
  3280. rc = mwl8k_request_firmware(priv, fw_image);
  3281. if (rc) {
  3282. wiphy_err(hw->wiphy, "Firmware files not found\n");
  3283. return rc;
  3284. }
  3285. /* Load firmware into hardware */
  3286. rc = mwl8k_load_firmware(hw);
  3287. if (rc)
  3288. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  3289. /* Reclaim memory once firmware is successfully loaded */
  3290. mwl8k_release_firmware(priv);
  3291. return rc;
  3292. }
  3293. /* initialize hw after successfully loading a firmware image */
  3294. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  3295. {
  3296. struct mwl8k_priv *priv = hw->priv;
  3297. int rc = 0;
  3298. int i;
  3299. if (priv->ap_fw) {
  3300. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3301. if (priv->rxd_ops == NULL) {
  3302. wiphy_err(hw->wiphy,
  3303. "Driver does not have AP firmware image support for this hardware\n");
  3304. goto err_stop_firmware;
  3305. }
  3306. } else {
  3307. priv->rxd_ops = &rxd_sta_ops;
  3308. }
  3309. priv->sniffer_enabled = false;
  3310. priv->wmm_enabled = false;
  3311. priv->pending_tx_pkts = 0;
  3312. rc = mwl8k_rxq_init(hw, 0);
  3313. if (rc)
  3314. goto err_stop_firmware;
  3315. rxq_refill(hw, 0, INT_MAX);
  3316. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3317. rc = mwl8k_txq_init(hw, i);
  3318. if (rc)
  3319. goto err_free_queues;
  3320. }
  3321. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3322. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3323. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3324. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3325. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3326. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3327. IRQF_SHARED, MWL8K_NAME, hw);
  3328. if (rc) {
  3329. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3330. goto err_free_queues;
  3331. }
  3332. /*
  3333. * Temporarily enable interrupts. Initial firmware host
  3334. * commands use interrupts and avoid polling. Disable
  3335. * interrupts when done.
  3336. */
  3337. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3338. /* Get config data, mac addrs etc */
  3339. if (priv->ap_fw) {
  3340. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3341. if (!rc)
  3342. rc = mwl8k_cmd_set_hw_spec(hw);
  3343. } else {
  3344. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3345. }
  3346. if (rc) {
  3347. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  3348. goto err_free_irq;
  3349. }
  3350. /* Turn radio off */
  3351. rc = mwl8k_cmd_radio_disable(hw);
  3352. if (rc) {
  3353. wiphy_err(hw->wiphy, "Cannot disable\n");
  3354. goto err_free_irq;
  3355. }
  3356. /* Clear MAC address */
  3357. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  3358. if (rc) {
  3359. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  3360. goto err_free_irq;
  3361. }
  3362. /* Disable interrupts */
  3363. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3364. free_irq(priv->pdev->irq, hw);
  3365. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  3366. priv->device_info->part_name,
  3367. priv->hw_rev, hw->wiphy->perm_addr,
  3368. priv->ap_fw ? "AP" : "STA",
  3369. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3370. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3371. return 0;
  3372. err_free_irq:
  3373. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3374. free_irq(priv->pdev->irq, hw);
  3375. err_free_queues:
  3376. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3377. mwl8k_txq_deinit(hw, i);
  3378. mwl8k_rxq_deinit(hw, 0);
  3379. err_stop_firmware:
  3380. mwl8k_hw_reset(priv);
  3381. return rc;
  3382. }
  3383. /*
  3384. * invoke mwl8k_reload_firmware to change the firmware image after the device
  3385. * has already been registered
  3386. */
  3387. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  3388. {
  3389. int i, rc = 0;
  3390. struct mwl8k_priv *priv = hw->priv;
  3391. mwl8k_stop(hw);
  3392. mwl8k_rxq_deinit(hw, 0);
  3393. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3394. mwl8k_txq_deinit(hw, i);
  3395. rc = mwl8k_init_firmware(hw, fw_image);
  3396. if (rc)
  3397. goto fail;
  3398. rc = mwl8k_probe_hw(hw);
  3399. if (rc)
  3400. goto fail;
  3401. rc = mwl8k_start(hw);
  3402. if (rc)
  3403. goto fail;
  3404. rc = mwl8k_config(hw, ~0);
  3405. if (rc)
  3406. goto fail;
  3407. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3408. rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
  3409. if (rc)
  3410. goto fail;
  3411. }
  3412. return rc;
  3413. fail:
  3414. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  3415. return rc;
  3416. }
  3417. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  3418. {
  3419. struct ieee80211_hw *hw = priv->hw;
  3420. int i, rc;
  3421. /*
  3422. * Extra headroom is the size of the required DMA header
  3423. * minus the size of the smallest 802.11 frame (CTS frame).
  3424. */
  3425. hw->extra_tx_headroom =
  3426. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3427. hw->channel_change_time = 10;
  3428. hw->queues = MWL8K_TX_QUEUES;
  3429. /* Set rssi values to dBm */
  3430. hw->flags |= IEEE80211_HW_SIGNAL_DBM;
  3431. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3432. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3433. priv->macids_used = 0;
  3434. INIT_LIST_HEAD(&priv->vif_list);
  3435. /* Set default radio state and preamble */
  3436. priv->radio_on = 0;
  3437. priv->radio_short_preamble = 0;
  3438. /* Finalize join worker */
  3439. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3440. /* TX reclaim and RX tasklets. */
  3441. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3442. tasklet_disable(&priv->poll_tx_task);
  3443. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3444. tasklet_disable(&priv->poll_rx_task);
  3445. /* Power management cookie */
  3446. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3447. if (priv->cookie == NULL)
  3448. return -ENOMEM;
  3449. mutex_init(&priv->fw_mutex);
  3450. priv->fw_mutex_owner = NULL;
  3451. priv->fw_mutex_depth = 0;
  3452. priv->hostcmd_wait = NULL;
  3453. spin_lock_init(&priv->tx_lock);
  3454. priv->tx_wait = NULL;
  3455. rc = mwl8k_probe_hw(hw);
  3456. if (rc)
  3457. goto err_free_cookie;
  3458. hw->wiphy->interface_modes = 0;
  3459. if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
  3460. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  3461. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  3462. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  3463. rc = ieee80211_register_hw(hw);
  3464. if (rc) {
  3465. wiphy_err(hw->wiphy, "Cannot register device\n");
  3466. goto err_unprobe_hw;
  3467. }
  3468. return 0;
  3469. err_unprobe_hw:
  3470. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3471. mwl8k_txq_deinit(hw, i);
  3472. mwl8k_rxq_deinit(hw, 0);
  3473. err_free_cookie:
  3474. if (priv->cookie != NULL)
  3475. pci_free_consistent(priv->pdev, 4,
  3476. priv->cookie, priv->cookie_dma);
  3477. return rc;
  3478. }
  3479. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3480. const struct pci_device_id *id)
  3481. {
  3482. static int printed_version;
  3483. struct ieee80211_hw *hw;
  3484. struct mwl8k_priv *priv;
  3485. struct mwl8k_device_info *di;
  3486. int rc;
  3487. if (!printed_version) {
  3488. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3489. printed_version = 1;
  3490. }
  3491. rc = pci_enable_device(pdev);
  3492. if (rc) {
  3493. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3494. MWL8K_NAME);
  3495. return rc;
  3496. }
  3497. rc = pci_request_regions(pdev, MWL8K_NAME);
  3498. if (rc) {
  3499. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3500. MWL8K_NAME);
  3501. goto err_disable_device;
  3502. }
  3503. pci_set_master(pdev);
  3504. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3505. if (hw == NULL) {
  3506. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3507. rc = -ENOMEM;
  3508. goto err_free_reg;
  3509. }
  3510. SET_IEEE80211_DEV(hw, &pdev->dev);
  3511. pci_set_drvdata(pdev, hw);
  3512. priv = hw->priv;
  3513. priv->hw = hw;
  3514. priv->pdev = pdev;
  3515. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3516. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3517. if (priv->sram == NULL) {
  3518. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  3519. goto err_iounmap;
  3520. }
  3521. /*
  3522. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3523. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3524. */
  3525. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3526. if (priv->regs == NULL) {
  3527. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3528. if (priv->regs == NULL) {
  3529. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  3530. goto err_iounmap;
  3531. }
  3532. }
  3533. /*
  3534. * Choose the initial fw image depending on user input and availability
  3535. * of images.
  3536. */
  3537. di = priv->device_info;
  3538. if (ap_mode_default && di->fw_image_ap)
  3539. rc = mwl8k_init_firmware(hw, di->fw_image_ap);
  3540. else if (!ap_mode_default && di->fw_image_sta)
  3541. rc = mwl8k_init_firmware(hw, di->fw_image_sta);
  3542. else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  3543. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  3544. rc = mwl8k_init_firmware(hw, di->fw_image_sta);
  3545. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  3546. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  3547. rc = mwl8k_init_firmware(hw, di->fw_image_ap);
  3548. } else
  3549. rc = mwl8k_init_firmware(hw, di->fw_image_sta);
  3550. if (rc)
  3551. goto err_stop_firmware;
  3552. rc = mwl8k_firmware_load_success(priv);
  3553. if (!rc)
  3554. return rc;
  3555. err_stop_firmware:
  3556. mwl8k_hw_reset(priv);
  3557. err_iounmap:
  3558. if (priv->regs != NULL)
  3559. pci_iounmap(pdev, priv->regs);
  3560. if (priv->sram != NULL)
  3561. pci_iounmap(pdev, priv->sram);
  3562. pci_set_drvdata(pdev, NULL);
  3563. ieee80211_free_hw(hw);
  3564. err_free_reg:
  3565. pci_release_regions(pdev);
  3566. err_disable_device:
  3567. pci_disable_device(pdev);
  3568. return rc;
  3569. }
  3570. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3571. {
  3572. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3573. }
  3574. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3575. {
  3576. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3577. struct mwl8k_priv *priv;
  3578. int i;
  3579. if (hw == NULL)
  3580. return;
  3581. priv = hw->priv;
  3582. ieee80211_stop_queues(hw);
  3583. ieee80211_unregister_hw(hw);
  3584. /* Remove TX reclaim and RX tasklets. */
  3585. tasklet_kill(&priv->poll_tx_task);
  3586. tasklet_kill(&priv->poll_rx_task);
  3587. /* Stop hardware */
  3588. mwl8k_hw_reset(priv);
  3589. /* Return all skbs to mac80211 */
  3590. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3591. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3592. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3593. mwl8k_txq_deinit(hw, i);
  3594. mwl8k_rxq_deinit(hw, 0);
  3595. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3596. pci_iounmap(pdev, priv->regs);
  3597. pci_iounmap(pdev, priv->sram);
  3598. pci_set_drvdata(pdev, NULL);
  3599. ieee80211_free_hw(hw);
  3600. pci_release_regions(pdev);
  3601. pci_disable_device(pdev);
  3602. }
  3603. static struct pci_driver mwl8k_driver = {
  3604. .name = MWL8K_NAME,
  3605. .id_table = mwl8k_pci_id_table,
  3606. .probe = mwl8k_probe,
  3607. .remove = __devexit_p(mwl8k_remove),
  3608. .shutdown = __devexit_p(mwl8k_shutdown),
  3609. };
  3610. static int __init mwl8k_init(void)
  3611. {
  3612. return pci_register_driver(&mwl8k_driver);
  3613. }
  3614. static void __exit mwl8k_exit(void)
  3615. {
  3616. pci_unregister_driver(&mwl8k_driver);
  3617. }
  3618. module_init(mwl8k_init);
  3619. module_exit(mwl8k_exit);
  3620. MODULE_DESCRIPTION(MWL8K_DESC);
  3621. MODULE_VERSION(MWL8K_VERSION);
  3622. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3623. MODULE_LICENSE("GPL");