tps65910-regulator.c 32 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/gpio.h>
  24. #include <linux/mfd/tps65910.h>
  25. #include <linux/regulator/of_regulator.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in microvolts */
  32. static const unsigned int VIO_VSEL_table[] = {
  33. 1500000, 1800000, 2500000, 3300000,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VDD3 voltages in microvolts */
  37. static const unsigned int VDD3_VSEL_table[] = {
  38. 5000000,
  39. };
  40. /* supported VDIG1 voltages in microvolts */
  41. static const unsigned int VDIG1_VSEL_table[] = {
  42. 1200000, 1500000, 1800000, 2700000,
  43. };
  44. /* supported VDIG2 voltages in microvolts */
  45. static const unsigned int VDIG2_VSEL_table[] = {
  46. 1000000, 1100000, 1200000, 1800000,
  47. };
  48. /* supported VPLL voltages in microvolts */
  49. static const unsigned int VPLL_VSEL_table[] = {
  50. 1000000, 1100000, 1800000, 2500000,
  51. };
  52. /* supported VDAC voltages in microvolts */
  53. static const unsigned int VDAC_VSEL_table[] = {
  54. 1800000, 2600000, 2800000, 2850000,
  55. };
  56. /* supported VAUX1 voltages in microvolts */
  57. static const unsigned int VAUX1_VSEL_table[] = {
  58. 1800000, 2500000, 2800000, 2850000,
  59. };
  60. /* supported VAUX2 voltages in microvolts */
  61. static const unsigned int VAUX2_VSEL_table[] = {
  62. 1800000, 2800000, 2900000, 3300000,
  63. };
  64. /* supported VAUX33 voltages in microvolts */
  65. static const unsigned int VAUX33_VSEL_table[] = {
  66. 1800000, 2000000, 2800000, 3300000,
  67. };
  68. /* supported VMMC voltages in microvolts */
  69. static const unsigned int VMMC_VSEL_table[] = {
  70. 1800000, 2800000, 3000000, 3300000,
  71. };
  72. struct tps_info {
  73. const char *name;
  74. u8 n_voltages;
  75. const unsigned int *voltage_table;
  76. int enable_time_us;
  77. };
  78. static struct tps_info tps65910_regs[] = {
  79. {
  80. .name = "vrtc",
  81. .enable_time_us = 2200,
  82. },
  83. {
  84. .name = "vio",
  85. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  86. .voltage_table = VIO_VSEL_table,
  87. .enable_time_us = 350,
  88. },
  89. {
  90. .name = "vdd1",
  91. .enable_time_us = 350,
  92. },
  93. {
  94. .name = "vdd2",
  95. .enable_time_us = 350,
  96. },
  97. {
  98. .name = "vdd3",
  99. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  100. .voltage_table = VDD3_VSEL_table,
  101. .enable_time_us = 200,
  102. },
  103. {
  104. .name = "vdig1",
  105. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  106. .voltage_table = VDIG1_VSEL_table,
  107. .enable_time_us = 100,
  108. },
  109. {
  110. .name = "vdig2",
  111. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  112. .voltage_table = VDIG2_VSEL_table,
  113. .enable_time_us = 100,
  114. },
  115. {
  116. .name = "vpll",
  117. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  118. .voltage_table = VPLL_VSEL_table,
  119. .enable_time_us = 100,
  120. },
  121. {
  122. .name = "vdac",
  123. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  124. .voltage_table = VDAC_VSEL_table,
  125. .enable_time_us = 100,
  126. },
  127. {
  128. .name = "vaux1",
  129. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  130. .voltage_table = VAUX1_VSEL_table,
  131. .enable_time_us = 100,
  132. },
  133. {
  134. .name = "vaux2",
  135. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  136. .voltage_table = VAUX2_VSEL_table,
  137. .enable_time_us = 100,
  138. },
  139. {
  140. .name = "vaux33",
  141. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  142. .voltage_table = VAUX33_VSEL_table,
  143. .enable_time_us = 100,
  144. },
  145. {
  146. .name = "vmmc",
  147. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  148. .voltage_table = VMMC_VSEL_table,
  149. .enable_time_us = 100,
  150. },
  151. };
  152. static struct tps_info tps65911_regs[] = {
  153. {
  154. .name = "vrtc",
  155. .enable_time_us = 2200,
  156. },
  157. {
  158. .name = "vio",
  159. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  160. .voltage_table = VIO_VSEL_table,
  161. .enable_time_us = 350,
  162. },
  163. {
  164. .name = "vdd1",
  165. .n_voltages = 73,
  166. .enable_time_us = 350,
  167. },
  168. {
  169. .name = "vdd2",
  170. .n_voltages = 73,
  171. .enable_time_us = 350,
  172. },
  173. {
  174. .name = "vddctrl",
  175. .n_voltages = 65,
  176. .enable_time_us = 900,
  177. },
  178. {
  179. .name = "ldo1",
  180. .n_voltages = 47,
  181. .enable_time_us = 420,
  182. },
  183. {
  184. .name = "ldo2",
  185. .n_voltages = 47,
  186. .enable_time_us = 420,
  187. },
  188. {
  189. .name = "ldo3",
  190. .n_voltages = 24,
  191. .enable_time_us = 230,
  192. },
  193. {
  194. .name = "ldo4",
  195. .n_voltages = 47,
  196. .enable_time_us = 230,
  197. },
  198. {
  199. .name = "ldo5",
  200. .n_voltages = 24,
  201. .enable_time_us = 230,
  202. },
  203. {
  204. .name = "ldo6",
  205. .n_voltages = 24,
  206. .enable_time_us = 230,
  207. },
  208. {
  209. .name = "ldo7",
  210. .n_voltages = 24,
  211. .enable_time_us = 230,
  212. },
  213. {
  214. .name = "ldo8",
  215. .n_voltages = 24,
  216. .enable_time_us = 230,
  217. },
  218. };
  219. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  220. static unsigned int tps65910_ext_sleep_control[] = {
  221. 0,
  222. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  223. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  224. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  225. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  226. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  227. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  228. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  229. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  230. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  231. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  232. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  233. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  234. };
  235. static unsigned int tps65911_ext_sleep_control[] = {
  236. 0,
  237. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  238. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  239. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  240. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  241. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  242. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  243. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  244. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  245. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  246. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  247. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  248. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  249. };
  250. struct tps65910_reg {
  251. struct regulator_desc *desc;
  252. struct tps65910 *mfd;
  253. struct regulator_dev **rdev;
  254. struct tps_info **info;
  255. struct mutex mutex;
  256. int num_regulators;
  257. int mode;
  258. int (*get_ctrl_reg)(int);
  259. unsigned int *ext_sleep_control;
  260. unsigned int board_ext_control[TPS65910_NUM_REGS];
  261. };
  262. static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
  263. {
  264. unsigned int val;
  265. int err;
  266. err = tps65910_reg_read(pmic->mfd, reg, &val);
  267. if (err)
  268. return err;
  269. return val;
  270. }
  271. static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
  272. u8 set_mask, u8 clear_mask)
  273. {
  274. int err, data;
  275. mutex_lock(&pmic->mutex);
  276. data = tps65910_read(pmic, reg);
  277. if (data < 0) {
  278. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  279. err = data;
  280. goto out;
  281. }
  282. data &= ~clear_mask;
  283. data |= set_mask;
  284. err = tps65910_reg_write(pmic->mfd, reg, data);
  285. if (err)
  286. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  287. out:
  288. mutex_unlock(&pmic->mutex);
  289. return err;
  290. }
  291. static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
  292. {
  293. int data;
  294. mutex_lock(&pmic->mutex);
  295. data = tps65910_read(pmic, reg);
  296. if (data < 0)
  297. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  298. mutex_unlock(&pmic->mutex);
  299. return data;
  300. }
  301. static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
  302. {
  303. int err;
  304. mutex_lock(&pmic->mutex);
  305. err = tps65910_reg_write(pmic->mfd, reg, val);
  306. if (err < 0)
  307. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  308. mutex_unlock(&pmic->mutex);
  309. return err;
  310. }
  311. static int tps65910_get_ctrl_register(int id)
  312. {
  313. switch (id) {
  314. case TPS65910_REG_VRTC:
  315. return TPS65910_VRTC;
  316. case TPS65910_REG_VIO:
  317. return TPS65910_VIO;
  318. case TPS65910_REG_VDD1:
  319. return TPS65910_VDD1;
  320. case TPS65910_REG_VDD2:
  321. return TPS65910_VDD2;
  322. case TPS65910_REG_VDD3:
  323. return TPS65910_VDD3;
  324. case TPS65910_REG_VDIG1:
  325. return TPS65910_VDIG1;
  326. case TPS65910_REG_VDIG2:
  327. return TPS65910_VDIG2;
  328. case TPS65910_REG_VPLL:
  329. return TPS65910_VPLL;
  330. case TPS65910_REG_VDAC:
  331. return TPS65910_VDAC;
  332. case TPS65910_REG_VAUX1:
  333. return TPS65910_VAUX1;
  334. case TPS65910_REG_VAUX2:
  335. return TPS65910_VAUX2;
  336. case TPS65910_REG_VAUX33:
  337. return TPS65910_VAUX33;
  338. case TPS65910_REG_VMMC:
  339. return TPS65910_VMMC;
  340. default:
  341. return -EINVAL;
  342. }
  343. }
  344. static int tps65911_get_ctrl_register(int id)
  345. {
  346. switch (id) {
  347. case TPS65910_REG_VRTC:
  348. return TPS65910_VRTC;
  349. case TPS65910_REG_VIO:
  350. return TPS65910_VIO;
  351. case TPS65910_REG_VDD1:
  352. return TPS65910_VDD1;
  353. case TPS65910_REG_VDD2:
  354. return TPS65910_VDD2;
  355. case TPS65911_REG_VDDCTRL:
  356. return TPS65911_VDDCTRL;
  357. case TPS65911_REG_LDO1:
  358. return TPS65911_LDO1;
  359. case TPS65911_REG_LDO2:
  360. return TPS65911_LDO2;
  361. case TPS65911_REG_LDO3:
  362. return TPS65911_LDO3;
  363. case TPS65911_REG_LDO4:
  364. return TPS65911_LDO4;
  365. case TPS65911_REG_LDO5:
  366. return TPS65911_LDO5;
  367. case TPS65911_REG_LDO6:
  368. return TPS65911_LDO6;
  369. case TPS65911_REG_LDO7:
  370. return TPS65911_LDO7;
  371. case TPS65911_REG_LDO8:
  372. return TPS65911_LDO8;
  373. default:
  374. return -EINVAL;
  375. }
  376. }
  377. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  378. {
  379. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  380. struct tps65910 *mfd = pmic->mfd;
  381. int reg, value, id = rdev_get_id(dev);
  382. reg = pmic->get_ctrl_reg(id);
  383. if (reg < 0)
  384. return reg;
  385. switch (mode) {
  386. case REGULATOR_MODE_NORMAL:
  387. return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
  388. LDO_ST_MODE_BIT);
  389. case REGULATOR_MODE_IDLE:
  390. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  391. return tps65910_reg_set_bits(mfd, reg, value);
  392. case REGULATOR_MODE_STANDBY:
  393. return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  394. }
  395. return -EINVAL;
  396. }
  397. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  398. {
  399. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  400. int reg, value, id = rdev_get_id(dev);
  401. reg = pmic->get_ctrl_reg(id);
  402. if (reg < 0)
  403. return reg;
  404. value = tps65910_reg_read_locked(pmic, reg);
  405. if (value < 0)
  406. return value;
  407. if (!(value & LDO_ST_ON_BIT))
  408. return REGULATOR_MODE_STANDBY;
  409. else if (value & LDO_ST_MODE_BIT)
  410. return REGULATOR_MODE_IDLE;
  411. else
  412. return REGULATOR_MODE_NORMAL;
  413. }
  414. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  415. {
  416. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  417. int id = rdev_get_id(dev);
  418. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  419. switch (id) {
  420. case TPS65910_REG_VDD1:
  421. opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
  422. mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
  423. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  424. srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
  425. sr = opvsel & VDD1_OP_CMD_MASK;
  426. opvsel &= VDD1_OP_SEL_MASK;
  427. srvsel &= VDD1_SR_SEL_MASK;
  428. vselmax = 75;
  429. break;
  430. case TPS65910_REG_VDD2:
  431. opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
  432. mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
  433. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  434. srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
  435. sr = opvsel & VDD2_OP_CMD_MASK;
  436. opvsel &= VDD2_OP_SEL_MASK;
  437. srvsel &= VDD2_SR_SEL_MASK;
  438. vselmax = 75;
  439. break;
  440. case TPS65911_REG_VDDCTRL:
  441. opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
  442. srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
  443. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  444. opvsel &= VDDCTRL_OP_SEL_MASK;
  445. srvsel &= VDDCTRL_SR_SEL_MASK;
  446. vselmax = 64;
  447. break;
  448. }
  449. /* multiplier 0 == 1 but 2,3 normal */
  450. if (!mult)
  451. mult=1;
  452. if (sr) {
  453. /* normalise to valid range */
  454. if (srvsel < 3)
  455. srvsel = 3;
  456. if (srvsel > vselmax)
  457. srvsel = vselmax;
  458. return srvsel - 3;
  459. } else {
  460. /* normalise to valid range*/
  461. if (opvsel < 3)
  462. opvsel = 3;
  463. if (opvsel > vselmax)
  464. opvsel = vselmax;
  465. return opvsel - 3;
  466. }
  467. return -EINVAL;
  468. }
  469. static int tps65910_get_voltage_sel(struct regulator_dev *dev)
  470. {
  471. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  472. int reg, value, id = rdev_get_id(dev);
  473. reg = pmic->get_ctrl_reg(id);
  474. if (reg < 0)
  475. return reg;
  476. value = tps65910_reg_read_locked(pmic, reg);
  477. if (value < 0)
  478. return value;
  479. switch (id) {
  480. case TPS65910_REG_VIO:
  481. case TPS65910_REG_VDIG1:
  482. case TPS65910_REG_VDIG2:
  483. case TPS65910_REG_VPLL:
  484. case TPS65910_REG_VDAC:
  485. case TPS65910_REG_VAUX1:
  486. case TPS65910_REG_VAUX2:
  487. case TPS65910_REG_VAUX33:
  488. case TPS65910_REG_VMMC:
  489. value &= LDO_SEL_MASK;
  490. value >>= LDO_SEL_SHIFT;
  491. break;
  492. default:
  493. return -EINVAL;
  494. }
  495. return value;
  496. }
  497. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  498. {
  499. return dev->desc->volt_table[0];
  500. }
  501. static int tps65911_get_voltage_sel(struct regulator_dev *dev)
  502. {
  503. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  504. int id = rdev_get_id(dev);
  505. u8 value, reg;
  506. reg = pmic->get_ctrl_reg(id);
  507. value = tps65910_reg_read_locked(pmic, reg);
  508. switch (id) {
  509. case TPS65911_REG_LDO1:
  510. case TPS65911_REG_LDO2:
  511. case TPS65911_REG_LDO4:
  512. value &= LDO1_SEL_MASK;
  513. value >>= LDO_SEL_SHIFT;
  514. break;
  515. case TPS65911_REG_LDO3:
  516. case TPS65911_REG_LDO5:
  517. case TPS65911_REG_LDO6:
  518. case TPS65911_REG_LDO7:
  519. case TPS65911_REG_LDO8:
  520. value &= LDO3_SEL_MASK;
  521. value >>= LDO_SEL_SHIFT;
  522. break;
  523. case TPS65910_REG_VIO:
  524. value &= LDO_SEL_MASK;
  525. value >>= LDO_SEL_SHIFT;
  526. break;
  527. default:
  528. return -EINVAL;
  529. }
  530. return value;
  531. }
  532. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  533. unsigned selector)
  534. {
  535. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  536. int id = rdev_get_id(dev), vsel;
  537. int dcdc_mult = 0;
  538. switch (id) {
  539. case TPS65910_REG_VDD1:
  540. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  541. if (dcdc_mult == 1)
  542. dcdc_mult--;
  543. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  544. tps65910_modify_bits(pmic, TPS65910_VDD1,
  545. (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
  546. VDD1_VGAIN_SEL_MASK);
  547. tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
  548. break;
  549. case TPS65910_REG_VDD2:
  550. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  551. if (dcdc_mult == 1)
  552. dcdc_mult--;
  553. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  554. tps65910_modify_bits(pmic, TPS65910_VDD2,
  555. (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
  556. VDD1_VGAIN_SEL_MASK);
  557. tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
  558. break;
  559. case TPS65911_REG_VDDCTRL:
  560. vsel = selector + 3;
  561. tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
  562. }
  563. return 0;
  564. }
  565. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  566. unsigned selector)
  567. {
  568. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  569. int reg, id = rdev_get_id(dev);
  570. reg = pmic->get_ctrl_reg(id);
  571. if (reg < 0)
  572. return reg;
  573. switch (id) {
  574. case TPS65910_REG_VIO:
  575. case TPS65910_REG_VDIG1:
  576. case TPS65910_REG_VDIG2:
  577. case TPS65910_REG_VPLL:
  578. case TPS65910_REG_VDAC:
  579. case TPS65910_REG_VAUX1:
  580. case TPS65910_REG_VAUX2:
  581. case TPS65910_REG_VAUX33:
  582. case TPS65910_REG_VMMC:
  583. return tps65910_modify_bits(pmic, reg,
  584. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  585. }
  586. return -EINVAL;
  587. }
  588. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  589. unsigned selector)
  590. {
  591. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  592. int reg, id = rdev_get_id(dev);
  593. reg = pmic->get_ctrl_reg(id);
  594. if (reg < 0)
  595. return reg;
  596. switch (id) {
  597. case TPS65911_REG_LDO1:
  598. case TPS65911_REG_LDO2:
  599. case TPS65911_REG_LDO4:
  600. return tps65910_modify_bits(pmic, reg,
  601. (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
  602. case TPS65911_REG_LDO3:
  603. case TPS65911_REG_LDO5:
  604. case TPS65911_REG_LDO6:
  605. case TPS65911_REG_LDO7:
  606. case TPS65911_REG_LDO8:
  607. return tps65910_modify_bits(pmic, reg,
  608. (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
  609. case TPS65910_REG_VIO:
  610. return tps65910_modify_bits(pmic, reg,
  611. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  612. }
  613. return -EINVAL;
  614. }
  615. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  616. unsigned selector)
  617. {
  618. int volt, mult = 1, id = rdev_get_id(dev);
  619. switch (id) {
  620. case TPS65910_REG_VDD1:
  621. case TPS65910_REG_VDD2:
  622. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  623. volt = VDD1_2_MIN_VOLT +
  624. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  625. break;
  626. case TPS65911_REG_VDDCTRL:
  627. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  628. break;
  629. default:
  630. BUG();
  631. return -EINVAL;
  632. }
  633. return volt * 100 * mult;
  634. }
  635. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  636. {
  637. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  638. int step_mv = 0, id = rdev_get_id(dev);
  639. switch(id) {
  640. case TPS65911_REG_LDO1:
  641. case TPS65911_REG_LDO2:
  642. case TPS65911_REG_LDO4:
  643. /* The first 5 values of the selector correspond to 1V */
  644. if (selector < 5)
  645. selector = 0;
  646. else
  647. selector -= 4;
  648. step_mv = 50;
  649. break;
  650. case TPS65911_REG_LDO3:
  651. case TPS65911_REG_LDO5:
  652. case TPS65911_REG_LDO6:
  653. case TPS65911_REG_LDO7:
  654. case TPS65911_REG_LDO8:
  655. /* The first 3 values of the selector correspond to 1V */
  656. if (selector < 3)
  657. selector = 0;
  658. else
  659. selector -= 2;
  660. step_mv = 100;
  661. break;
  662. case TPS65910_REG_VIO:
  663. return pmic->info[id]->voltage_table[selector];
  664. default:
  665. return -EINVAL;
  666. }
  667. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  668. }
  669. /* Regulator ops (except VRTC) */
  670. static struct regulator_ops tps65910_ops_dcdc = {
  671. .is_enabled = regulator_is_enabled_regmap,
  672. .enable = regulator_enable_regmap,
  673. .disable = regulator_disable_regmap,
  674. .set_mode = tps65910_set_mode,
  675. .get_mode = tps65910_get_mode,
  676. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  677. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  678. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  679. .list_voltage = tps65910_list_voltage_dcdc,
  680. };
  681. static struct regulator_ops tps65910_ops_vdd3 = {
  682. .is_enabled = regulator_is_enabled_regmap,
  683. .enable = regulator_enable_regmap,
  684. .disable = regulator_disable_regmap,
  685. .set_mode = tps65910_set_mode,
  686. .get_mode = tps65910_get_mode,
  687. .get_voltage = tps65910_get_voltage_vdd3,
  688. .list_voltage = regulator_list_voltage_table,
  689. };
  690. static struct regulator_ops tps65910_ops = {
  691. .is_enabled = regulator_is_enabled_regmap,
  692. .enable = regulator_enable_regmap,
  693. .disable = regulator_disable_regmap,
  694. .set_mode = tps65910_set_mode,
  695. .get_mode = tps65910_get_mode,
  696. .get_voltage_sel = tps65910_get_voltage_sel,
  697. .set_voltage_sel = tps65910_set_voltage_sel,
  698. .list_voltage = regulator_list_voltage_table,
  699. };
  700. static struct regulator_ops tps65911_ops = {
  701. .is_enabled = regulator_is_enabled_regmap,
  702. .enable = regulator_enable_regmap,
  703. .disable = regulator_disable_regmap,
  704. .set_mode = tps65910_set_mode,
  705. .get_mode = tps65910_get_mode,
  706. .get_voltage_sel = tps65911_get_voltage_sel,
  707. .set_voltage_sel = tps65911_set_voltage_sel,
  708. .list_voltage = tps65911_list_voltage,
  709. };
  710. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  711. int id, int ext_sleep_config)
  712. {
  713. struct tps65910 *mfd = pmic->mfd;
  714. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  715. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  716. int ret;
  717. /*
  718. * Regulator can not be control from multiple external input EN1, EN2
  719. * and EN3 together.
  720. */
  721. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  722. int en_count;
  723. en_count = ((ext_sleep_config &
  724. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  725. en_count += ((ext_sleep_config &
  726. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  727. en_count += ((ext_sleep_config &
  728. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  729. en_count += ((ext_sleep_config &
  730. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  731. if (en_count > 1) {
  732. dev_err(mfd->dev,
  733. "External sleep control flag is not proper\n");
  734. return -EINVAL;
  735. }
  736. }
  737. pmic->board_ext_control[id] = ext_sleep_config;
  738. /* External EN1 control */
  739. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  740. ret = tps65910_reg_set_bits(mfd,
  741. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  742. else
  743. ret = tps65910_reg_clear_bits(mfd,
  744. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  745. if (ret < 0) {
  746. dev_err(mfd->dev,
  747. "Error in configuring external control EN1\n");
  748. return ret;
  749. }
  750. /* External EN2 control */
  751. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  752. ret = tps65910_reg_set_bits(mfd,
  753. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  754. else
  755. ret = tps65910_reg_clear_bits(mfd,
  756. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  757. if (ret < 0) {
  758. dev_err(mfd->dev,
  759. "Error in configuring external control EN2\n");
  760. return ret;
  761. }
  762. /* External EN3 control for TPS65910 LDO only */
  763. if ((tps65910_chip_id(mfd) == TPS65910) &&
  764. (id >= TPS65910_REG_VDIG1)) {
  765. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  766. ret = tps65910_reg_set_bits(mfd,
  767. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  768. else
  769. ret = tps65910_reg_clear_bits(mfd,
  770. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  771. if (ret < 0) {
  772. dev_err(mfd->dev,
  773. "Error in configuring external control EN3\n");
  774. return ret;
  775. }
  776. }
  777. /* Return if no external control is selected */
  778. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  779. /* Clear all sleep controls */
  780. ret = tps65910_reg_clear_bits(mfd,
  781. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  782. if (!ret)
  783. ret = tps65910_reg_clear_bits(mfd,
  784. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  785. if (ret < 0)
  786. dev_err(mfd->dev,
  787. "Error in configuring SLEEP register\n");
  788. return ret;
  789. }
  790. /*
  791. * For regulator that has separate operational and sleep register make
  792. * sure that operational is used and clear sleep register to turn
  793. * regulator off when external control is inactive
  794. */
  795. if ((id == TPS65910_REG_VDD1) ||
  796. (id == TPS65910_REG_VDD2) ||
  797. ((id == TPS65911_REG_VDDCTRL) &&
  798. (tps65910_chip_id(mfd) == TPS65911))) {
  799. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  800. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  801. int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
  802. int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
  803. if (opvsel & VDD1_OP_CMD_MASK) {
  804. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  805. ret = tps65910_reg_write_locked(pmic, op_reg_add,
  806. reg_val);
  807. if (ret < 0) {
  808. dev_err(mfd->dev,
  809. "Error in configuring op register\n");
  810. return ret;
  811. }
  812. }
  813. ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
  814. if (ret < 0) {
  815. dev_err(mfd->dev, "Error in settting sr register\n");
  816. return ret;
  817. }
  818. }
  819. ret = tps65910_reg_clear_bits(mfd,
  820. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  821. if (!ret) {
  822. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  823. ret = tps65910_reg_set_bits(mfd,
  824. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  825. else
  826. ret = tps65910_reg_clear_bits(mfd,
  827. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  828. }
  829. if (ret < 0)
  830. dev_err(mfd->dev,
  831. "Error in configuring SLEEP register\n");
  832. return ret;
  833. }
  834. #ifdef CONFIG_OF
  835. static struct of_regulator_match tps65910_matches[] = {
  836. { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
  837. { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
  838. { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
  839. { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
  840. { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
  841. { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
  842. { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
  843. { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
  844. { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
  845. { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
  846. { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
  847. { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
  848. { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
  849. };
  850. static struct of_regulator_match tps65911_matches[] = {
  851. { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
  852. { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
  853. { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
  854. { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
  855. { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
  856. { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
  857. { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
  858. { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
  859. { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
  860. { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
  861. { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
  862. { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
  863. { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
  864. };
  865. static struct tps65910_board *tps65910_parse_dt_reg_data(
  866. struct platform_device *pdev,
  867. struct of_regulator_match **tps65910_reg_matches)
  868. {
  869. struct tps65910_board *pmic_plat_data;
  870. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  871. struct device_node *np = pdev->dev.parent->of_node;
  872. struct device_node *regulators;
  873. struct of_regulator_match *matches;
  874. unsigned int prop;
  875. int idx = 0, ret, count;
  876. pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
  877. GFP_KERNEL);
  878. if (!pmic_plat_data) {
  879. dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
  880. return NULL;
  881. }
  882. regulators = of_find_node_by_name(np, "regulators");
  883. if (!regulators) {
  884. dev_err(&pdev->dev, "regulator node not found\n");
  885. return NULL;
  886. }
  887. switch (tps65910_chip_id(tps65910)) {
  888. case TPS65910:
  889. count = ARRAY_SIZE(tps65910_matches);
  890. matches = tps65910_matches;
  891. break;
  892. case TPS65911:
  893. count = ARRAY_SIZE(tps65911_matches);
  894. matches = tps65911_matches;
  895. break;
  896. default:
  897. dev_err(&pdev->dev, "Invalid tps chip version\n");
  898. return NULL;
  899. }
  900. ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
  901. if (ret < 0) {
  902. dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
  903. ret);
  904. return NULL;
  905. }
  906. *tps65910_reg_matches = matches;
  907. for (idx = 0; idx < count; idx++) {
  908. if (!matches[idx].init_data || !matches[idx].of_node)
  909. continue;
  910. pmic_plat_data->tps65910_pmic_init_data[idx] =
  911. matches[idx].init_data;
  912. ret = of_property_read_u32(matches[idx].of_node,
  913. "ti,regulator-ext-sleep-control", &prop);
  914. if (!ret)
  915. pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
  916. }
  917. return pmic_plat_data;
  918. }
  919. #else
  920. static inline struct tps65910_board *tps65910_parse_dt_reg_data(
  921. struct platform_device *pdev,
  922. struct of_regulator_match **tps65910_reg_matches)
  923. {
  924. *tps65910_reg_matches = NULL;
  925. return NULL;
  926. }
  927. #endif
  928. static __devinit int tps65910_probe(struct platform_device *pdev)
  929. {
  930. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  931. struct regulator_config config = { };
  932. struct tps_info *info;
  933. struct regulator_init_data *reg_data;
  934. struct regulator_dev *rdev;
  935. struct tps65910_reg *pmic;
  936. struct tps65910_board *pmic_plat_data;
  937. struct of_regulator_match *tps65910_reg_matches = NULL;
  938. int i, err;
  939. pmic_plat_data = dev_get_platdata(tps65910->dev);
  940. if (!pmic_plat_data && tps65910->dev->of_node)
  941. pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
  942. &tps65910_reg_matches);
  943. if (!pmic_plat_data) {
  944. dev_err(&pdev->dev, "Platform data not found\n");
  945. return -EINVAL;
  946. }
  947. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  948. if (!pmic) {
  949. dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
  950. return -ENOMEM;
  951. }
  952. mutex_init(&pmic->mutex);
  953. pmic->mfd = tps65910;
  954. platform_set_drvdata(pdev, pmic);
  955. /* Give control of all register to control port */
  956. tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  957. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  958. switch(tps65910_chip_id(tps65910)) {
  959. case TPS65910:
  960. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  961. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  962. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  963. info = tps65910_regs;
  964. break;
  965. case TPS65911:
  966. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  967. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  968. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  969. info = tps65911_regs;
  970. break;
  971. default:
  972. dev_err(&pdev->dev, "Invalid tps chip version\n");
  973. return -ENODEV;
  974. }
  975. pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  976. sizeof(struct regulator_desc), GFP_KERNEL);
  977. if (!pmic->desc) {
  978. dev_err(&pdev->dev, "Memory alloc fails for desc\n");
  979. return -ENOMEM;
  980. }
  981. pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  982. sizeof(struct tps_info *), GFP_KERNEL);
  983. if (!pmic->info) {
  984. dev_err(&pdev->dev, "Memory alloc fails for info\n");
  985. return -ENOMEM;
  986. }
  987. pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
  988. sizeof(struct regulator_dev *), GFP_KERNEL);
  989. if (!pmic->rdev) {
  990. dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
  991. return -ENOMEM;
  992. }
  993. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  994. i++, info++) {
  995. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  996. /* Regulator API handles empty constraints but not NULL
  997. * constraints */
  998. if (!reg_data)
  999. continue;
  1000. /* Register the regulators */
  1001. pmic->info[i] = info;
  1002. pmic->desc[i].name = info->name;
  1003. pmic->desc[i].id = i;
  1004. pmic->desc[i].n_voltages = info->n_voltages;
  1005. pmic->desc[i].enable_time = info->enable_time_us;
  1006. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1007. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1008. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1009. VDD1_2_NUM_VOLT_COARSE;
  1010. pmic->desc[i].ramp_delay = 12500;
  1011. } else if (i == TPS65910_REG_VDD3) {
  1012. if (tps65910_chip_id(tps65910) == TPS65910) {
  1013. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1014. pmic->desc[i].volt_table = info->voltage_table;
  1015. } else {
  1016. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1017. pmic->desc[i].ramp_delay = 5000;
  1018. }
  1019. } else {
  1020. if (tps65910_chip_id(tps65910) == TPS65910) {
  1021. pmic->desc[i].ops = &tps65910_ops;
  1022. pmic->desc[i].volt_table = info->voltage_table;
  1023. } else {
  1024. pmic->desc[i].ops = &tps65911_ops;
  1025. }
  1026. }
  1027. err = tps65910_set_ext_sleep_config(pmic, i,
  1028. pmic_plat_data->regulator_ext_sleep_control[i]);
  1029. /*
  1030. * Failing on regulator for configuring externally control
  1031. * is not a serious issue, just throw warning.
  1032. */
  1033. if (err < 0)
  1034. dev_warn(tps65910->dev,
  1035. "Failed to initialise ext control config\n");
  1036. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1037. pmic->desc[i].owner = THIS_MODULE;
  1038. pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
  1039. pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
  1040. config.dev = tps65910->dev;
  1041. config.init_data = reg_data;
  1042. config.driver_data = pmic;
  1043. config.regmap = tps65910->regmap;
  1044. if (tps65910_reg_matches)
  1045. config.of_node = tps65910_reg_matches[i].of_node;
  1046. rdev = regulator_register(&pmic->desc[i], &config);
  1047. if (IS_ERR(rdev)) {
  1048. dev_err(tps65910->dev,
  1049. "failed to register %s regulator\n",
  1050. pdev->name);
  1051. err = PTR_ERR(rdev);
  1052. goto err_unregister_regulator;
  1053. }
  1054. /* Save regulator for cleanup */
  1055. pmic->rdev[i] = rdev;
  1056. }
  1057. return 0;
  1058. err_unregister_regulator:
  1059. while (--i >= 0)
  1060. regulator_unregister(pmic->rdev[i]);
  1061. return err;
  1062. }
  1063. static int __devexit tps65910_remove(struct platform_device *pdev)
  1064. {
  1065. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1066. int i;
  1067. for (i = 0; i < pmic->num_regulators; i++)
  1068. regulator_unregister(pmic->rdev[i]);
  1069. return 0;
  1070. }
  1071. static void tps65910_shutdown(struct platform_device *pdev)
  1072. {
  1073. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1074. int i;
  1075. /*
  1076. * Before bootloader jumps to kernel, it makes sure that required
  1077. * external control signals are in desired state so that given rails
  1078. * can be configure accordingly.
  1079. * If rails are configured to be controlled from external control
  1080. * then before shutting down/rebooting the system, the external
  1081. * control configuration need to be remove from the rails so that
  1082. * its output will be available as per register programming even
  1083. * if external controls are removed. This is require when the POR
  1084. * value of the control signals are not in active state and before
  1085. * bootloader initializes it, the system requires the rail output
  1086. * to be active for booting.
  1087. */
  1088. for (i = 0; i < pmic->num_regulators; i++) {
  1089. int err;
  1090. if (!pmic->rdev[i])
  1091. continue;
  1092. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1093. if (err < 0)
  1094. dev_err(&pdev->dev,
  1095. "Error in clearing external control\n");
  1096. }
  1097. }
  1098. static struct platform_driver tps65910_driver = {
  1099. .driver = {
  1100. .name = "tps65910-pmic",
  1101. .owner = THIS_MODULE,
  1102. },
  1103. .probe = tps65910_probe,
  1104. .remove = __devexit_p(tps65910_remove),
  1105. .shutdown = tps65910_shutdown,
  1106. };
  1107. static int __init tps65910_init(void)
  1108. {
  1109. return platform_driver_register(&tps65910_driver);
  1110. }
  1111. subsys_initcall(tps65910_init);
  1112. static void __exit tps65910_cleanup(void)
  1113. {
  1114. platform_driver_unregister(&tps65910_driver);
  1115. }
  1116. module_exit(tps65910_cleanup);
  1117. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1118. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1119. MODULE_LICENSE("GPL v2");
  1120. MODULE_ALIAS("platform:tps65910-pmic");