s5m8767.c 20 KB

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  1. /*
  2. * s5m8767.c
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. */
  13. #include <linux/bug.h>
  14. #include <linux/delay.h>
  15. #include <linux/err.h>
  16. #include <linux/gpio.h>
  17. #include <linux/slab.h>
  18. #include <linux/module.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/mfd/s5m87xx/s5m-core.h>
  23. #include <linux/mfd/s5m87xx/s5m-pmic.h>
  24. struct s5m8767_info {
  25. struct device *dev;
  26. struct s5m87xx_dev *iodev;
  27. int num_regulators;
  28. struct regulator_dev **rdev;
  29. struct s5m_opmode_data *opmode;
  30. int ramp_delay;
  31. bool buck2_ramp;
  32. bool buck3_ramp;
  33. bool buck4_ramp;
  34. bool buck2_gpiodvs;
  35. bool buck3_gpiodvs;
  36. bool buck4_gpiodvs;
  37. u8 buck2_vol[8];
  38. u8 buck3_vol[8];
  39. u8 buck4_vol[8];
  40. int buck_gpios[3];
  41. int buck_gpioindex;
  42. };
  43. struct s5m_voltage_desc {
  44. int max;
  45. int min;
  46. int step;
  47. };
  48. static const struct s5m_voltage_desc buck_voltage_val1 = {
  49. .max = 2225000,
  50. .min = 650000,
  51. .step = 6250,
  52. };
  53. static const struct s5m_voltage_desc buck_voltage_val2 = {
  54. .max = 1600000,
  55. .min = 600000,
  56. .step = 6250,
  57. };
  58. static const struct s5m_voltage_desc buck_voltage_val3 = {
  59. .max = 3000000,
  60. .min = 750000,
  61. .step = 12500,
  62. };
  63. static const struct s5m_voltage_desc ldo_voltage_val1 = {
  64. .max = 3950000,
  65. .min = 800000,
  66. .step = 50000,
  67. };
  68. static const struct s5m_voltage_desc ldo_voltage_val2 = {
  69. .max = 2375000,
  70. .min = 800000,
  71. .step = 25000,
  72. };
  73. static const struct s5m_voltage_desc *reg_voltage_map[] = {
  74. [S5M8767_LDO1] = &ldo_voltage_val2,
  75. [S5M8767_LDO2] = &ldo_voltage_val2,
  76. [S5M8767_LDO3] = &ldo_voltage_val1,
  77. [S5M8767_LDO4] = &ldo_voltage_val1,
  78. [S5M8767_LDO5] = &ldo_voltage_val1,
  79. [S5M8767_LDO6] = &ldo_voltage_val2,
  80. [S5M8767_LDO7] = &ldo_voltage_val2,
  81. [S5M8767_LDO8] = &ldo_voltage_val2,
  82. [S5M8767_LDO9] = &ldo_voltage_val1,
  83. [S5M8767_LDO10] = &ldo_voltage_val1,
  84. [S5M8767_LDO11] = &ldo_voltage_val1,
  85. [S5M8767_LDO12] = &ldo_voltage_val1,
  86. [S5M8767_LDO13] = &ldo_voltage_val1,
  87. [S5M8767_LDO14] = &ldo_voltage_val1,
  88. [S5M8767_LDO15] = &ldo_voltage_val2,
  89. [S5M8767_LDO16] = &ldo_voltage_val1,
  90. [S5M8767_LDO17] = &ldo_voltage_val1,
  91. [S5M8767_LDO18] = &ldo_voltage_val1,
  92. [S5M8767_LDO19] = &ldo_voltage_val1,
  93. [S5M8767_LDO20] = &ldo_voltage_val1,
  94. [S5M8767_LDO21] = &ldo_voltage_val1,
  95. [S5M8767_LDO22] = &ldo_voltage_val1,
  96. [S5M8767_LDO23] = &ldo_voltage_val1,
  97. [S5M8767_LDO24] = &ldo_voltage_val1,
  98. [S5M8767_LDO25] = &ldo_voltage_val1,
  99. [S5M8767_LDO26] = &ldo_voltage_val1,
  100. [S5M8767_LDO27] = &ldo_voltage_val1,
  101. [S5M8767_LDO28] = &ldo_voltage_val1,
  102. [S5M8767_BUCK1] = &buck_voltage_val1,
  103. [S5M8767_BUCK2] = &buck_voltage_val2,
  104. [S5M8767_BUCK3] = &buck_voltage_val2,
  105. [S5M8767_BUCK4] = &buck_voltage_val2,
  106. [S5M8767_BUCK5] = &buck_voltage_val1,
  107. [S5M8767_BUCK6] = &buck_voltage_val1,
  108. [S5M8767_BUCK7] = NULL,
  109. [S5M8767_BUCK8] = NULL,
  110. [S5M8767_BUCK9] = &buck_voltage_val3,
  111. };
  112. static int s5m8767_list_voltage(struct regulator_dev *rdev,
  113. unsigned int selector)
  114. {
  115. const struct s5m_voltage_desc *desc;
  116. int reg_id = rdev_get_id(rdev);
  117. int val;
  118. if (reg_id >= ARRAY_SIZE(reg_voltage_map) || reg_id < 0)
  119. return -EINVAL;
  120. desc = reg_voltage_map[reg_id];
  121. if (desc == NULL)
  122. return -EINVAL;
  123. val = desc->min + desc->step * selector;
  124. if (val > desc->max)
  125. return -EINVAL;
  126. return val;
  127. }
  128. unsigned int s5m8767_opmode_reg[][4] = {
  129. /* {OFF, ON, LOWPOWER, SUSPEND} */
  130. /* LDO1 ... LDO28 */
  131. {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
  132. {0x0, 0x3, 0x2, 0x1},
  133. {0x0, 0x3, 0x2, 0x1},
  134. {0x0, 0x0, 0x0, 0x0},
  135. {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
  136. {0x0, 0x3, 0x2, 0x1},
  137. {0x0, 0x3, 0x2, 0x1},
  138. {0x0, 0x3, 0x2, 0x1},
  139. {0x0, 0x3, 0x2, 0x1},
  140. {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
  141. {0x0, 0x3, 0x2, 0x1},
  142. {0x0, 0x3, 0x2, 0x1},
  143. {0x0, 0x3, 0x2, 0x1},
  144. {0x0, 0x3, 0x2, 0x1},
  145. {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
  146. {0x0, 0x3, 0x2, 0x1},
  147. {0x0, 0x3, 0x2, 0x1},
  148. {0x0, 0x0, 0x0, 0x0},
  149. {0x0, 0x3, 0x2, 0x1},
  150. {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
  151. {0x0, 0x3, 0x2, 0x1},
  152. {0x0, 0x3, 0x2, 0x1},
  153. {0x0, 0x0, 0x0, 0x0},
  154. {0x0, 0x3, 0x2, 0x1},
  155. {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
  156. {0x0, 0x3, 0x2, 0x1},
  157. {0x0, 0x3, 0x2, 0x1},
  158. {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
  159. /* BUCK1 ... BUCK9 */
  160. {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
  161. {0x0, 0x3, 0x1, 0x1},
  162. {0x0, 0x3, 0x1, 0x1},
  163. {0x0, 0x3, 0x1, 0x1},
  164. {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
  165. {0x0, 0x3, 0x1, 0x1},
  166. {0x0, 0x3, 0x1, 0x1},
  167. {0x0, 0x3, 0x1, 0x1},
  168. {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
  169. };
  170. static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
  171. int *enable_ctrl)
  172. {
  173. int reg_id = rdev_get_id(rdev);
  174. unsigned int mode;
  175. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  176. switch (reg_id) {
  177. case S5M8767_LDO1 ... S5M8767_LDO2:
  178. *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  179. break;
  180. case S5M8767_LDO3 ... S5M8767_LDO28:
  181. *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  182. break;
  183. case S5M8767_BUCK1:
  184. *reg = S5M8767_REG_BUCK1CTRL1;
  185. break;
  186. case S5M8767_BUCK2 ... S5M8767_BUCK4:
  187. *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
  188. break;
  189. case S5M8767_BUCK5:
  190. *reg = S5M8767_REG_BUCK5CTRL1;
  191. break;
  192. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  193. *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
  194. break;
  195. default:
  196. return -EINVAL;
  197. }
  198. mode = s5m8767->opmode[reg_id].mode;
  199. *enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
  200. return 0;
  201. }
  202. static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
  203. {
  204. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  205. int ret, reg;
  206. int mask = 0xc0, enable_ctrl;
  207. u8 val;
  208. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  209. if (ret == -EINVAL)
  210. return 1;
  211. else if (ret)
  212. return ret;
  213. ret = s5m_reg_read(s5m8767->iodev, reg, &val);
  214. if (ret)
  215. return ret;
  216. return (val & mask) == enable_ctrl;
  217. }
  218. static int s5m8767_reg_enable(struct regulator_dev *rdev)
  219. {
  220. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  221. int ret, reg;
  222. int mask = 0xc0, enable_ctrl;
  223. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  224. if (ret)
  225. return ret;
  226. return s5m_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
  227. }
  228. static int s5m8767_reg_disable(struct regulator_dev *rdev)
  229. {
  230. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  231. int ret, reg;
  232. int mask = 0xc0, enable_ctrl;
  233. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  234. if (ret)
  235. return ret;
  236. return s5m_reg_update(s5m8767->iodev, reg, ~mask, mask);
  237. }
  238. static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg)
  239. {
  240. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  241. int reg_id = rdev_get_id(rdev);
  242. int reg;
  243. switch (reg_id) {
  244. case S5M8767_LDO1 ... S5M8767_LDO2:
  245. reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  246. break;
  247. case S5M8767_LDO3 ... S5M8767_LDO28:
  248. reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  249. break;
  250. case S5M8767_BUCK1:
  251. reg = S5M8767_REG_BUCK1CTRL2;
  252. break;
  253. case S5M8767_BUCK2:
  254. reg = S5M8767_REG_BUCK2DVS1;
  255. if (s5m8767->buck2_gpiodvs)
  256. reg += s5m8767->buck_gpioindex;
  257. break;
  258. case S5M8767_BUCK3:
  259. reg = S5M8767_REG_BUCK3DVS1;
  260. if (s5m8767->buck3_gpiodvs)
  261. reg += s5m8767->buck_gpioindex;
  262. break;
  263. case S5M8767_BUCK4:
  264. reg = S5M8767_REG_BUCK4DVS1;
  265. if (s5m8767->buck4_gpiodvs)
  266. reg += s5m8767->buck_gpioindex;
  267. break;
  268. case S5M8767_BUCK5:
  269. reg = S5M8767_REG_BUCK5CTRL2;
  270. break;
  271. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  272. reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
  273. break;
  274. default:
  275. return -EINVAL;
  276. }
  277. *_reg = reg;
  278. return 0;
  279. }
  280. static int s5m8767_get_voltage_sel(struct regulator_dev *rdev)
  281. {
  282. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  283. int reg, mask, ret;
  284. int reg_id = rdev_get_id(rdev);
  285. u8 val;
  286. ret = s5m8767_get_voltage_register(rdev, &reg);
  287. if (ret)
  288. return ret;
  289. mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff;
  290. ret = s5m_reg_read(s5m8767->iodev, reg, &val);
  291. if (ret)
  292. return ret;
  293. val &= mask;
  294. return val;
  295. }
  296. static int s5m8767_convert_voltage_to_sel(
  297. const struct s5m_voltage_desc *desc,
  298. int min_vol, int max_vol)
  299. {
  300. int selector = 0;
  301. if (desc == NULL)
  302. return -EINVAL;
  303. if (max_vol < desc->min || min_vol > desc->max)
  304. return -EINVAL;
  305. if (min_vol < desc->min)
  306. min_vol = desc->min;
  307. selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
  308. if (desc->min + desc->step * selector > max_vol)
  309. return -EINVAL;
  310. return selector;
  311. }
  312. static inline void s5m8767_set_high(struct s5m8767_info *s5m8767)
  313. {
  314. int temp_index = s5m8767->buck_gpioindex;
  315. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  316. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  317. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  318. }
  319. static inline void s5m8767_set_low(struct s5m8767_info *s5m8767)
  320. {
  321. int temp_index = s5m8767->buck_gpioindex;
  322. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  323. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  324. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  325. }
  326. static int s5m8767_set_voltage(struct regulator_dev *rdev,
  327. int min_uV, int max_uV, unsigned *selector)
  328. {
  329. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  330. const struct s5m_voltage_desc *desc;
  331. int reg_id = rdev_get_id(rdev);
  332. int sel, reg, mask, ret = 0, old_index, index = 0;
  333. u8 val;
  334. u8 *buck234_vol = NULL;
  335. switch (reg_id) {
  336. case S5M8767_LDO1 ... S5M8767_LDO28:
  337. mask = 0x3f;
  338. break;
  339. case S5M8767_BUCK1 ... S5M8767_BUCK6:
  340. mask = 0xff;
  341. if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
  342. buck234_vol = &s5m8767->buck2_vol[0];
  343. else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
  344. buck234_vol = &s5m8767->buck3_vol[0];
  345. else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
  346. buck234_vol = &s5m8767->buck4_vol[0];
  347. break;
  348. case S5M8767_BUCK7 ... S5M8767_BUCK8:
  349. return -EINVAL;
  350. case S5M8767_BUCK9:
  351. mask = 0xff;
  352. break;
  353. default:
  354. return -EINVAL;
  355. }
  356. desc = reg_voltage_map[reg_id];
  357. sel = s5m8767_convert_voltage_to_sel(desc, min_uV, max_uV);
  358. if (sel < 0)
  359. return sel;
  360. /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
  361. if (buck234_vol) {
  362. while (*buck234_vol != sel) {
  363. buck234_vol++;
  364. index++;
  365. }
  366. old_index = s5m8767->buck_gpioindex;
  367. s5m8767->buck_gpioindex = index;
  368. if (index > old_index)
  369. s5m8767_set_high(s5m8767);
  370. else
  371. s5m8767_set_low(s5m8767);
  372. } else {
  373. ret = s5m8767_get_voltage_register(rdev, &reg);
  374. if (ret)
  375. return ret;
  376. s5m_reg_read(s5m8767->iodev, reg, &val);
  377. val = (val & ~mask) | sel;
  378. ret = s5m_reg_write(s5m8767->iodev, reg, val);
  379. }
  380. *selector = sel;
  381. return ret;
  382. }
  383. static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
  384. unsigned int old_sel,
  385. unsigned int new_sel)
  386. {
  387. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  388. const struct s5m_voltage_desc *desc;
  389. int reg_id = rdev_get_id(rdev);
  390. desc = reg_voltage_map[reg_id];
  391. if (old_sel < new_sel)
  392. return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
  393. s5m8767->ramp_delay * 1000);
  394. return 0;
  395. }
  396. static struct regulator_ops s5m8767_ops = {
  397. .list_voltage = s5m8767_list_voltage,
  398. .is_enabled = s5m8767_reg_is_enabled,
  399. .enable = s5m8767_reg_enable,
  400. .disable = s5m8767_reg_disable,
  401. .get_voltage_sel = s5m8767_get_voltage_sel,
  402. .set_voltage = s5m8767_set_voltage,
  403. .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
  404. };
  405. #define s5m8767_regulator_desc(_name) { \
  406. .name = #_name, \
  407. .id = S5M8767_##_name, \
  408. .ops = &s5m8767_ops, \
  409. .type = REGULATOR_VOLTAGE, \
  410. .owner = THIS_MODULE, \
  411. }
  412. static struct regulator_desc regulators[] = {
  413. s5m8767_regulator_desc(LDO1),
  414. s5m8767_regulator_desc(LDO2),
  415. s5m8767_regulator_desc(LDO3),
  416. s5m8767_regulator_desc(LDO4),
  417. s5m8767_regulator_desc(LDO5),
  418. s5m8767_regulator_desc(LDO6),
  419. s5m8767_regulator_desc(LDO7),
  420. s5m8767_regulator_desc(LDO8),
  421. s5m8767_regulator_desc(LDO9),
  422. s5m8767_regulator_desc(LDO10),
  423. s5m8767_regulator_desc(LDO11),
  424. s5m8767_regulator_desc(LDO12),
  425. s5m8767_regulator_desc(LDO13),
  426. s5m8767_regulator_desc(LDO14),
  427. s5m8767_regulator_desc(LDO15),
  428. s5m8767_regulator_desc(LDO16),
  429. s5m8767_regulator_desc(LDO17),
  430. s5m8767_regulator_desc(LDO18),
  431. s5m8767_regulator_desc(LDO19),
  432. s5m8767_regulator_desc(LDO20),
  433. s5m8767_regulator_desc(LDO21),
  434. s5m8767_regulator_desc(LDO22),
  435. s5m8767_regulator_desc(LDO23),
  436. s5m8767_regulator_desc(LDO24),
  437. s5m8767_regulator_desc(LDO25),
  438. s5m8767_regulator_desc(LDO26),
  439. s5m8767_regulator_desc(LDO27),
  440. s5m8767_regulator_desc(LDO28),
  441. s5m8767_regulator_desc(BUCK1),
  442. s5m8767_regulator_desc(BUCK2),
  443. s5m8767_regulator_desc(BUCK3),
  444. s5m8767_regulator_desc(BUCK4),
  445. s5m8767_regulator_desc(BUCK5),
  446. s5m8767_regulator_desc(BUCK6),
  447. s5m8767_regulator_desc(BUCK7),
  448. s5m8767_regulator_desc(BUCK8),
  449. s5m8767_regulator_desc(BUCK9),
  450. };
  451. static __devinit int s5m8767_pmic_probe(struct platform_device *pdev)
  452. {
  453. struct s5m87xx_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  454. struct s5m_platform_data *pdata = dev_get_platdata(iodev->dev);
  455. struct regulator_config config = { };
  456. struct regulator_dev **rdev;
  457. struct s5m8767_info *s5m8767;
  458. int i, ret, size;
  459. if (!pdata) {
  460. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  461. return -ENODEV;
  462. }
  463. if (pdata->buck2_gpiodvs) {
  464. if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
  465. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  466. return -EINVAL;
  467. }
  468. }
  469. if (pdata->buck3_gpiodvs) {
  470. if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
  471. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  472. return -EINVAL;
  473. }
  474. }
  475. if (pdata->buck4_gpiodvs) {
  476. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
  477. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  478. return -EINVAL;
  479. }
  480. }
  481. s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
  482. GFP_KERNEL);
  483. if (!s5m8767)
  484. return -ENOMEM;
  485. size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
  486. s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
  487. if (!s5m8767->rdev)
  488. return -ENOMEM;
  489. rdev = s5m8767->rdev;
  490. s5m8767->dev = &pdev->dev;
  491. s5m8767->iodev = iodev;
  492. s5m8767->num_regulators = S5M8767_REG_MAX - 2;
  493. platform_set_drvdata(pdev, s5m8767);
  494. s5m8767->buck_gpioindex = pdata->buck_default_idx;
  495. s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
  496. s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
  497. s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
  498. s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
  499. s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
  500. s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
  501. s5m8767->ramp_delay = pdata->buck_ramp_delay;
  502. s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
  503. s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
  504. s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
  505. s5m8767->opmode = pdata->opmode;
  506. for (i = 0; i < 8; i++) {
  507. if (s5m8767->buck2_gpiodvs) {
  508. s5m8767->buck2_vol[i] =
  509. s5m8767_convert_voltage_to_sel(
  510. &buck_voltage_val2,
  511. pdata->buck2_voltage[i],
  512. pdata->buck2_voltage[i] +
  513. buck_voltage_val2.step);
  514. }
  515. if (s5m8767->buck3_gpiodvs) {
  516. s5m8767->buck3_vol[i] =
  517. s5m8767_convert_voltage_to_sel(
  518. &buck_voltage_val2,
  519. pdata->buck3_voltage[i],
  520. pdata->buck3_voltage[i] +
  521. buck_voltage_val2.step);
  522. }
  523. if (s5m8767->buck4_gpiodvs) {
  524. s5m8767->buck4_vol[i] =
  525. s5m8767_convert_voltage_to_sel(
  526. &buck_voltage_val2,
  527. pdata->buck4_voltage[i],
  528. pdata->buck4_voltage[i] +
  529. buck_voltage_val2.step);
  530. }
  531. }
  532. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  533. pdata->buck4_gpiodvs) {
  534. if (gpio_is_valid(pdata->buck_gpios[0]) &&
  535. gpio_is_valid(pdata->buck_gpios[1]) &&
  536. gpio_is_valid(pdata->buck_gpios[2])) {
  537. ret = gpio_request(pdata->buck_gpios[0],
  538. "S5M8767 SET1");
  539. if (ret == -EBUSY)
  540. dev_warn(&pdev->dev, "Duplicated gpio request for SET1\n");
  541. ret = gpio_request(pdata->buck_gpios[1],
  542. "S5M8767 SET2");
  543. if (ret == -EBUSY)
  544. dev_warn(&pdev->dev, "Duplicated gpio request for SET2\n");
  545. ret = gpio_request(pdata->buck_gpios[2],
  546. "S5M8767 SET3");
  547. if (ret == -EBUSY)
  548. dev_warn(&pdev->dev, "Duplicated gpio request for SET3\n");
  549. /* SET1 GPIO */
  550. gpio_direction_output(pdata->buck_gpios[0],
  551. (s5m8767->buck_gpioindex >> 2) & 0x1);
  552. /* SET2 GPIO */
  553. gpio_direction_output(pdata->buck_gpios[1],
  554. (s5m8767->buck_gpioindex >> 1) & 0x1);
  555. /* SET3 GPIO */
  556. gpio_direction_output(pdata->buck_gpios[2],
  557. (s5m8767->buck_gpioindex >> 0) & 0x1);
  558. ret = 0;
  559. } else {
  560. dev_err(&pdev->dev, "GPIO NOT VALID\n");
  561. ret = -EINVAL;
  562. return ret;
  563. }
  564. }
  565. s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
  566. (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1);
  567. s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
  568. (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1);
  569. s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
  570. (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1), 1 << 1);
  571. /* Initialize GPIO DVS registers */
  572. for (i = 0; i < 8; i++) {
  573. if (s5m8767->buck2_gpiodvs) {
  574. s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
  575. s5m8767->buck2_vol[i]);
  576. }
  577. if (s5m8767->buck3_gpiodvs) {
  578. s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
  579. s5m8767->buck3_vol[i]);
  580. }
  581. if (s5m8767->buck4_gpiodvs) {
  582. s5m_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
  583. s5m8767->buck4_vol[i]);
  584. }
  585. }
  586. s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL, 0x78, 0xff);
  587. s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL, 0x58, 0xff);
  588. s5m_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL, 0x78, 0xff);
  589. if (s5m8767->buck2_ramp)
  590. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
  591. if (s5m8767->buck3_ramp)
  592. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
  593. if (s5m8767->buck4_ramp)
  594. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
  595. if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
  596. || s5m8767->buck4_ramp) {
  597. switch (s5m8767->ramp_delay) {
  598. case 15:
  599. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  600. 0xc0, 0xf0);
  601. break;
  602. case 25:
  603. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  604. 0xd0, 0xf0);
  605. break;
  606. case 50:
  607. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  608. 0xe0, 0xf0);
  609. break;
  610. case 100:
  611. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  612. 0xf0, 0xf0);
  613. break;
  614. default:
  615. s5m_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  616. 0x90, 0xf0);
  617. }
  618. }
  619. for (i = 0; i < pdata->num_regulators; i++) {
  620. const struct s5m_voltage_desc *desc;
  621. int id = pdata->regulators[i].id;
  622. desc = reg_voltage_map[id];
  623. if (desc)
  624. regulators[id].n_voltages =
  625. (desc->max - desc->min) / desc->step + 1;
  626. config.dev = s5m8767->dev;
  627. config.init_data = pdata->regulators[i].initdata;
  628. config.driver_data = s5m8767;
  629. rdev[i] = regulator_register(&regulators[id], &config);
  630. if (IS_ERR(rdev[i])) {
  631. ret = PTR_ERR(rdev[i]);
  632. dev_err(s5m8767->dev, "regulator init failed for %d\n",
  633. id);
  634. rdev[i] = NULL;
  635. goto err;
  636. }
  637. }
  638. return 0;
  639. err:
  640. for (i = 0; i < s5m8767->num_regulators; i++)
  641. if (rdev[i])
  642. regulator_unregister(rdev[i]);
  643. return ret;
  644. }
  645. static int __devexit s5m8767_pmic_remove(struct platform_device *pdev)
  646. {
  647. struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev);
  648. struct regulator_dev **rdev = s5m8767->rdev;
  649. int i;
  650. for (i = 0; i < s5m8767->num_regulators; i++)
  651. if (rdev[i])
  652. regulator_unregister(rdev[i]);
  653. return 0;
  654. }
  655. static const struct platform_device_id s5m8767_pmic_id[] = {
  656. { "s5m8767-pmic", 0},
  657. { },
  658. };
  659. MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
  660. static struct platform_driver s5m8767_pmic_driver = {
  661. .driver = {
  662. .name = "s5m8767-pmic",
  663. .owner = THIS_MODULE,
  664. },
  665. .probe = s5m8767_pmic_probe,
  666. .remove = __devexit_p(s5m8767_pmic_remove),
  667. .id_table = s5m8767_pmic_id,
  668. };
  669. static int __init s5m8767_pmic_init(void)
  670. {
  671. return platform_driver_register(&s5m8767_pmic_driver);
  672. }
  673. subsys_initcall(s5m8767_pmic_init);
  674. static void __exit s5m8767_pmic_exit(void)
  675. {
  676. platform_driver_unregister(&s5m8767_pmic_driver);
  677. }
  678. module_exit(s5m8767_pmic_exit);
  679. /* Module information */
  680. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  681. MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
  682. MODULE_LICENSE("GPL");