pci-sysfs.c 20 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/pci.h>
  18. #include <linux/stat.h>
  19. #include <linux/topology.h>
  20. #include <linux/mm.h>
  21. #include <linux/capability.h>
  22. #include <linux/pci-aspm.h>
  23. #include "pci.h"
  24. static int sysfs_initialized; /* = 0 */
  25. /* show configuration fields */
  26. #define pci_config_attr(field, format_string) \
  27. static ssize_t \
  28. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  29. { \
  30. struct pci_dev *pdev; \
  31. \
  32. pdev = to_pci_dev (dev); \
  33. return sprintf (buf, format_string, pdev->field); \
  34. }
  35. pci_config_attr(vendor, "0x%04x\n");
  36. pci_config_attr(device, "0x%04x\n");
  37. pci_config_attr(subsystem_vendor, "0x%04x\n");
  38. pci_config_attr(subsystem_device, "0x%04x\n");
  39. pci_config_attr(class, "0x%06x\n");
  40. pci_config_attr(irq, "%u\n");
  41. static ssize_t broken_parity_status_show(struct device *dev,
  42. struct device_attribute *attr,
  43. char *buf)
  44. {
  45. struct pci_dev *pdev = to_pci_dev(dev);
  46. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  47. }
  48. static ssize_t broken_parity_status_store(struct device *dev,
  49. struct device_attribute *attr,
  50. const char *buf, size_t count)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. ssize_t consumed = -EINVAL;
  54. if ((count > 0) && (*buf == '0' || *buf == '1')) {
  55. pdev->broken_parity_status = *buf == '1' ? 1 : 0;
  56. consumed = count;
  57. }
  58. return consumed;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. cpumask_t mask;
  64. int len;
  65. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  66. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  67. strcat(buf,"\n");
  68. return 1+len;
  69. }
  70. /* show resources */
  71. static ssize_t
  72. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  73. {
  74. struct pci_dev * pci_dev = to_pci_dev(dev);
  75. char * str = buf;
  76. int i;
  77. int max = 7;
  78. resource_size_t start, end;
  79. if (pci_dev->subordinate)
  80. max = DEVICE_COUNT_RESOURCE;
  81. for (i = 0; i < max; i++) {
  82. struct resource *res = &pci_dev->resource[i];
  83. pci_resource_to_user(pci_dev, i, res, &start, &end);
  84. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  85. (unsigned long long)start,
  86. (unsigned long long)end,
  87. (unsigned long long)res->flags);
  88. }
  89. return (str - buf);
  90. }
  91. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  92. {
  93. struct pci_dev *pci_dev = to_pci_dev(dev);
  94. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  95. pci_dev->vendor, pci_dev->device,
  96. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  97. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  98. (u8)(pci_dev->class));
  99. }
  100. static ssize_t is_enabled_store(struct device *dev,
  101. struct device_attribute *attr, const char *buf,
  102. size_t count)
  103. {
  104. ssize_t result = -EINVAL;
  105. struct pci_dev *pdev = to_pci_dev(dev);
  106. /* this can crash the machine when done on the "wrong" device */
  107. if (!capable(CAP_SYS_ADMIN))
  108. return count;
  109. if (*buf == '0') {
  110. if (atomic_read(&pdev->enable_cnt) != 0)
  111. pci_disable_device(pdev);
  112. else
  113. result = -EIO;
  114. } else if (*buf == '1')
  115. result = pci_enable_device(pdev);
  116. return result < 0 ? result : count;
  117. }
  118. static ssize_t is_enabled_show(struct device *dev,
  119. struct device_attribute *attr, char *buf)
  120. {
  121. struct pci_dev *pdev;
  122. pdev = to_pci_dev (dev);
  123. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  124. }
  125. #ifdef CONFIG_NUMA
  126. static ssize_t
  127. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  128. {
  129. return sprintf (buf, "%d\n", dev->numa_node);
  130. }
  131. #endif
  132. static ssize_t
  133. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  134. {
  135. struct pci_dev *pdev = to_pci_dev(dev);
  136. if (!pdev->subordinate)
  137. return 0;
  138. return sprintf (buf, "%u\n",
  139. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  140. }
  141. static ssize_t
  142. msi_bus_store(struct device *dev, struct device_attribute *attr,
  143. const char *buf, size_t count)
  144. {
  145. struct pci_dev *pdev = to_pci_dev(dev);
  146. /* bad things may happen if the no_msi flag is changed
  147. * while some drivers are loaded */
  148. if (!capable(CAP_SYS_ADMIN))
  149. return count;
  150. if (!pdev->subordinate)
  151. return count;
  152. if (*buf == '0') {
  153. pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  154. dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
  155. " bad things could happen.\n");
  156. }
  157. if (*buf == '1') {
  158. pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  159. dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
  160. " bad things could happen.\n");
  161. }
  162. return count;
  163. }
  164. struct device_attribute pci_dev_attrs[] = {
  165. __ATTR_RO(resource),
  166. __ATTR_RO(vendor),
  167. __ATTR_RO(device),
  168. __ATTR_RO(subsystem_vendor),
  169. __ATTR_RO(subsystem_device),
  170. __ATTR_RO(class),
  171. __ATTR_RO(irq),
  172. __ATTR_RO(local_cpus),
  173. __ATTR_RO(modalias),
  174. #ifdef CONFIG_NUMA
  175. __ATTR_RO(numa_node),
  176. #endif
  177. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  178. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  179. broken_parity_status_show,broken_parity_status_store),
  180. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  181. __ATTR_NULL,
  182. };
  183. static ssize_t
  184. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  185. char *buf, loff_t off, size_t count)
  186. {
  187. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  188. unsigned int size = 64;
  189. loff_t init_off = off;
  190. u8 *data = (u8*) buf;
  191. /* Several chips lock up trying to read undefined config space */
  192. if (capable(CAP_SYS_ADMIN)) {
  193. size = dev->cfg_size;
  194. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  195. size = 128;
  196. }
  197. if (off > size)
  198. return 0;
  199. if (off + count > size) {
  200. size -= off;
  201. count = size;
  202. } else {
  203. size = count;
  204. }
  205. if ((off & 1) && size) {
  206. u8 val;
  207. pci_user_read_config_byte(dev, off, &val);
  208. data[off - init_off] = val;
  209. off++;
  210. size--;
  211. }
  212. if ((off & 3) && size > 2) {
  213. u16 val;
  214. pci_user_read_config_word(dev, off, &val);
  215. data[off - init_off] = val & 0xff;
  216. data[off - init_off + 1] = (val >> 8) & 0xff;
  217. off += 2;
  218. size -= 2;
  219. }
  220. while (size > 3) {
  221. u32 val;
  222. pci_user_read_config_dword(dev, off, &val);
  223. data[off - init_off] = val & 0xff;
  224. data[off - init_off + 1] = (val >> 8) & 0xff;
  225. data[off - init_off + 2] = (val >> 16) & 0xff;
  226. data[off - init_off + 3] = (val >> 24) & 0xff;
  227. off += 4;
  228. size -= 4;
  229. }
  230. if (size >= 2) {
  231. u16 val;
  232. pci_user_read_config_word(dev, off, &val);
  233. data[off - init_off] = val & 0xff;
  234. data[off - init_off + 1] = (val >> 8) & 0xff;
  235. off += 2;
  236. size -= 2;
  237. }
  238. if (size > 0) {
  239. u8 val;
  240. pci_user_read_config_byte(dev, off, &val);
  241. data[off - init_off] = val;
  242. off++;
  243. --size;
  244. }
  245. return count;
  246. }
  247. static ssize_t
  248. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  249. char *buf, loff_t off, size_t count)
  250. {
  251. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  252. unsigned int size = count;
  253. loff_t init_off = off;
  254. u8 *data = (u8*) buf;
  255. if (off > dev->cfg_size)
  256. return 0;
  257. if (off + count > dev->cfg_size) {
  258. size = dev->cfg_size - off;
  259. count = size;
  260. }
  261. if ((off & 1) && size) {
  262. pci_user_write_config_byte(dev, off, data[off - init_off]);
  263. off++;
  264. size--;
  265. }
  266. if ((off & 3) && size > 2) {
  267. u16 val = data[off - init_off];
  268. val |= (u16) data[off - init_off + 1] << 8;
  269. pci_user_write_config_word(dev, off, val);
  270. off += 2;
  271. size -= 2;
  272. }
  273. while (size > 3) {
  274. u32 val = data[off - init_off];
  275. val |= (u32) data[off - init_off + 1] << 8;
  276. val |= (u32) data[off - init_off + 2] << 16;
  277. val |= (u32) data[off - init_off + 3] << 24;
  278. pci_user_write_config_dword(dev, off, val);
  279. off += 4;
  280. size -= 4;
  281. }
  282. if (size >= 2) {
  283. u16 val = data[off - init_off];
  284. val |= (u16) data[off - init_off + 1] << 8;
  285. pci_user_write_config_word(dev, off, val);
  286. off += 2;
  287. size -= 2;
  288. }
  289. if (size) {
  290. pci_user_write_config_byte(dev, off, data[off - init_off]);
  291. off++;
  292. --size;
  293. }
  294. return count;
  295. }
  296. static ssize_t
  297. pci_read_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  298. char *buf, loff_t off, size_t count)
  299. {
  300. struct pci_dev *dev =
  301. to_pci_dev(container_of(kobj, struct device, kobj));
  302. int end;
  303. int ret;
  304. if (off > bin_attr->size)
  305. count = 0;
  306. else if (count > bin_attr->size - off)
  307. count = bin_attr->size - off;
  308. end = off + count;
  309. while (off < end) {
  310. ret = dev->vpd->ops->read(dev, off, end - off, buf);
  311. if (ret < 0)
  312. return ret;
  313. buf += ret;
  314. off += ret;
  315. }
  316. return count;
  317. }
  318. static ssize_t
  319. pci_write_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  320. char *buf, loff_t off, size_t count)
  321. {
  322. struct pci_dev *dev =
  323. to_pci_dev(container_of(kobj, struct device, kobj));
  324. int end;
  325. int ret;
  326. if (off > bin_attr->size)
  327. count = 0;
  328. else if (count > bin_attr->size - off)
  329. count = bin_attr->size - off;
  330. end = off + count;
  331. while (off < end) {
  332. ret = dev->vpd->ops->write(dev, off, end - off, buf);
  333. if (ret < 0)
  334. return ret;
  335. buf += ret;
  336. off += ret;
  337. }
  338. return count;
  339. }
  340. #ifdef HAVE_PCI_LEGACY
  341. /**
  342. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  343. * @kobj: kobject corresponding to file to read from
  344. * @buf: buffer to store results
  345. * @off: offset into legacy I/O port space
  346. * @count: number of bytes to read
  347. *
  348. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  349. * callback routine (pci_legacy_read).
  350. */
  351. ssize_t
  352. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  353. char *buf, loff_t off, size_t count)
  354. {
  355. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  356. struct device,
  357. kobj));
  358. /* Only support 1, 2 or 4 byte accesses */
  359. if (count != 1 && count != 2 && count != 4)
  360. return -EINVAL;
  361. return pci_legacy_read(bus, off, (u32 *)buf, count);
  362. }
  363. /**
  364. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  365. * @kobj: kobject corresponding to file to read from
  366. * @buf: buffer containing value to be written
  367. * @off: offset into legacy I/O port space
  368. * @count: number of bytes to write
  369. *
  370. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  371. * callback routine (pci_legacy_write).
  372. */
  373. ssize_t
  374. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  375. char *buf, loff_t off, size_t count)
  376. {
  377. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  378. struct device,
  379. kobj));
  380. /* Only support 1, 2 or 4 byte accesses */
  381. if (count != 1 && count != 2 && count != 4)
  382. return -EINVAL;
  383. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  384. }
  385. /**
  386. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  387. * @kobj: kobject corresponding to device to be mapped
  388. * @attr: struct bin_attribute for this file
  389. * @vma: struct vm_area_struct passed to mmap
  390. *
  391. * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
  392. * legacy memory space (first meg of bus space) into application virtual
  393. * memory space.
  394. */
  395. int
  396. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  397. struct vm_area_struct *vma)
  398. {
  399. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  400. struct device,
  401. kobj));
  402. return pci_mmap_legacy_page_range(bus, vma);
  403. }
  404. #endif /* HAVE_PCI_LEGACY */
  405. #ifdef HAVE_PCI_MMAP
  406. /**
  407. * pci_mmap_resource - map a PCI resource into user memory space
  408. * @kobj: kobject for mapping
  409. * @attr: struct bin_attribute for the file being mapped
  410. * @vma: struct vm_area_struct passed into the mmap
  411. *
  412. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  413. * FIXME: write combining? maybe automatic for prefetchable regions?
  414. */
  415. static int
  416. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  417. struct vm_area_struct *vma)
  418. {
  419. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  420. struct device, kobj));
  421. struct resource *res = (struct resource *)attr->private;
  422. enum pci_mmap_state mmap_type;
  423. resource_size_t start, end;
  424. int i;
  425. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  426. if (res == &pdev->resource[i])
  427. break;
  428. if (i >= PCI_ROM_RESOURCE)
  429. return -ENODEV;
  430. /* pci_mmap_page_range() expects the same kind of entry as coming
  431. * from /proc/bus/pci/ which is a "user visible" value. If this is
  432. * different from the resource itself, arch will do necessary fixup.
  433. */
  434. pci_resource_to_user(pdev, i, res, &start, &end);
  435. vma->vm_pgoff += start >> PAGE_SHIFT;
  436. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  437. return pci_mmap_page_range(pdev, vma, mmap_type, 0);
  438. }
  439. /**
  440. * pci_remove_resource_files - cleanup resource files
  441. * @dev: dev to cleanup
  442. *
  443. * If we created resource files for @dev, remove them from sysfs and
  444. * free their resources.
  445. */
  446. static void
  447. pci_remove_resource_files(struct pci_dev *pdev)
  448. {
  449. int i;
  450. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  451. struct bin_attribute *res_attr;
  452. res_attr = pdev->res_attr[i];
  453. if (res_attr) {
  454. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  455. kfree(res_attr);
  456. }
  457. }
  458. }
  459. /**
  460. * pci_create_resource_files - create resource files in sysfs for @dev
  461. * @dev: dev in question
  462. *
  463. * Walk the resources in @dev creating files for each resource available.
  464. */
  465. static int pci_create_resource_files(struct pci_dev *pdev)
  466. {
  467. int i;
  468. int retval;
  469. /* Expose the PCI resources from this device as files */
  470. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  471. struct bin_attribute *res_attr;
  472. /* skip empty resources */
  473. if (!pci_resource_len(pdev, i))
  474. continue;
  475. /* allocate attribute structure, piggyback attribute name */
  476. res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
  477. if (res_attr) {
  478. char *res_attr_name = (char *)(res_attr + 1);
  479. pdev->res_attr[i] = res_attr;
  480. sprintf(res_attr_name, "resource%d", i);
  481. res_attr->attr.name = res_attr_name;
  482. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  483. res_attr->size = pci_resource_len(pdev, i);
  484. res_attr->mmap = pci_mmap_resource;
  485. res_attr->private = &pdev->resource[i];
  486. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  487. if (retval) {
  488. pci_remove_resource_files(pdev);
  489. return retval;
  490. }
  491. } else {
  492. return -ENOMEM;
  493. }
  494. }
  495. return 0;
  496. }
  497. #else /* !HAVE_PCI_MMAP */
  498. static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
  499. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  500. #endif /* HAVE_PCI_MMAP */
  501. /**
  502. * pci_write_rom - used to enable access to the PCI ROM display
  503. * @kobj: kernel object handle
  504. * @buf: user input
  505. * @off: file offset
  506. * @count: number of byte in input
  507. *
  508. * writing anything except 0 enables it
  509. */
  510. static ssize_t
  511. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  512. char *buf, loff_t off, size_t count)
  513. {
  514. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  515. if ((off == 0) && (*buf == '0') && (count == 2))
  516. pdev->rom_attr_enabled = 0;
  517. else
  518. pdev->rom_attr_enabled = 1;
  519. return count;
  520. }
  521. /**
  522. * pci_read_rom - read a PCI ROM
  523. * @kobj: kernel object handle
  524. * @buf: where to put the data we read from the ROM
  525. * @off: file offset
  526. * @count: number of bytes to read
  527. *
  528. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  529. * device corresponding to @kobj.
  530. */
  531. static ssize_t
  532. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  533. char *buf, loff_t off, size_t count)
  534. {
  535. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  536. void __iomem *rom;
  537. size_t size;
  538. if (!pdev->rom_attr_enabled)
  539. return -EINVAL;
  540. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  541. if (!rom)
  542. return 0;
  543. if (off >= size)
  544. count = 0;
  545. else {
  546. if (off + count > size)
  547. count = size - off;
  548. memcpy_fromio(buf, rom + off, count);
  549. }
  550. pci_unmap_rom(pdev, rom);
  551. return count;
  552. }
  553. static struct bin_attribute pci_config_attr = {
  554. .attr = {
  555. .name = "config",
  556. .mode = S_IRUGO | S_IWUSR,
  557. },
  558. .size = 256,
  559. .read = pci_read_config,
  560. .write = pci_write_config,
  561. };
  562. static struct bin_attribute pcie_config_attr = {
  563. .attr = {
  564. .name = "config",
  565. .mode = S_IRUGO | S_IWUSR,
  566. },
  567. .size = 4096,
  568. .read = pci_read_config,
  569. .write = pci_write_config,
  570. };
  571. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  572. {
  573. return 0;
  574. }
  575. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  576. {
  577. struct bin_attribute *attr = NULL;
  578. int retval;
  579. if (!sysfs_initialized)
  580. return -EACCES;
  581. if (pdev->cfg_size < 4096)
  582. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  583. else
  584. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  585. if (retval)
  586. goto err;
  587. /* If the device has VPD, try to expose it in sysfs. */
  588. if (pdev->vpd) {
  589. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  590. if (attr) {
  591. pdev->vpd->attr = attr;
  592. attr->size = pdev->vpd->ops->get_size(pdev);
  593. attr->attr.name = "vpd";
  594. attr->attr.mode = S_IRUGO | S_IWUSR;
  595. attr->read = pci_read_vpd;
  596. attr->write = pci_write_vpd;
  597. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  598. if (retval)
  599. goto err_vpd;
  600. } else {
  601. retval = -ENOMEM;
  602. goto err_config_file;
  603. }
  604. }
  605. retval = pci_create_resource_files(pdev);
  606. if (retval)
  607. goto err_vpd_file;
  608. /* If the device has a ROM, try to expose it in sysfs. */
  609. if (pci_resource_len(pdev, PCI_ROM_RESOURCE) ||
  610. (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)) {
  611. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  612. if (attr) {
  613. pdev->rom_attr = attr;
  614. attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  615. attr->attr.name = "rom";
  616. attr->attr.mode = S_IRUSR;
  617. attr->read = pci_read_rom;
  618. attr->write = pci_write_rom;
  619. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  620. if (retval)
  621. goto err_rom;
  622. } else {
  623. retval = -ENOMEM;
  624. goto err_resource_files;
  625. }
  626. }
  627. /* add platform-specific attributes */
  628. if (pcibios_add_platform_entries(pdev))
  629. goto err_rom_file;
  630. pcie_aspm_create_sysfs_dev_files(pdev);
  631. return 0;
  632. err_rom_file:
  633. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  634. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  635. err_rom:
  636. kfree(pdev->rom_attr);
  637. err_resource_files:
  638. pci_remove_resource_files(pdev);
  639. err_vpd_file:
  640. if (pdev->vpd) {
  641. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->vpd->attr);
  642. err_vpd:
  643. kfree(pdev->vpd->attr);
  644. }
  645. err_config_file:
  646. if (pdev->cfg_size < 4096)
  647. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  648. else
  649. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  650. err:
  651. return retval;
  652. }
  653. /**
  654. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  655. * @pdev: device whose entries we should free
  656. *
  657. * Cleanup when @pdev is removed from sysfs.
  658. */
  659. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  660. {
  661. if (!sysfs_initialized)
  662. return;
  663. pcie_aspm_remove_sysfs_dev_files(pdev);
  664. if (pdev->vpd) {
  665. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->vpd->attr);
  666. kfree(pdev->vpd->attr);
  667. }
  668. if (pdev->cfg_size < 4096)
  669. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  670. else
  671. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  672. pci_remove_resource_files(pdev);
  673. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  674. if (pdev->rom_attr) {
  675. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  676. kfree(pdev->rom_attr);
  677. }
  678. }
  679. }
  680. static int __init pci_sysfs_init(void)
  681. {
  682. struct pci_dev *pdev = NULL;
  683. int retval;
  684. sysfs_initialized = 1;
  685. for_each_pci_dev(pdev) {
  686. retval = pci_create_sysfs_dev_files(pdev);
  687. if (retval) {
  688. pci_dev_put(pdev);
  689. return retval;
  690. }
  691. }
  692. return 0;
  693. }
  694. late_initcall(pci_sysfs_init);