handle.c 5.1 KB

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  1. /*
  2. * linux/kernel/irq/handle.c
  3. *
  4. * Copyright (C) 1992, 1998-2004 Linus Torvalds, Ingo Molnar
  5. *
  6. * This file contains the core interrupt handling code.
  7. */
  8. #include <linux/irq.h>
  9. #include <linux/module.h>
  10. #include <linux/random.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/kernel_stat.h>
  13. #include "internals.h"
  14. /*
  15. * Linux has a controller-independent interrupt architecture.
  16. * Every controller has a 'controller-template', that is used
  17. * by the main code to do the right thing. Each driver-visible
  18. * interrupt source is transparently wired to the appropriate
  19. * controller. Thus drivers need not be aware of the
  20. * interrupt-controller.
  21. *
  22. * The code is designed to be easily extended with new/different
  23. * interrupt controllers, without having to do assembly magic or
  24. * having to touch the generic code.
  25. *
  26. * Controller mappings for all interrupt sources:
  27. */
  28. struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned = {
  29. [0 ... NR_IRQS-1] = {
  30. .status = IRQ_DISABLED,
  31. .chip = &no_irq_type,
  32. .depth = 1,
  33. .lock = SPIN_LOCK_UNLOCKED,
  34. #ifdef CONFIG_SMP
  35. .affinity = CPU_MASK_ALL
  36. #endif
  37. }
  38. };
  39. /*
  40. * What should we do if we get a hw irq event on an illegal vector?
  41. * Each architecture has to answer this themself.
  42. */
  43. static void ack_bad(unsigned int irq)
  44. {
  45. ack_bad_irq(irq);
  46. }
  47. /*
  48. * NOP functions
  49. */
  50. static void noop(unsigned int irq)
  51. {
  52. }
  53. static unsigned int noop_ret(unsigned int irq)
  54. {
  55. return 0;
  56. }
  57. /*
  58. * Generic no controller implementation
  59. */
  60. struct hw_interrupt_type no_irq_type = {
  61. .typename = "none",
  62. .startup = noop_ret,
  63. .shutdown = noop,
  64. .enable = noop,
  65. .disable = noop,
  66. .ack = ack_bad,
  67. .end = noop,
  68. };
  69. /*
  70. * Special, empty irq handler:
  71. */
  72. irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs)
  73. {
  74. return IRQ_NONE;
  75. }
  76. /**
  77. * handle_IRQ_event - irq action chain handler
  78. * @irq: the interrupt number
  79. * @regs: pointer to a register structure
  80. * @action: the interrupt action chain for this irq
  81. *
  82. * Handles the action chain of an irq event
  83. */
  84. irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
  85. struct irqaction *action)
  86. {
  87. irqreturn_t ret, retval = IRQ_NONE;
  88. unsigned int status = 0;
  89. if (!(action->flags & SA_INTERRUPT))
  90. local_irq_enable();
  91. do {
  92. ret = action->handler(irq, action->dev_id, regs);
  93. if (ret == IRQ_HANDLED)
  94. status |= action->flags;
  95. retval |= ret;
  96. action = action->next;
  97. } while (action);
  98. if (status & SA_SAMPLE_RANDOM)
  99. add_interrupt_randomness(irq);
  100. local_irq_disable();
  101. return retval;
  102. }
  103. /**
  104. * __do_IRQ - original all in one highlevel IRQ handler
  105. * @irq: the interrupt number
  106. * @regs: pointer to a register structure
  107. *
  108. * __do_IRQ handles all normal device IRQ's (the special
  109. * SMP cross-CPU interrupts have their own specific
  110. * handlers).
  111. *
  112. * This is the original x86 implementation which is used for every
  113. * interrupt type.
  114. */
  115. fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs)
  116. {
  117. struct irq_desc *desc = irq_desc + irq;
  118. struct irqaction *action;
  119. unsigned int status;
  120. kstat_this_cpu.irqs[irq]++;
  121. if (CHECK_IRQ_PER_CPU(desc->status)) {
  122. irqreturn_t action_ret;
  123. /*
  124. * No locking required for CPU-local interrupts:
  125. */
  126. if (desc->chip->ack)
  127. desc->chip->ack(irq);
  128. action_ret = handle_IRQ_event(irq, regs, desc->action);
  129. desc->chip->end(irq);
  130. return 1;
  131. }
  132. spin_lock(&desc->lock);
  133. if (desc->chip->ack)
  134. desc->chip->ack(irq);
  135. /*
  136. * REPLAY is when Linux resends an IRQ that was dropped earlier
  137. * WAITING is used by probe to mark irqs that are being tested
  138. */
  139. status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
  140. status |= IRQ_PENDING; /* we _want_ to handle it */
  141. /*
  142. * If the IRQ is disabled for whatever reason, we cannot
  143. * use the action we have.
  144. */
  145. action = NULL;
  146. if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
  147. action = desc->action;
  148. status &= ~IRQ_PENDING; /* we commit to handling */
  149. status |= IRQ_INPROGRESS; /* we are handling it */
  150. }
  151. desc->status = status;
  152. /*
  153. * If there is no IRQ handler or it was disabled, exit early.
  154. * Since we set PENDING, if another processor is handling
  155. * a different instance of this same irq, the other processor
  156. * will take care of it.
  157. */
  158. if (unlikely(!action))
  159. goto out;
  160. /*
  161. * Edge triggered interrupts need to remember
  162. * pending events.
  163. * This applies to any hw interrupts that allow a second
  164. * instance of the same irq to arrive while we are in do_IRQ
  165. * or in the handler. But the code here only handles the _second_
  166. * instance of the irq, not the third or fourth. So it is mostly
  167. * useful for irq hardware that does not mask cleanly in an
  168. * SMP environment.
  169. */
  170. for (;;) {
  171. irqreturn_t action_ret;
  172. spin_unlock(&desc->lock);
  173. action_ret = handle_IRQ_event(irq, regs, action);
  174. spin_lock(&desc->lock);
  175. if (!noirqdebug)
  176. note_interrupt(irq, desc, action_ret, regs);
  177. if (likely(!(desc->status & IRQ_PENDING)))
  178. break;
  179. desc->status &= ~IRQ_PENDING;
  180. }
  181. desc->status &= ~IRQ_INPROGRESS;
  182. out:
  183. /*
  184. * The ->end() handler has to deal with interrupts which got
  185. * disabled while the handler was running.
  186. */
  187. desc->chip->end(irq);
  188. spin_unlock(&desc->lock);
  189. return 1;
  190. }