intel_lvds.c 32 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130
  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. u32 pfit_control;
  48. u32 pfit_pgm_ratios;
  49. bool pfit_dirty;
  50. struct intel_lvds_connector *attached_connector;
  51. };
  52. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  53. {
  54. return container_of(encoder, struct intel_lvds_encoder, base.base);
  55. }
  56. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  57. {
  58. return container_of(connector, struct intel_lvds_connector, base.base);
  59. }
  60. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  61. enum pipe *pipe)
  62. {
  63. struct drm_device *dev = encoder->base.dev;
  64. struct drm_i915_private *dev_priv = dev->dev_private;
  65. u32 lvds_reg, tmp;
  66. if (HAS_PCH_SPLIT(dev)) {
  67. lvds_reg = PCH_LVDS;
  68. } else {
  69. lvds_reg = LVDS;
  70. }
  71. tmp = I915_READ(lvds_reg);
  72. if (!(tmp & LVDS_PORT_EN))
  73. return false;
  74. if (HAS_PCH_CPT(dev))
  75. *pipe = PORT_TO_PIPE_CPT(tmp);
  76. else
  77. *pipe = PORT_TO_PIPE(tmp);
  78. return true;
  79. }
  80. /**
  81. * Sets the power state for the panel.
  82. */
  83. static void intel_enable_lvds(struct intel_encoder *encoder)
  84. {
  85. struct drm_device *dev = encoder->base.dev;
  86. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  87. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  88. struct drm_i915_private *dev_priv = dev->dev_private;
  89. u32 ctl_reg, lvds_reg, stat_reg;
  90. if (HAS_PCH_SPLIT(dev)) {
  91. ctl_reg = PCH_PP_CONTROL;
  92. lvds_reg = PCH_LVDS;
  93. stat_reg = PCH_PP_STATUS;
  94. } else {
  95. ctl_reg = PP_CONTROL;
  96. lvds_reg = LVDS;
  97. stat_reg = PP_STATUS;
  98. }
  99. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  100. if (lvds_encoder->pfit_dirty) {
  101. /*
  102. * Enable automatic panel scaling so that non-native modes
  103. * fill the screen. The panel fitter should only be
  104. * adjusted whilst the pipe is disabled, according to
  105. * register description and PRM.
  106. */
  107. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  108. lvds_encoder->pfit_control,
  109. lvds_encoder->pfit_pgm_ratios);
  110. I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios);
  111. I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control);
  112. lvds_encoder->pfit_dirty = false;
  113. }
  114. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  115. POSTING_READ(lvds_reg);
  116. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  117. DRM_ERROR("timed out waiting for panel to power on\n");
  118. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  119. }
  120. static void intel_disable_lvds(struct intel_encoder *encoder)
  121. {
  122. struct drm_device *dev = encoder->base.dev;
  123. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  124. struct drm_i915_private *dev_priv = dev->dev_private;
  125. u32 ctl_reg, lvds_reg, stat_reg;
  126. if (HAS_PCH_SPLIT(dev)) {
  127. ctl_reg = PCH_PP_CONTROL;
  128. lvds_reg = PCH_LVDS;
  129. stat_reg = PCH_PP_STATUS;
  130. } else {
  131. ctl_reg = PP_CONTROL;
  132. lvds_reg = LVDS;
  133. stat_reg = PP_STATUS;
  134. }
  135. intel_panel_disable_backlight(dev);
  136. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  137. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  138. DRM_ERROR("timed out waiting for panel to power off\n");
  139. if (lvds_encoder->pfit_control) {
  140. I915_WRITE(PFIT_CONTROL, 0);
  141. lvds_encoder->pfit_dirty = true;
  142. }
  143. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  144. POSTING_READ(lvds_reg);
  145. }
  146. static int intel_lvds_mode_valid(struct drm_connector *connector,
  147. struct drm_display_mode *mode)
  148. {
  149. struct intel_connector *intel_connector = to_intel_connector(connector);
  150. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  151. if (mode->hdisplay > fixed_mode->hdisplay)
  152. return MODE_PANEL;
  153. if (mode->vdisplay > fixed_mode->vdisplay)
  154. return MODE_PANEL;
  155. return MODE_OK;
  156. }
  157. static void
  158. centre_horizontally(struct drm_display_mode *mode,
  159. int width)
  160. {
  161. u32 border, sync_pos, blank_width, sync_width;
  162. /* keep the hsync and hblank widths constant */
  163. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  164. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  165. sync_pos = (blank_width - sync_width + 1) / 2;
  166. border = (mode->hdisplay - width + 1) / 2;
  167. border += border & 1; /* make the border even */
  168. mode->crtc_hdisplay = width;
  169. mode->crtc_hblank_start = width + border;
  170. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  171. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  172. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  173. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  174. }
  175. static void
  176. centre_vertically(struct drm_display_mode *mode,
  177. int height)
  178. {
  179. u32 border, sync_pos, blank_width, sync_width;
  180. /* keep the vsync and vblank widths constant */
  181. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  182. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  183. sync_pos = (blank_width - sync_width + 1) / 2;
  184. border = (mode->vdisplay - height + 1) / 2;
  185. mode->crtc_vdisplay = height;
  186. mode->crtc_vblank_start = height + border;
  187. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  188. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  189. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  190. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  191. }
  192. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  193. {
  194. /*
  195. * Floating point operation is not supported. So the FACTOR
  196. * is defined, which can avoid the floating point computation
  197. * when calculating the panel ratio.
  198. */
  199. #define ACCURACY 12
  200. #define FACTOR (1 << ACCURACY)
  201. u32 ratio = source * FACTOR / target;
  202. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  203. }
  204. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  205. const struct drm_display_mode *mode,
  206. struct drm_display_mode *adjusted_mode)
  207. {
  208. struct drm_device *dev = encoder->dev;
  209. struct drm_i915_private *dev_priv = dev->dev_private;
  210. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
  211. struct intel_connector *intel_connector =
  212. &lvds_encoder->attached_connector->base;
  213. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  214. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  215. int pipe;
  216. /* Should never happen!! */
  217. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  218. DRM_ERROR("Can't support LVDS on pipe A\n");
  219. return false;
  220. }
  221. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  222. return false;
  223. /*
  224. * We have timings from the BIOS for the panel, put them in
  225. * to the adjusted mode. The CRTC will be set up for this mode,
  226. * with the panel scaling set up to source from the H/VDisplay
  227. * of the original mode.
  228. */
  229. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  230. adjusted_mode);
  231. if (HAS_PCH_SPLIT(dev)) {
  232. intel_pch_panel_fitting(dev,
  233. intel_connector->panel.fitting_mode,
  234. mode, adjusted_mode);
  235. return true;
  236. }
  237. /* Native modes don't need fitting */
  238. if (adjusted_mode->hdisplay == mode->hdisplay &&
  239. adjusted_mode->vdisplay == mode->vdisplay)
  240. goto out;
  241. /* 965+ wants fuzzy fitting */
  242. if (INTEL_INFO(dev)->gen >= 4)
  243. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  244. PFIT_FILTER_FUZZY);
  245. /*
  246. * Enable automatic panel scaling for non-native modes so that they fill
  247. * the screen. Should be enabled before the pipe is enabled, according
  248. * to register description and PRM.
  249. * Change the value here to see the borders for debugging
  250. */
  251. for_each_pipe(pipe)
  252. I915_WRITE(BCLRPAT(pipe), 0);
  253. drm_mode_set_crtcinfo(adjusted_mode, 0);
  254. switch (intel_connector->panel.fitting_mode) {
  255. case DRM_MODE_SCALE_CENTER:
  256. /*
  257. * For centered modes, we have to calculate border widths &
  258. * heights and modify the values programmed into the CRTC.
  259. */
  260. centre_horizontally(adjusted_mode, mode->hdisplay);
  261. centre_vertically(adjusted_mode, mode->vdisplay);
  262. border = LVDS_BORDER_ENABLE;
  263. break;
  264. case DRM_MODE_SCALE_ASPECT:
  265. /* Scale but preserve the aspect ratio */
  266. if (INTEL_INFO(dev)->gen >= 4) {
  267. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  268. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  269. /* 965+ is easy, it does everything in hw */
  270. if (scaled_width > scaled_height)
  271. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  272. else if (scaled_width < scaled_height)
  273. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  274. else if (adjusted_mode->hdisplay != mode->hdisplay)
  275. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  276. } else {
  277. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  278. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  279. /*
  280. * For earlier chips we have to calculate the scaling
  281. * ratio by hand and program it into the
  282. * PFIT_PGM_RATIO register
  283. */
  284. if (scaled_width > scaled_height) { /* pillar */
  285. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  286. border = LVDS_BORDER_ENABLE;
  287. if (mode->vdisplay != adjusted_mode->vdisplay) {
  288. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  289. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  290. bits << PFIT_VERT_SCALE_SHIFT);
  291. pfit_control |= (PFIT_ENABLE |
  292. VERT_INTERP_BILINEAR |
  293. HORIZ_INTERP_BILINEAR);
  294. }
  295. } else if (scaled_width < scaled_height) { /* letter */
  296. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  297. border = LVDS_BORDER_ENABLE;
  298. if (mode->hdisplay != adjusted_mode->hdisplay) {
  299. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  300. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  301. bits << PFIT_VERT_SCALE_SHIFT);
  302. pfit_control |= (PFIT_ENABLE |
  303. VERT_INTERP_BILINEAR |
  304. HORIZ_INTERP_BILINEAR);
  305. }
  306. } else
  307. /* Aspects match, Let hw scale both directions */
  308. pfit_control |= (PFIT_ENABLE |
  309. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  310. VERT_INTERP_BILINEAR |
  311. HORIZ_INTERP_BILINEAR);
  312. }
  313. break;
  314. case DRM_MODE_SCALE_FULLSCREEN:
  315. /*
  316. * Full scaling, even if it changes the aspect ratio.
  317. * Fortunately this is all done for us in hw.
  318. */
  319. if (mode->vdisplay != adjusted_mode->vdisplay ||
  320. mode->hdisplay != adjusted_mode->hdisplay) {
  321. pfit_control |= PFIT_ENABLE;
  322. if (INTEL_INFO(dev)->gen >= 4)
  323. pfit_control |= PFIT_SCALING_AUTO;
  324. else
  325. pfit_control |= (VERT_AUTO_SCALE |
  326. VERT_INTERP_BILINEAR |
  327. HORIZ_AUTO_SCALE |
  328. HORIZ_INTERP_BILINEAR);
  329. }
  330. break;
  331. default:
  332. break;
  333. }
  334. out:
  335. /* If not enabling scaling, be consistent and always use 0. */
  336. if ((pfit_control & PFIT_ENABLE) == 0) {
  337. pfit_control = 0;
  338. pfit_pgm_ratios = 0;
  339. }
  340. /* Make sure pre-965 set dither correctly */
  341. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  342. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  343. if (pfit_control != lvds_encoder->pfit_control ||
  344. pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  345. lvds_encoder->pfit_control = pfit_control;
  346. lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  347. lvds_encoder->pfit_dirty = true;
  348. }
  349. dev_priv->lvds_border_bits = border;
  350. /*
  351. * XXX: It would be nice to support lower refresh rates on the
  352. * panels to reduce power consumption, and perhaps match the
  353. * user's requested refresh rate.
  354. */
  355. return true;
  356. }
  357. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  358. struct drm_display_mode *mode,
  359. struct drm_display_mode *adjusted_mode)
  360. {
  361. /*
  362. * The LVDS pin pair will already have been turned on in the
  363. * intel_crtc_mode_set since it has a large impact on the DPLL
  364. * settings.
  365. */
  366. }
  367. /**
  368. * Detect the LVDS connection.
  369. *
  370. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  371. * connected and closed means disconnected. We also send hotplug events as
  372. * needed, using lid status notification from the input layer.
  373. */
  374. static enum drm_connector_status
  375. intel_lvds_detect(struct drm_connector *connector, bool force)
  376. {
  377. struct drm_device *dev = connector->dev;
  378. enum drm_connector_status status;
  379. status = intel_panel_detect(dev);
  380. if (status != connector_status_unknown)
  381. return status;
  382. return connector_status_connected;
  383. }
  384. /**
  385. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  386. */
  387. static int intel_lvds_get_modes(struct drm_connector *connector)
  388. {
  389. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  390. struct drm_device *dev = connector->dev;
  391. struct drm_display_mode *mode;
  392. /* use cached edid if we have one */
  393. if (lvds_connector->base.edid) {
  394. /* invalid edid */
  395. if (IS_ERR(lvds_connector->base.edid))
  396. return 0;
  397. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  398. }
  399. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  400. if (mode == NULL)
  401. return 0;
  402. drm_mode_probed_add(connector, mode);
  403. return 1;
  404. }
  405. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  406. {
  407. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  408. return 1;
  409. }
  410. /* The GPU hangs up on these systems if modeset is performed on LID open */
  411. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  412. {
  413. .callback = intel_no_modeset_on_lid_dmi_callback,
  414. .ident = "Toshiba Tecra A11",
  415. .matches = {
  416. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  417. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  418. },
  419. },
  420. { } /* terminating entry */
  421. };
  422. /*
  423. * Lid events. Note the use of 'modeset_on_lid':
  424. * - we set it on lid close, and reset it on open
  425. * - we use it as a "only once" bit (ie we ignore
  426. * duplicate events where it was already properly
  427. * set/reset)
  428. * - the suspend/resume paths will also set it to
  429. * zero, since they restore the mode ("lid open").
  430. */
  431. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  432. void *unused)
  433. {
  434. struct intel_lvds_connector *lvds_connector =
  435. container_of(nb, struct intel_lvds_connector, lid_notifier);
  436. struct drm_connector *connector = &lvds_connector->base.base;
  437. struct drm_device *dev = connector->dev;
  438. struct drm_i915_private *dev_priv = dev->dev_private;
  439. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  440. return NOTIFY_OK;
  441. /*
  442. * check and update the status of LVDS connector after receiving
  443. * the LID nofication event.
  444. */
  445. connector->status = connector->funcs->detect(connector, false);
  446. /* Don't force modeset on machines where it causes a GPU lockup */
  447. if (dmi_check_system(intel_no_modeset_on_lid))
  448. return NOTIFY_OK;
  449. if (!acpi_lid_open()) {
  450. dev_priv->modeset_on_lid = 1;
  451. return NOTIFY_OK;
  452. }
  453. if (!dev_priv->modeset_on_lid)
  454. return NOTIFY_OK;
  455. dev_priv->modeset_on_lid = 0;
  456. mutex_lock(&dev->mode_config.mutex);
  457. intel_modeset_check_state(dev);
  458. mutex_unlock(&dev->mode_config.mutex);
  459. return NOTIFY_OK;
  460. }
  461. /**
  462. * intel_lvds_destroy - unregister and free LVDS structures
  463. * @connector: connector to free
  464. *
  465. * Unregister the DDC bus for this connector then free the driver private
  466. * structure.
  467. */
  468. static void intel_lvds_destroy(struct drm_connector *connector)
  469. {
  470. struct intel_lvds_connector *lvds_connector =
  471. to_lvds_connector(connector);
  472. if (lvds_connector->lid_notifier.notifier_call)
  473. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  474. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  475. kfree(lvds_connector->base.edid);
  476. intel_panel_destroy_backlight(connector->dev);
  477. intel_panel_fini(&lvds_connector->base.panel);
  478. drm_sysfs_connector_remove(connector);
  479. drm_connector_cleanup(connector);
  480. kfree(connector);
  481. }
  482. static int intel_lvds_set_property(struct drm_connector *connector,
  483. struct drm_property *property,
  484. uint64_t value)
  485. {
  486. struct intel_connector *intel_connector = to_intel_connector(connector);
  487. struct drm_device *dev = connector->dev;
  488. if (property == dev->mode_config.scaling_mode_property) {
  489. struct drm_crtc *crtc;
  490. if (value == DRM_MODE_SCALE_NONE) {
  491. DRM_DEBUG_KMS("no scaling not supported\n");
  492. return -EINVAL;
  493. }
  494. if (intel_connector->panel.fitting_mode == value) {
  495. /* the LVDS scaling property is not changed */
  496. return 0;
  497. }
  498. intel_connector->panel.fitting_mode = value;
  499. crtc = intel_attached_encoder(connector)->base.crtc;
  500. if (crtc && crtc->enabled) {
  501. /*
  502. * If the CRTC is enabled, the display will be changed
  503. * according to the new panel fitting mode.
  504. */
  505. intel_set_mode(crtc, &crtc->mode,
  506. crtc->x, crtc->y, crtc->fb);
  507. }
  508. }
  509. return 0;
  510. }
  511. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  512. .mode_fixup = intel_lvds_mode_fixup,
  513. .mode_set = intel_lvds_mode_set,
  514. .disable = intel_encoder_noop,
  515. };
  516. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  517. .get_modes = intel_lvds_get_modes,
  518. .mode_valid = intel_lvds_mode_valid,
  519. .best_encoder = intel_best_encoder,
  520. };
  521. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  522. .dpms = intel_connector_dpms,
  523. .detect = intel_lvds_detect,
  524. .fill_modes = drm_helper_probe_single_connector_modes,
  525. .set_property = intel_lvds_set_property,
  526. .destroy = intel_lvds_destroy,
  527. };
  528. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  529. .destroy = intel_encoder_destroy,
  530. };
  531. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  532. {
  533. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  534. return 1;
  535. }
  536. /* These systems claim to have LVDS, but really don't */
  537. static const struct dmi_system_id intel_no_lvds[] = {
  538. {
  539. .callback = intel_no_lvds_dmi_callback,
  540. .ident = "Apple Mac Mini (Core series)",
  541. .matches = {
  542. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  543. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  544. },
  545. },
  546. {
  547. .callback = intel_no_lvds_dmi_callback,
  548. .ident = "Apple Mac Mini (Core 2 series)",
  549. .matches = {
  550. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  551. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  552. },
  553. },
  554. {
  555. .callback = intel_no_lvds_dmi_callback,
  556. .ident = "MSI IM-945GSE-A",
  557. .matches = {
  558. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  559. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  560. },
  561. },
  562. {
  563. .callback = intel_no_lvds_dmi_callback,
  564. .ident = "Dell Studio Hybrid",
  565. .matches = {
  566. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  567. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  568. },
  569. },
  570. {
  571. .callback = intel_no_lvds_dmi_callback,
  572. .ident = "Dell OptiPlex FX170",
  573. .matches = {
  574. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  575. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  576. },
  577. },
  578. {
  579. .callback = intel_no_lvds_dmi_callback,
  580. .ident = "AOpen Mini PC",
  581. .matches = {
  582. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  583. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  584. },
  585. },
  586. {
  587. .callback = intel_no_lvds_dmi_callback,
  588. .ident = "AOpen Mini PC MP915",
  589. .matches = {
  590. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  591. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  592. },
  593. },
  594. {
  595. .callback = intel_no_lvds_dmi_callback,
  596. .ident = "AOpen i915GMm-HFS",
  597. .matches = {
  598. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  599. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  600. },
  601. },
  602. {
  603. .callback = intel_no_lvds_dmi_callback,
  604. .ident = "AOpen i45GMx-I",
  605. .matches = {
  606. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  607. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  608. },
  609. },
  610. {
  611. .callback = intel_no_lvds_dmi_callback,
  612. .ident = "Aopen i945GTt-VFA",
  613. .matches = {
  614. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  615. },
  616. },
  617. {
  618. .callback = intel_no_lvds_dmi_callback,
  619. .ident = "Clientron U800",
  620. .matches = {
  621. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  622. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  623. },
  624. },
  625. {
  626. .callback = intel_no_lvds_dmi_callback,
  627. .ident = "Clientron E830",
  628. .matches = {
  629. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  630. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  631. },
  632. },
  633. {
  634. .callback = intel_no_lvds_dmi_callback,
  635. .ident = "Asus EeeBox PC EB1007",
  636. .matches = {
  637. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  638. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  639. },
  640. },
  641. {
  642. .callback = intel_no_lvds_dmi_callback,
  643. .ident = "Asus AT5NM10T-I",
  644. .matches = {
  645. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  646. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  647. },
  648. },
  649. {
  650. .callback = intel_no_lvds_dmi_callback,
  651. .ident = "Hewlett-Packard HP t5740e Thin Client",
  652. .matches = {
  653. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  654. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  655. },
  656. },
  657. {
  658. .callback = intel_no_lvds_dmi_callback,
  659. .ident = "Hewlett-Packard t5745",
  660. .matches = {
  661. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  662. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  663. },
  664. },
  665. {
  666. .callback = intel_no_lvds_dmi_callback,
  667. .ident = "Hewlett-Packard st5747",
  668. .matches = {
  669. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  670. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  671. },
  672. },
  673. {
  674. .callback = intel_no_lvds_dmi_callback,
  675. .ident = "MSI Wind Box DC500",
  676. .matches = {
  677. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  678. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  679. },
  680. },
  681. {
  682. .callback = intel_no_lvds_dmi_callback,
  683. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  684. .matches = {
  685. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  686. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  687. },
  688. },
  689. {
  690. .callback = intel_no_lvds_dmi_callback,
  691. .ident = "Gigabyte GA-D525TUD",
  692. .matches = {
  693. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  694. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  695. },
  696. },
  697. { } /* terminating entry */
  698. };
  699. /**
  700. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  701. * @dev: drm device
  702. * @connector: LVDS connector
  703. *
  704. * Find the reduced downclock for LVDS in EDID.
  705. */
  706. static void intel_find_lvds_downclock(struct drm_device *dev,
  707. struct drm_display_mode *fixed_mode,
  708. struct drm_connector *connector)
  709. {
  710. struct drm_i915_private *dev_priv = dev->dev_private;
  711. struct drm_display_mode *scan;
  712. int temp_downclock;
  713. temp_downclock = fixed_mode->clock;
  714. list_for_each_entry(scan, &connector->probed_modes, head) {
  715. /*
  716. * If one mode has the same resolution with the fixed_panel
  717. * mode while they have the different refresh rate, it means
  718. * that the reduced downclock is found for the LVDS. In such
  719. * case we can set the different FPx0/1 to dynamically select
  720. * between low and high frequency.
  721. */
  722. if (scan->hdisplay == fixed_mode->hdisplay &&
  723. scan->hsync_start == fixed_mode->hsync_start &&
  724. scan->hsync_end == fixed_mode->hsync_end &&
  725. scan->htotal == fixed_mode->htotal &&
  726. scan->vdisplay == fixed_mode->vdisplay &&
  727. scan->vsync_start == fixed_mode->vsync_start &&
  728. scan->vsync_end == fixed_mode->vsync_end &&
  729. scan->vtotal == fixed_mode->vtotal) {
  730. if (scan->clock < temp_downclock) {
  731. /*
  732. * The downclock is already found. But we
  733. * expect to find the lower downclock.
  734. */
  735. temp_downclock = scan->clock;
  736. }
  737. }
  738. }
  739. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  740. /* We found the downclock for LVDS. */
  741. dev_priv->lvds_downclock_avail = 1;
  742. dev_priv->lvds_downclock = temp_downclock;
  743. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  744. "Normal clock %dKhz, downclock %dKhz\n",
  745. fixed_mode->clock, temp_downclock);
  746. }
  747. }
  748. /*
  749. * Enumerate the child dev array parsed from VBT to check whether
  750. * the LVDS is present.
  751. * If it is present, return 1.
  752. * If it is not present, return false.
  753. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  754. */
  755. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  756. u8 *i2c_pin)
  757. {
  758. struct drm_i915_private *dev_priv = dev->dev_private;
  759. int i;
  760. if (!dev_priv->child_dev_num)
  761. return true;
  762. for (i = 0; i < dev_priv->child_dev_num; i++) {
  763. struct child_device_config *child = dev_priv->child_dev + i;
  764. /* If the device type is not LFP, continue.
  765. * We have to check both the new identifiers as well as the
  766. * old for compatibility with some BIOSes.
  767. */
  768. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  769. child->device_type != DEVICE_TYPE_LFP)
  770. continue;
  771. if (intel_gmbus_is_port_valid(child->i2c_pin))
  772. *i2c_pin = child->i2c_pin;
  773. /* However, we cannot trust the BIOS writers to populate
  774. * the VBT correctly. Since LVDS requires additional
  775. * information from AIM blocks, a non-zero addin offset is
  776. * a good indicator that the LVDS is actually present.
  777. */
  778. if (child->addin_offset)
  779. return true;
  780. /* But even then some BIOS writers perform some black magic
  781. * and instantiate the device without reference to any
  782. * additional data. Trust that if the VBT was written into
  783. * the OpRegion then they have validated the LVDS's existence.
  784. */
  785. if (dev_priv->opregion.vbt)
  786. return true;
  787. }
  788. return false;
  789. }
  790. static bool intel_lvds_supported(struct drm_device *dev)
  791. {
  792. /* With the introduction of the PCH we gained a dedicated
  793. * LVDS presence pin, use it. */
  794. if (HAS_PCH_SPLIT(dev))
  795. return true;
  796. /* Otherwise LVDS was only attached to mobile products,
  797. * except for the inglorious 830gm */
  798. return IS_MOBILE(dev) && !IS_I830(dev);
  799. }
  800. /**
  801. * intel_lvds_init - setup LVDS connectors on this device
  802. * @dev: drm device
  803. *
  804. * Create the connector, register the LVDS DDC bus, and try to figure out what
  805. * modes we can display on the LVDS panel (if present).
  806. */
  807. bool intel_lvds_init(struct drm_device *dev)
  808. {
  809. struct drm_i915_private *dev_priv = dev->dev_private;
  810. struct intel_lvds_encoder *lvds_encoder;
  811. struct intel_encoder *intel_encoder;
  812. struct intel_lvds_connector *lvds_connector;
  813. struct intel_connector *intel_connector;
  814. struct drm_connector *connector;
  815. struct drm_encoder *encoder;
  816. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  817. struct drm_display_mode *fixed_mode = NULL;
  818. struct edid *edid;
  819. struct drm_crtc *crtc;
  820. u32 lvds;
  821. int pipe;
  822. u8 pin;
  823. if (!intel_lvds_supported(dev))
  824. return false;
  825. /* Skip init on machines we know falsely report LVDS */
  826. if (dmi_check_system(intel_no_lvds))
  827. return false;
  828. pin = GMBUS_PORT_PANEL;
  829. if (!lvds_is_present_in_vbt(dev, &pin)) {
  830. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  831. return false;
  832. }
  833. if (HAS_PCH_SPLIT(dev)) {
  834. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  835. return false;
  836. if (dev_priv->edp.support) {
  837. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  838. return false;
  839. }
  840. }
  841. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  842. if (!lvds_encoder)
  843. return false;
  844. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  845. if (!lvds_connector) {
  846. kfree(lvds_encoder);
  847. return false;
  848. }
  849. lvds_encoder->attached_connector = lvds_connector;
  850. if (!HAS_PCH_SPLIT(dev)) {
  851. lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  852. }
  853. intel_encoder = &lvds_encoder->base;
  854. encoder = &intel_encoder->base;
  855. intel_connector = &lvds_connector->base;
  856. connector = &intel_connector->base;
  857. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  858. DRM_MODE_CONNECTOR_LVDS);
  859. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  860. DRM_MODE_ENCODER_LVDS);
  861. intel_encoder->enable = intel_enable_lvds;
  862. intel_encoder->disable = intel_disable_lvds;
  863. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  864. intel_connector->get_hw_state = intel_connector_get_hw_state;
  865. intel_connector_attach_encoder(intel_connector, intel_encoder);
  866. intel_encoder->type = INTEL_OUTPUT_LVDS;
  867. intel_encoder->cloneable = false;
  868. if (HAS_PCH_SPLIT(dev))
  869. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  870. else if (IS_GEN4(dev))
  871. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  872. else
  873. intel_encoder->crtc_mask = (1 << 1);
  874. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  875. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  876. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  877. connector->interlace_allowed = false;
  878. connector->doublescan_allowed = false;
  879. /* create the scaling mode property */
  880. drm_mode_create_scaling_mode_property(dev);
  881. drm_connector_attach_property(&intel_connector->base,
  882. dev->mode_config.scaling_mode_property,
  883. DRM_MODE_SCALE_ASPECT);
  884. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  885. /*
  886. * LVDS discovery:
  887. * 1) check for EDID on DDC
  888. * 2) check for VBT data
  889. * 3) check to see if LVDS is already on
  890. * if none of the above, no panel
  891. * 4) make sure lid is open
  892. * if closed, act like it's not there for now
  893. */
  894. /*
  895. * Attempt to get the fixed panel mode from DDC. Assume that the
  896. * preferred mode is the right one.
  897. */
  898. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  899. if (edid) {
  900. if (drm_add_edid_modes(connector, edid)) {
  901. drm_mode_connector_update_edid_property(connector,
  902. edid);
  903. } else {
  904. kfree(edid);
  905. edid = ERR_PTR(-EINVAL);
  906. }
  907. } else {
  908. edid = ERR_PTR(-ENOENT);
  909. }
  910. lvds_connector->base.edid = edid;
  911. if (IS_ERR_OR_NULL(edid)) {
  912. /* Didn't get an EDID, so
  913. * Set wide sync ranges so we get all modes
  914. * handed to valid_mode for checking
  915. */
  916. connector->display_info.min_vfreq = 0;
  917. connector->display_info.max_vfreq = 200;
  918. connector->display_info.min_hfreq = 0;
  919. connector->display_info.max_hfreq = 200;
  920. }
  921. list_for_each_entry(scan, &connector->probed_modes, head) {
  922. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  923. fixed_mode = drm_mode_duplicate(dev, scan);
  924. intel_find_lvds_downclock(dev, fixed_mode, connector);
  925. goto out;
  926. }
  927. }
  928. /* Failed to get EDID, what about VBT? */
  929. if (dev_priv->lfp_lvds_vbt_mode) {
  930. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  931. if (fixed_mode) {
  932. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  933. goto out;
  934. }
  935. }
  936. /*
  937. * If we didn't get EDID, try checking if the panel is already turned
  938. * on. If so, assume that whatever is currently programmed is the
  939. * correct mode.
  940. */
  941. /* Ironlake: FIXME if still fail, not try pipe mode now */
  942. if (HAS_PCH_SPLIT(dev))
  943. goto failed;
  944. lvds = I915_READ(LVDS);
  945. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  946. crtc = intel_get_crtc_for_pipe(dev, pipe);
  947. if (crtc && (lvds & LVDS_PORT_EN)) {
  948. fixed_mode = intel_crtc_mode_get(dev, crtc);
  949. if (fixed_mode) {
  950. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  951. goto out;
  952. }
  953. }
  954. /* If we still don't have a mode after all that, give up. */
  955. if (!fixed_mode)
  956. goto failed;
  957. out:
  958. /*
  959. * Unlock registers and just
  960. * leave them unlocked
  961. */
  962. if (HAS_PCH_SPLIT(dev)) {
  963. I915_WRITE(PCH_PP_CONTROL,
  964. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  965. } else {
  966. I915_WRITE(PP_CONTROL,
  967. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  968. }
  969. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  970. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  971. DRM_DEBUG_KMS("lid notifier registration failed\n");
  972. lvds_connector->lid_notifier.notifier_call = NULL;
  973. }
  974. drm_sysfs_connector_add(connector);
  975. intel_panel_init(&intel_connector->panel, fixed_mode);
  976. intel_panel_setup_backlight(connector);
  977. return true;
  978. failed:
  979. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  980. drm_connector_cleanup(connector);
  981. drm_encoder_cleanup(encoder);
  982. if (fixed_mode)
  983. drm_mode_destroy(dev, fixed_mode);
  984. kfree(lvds_encoder);
  985. kfree(lvds_connector);
  986. return false;
  987. }