cpu-u8500.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185
  1. /*
  2. * Copyright (C) 2008-2009 ST-Ericsson
  3. *
  4. * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/types.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/amba/bus.h>
  15. #include <linux/irq.h>
  16. #include <linux/gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/io.h>
  19. #include <asm/localtimer.h>
  20. #include <asm/hardware/gic.h>
  21. #include <asm/mach/map.h>
  22. #include <plat/mtu.h>
  23. #include <mach/hardware.h>
  24. #include <mach/setup.h>
  25. #define GPIO_RESOURCE(block) \
  26. { \
  27. .start = U8500_GPIOBANK##block##_BASE, \
  28. .end = U8500_GPIOBANK##block##_BASE + 127, \
  29. .flags = IORESOURCE_MEM, \
  30. }, \
  31. { \
  32. .start = IRQ_GPIO##block, \
  33. .end = IRQ_GPIO##block, \
  34. .flags = IORESOURCE_IRQ, \
  35. }
  36. #define GPIO_DEVICE(block) \
  37. { \
  38. .name = "gpio", \
  39. .id = block, \
  40. .num_resources = 2, \
  41. .resource = &u8500_gpio_resources[block * 2], \
  42. .dev = { \
  43. .platform_data = &u8500_gpio_data[block], \
  44. }, \
  45. }
  46. #define GPIO_DATA(_name, first) \
  47. { \
  48. .name = _name, \
  49. .first_gpio = first, \
  50. .first_irq = NOMADIK_GPIO_TO_IRQ(first), \
  51. }
  52. static struct nmk_gpio_platform_data u8500_gpio_data[] = {
  53. GPIO_DATA("GPIO-0-31", 0),
  54. GPIO_DATA("GPIO-32-63", 32), /* 37..63 not routed to pin */
  55. GPIO_DATA("GPIO-64-95", 64),
  56. GPIO_DATA("GPIO-96-127", 96), /* 97..127 not routed to pin */
  57. GPIO_DATA("GPIO-128-159", 128),
  58. GPIO_DATA("GPIO-160-191", 160), /* 172..191 not routed to pin */
  59. GPIO_DATA("GPIO-192-223", 192),
  60. GPIO_DATA("GPIO-224-255", 224), /* 231..255 not routed to pin */
  61. GPIO_DATA("GPIO-256-288", 256), /* 258..288 not routed to pin */
  62. };
  63. static struct resource u8500_gpio_resources[] = {
  64. GPIO_RESOURCE(0),
  65. GPIO_RESOURCE(1),
  66. GPIO_RESOURCE(2),
  67. GPIO_RESOURCE(3),
  68. GPIO_RESOURCE(4),
  69. GPIO_RESOURCE(5),
  70. GPIO_RESOURCE(6),
  71. GPIO_RESOURCE(7),
  72. GPIO_RESOURCE(8),
  73. };
  74. static struct platform_device u8500_gpio_devs[] = {
  75. GPIO_DEVICE(0),
  76. GPIO_DEVICE(1),
  77. GPIO_DEVICE(2),
  78. GPIO_DEVICE(3),
  79. GPIO_DEVICE(4),
  80. GPIO_DEVICE(5),
  81. GPIO_DEVICE(6),
  82. GPIO_DEVICE(7),
  83. GPIO_DEVICE(8),
  84. };
  85. static struct platform_device *platform_devs[] __initdata = {
  86. &u8500_gpio_devs[0],
  87. &u8500_gpio_devs[1],
  88. &u8500_gpio_devs[2],
  89. &u8500_gpio_devs[3],
  90. &u8500_gpio_devs[4],
  91. &u8500_gpio_devs[5],
  92. &u8500_gpio_devs[6],
  93. &u8500_gpio_devs[7],
  94. &u8500_gpio_devs[8],
  95. };
  96. #define __IO_DEV_DESC(x, sz) { \
  97. .virtual = IO_ADDRESS(x), \
  98. .pfn = __phys_to_pfn(x), \
  99. .length = sz, \
  100. .type = MT_DEVICE, \
  101. }
  102. /* minimum static i/o mapping required to boot U8500 platforms */
  103. static struct map_desc u8500_io_desc[] __initdata = {
  104. __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
  105. __IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),
  106. __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
  107. __IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),
  108. __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
  109. __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
  110. __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
  111. __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
  112. __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
  113. __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
  114. __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
  115. __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
  116. __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
  117. __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
  118. __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
  119. __IO_DEV_DESC(U8500_GPIO5_BASE, SZ_4K),
  120. };
  121. static struct map_desc u8500ed_io_desc[] __initdata = {
  122. __IO_DEV_DESC(U8500_MTU0_BASE_ED, SZ_4K),
  123. __IO_DEV_DESC(U8500_CLKRST7_BASE_ED, SZ_8K),
  124. };
  125. static struct map_desc u8500v1_io_desc[] __initdata = {
  126. __IO_DEV_DESC(U8500_MTU0_BASE_V1, SZ_4K),
  127. };
  128. void __init u8500_map_io(void)
  129. {
  130. iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
  131. if (cpu_is_u8500ed())
  132. iotable_init(u8500ed_io_desc, ARRAY_SIZE(u8500ed_io_desc));
  133. else
  134. iotable_init(u8500v1_io_desc, ARRAY_SIZE(u8500v1_io_desc));
  135. }
  136. void __init u8500_init_irq(void)
  137. {
  138. gic_dist_init(0, __io_address(U8500_GIC_DIST_BASE), 29);
  139. gic_cpu_init(0, __io_address(U8500_GIC_CPU_BASE));
  140. }
  141. /*
  142. * This function is called from the board init
  143. */
  144. void __init u8500_init_devices(void)
  145. {
  146. /* Register the platform devices */
  147. platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
  148. return ;
  149. }
  150. static void __init u8500_timer_init(void)
  151. {
  152. #ifdef CONFIG_LOCAL_TIMERS
  153. /* Setup the local timer base */
  154. twd_base = __io_address(U8500_TWD_BASE);
  155. #endif
  156. /* Setup the MTU base */
  157. if (cpu_is_u8500ed())
  158. mtu_base = __io_address(U8500_MTU0_BASE_ED);
  159. else
  160. mtu_base = __io_address(U8500_MTU0_BASE_V1);
  161. nmdk_timer_init();
  162. }
  163. struct sys_timer u8500_timer = {
  164. .init = u8500_timer_init,
  165. };