intel_lvds.c 31 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. bool is_dual_link;
  48. u32 reg;
  49. struct intel_lvds_connector *attached_connector;
  50. };
  51. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds_encoder, base.base);
  54. }
  55. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  56. {
  57. return container_of(connector, struct intel_lvds_connector, base.base);
  58. }
  59. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  60. enum pipe *pipe)
  61. {
  62. struct drm_device *dev = encoder->base.dev;
  63. struct drm_i915_private *dev_priv = dev->dev_private;
  64. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  65. u32 tmp;
  66. tmp = I915_READ(lvds_encoder->reg);
  67. if (!(tmp & LVDS_PORT_EN))
  68. return false;
  69. if (HAS_PCH_CPT(dev))
  70. *pipe = PORT_TO_PIPE_CPT(tmp);
  71. else
  72. *pipe = PORT_TO_PIPE(tmp);
  73. return true;
  74. }
  75. static void intel_lvds_get_config(struct intel_encoder *encoder,
  76. struct intel_crtc_config *pipe_config)
  77. {
  78. struct drm_device *dev = encoder->base.dev;
  79. struct drm_i915_private *dev_priv = dev->dev_private;
  80. u32 lvds_reg, tmp, flags = 0;
  81. if (HAS_PCH_SPLIT(dev))
  82. lvds_reg = PCH_LVDS;
  83. else
  84. lvds_reg = LVDS;
  85. tmp = I915_READ(lvds_reg);
  86. if (tmp & LVDS_HSYNC_POLARITY)
  87. flags |= DRM_MODE_FLAG_NHSYNC;
  88. else
  89. flags |= DRM_MODE_FLAG_PHSYNC;
  90. if (tmp & LVDS_VSYNC_POLARITY)
  91. flags |= DRM_MODE_FLAG_NVSYNC;
  92. else
  93. flags |= DRM_MODE_FLAG_PVSYNC;
  94. pipe_config->adjusted_mode.flags |= flags;
  95. /* gen2/3 store dither state in pfit control, needs to match */
  96. if (INTEL_INFO(dev)->gen < 4) {
  97. tmp = I915_READ(PFIT_CONTROL);
  98. pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
  99. }
  100. }
  101. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  102. * This is an exception to the general rule that mode_set doesn't turn
  103. * things on.
  104. */
  105. static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  106. {
  107. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  108. struct drm_device *dev = encoder->base.dev;
  109. struct drm_i915_private *dev_priv = dev->dev_private;
  110. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  111. struct drm_display_mode *fixed_mode =
  112. lvds_encoder->attached_connector->base.panel.fixed_mode;
  113. int pipe = intel_crtc->pipe;
  114. u32 temp;
  115. temp = I915_READ(lvds_encoder->reg);
  116. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  117. if (HAS_PCH_CPT(dev)) {
  118. temp &= ~PORT_TRANS_SEL_MASK;
  119. temp |= PORT_TRANS_SEL_CPT(pipe);
  120. } else {
  121. if (pipe == 1) {
  122. temp |= LVDS_PIPEB_SELECT;
  123. } else {
  124. temp &= ~LVDS_PIPEB_SELECT;
  125. }
  126. }
  127. /* set the corresponsding LVDS_BORDER bit */
  128. temp &= ~LVDS_BORDER_ENABLE;
  129. temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
  130. /* Set the B0-B3 data pairs corresponding to whether we're going to
  131. * set the DPLLs for dual-channel mode or not.
  132. */
  133. if (lvds_encoder->is_dual_link)
  134. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  135. else
  136. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  137. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  138. * appropriately here, but we need to look more thoroughly into how
  139. * panels behave in the two modes.
  140. */
  141. /* Set the dithering flag on LVDS as needed, note that there is no
  142. * special lvds dither control bit on pch-split platforms, dithering is
  143. * only controlled through the PIPECONF reg. */
  144. if (INTEL_INFO(dev)->gen == 4) {
  145. /* Bspec wording suggests that LVDS port dithering only exists
  146. * for 18bpp panels. */
  147. if (intel_crtc->config.dither &&
  148. intel_crtc->config.pipe_bpp == 18)
  149. temp |= LVDS_ENABLE_DITHER;
  150. else
  151. temp &= ~LVDS_ENABLE_DITHER;
  152. }
  153. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  154. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  155. temp |= LVDS_HSYNC_POLARITY;
  156. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  157. temp |= LVDS_VSYNC_POLARITY;
  158. I915_WRITE(lvds_encoder->reg, temp);
  159. }
  160. /**
  161. * Sets the power state for the panel.
  162. */
  163. static void intel_enable_lvds(struct intel_encoder *encoder)
  164. {
  165. struct drm_device *dev = encoder->base.dev;
  166. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  167. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  168. struct drm_i915_private *dev_priv = dev->dev_private;
  169. u32 ctl_reg, stat_reg;
  170. if (HAS_PCH_SPLIT(dev)) {
  171. ctl_reg = PCH_PP_CONTROL;
  172. stat_reg = PCH_PP_STATUS;
  173. } else {
  174. ctl_reg = PP_CONTROL;
  175. stat_reg = PP_STATUS;
  176. }
  177. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  178. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  179. POSTING_READ(lvds_encoder->reg);
  180. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  181. DRM_ERROR("timed out waiting for panel to power on\n");
  182. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  183. }
  184. static void intel_disable_lvds(struct intel_encoder *encoder)
  185. {
  186. struct drm_device *dev = encoder->base.dev;
  187. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  188. struct drm_i915_private *dev_priv = dev->dev_private;
  189. u32 ctl_reg, stat_reg;
  190. if (HAS_PCH_SPLIT(dev)) {
  191. ctl_reg = PCH_PP_CONTROL;
  192. stat_reg = PCH_PP_STATUS;
  193. } else {
  194. ctl_reg = PP_CONTROL;
  195. stat_reg = PP_STATUS;
  196. }
  197. intel_panel_disable_backlight(dev);
  198. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  199. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  200. DRM_ERROR("timed out waiting for panel to power off\n");
  201. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  202. POSTING_READ(lvds_encoder->reg);
  203. }
  204. static int intel_lvds_mode_valid(struct drm_connector *connector,
  205. struct drm_display_mode *mode)
  206. {
  207. struct intel_connector *intel_connector = to_intel_connector(connector);
  208. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  209. if (mode->hdisplay > fixed_mode->hdisplay)
  210. return MODE_PANEL;
  211. if (mode->vdisplay > fixed_mode->vdisplay)
  212. return MODE_PANEL;
  213. return MODE_OK;
  214. }
  215. static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
  216. struct intel_crtc_config *pipe_config)
  217. {
  218. struct drm_device *dev = intel_encoder->base.dev;
  219. struct drm_i915_private *dev_priv = dev->dev_private;
  220. struct intel_lvds_encoder *lvds_encoder =
  221. to_lvds_encoder(&intel_encoder->base);
  222. struct intel_connector *intel_connector =
  223. &lvds_encoder->attached_connector->base;
  224. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  225. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  226. unsigned int lvds_bpp;
  227. /* Should never happen!! */
  228. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  229. DRM_ERROR("Can't support LVDS on pipe A\n");
  230. return false;
  231. }
  232. if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
  233. LVDS_A3_POWER_UP)
  234. lvds_bpp = 8*3;
  235. else
  236. lvds_bpp = 6*3;
  237. if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
  238. DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
  239. pipe_config->pipe_bpp, lvds_bpp);
  240. pipe_config->pipe_bpp = lvds_bpp;
  241. }
  242. /*
  243. * We have timings from the BIOS for the panel, put them in
  244. * to the adjusted mode. The CRTC will be set up for this mode,
  245. * with the panel scaling set up to source from the H/VDisplay
  246. * of the original mode.
  247. */
  248. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  249. adjusted_mode);
  250. if (HAS_PCH_SPLIT(dev)) {
  251. pipe_config->has_pch_encoder = true;
  252. intel_pch_panel_fitting(intel_crtc, pipe_config,
  253. intel_connector->panel.fitting_mode);
  254. } else {
  255. intel_gmch_panel_fitting(intel_crtc, pipe_config,
  256. intel_connector->panel.fitting_mode);
  257. }
  258. /*
  259. * XXX: It would be nice to support lower refresh rates on the
  260. * panels to reduce power consumption, and perhaps match the
  261. * user's requested refresh rate.
  262. */
  263. return true;
  264. }
  265. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  266. struct drm_display_mode *mode,
  267. struct drm_display_mode *adjusted_mode)
  268. {
  269. /*
  270. * The LVDS pin pair will already have been turned on in the
  271. * intel_crtc_mode_set since it has a large impact on the DPLL
  272. * settings.
  273. */
  274. }
  275. /**
  276. * Detect the LVDS connection.
  277. *
  278. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  279. * connected and closed means disconnected. We also send hotplug events as
  280. * needed, using lid status notification from the input layer.
  281. */
  282. static enum drm_connector_status
  283. intel_lvds_detect(struct drm_connector *connector, bool force)
  284. {
  285. struct drm_device *dev = connector->dev;
  286. enum drm_connector_status status;
  287. status = intel_panel_detect(dev);
  288. if (status != connector_status_unknown)
  289. return status;
  290. return connector_status_connected;
  291. }
  292. /**
  293. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  294. */
  295. static int intel_lvds_get_modes(struct drm_connector *connector)
  296. {
  297. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  298. struct drm_device *dev = connector->dev;
  299. struct drm_display_mode *mode;
  300. /* use cached edid if we have one */
  301. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  302. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  303. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  304. if (mode == NULL)
  305. return 0;
  306. drm_mode_probed_add(connector, mode);
  307. return 1;
  308. }
  309. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  310. {
  311. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  312. return 1;
  313. }
  314. /* The GPU hangs up on these systems if modeset is performed on LID open */
  315. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  316. {
  317. .callback = intel_no_modeset_on_lid_dmi_callback,
  318. .ident = "Toshiba Tecra A11",
  319. .matches = {
  320. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  321. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  322. },
  323. },
  324. { } /* terminating entry */
  325. };
  326. /*
  327. * Lid events. Note the use of 'modeset':
  328. * - we set it to MODESET_ON_LID_OPEN on lid close,
  329. * and set it to MODESET_DONE on open
  330. * - we use it as a "only once" bit (ie we ignore
  331. * duplicate events where it was already properly set)
  332. * - the suspend/resume paths will set it to
  333. * MODESET_SUSPENDED and ignore the lid open event,
  334. * because they restore the mode ("lid open").
  335. */
  336. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  337. void *unused)
  338. {
  339. struct intel_lvds_connector *lvds_connector =
  340. container_of(nb, struct intel_lvds_connector, lid_notifier);
  341. struct drm_connector *connector = &lvds_connector->base.base;
  342. struct drm_device *dev = connector->dev;
  343. struct drm_i915_private *dev_priv = dev->dev_private;
  344. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  345. return NOTIFY_OK;
  346. mutex_lock(&dev_priv->modeset_restore_lock);
  347. if (dev_priv->modeset_restore == MODESET_SUSPENDED)
  348. goto exit;
  349. /*
  350. * check and update the status of LVDS connector after receiving
  351. * the LID nofication event.
  352. */
  353. connector->status = connector->funcs->detect(connector, false);
  354. /* Don't force modeset on machines where it causes a GPU lockup */
  355. if (dmi_check_system(intel_no_modeset_on_lid))
  356. goto exit;
  357. if (!acpi_lid_open()) {
  358. /* do modeset on next lid open event */
  359. dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
  360. goto exit;
  361. }
  362. if (dev_priv->modeset_restore == MODESET_DONE)
  363. goto exit;
  364. drm_modeset_lock_all(dev);
  365. intel_modeset_setup_hw_state(dev, true);
  366. drm_modeset_unlock_all(dev);
  367. dev_priv->modeset_restore = MODESET_DONE;
  368. exit:
  369. mutex_unlock(&dev_priv->modeset_restore_lock);
  370. return NOTIFY_OK;
  371. }
  372. /**
  373. * intel_lvds_destroy - unregister and free LVDS structures
  374. * @connector: connector to free
  375. *
  376. * Unregister the DDC bus for this connector then free the driver private
  377. * structure.
  378. */
  379. static void intel_lvds_destroy(struct drm_connector *connector)
  380. {
  381. struct intel_lvds_connector *lvds_connector =
  382. to_lvds_connector(connector);
  383. if (lvds_connector->lid_notifier.notifier_call)
  384. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  385. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  386. kfree(lvds_connector->base.edid);
  387. intel_panel_fini(&lvds_connector->base.panel);
  388. drm_sysfs_connector_remove(connector);
  389. drm_connector_cleanup(connector);
  390. kfree(connector);
  391. }
  392. static int intel_lvds_set_property(struct drm_connector *connector,
  393. struct drm_property *property,
  394. uint64_t value)
  395. {
  396. struct intel_connector *intel_connector = to_intel_connector(connector);
  397. struct drm_device *dev = connector->dev;
  398. if (property == dev->mode_config.scaling_mode_property) {
  399. struct drm_crtc *crtc;
  400. if (value == DRM_MODE_SCALE_NONE) {
  401. DRM_DEBUG_KMS("no scaling not supported\n");
  402. return -EINVAL;
  403. }
  404. if (intel_connector->panel.fitting_mode == value) {
  405. /* the LVDS scaling property is not changed */
  406. return 0;
  407. }
  408. intel_connector->panel.fitting_mode = value;
  409. crtc = intel_attached_encoder(connector)->base.crtc;
  410. if (crtc && crtc->enabled) {
  411. /*
  412. * If the CRTC is enabled, the display will be changed
  413. * according to the new panel fitting mode.
  414. */
  415. intel_crtc_restore_mode(crtc);
  416. }
  417. }
  418. return 0;
  419. }
  420. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  421. .mode_set = intel_lvds_mode_set,
  422. };
  423. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  424. .get_modes = intel_lvds_get_modes,
  425. .mode_valid = intel_lvds_mode_valid,
  426. .best_encoder = intel_best_encoder,
  427. };
  428. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  429. .dpms = intel_connector_dpms,
  430. .detect = intel_lvds_detect,
  431. .fill_modes = drm_helper_probe_single_connector_modes,
  432. .set_property = intel_lvds_set_property,
  433. .destroy = intel_lvds_destroy,
  434. };
  435. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  436. .destroy = intel_encoder_destroy,
  437. };
  438. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  439. {
  440. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  441. return 1;
  442. }
  443. /* These systems claim to have LVDS, but really don't */
  444. static const struct dmi_system_id intel_no_lvds[] = {
  445. {
  446. .callback = intel_no_lvds_dmi_callback,
  447. .ident = "Apple Mac Mini (Core series)",
  448. .matches = {
  449. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  450. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  451. },
  452. },
  453. {
  454. .callback = intel_no_lvds_dmi_callback,
  455. .ident = "Apple Mac Mini (Core 2 series)",
  456. .matches = {
  457. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  458. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  459. },
  460. },
  461. {
  462. .callback = intel_no_lvds_dmi_callback,
  463. .ident = "MSI IM-945GSE-A",
  464. .matches = {
  465. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  466. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  467. },
  468. },
  469. {
  470. .callback = intel_no_lvds_dmi_callback,
  471. .ident = "Dell Studio Hybrid",
  472. .matches = {
  473. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  474. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  475. },
  476. },
  477. {
  478. .callback = intel_no_lvds_dmi_callback,
  479. .ident = "Dell OptiPlex FX170",
  480. .matches = {
  481. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  482. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  483. },
  484. },
  485. {
  486. .callback = intel_no_lvds_dmi_callback,
  487. .ident = "AOpen Mini PC",
  488. .matches = {
  489. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  490. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  491. },
  492. },
  493. {
  494. .callback = intel_no_lvds_dmi_callback,
  495. .ident = "AOpen Mini PC MP915",
  496. .matches = {
  497. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  498. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  499. },
  500. },
  501. {
  502. .callback = intel_no_lvds_dmi_callback,
  503. .ident = "AOpen i915GMm-HFS",
  504. .matches = {
  505. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  506. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  507. },
  508. },
  509. {
  510. .callback = intel_no_lvds_dmi_callback,
  511. .ident = "AOpen i45GMx-I",
  512. .matches = {
  513. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  514. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  515. },
  516. },
  517. {
  518. .callback = intel_no_lvds_dmi_callback,
  519. .ident = "Aopen i945GTt-VFA",
  520. .matches = {
  521. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  522. },
  523. },
  524. {
  525. .callback = intel_no_lvds_dmi_callback,
  526. .ident = "Clientron U800",
  527. .matches = {
  528. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  529. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  530. },
  531. },
  532. {
  533. .callback = intel_no_lvds_dmi_callback,
  534. .ident = "Clientron E830",
  535. .matches = {
  536. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  537. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  538. },
  539. },
  540. {
  541. .callback = intel_no_lvds_dmi_callback,
  542. .ident = "Asus EeeBox PC EB1007",
  543. .matches = {
  544. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  545. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  546. },
  547. },
  548. {
  549. .callback = intel_no_lvds_dmi_callback,
  550. .ident = "Asus AT5NM10T-I",
  551. .matches = {
  552. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  553. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  554. },
  555. },
  556. {
  557. .callback = intel_no_lvds_dmi_callback,
  558. .ident = "Hewlett-Packard HP t5740",
  559. .matches = {
  560. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  561. DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  562. },
  563. },
  564. {
  565. .callback = intel_no_lvds_dmi_callback,
  566. .ident = "Hewlett-Packard t5745",
  567. .matches = {
  568. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  569. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  570. },
  571. },
  572. {
  573. .callback = intel_no_lvds_dmi_callback,
  574. .ident = "Hewlett-Packard st5747",
  575. .matches = {
  576. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  577. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  578. },
  579. },
  580. {
  581. .callback = intel_no_lvds_dmi_callback,
  582. .ident = "MSI Wind Box DC500",
  583. .matches = {
  584. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  585. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  586. },
  587. },
  588. {
  589. .callback = intel_no_lvds_dmi_callback,
  590. .ident = "Gigabyte GA-D525TUD",
  591. .matches = {
  592. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  593. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  594. },
  595. },
  596. {
  597. .callback = intel_no_lvds_dmi_callback,
  598. .ident = "Supermicro X7SPA-H",
  599. .matches = {
  600. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  601. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  602. },
  603. },
  604. {
  605. .callback = intel_no_lvds_dmi_callback,
  606. .ident = "Fujitsu Esprimo Q900",
  607. .matches = {
  608. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  609. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  610. },
  611. },
  612. { } /* terminating entry */
  613. };
  614. /**
  615. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  616. * @dev: drm device
  617. * @connector: LVDS connector
  618. *
  619. * Find the reduced downclock for LVDS in EDID.
  620. */
  621. static void intel_find_lvds_downclock(struct drm_device *dev,
  622. struct drm_display_mode *fixed_mode,
  623. struct drm_connector *connector)
  624. {
  625. struct drm_i915_private *dev_priv = dev->dev_private;
  626. struct drm_display_mode *scan;
  627. int temp_downclock;
  628. temp_downclock = fixed_mode->clock;
  629. list_for_each_entry(scan, &connector->probed_modes, head) {
  630. /*
  631. * If one mode has the same resolution with the fixed_panel
  632. * mode while they have the different refresh rate, it means
  633. * that the reduced downclock is found for the LVDS. In such
  634. * case we can set the different FPx0/1 to dynamically select
  635. * between low and high frequency.
  636. */
  637. if (scan->hdisplay == fixed_mode->hdisplay &&
  638. scan->hsync_start == fixed_mode->hsync_start &&
  639. scan->hsync_end == fixed_mode->hsync_end &&
  640. scan->htotal == fixed_mode->htotal &&
  641. scan->vdisplay == fixed_mode->vdisplay &&
  642. scan->vsync_start == fixed_mode->vsync_start &&
  643. scan->vsync_end == fixed_mode->vsync_end &&
  644. scan->vtotal == fixed_mode->vtotal) {
  645. if (scan->clock < temp_downclock) {
  646. /*
  647. * The downclock is already found. But we
  648. * expect to find the lower downclock.
  649. */
  650. temp_downclock = scan->clock;
  651. }
  652. }
  653. }
  654. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  655. /* We found the downclock for LVDS. */
  656. dev_priv->lvds_downclock_avail = 1;
  657. dev_priv->lvds_downclock = temp_downclock;
  658. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  659. "Normal clock %dKhz, downclock %dKhz\n",
  660. fixed_mode->clock, temp_downclock);
  661. }
  662. }
  663. /*
  664. * Enumerate the child dev array parsed from VBT to check whether
  665. * the LVDS is present.
  666. * If it is present, return 1.
  667. * If it is not present, return false.
  668. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  669. */
  670. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  671. u8 *i2c_pin)
  672. {
  673. struct drm_i915_private *dev_priv = dev->dev_private;
  674. int i;
  675. if (!dev_priv->vbt.child_dev_num)
  676. return true;
  677. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  678. struct child_device_config *child = dev_priv->vbt.child_dev + i;
  679. /* If the device type is not LFP, continue.
  680. * We have to check both the new identifiers as well as the
  681. * old for compatibility with some BIOSes.
  682. */
  683. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  684. child->device_type != DEVICE_TYPE_LFP)
  685. continue;
  686. if (intel_gmbus_is_port_valid(child->i2c_pin))
  687. *i2c_pin = child->i2c_pin;
  688. /* However, we cannot trust the BIOS writers to populate
  689. * the VBT correctly. Since LVDS requires additional
  690. * information from AIM blocks, a non-zero addin offset is
  691. * a good indicator that the LVDS is actually present.
  692. */
  693. if (child->addin_offset)
  694. return true;
  695. /* But even then some BIOS writers perform some black magic
  696. * and instantiate the device without reference to any
  697. * additional data. Trust that if the VBT was written into
  698. * the OpRegion then they have validated the LVDS's existence.
  699. */
  700. if (dev_priv->opregion.vbt)
  701. return true;
  702. }
  703. return false;
  704. }
  705. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  706. {
  707. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  708. return 1;
  709. }
  710. static const struct dmi_system_id intel_dual_link_lvds[] = {
  711. {
  712. .callback = intel_dual_link_lvds_callback,
  713. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  714. .matches = {
  715. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  716. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  717. },
  718. },
  719. { } /* terminating entry */
  720. };
  721. bool intel_is_dual_link_lvds(struct drm_device *dev)
  722. {
  723. struct intel_encoder *encoder;
  724. struct intel_lvds_encoder *lvds_encoder;
  725. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  726. base.head) {
  727. if (encoder->type == INTEL_OUTPUT_LVDS) {
  728. lvds_encoder = to_lvds_encoder(&encoder->base);
  729. return lvds_encoder->is_dual_link;
  730. }
  731. }
  732. return false;
  733. }
  734. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  735. {
  736. struct drm_device *dev = lvds_encoder->base.base.dev;
  737. unsigned int val;
  738. struct drm_i915_private *dev_priv = dev->dev_private;
  739. /* use the module option value if specified */
  740. if (i915_lvds_channel_mode > 0)
  741. return i915_lvds_channel_mode == 2;
  742. if (dmi_check_system(intel_dual_link_lvds))
  743. return true;
  744. /* BIOS should set the proper LVDS register value at boot, but
  745. * in reality, it doesn't set the value when the lid is closed;
  746. * we need to check "the value to be set" in VBT when LVDS
  747. * register is uninitialized.
  748. */
  749. val = I915_READ(lvds_encoder->reg);
  750. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  751. val = dev_priv->vbt.bios_lvds_val;
  752. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  753. }
  754. static bool intel_lvds_supported(struct drm_device *dev)
  755. {
  756. /* With the introduction of the PCH we gained a dedicated
  757. * LVDS presence pin, use it. */
  758. if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
  759. return true;
  760. /* Otherwise LVDS was only attached to mobile products,
  761. * except for the inglorious 830gm */
  762. if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
  763. return true;
  764. return false;
  765. }
  766. /**
  767. * intel_lvds_init - setup LVDS connectors on this device
  768. * @dev: drm device
  769. *
  770. * Create the connector, register the LVDS DDC bus, and try to figure out what
  771. * modes we can display on the LVDS panel (if present).
  772. */
  773. void intel_lvds_init(struct drm_device *dev)
  774. {
  775. struct drm_i915_private *dev_priv = dev->dev_private;
  776. struct intel_lvds_encoder *lvds_encoder;
  777. struct intel_encoder *intel_encoder;
  778. struct intel_lvds_connector *lvds_connector;
  779. struct intel_connector *intel_connector;
  780. struct drm_connector *connector;
  781. struct drm_encoder *encoder;
  782. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  783. struct drm_display_mode *fixed_mode = NULL;
  784. struct edid *edid;
  785. struct drm_crtc *crtc;
  786. u32 lvds;
  787. int pipe;
  788. u8 pin;
  789. if (!intel_lvds_supported(dev))
  790. return;
  791. /* Skip init on machines we know falsely report LVDS */
  792. if (dmi_check_system(intel_no_lvds))
  793. return;
  794. pin = GMBUS_PORT_PANEL;
  795. if (!lvds_is_present_in_vbt(dev, &pin)) {
  796. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  797. return;
  798. }
  799. if (HAS_PCH_SPLIT(dev)) {
  800. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  801. return;
  802. if (dev_priv->vbt.edp_support) {
  803. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  804. return;
  805. }
  806. }
  807. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  808. if (!lvds_encoder)
  809. return;
  810. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  811. if (!lvds_connector) {
  812. kfree(lvds_encoder);
  813. return;
  814. }
  815. lvds_encoder->attached_connector = lvds_connector;
  816. intel_encoder = &lvds_encoder->base;
  817. encoder = &intel_encoder->base;
  818. intel_connector = &lvds_connector->base;
  819. connector = &intel_connector->base;
  820. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  821. DRM_MODE_CONNECTOR_LVDS);
  822. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  823. DRM_MODE_ENCODER_LVDS);
  824. intel_encoder->enable = intel_enable_lvds;
  825. intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
  826. intel_encoder->compute_config = intel_lvds_compute_config;
  827. intel_encoder->disable = intel_disable_lvds;
  828. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  829. intel_encoder->get_config = intel_lvds_get_config;
  830. intel_connector->get_hw_state = intel_connector_get_hw_state;
  831. intel_connector_attach_encoder(intel_connector, intel_encoder);
  832. intel_encoder->type = INTEL_OUTPUT_LVDS;
  833. intel_encoder->cloneable = false;
  834. if (HAS_PCH_SPLIT(dev))
  835. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  836. else if (IS_GEN4(dev))
  837. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  838. else
  839. intel_encoder->crtc_mask = (1 << 1);
  840. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  841. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  842. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  843. connector->interlace_allowed = false;
  844. connector->doublescan_allowed = false;
  845. if (HAS_PCH_SPLIT(dev)) {
  846. lvds_encoder->reg = PCH_LVDS;
  847. } else {
  848. lvds_encoder->reg = LVDS;
  849. }
  850. /* create the scaling mode property */
  851. drm_mode_create_scaling_mode_property(dev);
  852. drm_object_attach_property(&connector->base,
  853. dev->mode_config.scaling_mode_property,
  854. DRM_MODE_SCALE_ASPECT);
  855. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  856. /*
  857. * LVDS discovery:
  858. * 1) check for EDID on DDC
  859. * 2) check for VBT data
  860. * 3) check to see if LVDS is already on
  861. * if none of the above, no panel
  862. * 4) make sure lid is open
  863. * if closed, act like it's not there for now
  864. */
  865. /*
  866. * Attempt to get the fixed panel mode from DDC. Assume that the
  867. * preferred mode is the right one.
  868. */
  869. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  870. if (edid) {
  871. if (drm_add_edid_modes(connector, edid)) {
  872. drm_mode_connector_update_edid_property(connector,
  873. edid);
  874. } else {
  875. kfree(edid);
  876. edid = ERR_PTR(-EINVAL);
  877. }
  878. } else {
  879. edid = ERR_PTR(-ENOENT);
  880. }
  881. lvds_connector->base.edid = edid;
  882. if (IS_ERR_OR_NULL(edid)) {
  883. /* Didn't get an EDID, so
  884. * Set wide sync ranges so we get all modes
  885. * handed to valid_mode for checking
  886. */
  887. connector->display_info.min_vfreq = 0;
  888. connector->display_info.max_vfreq = 200;
  889. connector->display_info.min_hfreq = 0;
  890. connector->display_info.max_hfreq = 200;
  891. }
  892. list_for_each_entry(scan, &connector->probed_modes, head) {
  893. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  894. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  895. drm_mode_debug_printmodeline(scan);
  896. fixed_mode = drm_mode_duplicate(dev, scan);
  897. if (fixed_mode) {
  898. intel_find_lvds_downclock(dev, fixed_mode,
  899. connector);
  900. goto out;
  901. }
  902. }
  903. }
  904. /* Failed to get EDID, what about VBT? */
  905. if (dev_priv->vbt.lfp_lvds_vbt_mode) {
  906. DRM_DEBUG_KMS("using mode from VBT: ");
  907. drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
  908. fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
  909. if (fixed_mode) {
  910. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  911. goto out;
  912. }
  913. }
  914. /*
  915. * If we didn't get EDID, try checking if the panel is already turned
  916. * on. If so, assume that whatever is currently programmed is the
  917. * correct mode.
  918. */
  919. /* Ironlake: FIXME if still fail, not try pipe mode now */
  920. if (HAS_PCH_SPLIT(dev))
  921. goto failed;
  922. lvds = I915_READ(LVDS);
  923. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  924. crtc = intel_get_crtc_for_pipe(dev, pipe);
  925. if (crtc && (lvds & LVDS_PORT_EN)) {
  926. fixed_mode = intel_crtc_mode_get(dev, crtc);
  927. if (fixed_mode) {
  928. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  929. drm_mode_debug_printmodeline(fixed_mode);
  930. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  931. goto out;
  932. }
  933. }
  934. /* If we still don't have a mode after all that, give up. */
  935. if (!fixed_mode)
  936. goto failed;
  937. out:
  938. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  939. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  940. lvds_encoder->is_dual_link ? "dual" : "single");
  941. /*
  942. * Unlock registers and just
  943. * leave them unlocked
  944. */
  945. if (HAS_PCH_SPLIT(dev)) {
  946. I915_WRITE(PCH_PP_CONTROL,
  947. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  948. } else {
  949. I915_WRITE(PP_CONTROL,
  950. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  951. }
  952. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  953. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  954. DRM_DEBUG_KMS("lid notifier registration failed\n");
  955. lvds_connector->lid_notifier.notifier_call = NULL;
  956. }
  957. drm_sysfs_connector_add(connector);
  958. intel_panel_init(&intel_connector->panel, fixed_mode);
  959. intel_panel_setup_backlight(connector);
  960. return;
  961. failed:
  962. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  963. drm_connector_cleanup(connector);
  964. drm_encoder_cleanup(encoder);
  965. if (fixed_mode)
  966. drm_mode_destroy(dev, fixed_mode);
  967. kfree(lvds_encoder);
  968. kfree(lvds_connector);
  969. return;
  970. }