hpsa.c 114 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  90. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  91. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  92. {0,}
  93. };
  94. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  95. /* board_id = Subsystem Device ID & Vendor ID
  96. * product = Marketing Name for the board
  97. * access = Address of the struct of function pointers
  98. */
  99. static struct board_type products[] = {
  100. {0x3241103C, "Smart Array P212", &SA5_access},
  101. {0x3243103C, "Smart Array P410", &SA5_access},
  102. {0x3245103C, "Smart Array P410i", &SA5_access},
  103. {0x3247103C, "Smart Array P411", &SA5_access},
  104. {0x3249103C, "Smart Array P812", &SA5_access},
  105. {0x324a103C, "Smart Array P712m", &SA5_access},
  106. {0x324b103C, "Smart Array P711m", &SA5_access},
  107. {0x3250103C, "Smart Array", &SA5_access},
  108. {0x3250113C, "Smart Array", &SA5_access},
  109. {0x3250123C, "Smart Array", &SA5_access},
  110. {0x3250133C, "Smart Array", &SA5_access},
  111. {0x3250143C, "Smart Array", &SA5_access},
  112. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  113. };
  114. static int number_of_controllers;
  115. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  116. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  117. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  118. static void start_io(struct ctlr_info *h);
  119. #ifdef CONFIG_COMPAT
  120. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  121. #endif
  122. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  123. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  124. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  125. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  126. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  127. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  128. int cmd_type);
  129. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  130. static void hpsa_scan_start(struct Scsi_Host *);
  131. static int hpsa_scan_finished(struct Scsi_Host *sh,
  132. unsigned long elapsed_time);
  133. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  134. int qdepth, int reason);
  135. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  136. static int hpsa_slave_alloc(struct scsi_device *sdev);
  137. static void hpsa_slave_destroy(struct scsi_device *sdev);
  138. static ssize_t raid_level_show(struct device *dev,
  139. struct device_attribute *attr, char *buf);
  140. static ssize_t lunid_show(struct device *dev,
  141. struct device_attribute *attr, char *buf);
  142. static ssize_t unique_id_show(struct device *dev,
  143. struct device_attribute *attr, char *buf);
  144. static ssize_t host_show_firmware_revision(struct device *dev,
  145. struct device_attribute *attr, char *buf);
  146. static ssize_t host_show_commands_outstanding(struct device *dev,
  147. struct device_attribute *attr, char *buf);
  148. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  149. static ssize_t host_store_rescan(struct device *dev,
  150. struct device_attribute *attr, const char *buf, size_t count);
  151. static int check_for_unit_attention(struct ctlr_info *h,
  152. struct CommandList *c);
  153. static void check_ioctl_unit_attention(struct ctlr_info *h,
  154. struct CommandList *c);
  155. /* performant mode helper functions */
  156. static void calc_bucket_map(int *bucket, int num_buckets,
  157. int nsgs, int *bucket_map);
  158. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  159. static inline u32 next_command(struct ctlr_info *h);
  160. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  161. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  162. u64 *cfg_offset);
  163. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  164. unsigned long *memory_bar);
  165. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  166. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  167. void __iomem *vaddr, int wait_for_ready);
  168. #define BOARD_NOT_READY 0
  169. #define BOARD_READY 1
  170. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  171. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  172. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  173. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  174. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  175. host_show_firmware_revision, NULL);
  176. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  177. host_show_commands_outstanding, NULL);
  178. static struct device_attribute *hpsa_sdev_attrs[] = {
  179. &dev_attr_raid_level,
  180. &dev_attr_lunid,
  181. &dev_attr_unique_id,
  182. NULL,
  183. };
  184. static struct device_attribute *hpsa_shost_attrs[] = {
  185. &dev_attr_rescan,
  186. &dev_attr_firmware_revision,
  187. &dev_attr_commands_outstanding,
  188. NULL,
  189. };
  190. static struct scsi_host_template hpsa_driver_template = {
  191. .module = THIS_MODULE,
  192. .name = "hpsa",
  193. .proc_name = "hpsa",
  194. .queuecommand = hpsa_scsi_queue_command,
  195. .scan_start = hpsa_scan_start,
  196. .scan_finished = hpsa_scan_finished,
  197. .change_queue_depth = hpsa_change_queue_depth,
  198. .this_id = -1,
  199. .use_clustering = ENABLE_CLUSTERING,
  200. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  201. .ioctl = hpsa_ioctl,
  202. .slave_alloc = hpsa_slave_alloc,
  203. .slave_destroy = hpsa_slave_destroy,
  204. #ifdef CONFIG_COMPAT
  205. .compat_ioctl = hpsa_compat_ioctl,
  206. #endif
  207. .sdev_attrs = hpsa_sdev_attrs,
  208. .shost_attrs = hpsa_shost_attrs,
  209. };
  210. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  211. {
  212. unsigned long *priv = shost_priv(sdev->host);
  213. return (struct ctlr_info *) *priv;
  214. }
  215. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  216. {
  217. unsigned long *priv = shost_priv(sh);
  218. return (struct ctlr_info *) *priv;
  219. }
  220. static int check_for_unit_attention(struct ctlr_info *h,
  221. struct CommandList *c)
  222. {
  223. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  224. return 0;
  225. switch (c->err_info->SenseInfo[12]) {
  226. case STATE_CHANGED:
  227. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  228. "detected, command retried\n", h->ctlr);
  229. break;
  230. case LUN_FAILED:
  231. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  232. "detected, action required\n", h->ctlr);
  233. break;
  234. case REPORT_LUNS_CHANGED:
  235. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  236. "changed, action required\n", h->ctlr);
  237. /*
  238. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  239. */
  240. break;
  241. case POWER_OR_RESET:
  242. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  243. "or device reset detected\n", h->ctlr);
  244. break;
  245. case UNIT_ATTENTION_CLEARED:
  246. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  247. "cleared by another initiator\n", h->ctlr);
  248. break;
  249. default:
  250. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  251. "unit attention detected\n", h->ctlr);
  252. break;
  253. }
  254. return 1;
  255. }
  256. static ssize_t host_store_rescan(struct device *dev,
  257. struct device_attribute *attr,
  258. const char *buf, size_t count)
  259. {
  260. struct ctlr_info *h;
  261. struct Scsi_Host *shost = class_to_shost(dev);
  262. h = shost_to_hba(shost);
  263. hpsa_scan_start(h->scsi_host);
  264. return count;
  265. }
  266. static ssize_t host_show_firmware_revision(struct device *dev,
  267. struct device_attribute *attr, char *buf)
  268. {
  269. struct ctlr_info *h;
  270. struct Scsi_Host *shost = class_to_shost(dev);
  271. unsigned char *fwrev;
  272. h = shost_to_hba(shost);
  273. if (!h->hba_inquiry_data)
  274. return 0;
  275. fwrev = &h->hba_inquiry_data[32];
  276. return snprintf(buf, 20, "%c%c%c%c\n",
  277. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  278. }
  279. static ssize_t host_show_commands_outstanding(struct device *dev,
  280. struct device_attribute *attr, char *buf)
  281. {
  282. struct Scsi_Host *shost = class_to_shost(dev);
  283. struct ctlr_info *h = shost_to_hba(shost);
  284. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  285. }
  286. /* Enqueuing and dequeuing functions for cmdlists. */
  287. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  288. {
  289. hlist_add_head(&c->list, list);
  290. }
  291. static inline u32 next_command(struct ctlr_info *h)
  292. {
  293. u32 a;
  294. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  295. return h->access.command_completed(h);
  296. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  297. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  298. (h->reply_pool_head)++;
  299. h->commands_outstanding--;
  300. } else {
  301. a = FIFO_EMPTY;
  302. }
  303. /* Check for wraparound */
  304. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  305. h->reply_pool_head = h->reply_pool;
  306. h->reply_pool_wraparound ^= 1;
  307. }
  308. return a;
  309. }
  310. /* set_performant_mode: Modify the tag for cciss performant
  311. * set bit 0 for pull model, bits 3-1 for block fetch
  312. * register number
  313. */
  314. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  315. {
  316. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  317. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  318. }
  319. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  320. struct CommandList *c)
  321. {
  322. unsigned long flags;
  323. set_performant_mode(h, c);
  324. spin_lock_irqsave(&h->lock, flags);
  325. addQ(&h->reqQ, c);
  326. h->Qdepth++;
  327. start_io(h);
  328. spin_unlock_irqrestore(&h->lock, flags);
  329. }
  330. static inline void removeQ(struct CommandList *c)
  331. {
  332. if (WARN_ON(hlist_unhashed(&c->list)))
  333. return;
  334. hlist_del_init(&c->list);
  335. }
  336. static inline int is_hba_lunid(unsigned char scsi3addr[])
  337. {
  338. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  339. }
  340. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  341. {
  342. return (scsi3addr[3] & 0xC0) == 0x40;
  343. }
  344. static inline int is_scsi_rev_5(struct ctlr_info *h)
  345. {
  346. if (!h->hba_inquiry_data)
  347. return 0;
  348. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  349. return 1;
  350. return 0;
  351. }
  352. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  353. "UNKNOWN"
  354. };
  355. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  356. static ssize_t raid_level_show(struct device *dev,
  357. struct device_attribute *attr, char *buf)
  358. {
  359. ssize_t l = 0;
  360. unsigned char rlevel;
  361. struct ctlr_info *h;
  362. struct scsi_device *sdev;
  363. struct hpsa_scsi_dev_t *hdev;
  364. unsigned long flags;
  365. sdev = to_scsi_device(dev);
  366. h = sdev_to_hba(sdev);
  367. spin_lock_irqsave(&h->lock, flags);
  368. hdev = sdev->hostdata;
  369. if (!hdev) {
  370. spin_unlock_irqrestore(&h->lock, flags);
  371. return -ENODEV;
  372. }
  373. /* Is this even a logical drive? */
  374. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  375. spin_unlock_irqrestore(&h->lock, flags);
  376. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  377. return l;
  378. }
  379. rlevel = hdev->raid_level;
  380. spin_unlock_irqrestore(&h->lock, flags);
  381. if (rlevel > RAID_UNKNOWN)
  382. rlevel = RAID_UNKNOWN;
  383. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  384. return l;
  385. }
  386. static ssize_t lunid_show(struct device *dev,
  387. struct device_attribute *attr, char *buf)
  388. {
  389. struct ctlr_info *h;
  390. struct scsi_device *sdev;
  391. struct hpsa_scsi_dev_t *hdev;
  392. unsigned long flags;
  393. unsigned char lunid[8];
  394. sdev = to_scsi_device(dev);
  395. h = sdev_to_hba(sdev);
  396. spin_lock_irqsave(&h->lock, flags);
  397. hdev = sdev->hostdata;
  398. if (!hdev) {
  399. spin_unlock_irqrestore(&h->lock, flags);
  400. return -ENODEV;
  401. }
  402. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  403. spin_unlock_irqrestore(&h->lock, flags);
  404. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  405. lunid[0], lunid[1], lunid[2], lunid[3],
  406. lunid[4], lunid[5], lunid[6], lunid[7]);
  407. }
  408. static ssize_t unique_id_show(struct device *dev,
  409. struct device_attribute *attr, char *buf)
  410. {
  411. struct ctlr_info *h;
  412. struct scsi_device *sdev;
  413. struct hpsa_scsi_dev_t *hdev;
  414. unsigned long flags;
  415. unsigned char sn[16];
  416. sdev = to_scsi_device(dev);
  417. h = sdev_to_hba(sdev);
  418. spin_lock_irqsave(&h->lock, flags);
  419. hdev = sdev->hostdata;
  420. if (!hdev) {
  421. spin_unlock_irqrestore(&h->lock, flags);
  422. return -ENODEV;
  423. }
  424. memcpy(sn, hdev->device_id, sizeof(sn));
  425. spin_unlock_irqrestore(&h->lock, flags);
  426. return snprintf(buf, 16 * 2 + 2,
  427. "%02X%02X%02X%02X%02X%02X%02X%02X"
  428. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  429. sn[0], sn[1], sn[2], sn[3],
  430. sn[4], sn[5], sn[6], sn[7],
  431. sn[8], sn[9], sn[10], sn[11],
  432. sn[12], sn[13], sn[14], sn[15]);
  433. }
  434. static int hpsa_find_target_lun(struct ctlr_info *h,
  435. unsigned char scsi3addr[], int bus, int *target, int *lun)
  436. {
  437. /* finds an unused bus, target, lun for a new physical device
  438. * assumes h->devlock is held
  439. */
  440. int i, found = 0;
  441. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  442. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  443. for (i = 0; i < h->ndevices; i++) {
  444. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  445. set_bit(h->dev[i]->target, lun_taken);
  446. }
  447. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  448. if (!test_bit(i, lun_taken)) {
  449. /* *bus = 1; */
  450. *target = i;
  451. *lun = 0;
  452. found = 1;
  453. break;
  454. }
  455. }
  456. return !found;
  457. }
  458. /* Add an entry into h->dev[] array. */
  459. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  460. struct hpsa_scsi_dev_t *device,
  461. struct hpsa_scsi_dev_t *added[], int *nadded)
  462. {
  463. /* assumes h->devlock is held */
  464. int n = h->ndevices;
  465. int i;
  466. unsigned char addr1[8], addr2[8];
  467. struct hpsa_scsi_dev_t *sd;
  468. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  469. dev_err(&h->pdev->dev, "too many devices, some will be "
  470. "inaccessible.\n");
  471. return -1;
  472. }
  473. /* physical devices do not have lun or target assigned until now. */
  474. if (device->lun != -1)
  475. /* Logical device, lun is already assigned. */
  476. goto lun_assigned;
  477. /* If this device a non-zero lun of a multi-lun device
  478. * byte 4 of the 8-byte LUN addr will contain the logical
  479. * unit no, zero otherise.
  480. */
  481. if (device->scsi3addr[4] == 0) {
  482. /* This is not a non-zero lun of a multi-lun device */
  483. if (hpsa_find_target_lun(h, device->scsi3addr,
  484. device->bus, &device->target, &device->lun) != 0)
  485. return -1;
  486. goto lun_assigned;
  487. }
  488. /* This is a non-zero lun of a multi-lun device.
  489. * Search through our list and find the device which
  490. * has the same 8 byte LUN address, excepting byte 4.
  491. * Assign the same bus and target for this new LUN.
  492. * Use the logical unit number from the firmware.
  493. */
  494. memcpy(addr1, device->scsi3addr, 8);
  495. addr1[4] = 0;
  496. for (i = 0; i < n; i++) {
  497. sd = h->dev[i];
  498. memcpy(addr2, sd->scsi3addr, 8);
  499. addr2[4] = 0;
  500. /* differ only in byte 4? */
  501. if (memcmp(addr1, addr2, 8) == 0) {
  502. device->bus = sd->bus;
  503. device->target = sd->target;
  504. device->lun = device->scsi3addr[4];
  505. break;
  506. }
  507. }
  508. if (device->lun == -1) {
  509. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  510. " suspect firmware bug or unsupported hardware "
  511. "configuration.\n");
  512. return -1;
  513. }
  514. lun_assigned:
  515. h->dev[n] = device;
  516. h->ndevices++;
  517. added[*nadded] = device;
  518. (*nadded)++;
  519. /* initially, (before registering with scsi layer) we don't
  520. * know our hostno and we don't want to print anything first
  521. * time anyway (the scsi layer's inquiries will show that info)
  522. */
  523. /* if (hostno != -1) */
  524. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  525. scsi_device_type(device->devtype), hostno,
  526. device->bus, device->target, device->lun);
  527. return 0;
  528. }
  529. /* Replace an entry from h->dev[] array. */
  530. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  531. int entry, struct hpsa_scsi_dev_t *new_entry,
  532. struct hpsa_scsi_dev_t *added[], int *nadded,
  533. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  534. {
  535. /* assumes h->devlock is held */
  536. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  537. removed[*nremoved] = h->dev[entry];
  538. (*nremoved)++;
  539. h->dev[entry] = new_entry;
  540. added[*nadded] = new_entry;
  541. (*nadded)++;
  542. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  543. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  544. new_entry->target, new_entry->lun);
  545. }
  546. /* Remove an entry from h->dev[] array. */
  547. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  548. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  549. {
  550. /* assumes h->devlock is held */
  551. int i;
  552. struct hpsa_scsi_dev_t *sd;
  553. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  554. sd = h->dev[entry];
  555. removed[*nremoved] = h->dev[entry];
  556. (*nremoved)++;
  557. for (i = entry; i < h->ndevices-1; i++)
  558. h->dev[i] = h->dev[i+1];
  559. h->ndevices--;
  560. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  561. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  562. sd->lun);
  563. }
  564. #define SCSI3ADDR_EQ(a, b) ( \
  565. (a)[7] == (b)[7] && \
  566. (a)[6] == (b)[6] && \
  567. (a)[5] == (b)[5] && \
  568. (a)[4] == (b)[4] && \
  569. (a)[3] == (b)[3] && \
  570. (a)[2] == (b)[2] && \
  571. (a)[1] == (b)[1] && \
  572. (a)[0] == (b)[0])
  573. static void fixup_botched_add(struct ctlr_info *h,
  574. struct hpsa_scsi_dev_t *added)
  575. {
  576. /* called when scsi_add_device fails in order to re-adjust
  577. * h->dev[] to match the mid layer's view.
  578. */
  579. unsigned long flags;
  580. int i, j;
  581. spin_lock_irqsave(&h->lock, flags);
  582. for (i = 0; i < h->ndevices; i++) {
  583. if (h->dev[i] == added) {
  584. for (j = i; j < h->ndevices-1; j++)
  585. h->dev[j] = h->dev[j+1];
  586. h->ndevices--;
  587. break;
  588. }
  589. }
  590. spin_unlock_irqrestore(&h->lock, flags);
  591. kfree(added);
  592. }
  593. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  594. struct hpsa_scsi_dev_t *dev2)
  595. {
  596. /* we compare everything except lun and target as these
  597. * are not yet assigned. Compare parts likely
  598. * to differ first
  599. */
  600. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  601. sizeof(dev1->scsi3addr)) != 0)
  602. return 0;
  603. if (memcmp(dev1->device_id, dev2->device_id,
  604. sizeof(dev1->device_id)) != 0)
  605. return 0;
  606. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  607. return 0;
  608. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  609. return 0;
  610. if (dev1->devtype != dev2->devtype)
  611. return 0;
  612. if (dev1->bus != dev2->bus)
  613. return 0;
  614. return 1;
  615. }
  616. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  617. * and return needle location in *index. If scsi3addr matches, but not
  618. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  619. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  620. */
  621. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  622. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  623. int *index)
  624. {
  625. int i;
  626. #define DEVICE_NOT_FOUND 0
  627. #define DEVICE_CHANGED 1
  628. #define DEVICE_SAME 2
  629. for (i = 0; i < haystack_size; i++) {
  630. if (haystack[i] == NULL) /* previously removed. */
  631. continue;
  632. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  633. *index = i;
  634. if (device_is_the_same(needle, haystack[i]))
  635. return DEVICE_SAME;
  636. else
  637. return DEVICE_CHANGED;
  638. }
  639. }
  640. *index = -1;
  641. return DEVICE_NOT_FOUND;
  642. }
  643. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  644. struct hpsa_scsi_dev_t *sd[], int nsds)
  645. {
  646. /* sd contains scsi3 addresses and devtypes, and inquiry
  647. * data. This function takes what's in sd to be the current
  648. * reality and updates h->dev[] to reflect that reality.
  649. */
  650. int i, entry, device_change, changes = 0;
  651. struct hpsa_scsi_dev_t *csd;
  652. unsigned long flags;
  653. struct hpsa_scsi_dev_t **added, **removed;
  654. int nadded, nremoved;
  655. struct Scsi_Host *sh = NULL;
  656. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  657. GFP_KERNEL);
  658. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  659. GFP_KERNEL);
  660. if (!added || !removed) {
  661. dev_warn(&h->pdev->dev, "out of memory in "
  662. "adjust_hpsa_scsi_table\n");
  663. goto free_and_out;
  664. }
  665. spin_lock_irqsave(&h->devlock, flags);
  666. /* find any devices in h->dev[] that are not in
  667. * sd[] and remove them from h->dev[], and for any
  668. * devices which have changed, remove the old device
  669. * info and add the new device info.
  670. */
  671. i = 0;
  672. nremoved = 0;
  673. nadded = 0;
  674. while (i < h->ndevices) {
  675. csd = h->dev[i];
  676. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  677. if (device_change == DEVICE_NOT_FOUND) {
  678. changes++;
  679. hpsa_scsi_remove_entry(h, hostno, i,
  680. removed, &nremoved);
  681. continue; /* remove ^^^, hence i not incremented */
  682. } else if (device_change == DEVICE_CHANGED) {
  683. changes++;
  684. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  685. added, &nadded, removed, &nremoved);
  686. /* Set it to NULL to prevent it from being freed
  687. * at the bottom of hpsa_update_scsi_devices()
  688. */
  689. sd[entry] = NULL;
  690. }
  691. i++;
  692. }
  693. /* Now, make sure every device listed in sd[] is also
  694. * listed in h->dev[], adding them if they aren't found
  695. */
  696. for (i = 0; i < nsds; i++) {
  697. if (!sd[i]) /* if already added above. */
  698. continue;
  699. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  700. h->ndevices, &entry);
  701. if (device_change == DEVICE_NOT_FOUND) {
  702. changes++;
  703. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  704. added, &nadded) != 0)
  705. break;
  706. sd[i] = NULL; /* prevent from being freed later. */
  707. } else if (device_change == DEVICE_CHANGED) {
  708. /* should never happen... */
  709. changes++;
  710. dev_warn(&h->pdev->dev,
  711. "device unexpectedly changed.\n");
  712. /* but if it does happen, we just ignore that device */
  713. }
  714. }
  715. spin_unlock_irqrestore(&h->devlock, flags);
  716. /* Don't notify scsi mid layer of any changes the first time through
  717. * (or if there are no changes) scsi_scan_host will do it later the
  718. * first time through.
  719. */
  720. if (hostno == -1 || !changes)
  721. goto free_and_out;
  722. sh = h->scsi_host;
  723. /* Notify scsi mid layer of any removed devices */
  724. for (i = 0; i < nremoved; i++) {
  725. struct scsi_device *sdev =
  726. scsi_device_lookup(sh, removed[i]->bus,
  727. removed[i]->target, removed[i]->lun);
  728. if (sdev != NULL) {
  729. scsi_remove_device(sdev);
  730. scsi_device_put(sdev);
  731. } else {
  732. /* We don't expect to get here.
  733. * future cmds to this device will get selection
  734. * timeout as if the device was gone.
  735. */
  736. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  737. " for removal.", hostno, removed[i]->bus,
  738. removed[i]->target, removed[i]->lun);
  739. }
  740. kfree(removed[i]);
  741. removed[i] = NULL;
  742. }
  743. /* Notify scsi mid layer of any added devices */
  744. for (i = 0; i < nadded; i++) {
  745. if (scsi_add_device(sh, added[i]->bus,
  746. added[i]->target, added[i]->lun) == 0)
  747. continue;
  748. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  749. "device not added.\n", hostno, added[i]->bus,
  750. added[i]->target, added[i]->lun);
  751. /* now we have to remove it from h->dev,
  752. * since it didn't get added to scsi mid layer
  753. */
  754. fixup_botched_add(h, added[i]);
  755. }
  756. free_and_out:
  757. kfree(added);
  758. kfree(removed);
  759. }
  760. /*
  761. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  762. * Assume's h->devlock is held.
  763. */
  764. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  765. int bus, int target, int lun)
  766. {
  767. int i;
  768. struct hpsa_scsi_dev_t *sd;
  769. for (i = 0; i < h->ndevices; i++) {
  770. sd = h->dev[i];
  771. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  772. return sd;
  773. }
  774. return NULL;
  775. }
  776. /* link sdev->hostdata to our per-device structure. */
  777. static int hpsa_slave_alloc(struct scsi_device *sdev)
  778. {
  779. struct hpsa_scsi_dev_t *sd;
  780. unsigned long flags;
  781. struct ctlr_info *h;
  782. h = sdev_to_hba(sdev);
  783. spin_lock_irqsave(&h->devlock, flags);
  784. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  785. sdev_id(sdev), sdev->lun);
  786. if (sd != NULL)
  787. sdev->hostdata = sd;
  788. spin_unlock_irqrestore(&h->devlock, flags);
  789. return 0;
  790. }
  791. static void hpsa_slave_destroy(struct scsi_device *sdev)
  792. {
  793. /* nothing to do. */
  794. }
  795. static void hpsa_scsi_setup(struct ctlr_info *h)
  796. {
  797. h->ndevices = 0;
  798. h->scsi_host = NULL;
  799. spin_lock_init(&h->devlock);
  800. }
  801. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  802. {
  803. int i;
  804. if (!h->cmd_sg_list)
  805. return;
  806. for (i = 0; i < h->nr_cmds; i++) {
  807. kfree(h->cmd_sg_list[i]);
  808. h->cmd_sg_list[i] = NULL;
  809. }
  810. kfree(h->cmd_sg_list);
  811. h->cmd_sg_list = NULL;
  812. }
  813. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  814. {
  815. int i;
  816. if (h->chainsize <= 0)
  817. return 0;
  818. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  819. GFP_KERNEL);
  820. if (!h->cmd_sg_list)
  821. return -ENOMEM;
  822. for (i = 0; i < h->nr_cmds; i++) {
  823. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  824. h->chainsize, GFP_KERNEL);
  825. if (!h->cmd_sg_list[i])
  826. goto clean;
  827. }
  828. return 0;
  829. clean:
  830. hpsa_free_sg_chain_blocks(h);
  831. return -ENOMEM;
  832. }
  833. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  834. struct CommandList *c)
  835. {
  836. struct SGDescriptor *chain_sg, *chain_block;
  837. u64 temp64;
  838. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  839. chain_block = h->cmd_sg_list[c->cmdindex];
  840. chain_sg->Ext = HPSA_SG_CHAIN;
  841. chain_sg->Len = sizeof(*chain_sg) *
  842. (c->Header.SGTotal - h->max_cmd_sg_entries);
  843. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  844. PCI_DMA_TODEVICE);
  845. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  846. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  847. }
  848. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  849. struct CommandList *c)
  850. {
  851. struct SGDescriptor *chain_sg;
  852. union u64bit temp64;
  853. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  854. return;
  855. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  856. temp64.val32.lower = chain_sg->Addr.lower;
  857. temp64.val32.upper = chain_sg->Addr.upper;
  858. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  859. }
  860. static void complete_scsi_command(struct CommandList *cp,
  861. int timeout, u32 tag)
  862. {
  863. struct scsi_cmnd *cmd;
  864. struct ctlr_info *h;
  865. struct ErrorInfo *ei;
  866. unsigned char sense_key;
  867. unsigned char asc; /* additional sense code */
  868. unsigned char ascq; /* additional sense code qualifier */
  869. ei = cp->err_info;
  870. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  871. h = cp->h;
  872. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  873. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  874. hpsa_unmap_sg_chain_block(h, cp);
  875. cmd->result = (DID_OK << 16); /* host byte */
  876. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  877. cmd->result |= ei->ScsiStatus;
  878. /* copy the sense data whether we need to or not. */
  879. memcpy(cmd->sense_buffer, ei->SenseInfo,
  880. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  881. SCSI_SENSE_BUFFERSIZE :
  882. ei->SenseLen);
  883. scsi_set_resid(cmd, ei->ResidualCnt);
  884. if (ei->CommandStatus == 0) {
  885. cmd->scsi_done(cmd);
  886. cmd_free(h, cp);
  887. return;
  888. }
  889. /* an error has occurred */
  890. switch (ei->CommandStatus) {
  891. case CMD_TARGET_STATUS:
  892. if (ei->ScsiStatus) {
  893. /* Get sense key */
  894. sense_key = 0xf & ei->SenseInfo[2];
  895. /* Get additional sense code */
  896. asc = ei->SenseInfo[12];
  897. /* Get addition sense code qualifier */
  898. ascq = ei->SenseInfo[13];
  899. }
  900. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  901. if (check_for_unit_attention(h, cp)) {
  902. cmd->result = DID_SOFT_ERROR << 16;
  903. break;
  904. }
  905. if (sense_key == ILLEGAL_REQUEST) {
  906. /*
  907. * SCSI REPORT_LUNS is commonly unsupported on
  908. * Smart Array. Suppress noisy complaint.
  909. */
  910. if (cp->Request.CDB[0] == REPORT_LUNS)
  911. break;
  912. /* If ASC/ASCQ indicate Logical Unit
  913. * Not Supported condition,
  914. */
  915. if ((asc == 0x25) && (ascq == 0x0)) {
  916. dev_warn(&h->pdev->dev, "cp %p "
  917. "has check condition\n", cp);
  918. break;
  919. }
  920. }
  921. if (sense_key == NOT_READY) {
  922. /* If Sense is Not Ready, Logical Unit
  923. * Not ready, Manual Intervention
  924. * required
  925. */
  926. if ((asc == 0x04) && (ascq == 0x03)) {
  927. dev_warn(&h->pdev->dev, "cp %p "
  928. "has check condition: unit "
  929. "not ready, manual "
  930. "intervention required\n", cp);
  931. break;
  932. }
  933. }
  934. if (sense_key == ABORTED_COMMAND) {
  935. /* Aborted command is retryable */
  936. dev_warn(&h->pdev->dev, "cp %p "
  937. "has check condition: aborted command: "
  938. "ASC: 0x%x, ASCQ: 0x%x\n",
  939. cp, asc, ascq);
  940. cmd->result = DID_SOFT_ERROR << 16;
  941. break;
  942. }
  943. /* Must be some other type of check condition */
  944. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  945. "unknown type: "
  946. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  947. "Returning result: 0x%x, "
  948. "cmd=[%02x %02x %02x %02x %02x "
  949. "%02x %02x %02x %02x %02x %02x "
  950. "%02x %02x %02x %02x %02x]\n",
  951. cp, sense_key, asc, ascq,
  952. cmd->result,
  953. cmd->cmnd[0], cmd->cmnd[1],
  954. cmd->cmnd[2], cmd->cmnd[3],
  955. cmd->cmnd[4], cmd->cmnd[5],
  956. cmd->cmnd[6], cmd->cmnd[7],
  957. cmd->cmnd[8], cmd->cmnd[9],
  958. cmd->cmnd[10], cmd->cmnd[11],
  959. cmd->cmnd[12], cmd->cmnd[13],
  960. cmd->cmnd[14], cmd->cmnd[15]);
  961. break;
  962. }
  963. /* Problem was not a check condition
  964. * Pass it up to the upper layers...
  965. */
  966. if (ei->ScsiStatus) {
  967. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  968. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  969. "Returning result: 0x%x\n",
  970. cp, ei->ScsiStatus,
  971. sense_key, asc, ascq,
  972. cmd->result);
  973. } else { /* scsi status is zero??? How??? */
  974. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  975. "Returning no connection.\n", cp),
  976. /* Ordinarily, this case should never happen,
  977. * but there is a bug in some released firmware
  978. * revisions that allows it to happen if, for
  979. * example, a 4100 backplane loses power and
  980. * the tape drive is in it. We assume that
  981. * it's a fatal error of some kind because we
  982. * can't show that it wasn't. We will make it
  983. * look like selection timeout since that is
  984. * the most common reason for this to occur,
  985. * and it's severe enough.
  986. */
  987. cmd->result = DID_NO_CONNECT << 16;
  988. }
  989. break;
  990. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  991. break;
  992. case CMD_DATA_OVERRUN:
  993. dev_warn(&h->pdev->dev, "cp %p has"
  994. " completed with data overrun "
  995. "reported\n", cp);
  996. break;
  997. case CMD_INVALID: {
  998. /* print_bytes(cp, sizeof(*cp), 1, 0);
  999. print_cmd(cp); */
  1000. /* We get CMD_INVALID if you address a non-existent device
  1001. * instead of a selection timeout (no response). You will
  1002. * see this if you yank out a drive, then try to access it.
  1003. * This is kind of a shame because it means that any other
  1004. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1005. * missing target. */
  1006. cmd->result = DID_NO_CONNECT << 16;
  1007. }
  1008. break;
  1009. case CMD_PROTOCOL_ERR:
  1010. dev_warn(&h->pdev->dev, "cp %p has "
  1011. "protocol error \n", cp);
  1012. break;
  1013. case CMD_HARDWARE_ERR:
  1014. cmd->result = DID_ERROR << 16;
  1015. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1016. break;
  1017. case CMD_CONNECTION_LOST:
  1018. cmd->result = DID_ERROR << 16;
  1019. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1020. break;
  1021. case CMD_ABORTED:
  1022. cmd->result = DID_ABORT << 16;
  1023. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1024. cp, ei->ScsiStatus);
  1025. break;
  1026. case CMD_ABORT_FAILED:
  1027. cmd->result = DID_ERROR << 16;
  1028. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1029. break;
  1030. case CMD_UNSOLICITED_ABORT:
  1031. cmd->result = DID_RESET << 16;
  1032. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1033. "abort\n", cp);
  1034. break;
  1035. case CMD_TIMEOUT:
  1036. cmd->result = DID_TIME_OUT << 16;
  1037. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1038. break;
  1039. default:
  1040. cmd->result = DID_ERROR << 16;
  1041. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1042. cp, ei->CommandStatus);
  1043. }
  1044. cmd->scsi_done(cmd);
  1045. cmd_free(h, cp);
  1046. }
  1047. static int hpsa_scsi_detect(struct ctlr_info *h)
  1048. {
  1049. struct Scsi_Host *sh;
  1050. int error;
  1051. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1052. if (sh == NULL)
  1053. goto fail;
  1054. sh->io_port = 0;
  1055. sh->n_io_port = 0;
  1056. sh->this_id = -1;
  1057. sh->max_channel = 3;
  1058. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1059. sh->max_lun = HPSA_MAX_LUN;
  1060. sh->max_id = HPSA_MAX_LUN;
  1061. sh->can_queue = h->nr_cmds;
  1062. sh->cmd_per_lun = h->nr_cmds;
  1063. sh->sg_tablesize = h->maxsgentries;
  1064. h->scsi_host = sh;
  1065. sh->hostdata[0] = (unsigned long) h;
  1066. sh->irq = h->intr[PERF_MODE_INT];
  1067. sh->unique_id = sh->irq;
  1068. error = scsi_add_host(sh, &h->pdev->dev);
  1069. if (error)
  1070. goto fail_host_put;
  1071. scsi_scan_host(sh);
  1072. return 0;
  1073. fail_host_put:
  1074. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1075. " failed for controller %d\n", h->ctlr);
  1076. scsi_host_put(sh);
  1077. return error;
  1078. fail:
  1079. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1080. " failed for controller %d\n", h->ctlr);
  1081. return -ENOMEM;
  1082. }
  1083. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1084. struct CommandList *c, int sg_used, int data_direction)
  1085. {
  1086. int i;
  1087. union u64bit addr64;
  1088. for (i = 0; i < sg_used; i++) {
  1089. addr64.val32.lower = c->SG[i].Addr.lower;
  1090. addr64.val32.upper = c->SG[i].Addr.upper;
  1091. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1092. data_direction);
  1093. }
  1094. }
  1095. static void hpsa_map_one(struct pci_dev *pdev,
  1096. struct CommandList *cp,
  1097. unsigned char *buf,
  1098. size_t buflen,
  1099. int data_direction)
  1100. {
  1101. u64 addr64;
  1102. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1103. cp->Header.SGList = 0;
  1104. cp->Header.SGTotal = 0;
  1105. return;
  1106. }
  1107. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1108. cp->SG[0].Addr.lower =
  1109. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1110. cp->SG[0].Addr.upper =
  1111. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1112. cp->SG[0].Len = buflen;
  1113. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1114. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1115. }
  1116. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1117. struct CommandList *c)
  1118. {
  1119. DECLARE_COMPLETION_ONSTACK(wait);
  1120. c->waiting = &wait;
  1121. enqueue_cmd_and_start_io(h, c);
  1122. wait_for_completion(&wait);
  1123. }
  1124. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1125. struct CommandList *c, int data_direction)
  1126. {
  1127. int retry_count = 0;
  1128. do {
  1129. memset(c->err_info, 0, sizeof(c->err_info));
  1130. hpsa_scsi_do_simple_cmd_core(h, c);
  1131. retry_count++;
  1132. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1133. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1134. }
  1135. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1136. {
  1137. struct ErrorInfo *ei;
  1138. struct device *d = &cp->h->pdev->dev;
  1139. ei = cp->err_info;
  1140. switch (ei->CommandStatus) {
  1141. case CMD_TARGET_STATUS:
  1142. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1143. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1144. ei->ScsiStatus);
  1145. if (ei->ScsiStatus == 0)
  1146. dev_warn(d, "SCSI status is abnormally zero. "
  1147. "(probably indicates selection timeout "
  1148. "reported incorrectly due to a known "
  1149. "firmware bug, circa July, 2001.)\n");
  1150. break;
  1151. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1152. dev_info(d, "UNDERRUN\n");
  1153. break;
  1154. case CMD_DATA_OVERRUN:
  1155. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1156. break;
  1157. case CMD_INVALID: {
  1158. /* controller unfortunately reports SCSI passthru's
  1159. * to non-existent targets as invalid commands.
  1160. */
  1161. dev_warn(d, "cp %p is reported invalid (probably means "
  1162. "target device no longer present)\n", cp);
  1163. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1164. print_cmd(cp); */
  1165. }
  1166. break;
  1167. case CMD_PROTOCOL_ERR:
  1168. dev_warn(d, "cp %p has protocol error \n", cp);
  1169. break;
  1170. case CMD_HARDWARE_ERR:
  1171. /* cmd->result = DID_ERROR << 16; */
  1172. dev_warn(d, "cp %p had hardware error\n", cp);
  1173. break;
  1174. case CMD_CONNECTION_LOST:
  1175. dev_warn(d, "cp %p had connection lost\n", cp);
  1176. break;
  1177. case CMD_ABORTED:
  1178. dev_warn(d, "cp %p was aborted\n", cp);
  1179. break;
  1180. case CMD_ABORT_FAILED:
  1181. dev_warn(d, "cp %p reports abort failed\n", cp);
  1182. break;
  1183. case CMD_UNSOLICITED_ABORT:
  1184. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1185. break;
  1186. case CMD_TIMEOUT:
  1187. dev_warn(d, "cp %p timed out\n", cp);
  1188. break;
  1189. default:
  1190. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1191. ei->CommandStatus);
  1192. }
  1193. }
  1194. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1195. unsigned char page, unsigned char *buf,
  1196. unsigned char bufsize)
  1197. {
  1198. int rc = IO_OK;
  1199. struct CommandList *c;
  1200. struct ErrorInfo *ei;
  1201. c = cmd_special_alloc(h);
  1202. if (c == NULL) { /* trouble... */
  1203. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1204. return -ENOMEM;
  1205. }
  1206. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1207. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1208. ei = c->err_info;
  1209. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1210. hpsa_scsi_interpret_error(c);
  1211. rc = -1;
  1212. }
  1213. cmd_special_free(h, c);
  1214. return rc;
  1215. }
  1216. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1217. {
  1218. int rc = IO_OK;
  1219. struct CommandList *c;
  1220. struct ErrorInfo *ei;
  1221. c = cmd_special_alloc(h);
  1222. if (c == NULL) { /* trouble... */
  1223. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1224. return -ENOMEM;
  1225. }
  1226. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1227. hpsa_scsi_do_simple_cmd_core(h, c);
  1228. /* no unmap needed here because no data xfer. */
  1229. ei = c->err_info;
  1230. if (ei->CommandStatus != 0) {
  1231. hpsa_scsi_interpret_error(c);
  1232. rc = -1;
  1233. }
  1234. cmd_special_free(h, c);
  1235. return rc;
  1236. }
  1237. static void hpsa_get_raid_level(struct ctlr_info *h,
  1238. unsigned char *scsi3addr, unsigned char *raid_level)
  1239. {
  1240. int rc;
  1241. unsigned char *buf;
  1242. *raid_level = RAID_UNKNOWN;
  1243. buf = kzalloc(64, GFP_KERNEL);
  1244. if (!buf)
  1245. return;
  1246. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1247. if (rc == 0)
  1248. *raid_level = buf[8];
  1249. if (*raid_level > RAID_UNKNOWN)
  1250. *raid_level = RAID_UNKNOWN;
  1251. kfree(buf);
  1252. return;
  1253. }
  1254. /* Get the device id from inquiry page 0x83 */
  1255. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1256. unsigned char *device_id, int buflen)
  1257. {
  1258. int rc;
  1259. unsigned char *buf;
  1260. if (buflen > 16)
  1261. buflen = 16;
  1262. buf = kzalloc(64, GFP_KERNEL);
  1263. if (!buf)
  1264. return -1;
  1265. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1266. if (rc == 0)
  1267. memcpy(device_id, &buf[8], buflen);
  1268. kfree(buf);
  1269. return rc != 0;
  1270. }
  1271. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1272. struct ReportLUNdata *buf, int bufsize,
  1273. int extended_response)
  1274. {
  1275. int rc = IO_OK;
  1276. struct CommandList *c;
  1277. unsigned char scsi3addr[8];
  1278. struct ErrorInfo *ei;
  1279. c = cmd_special_alloc(h);
  1280. if (c == NULL) { /* trouble... */
  1281. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1282. return -1;
  1283. }
  1284. /* address the controller */
  1285. memset(scsi3addr, 0, sizeof(scsi3addr));
  1286. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1287. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1288. if (extended_response)
  1289. c->Request.CDB[1] = extended_response;
  1290. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1291. ei = c->err_info;
  1292. if (ei->CommandStatus != 0 &&
  1293. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1294. hpsa_scsi_interpret_error(c);
  1295. rc = -1;
  1296. }
  1297. cmd_special_free(h, c);
  1298. return rc;
  1299. }
  1300. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1301. struct ReportLUNdata *buf,
  1302. int bufsize, int extended_response)
  1303. {
  1304. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1305. }
  1306. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1307. struct ReportLUNdata *buf, int bufsize)
  1308. {
  1309. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1310. }
  1311. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1312. int bus, int target, int lun)
  1313. {
  1314. device->bus = bus;
  1315. device->target = target;
  1316. device->lun = lun;
  1317. }
  1318. static int hpsa_update_device_info(struct ctlr_info *h,
  1319. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1320. {
  1321. #define OBDR_TAPE_INQ_SIZE 49
  1322. unsigned char *inq_buff;
  1323. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1324. if (!inq_buff)
  1325. goto bail_out;
  1326. /* Do an inquiry to the device to see what it is. */
  1327. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1328. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1329. /* Inquiry failed (msg printed already) */
  1330. dev_err(&h->pdev->dev,
  1331. "hpsa_update_device_info: inquiry failed\n");
  1332. goto bail_out;
  1333. }
  1334. this_device->devtype = (inq_buff[0] & 0x1f);
  1335. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1336. memcpy(this_device->vendor, &inq_buff[8],
  1337. sizeof(this_device->vendor));
  1338. memcpy(this_device->model, &inq_buff[16],
  1339. sizeof(this_device->model));
  1340. memset(this_device->device_id, 0,
  1341. sizeof(this_device->device_id));
  1342. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1343. sizeof(this_device->device_id));
  1344. if (this_device->devtype == TYPE_DISK &&
  1345. is_logical_dev_addr_mode(scsi3addr))
  1346. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1347. else
  1348. this_device->raid_level = RAID_UNKNOWN;
  1349. kfree(inq_buff);
  1350. return 0;
  1351. bail_out:
  1352. kfree(inq_buff);
  1353. return 1;
  1354. }
  1355. static unsigned char *msa2xxx_model[] = {
  1356. "MSA2012",
  1357. "MSA2024",
  1358. "MSA2312",
  1359. "MSA2324",
  1360. NULL,
  1361. };
  1362. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1363. {
  1364. int i;
  1365. for (i = 0; msa2xxx_model[i]; i++)
  1366. if (strncmp(device->model, msa2xxx_model[i],
  1367. strlen(msa2xxx_model[i])) == 0)
  1368. return 1;
  1369. return 0;
  1370. }
  1371. /* Helper function to assign bus, target, lun mapping of devices.
  1372. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1373. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1374. * Logical drive target and lun are assigned at this time, but
  1375. * physical device lun and target assignment are deferred (assigned
  1376. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1377. */
  1378. static void figure_bus_target_lun(struct ctlr_info *h,
  1379. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1380. struct hpsa_scsi_dev_t *device)
  1381. {
  1382. u32 lunid;
  1383. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1384. /* logical device */
  1385. if (unlikely(is_scsi_rev_5(h))) {
  1386. /* p1210m, logical drives lun assignments
  1387. * match SCSI REPORT LUNS data.
  1388. */
  1389. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1390. *bus = 0;
  1391. *target = 0;
  1392. *lun = (lunid & 0x3fff) + 1;
  1393. } else {
  1394. /* not p1210m... */
  1395. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1396. if (is_msa2xxx(h, device)) {
  1397. /* msa2xxx way, put logicals on bus 1
  1398. * and match target/lun numbers box
  1399. * reports.
  1400. */
  1401. *bus = 1;
  1402. *target = (lunid >> 16) & 0x3fff;
  1403. *lun = lunid & 0x00ff;
  1404. } else {
  1405. /* Traditional smart array way. */
  1406. *bus = 0;
  1407. *lun = 0;
  1408. *target = lunid & 0x3fff;
  1409. }
  1410. }
  1411. } else {
  1412. /* physical device */
  1413. if (is_hba_lunid(lunaddrbytes))
  1414. if (unlikely(is_scsi_rev_5(h))) {
  1415. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1416. *target = 0;
  1417. *lun = 0;
  1418. return;
  1419. } else
  1420. *bus = 3; /* traditional smartarray */
  1421. else
  1422. *bus = 2; /* physical disk */
  1423. *target = -1;
  1424. *lun = -1; /* we will fill these in later. */
  1425. }
  1426. }
  1427. /*
  1428. * If there is no lun 0 on a target, linux won't find any devices.
  1429. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1430. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1431. * it for some reason. *tmpdevice is the target we're adding,
  1432. * this_device is a pointer into the current element of currentsd[]
  1433. * that we're building up in update_scsi_devices(), below.
  1434. * lunzerobits is a bitmap that tracks which targets already have a
  1435. * lun 0 assigned.
  1436. * Returns 1 if an enclosure was added, 0 if not.
  1437. */
  1438. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1439. struct hpsa_scsi_dev_t *tmpdevice,
  1440. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1441. int bus, int target, int lun, unsigned long lunzerobits[],
  1442. int *nmsa2xxx_enclosures)
  1443. {
  1444. unsigned char scsi3addr[8];
  1445. if (test_bit(target, lunzerobits))
  1446. return 0; /* There is already a lun 0 on this target. */
  1447. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1448. return 0; /* It's the logical targets that may lack lun 0. */
  1449. if (!is_msa2xxx(h, tmpdevice))
  1450. return 0; /* It's only the MSA2xxx that have this problem. */
  1451. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1452. return 0;
  1453. if (is_hba_lunid(scsi3addr))
  1454. return 0; /* Don't add the RAID controller here. */
  1455. if (is_scsi_rev_5(h))
  1456. return 0; /* p1210m doesn't need to do this. */
  1457. #define MAX_MSA2XXX_ENCLOSURES 32
  1458. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1459. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1460. "enclosures exceeded. Check your hardware "
  1461. "configuration.");
  1462. return 0;
  1463. }
  1464. memset(scsi3addr, 0, 8);
  1465. scsi3addr[3] = target;
  1466. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1467. return 0;
  1468. (*nmsa2xxx_enclosures)++;
  1469. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1470. set_bit(target, lunzerobits);
  1471. return 1;
  1472. }
  1473. /*
  1474. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1475. * logdev. The number of luns in physdev and logdev are returned in
  1476. * *nphysicals and *nlogicals, respectively.
  1477. * Returns 0 on success, -1 otherwise.
  1478. */
  1479. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1480. int reportlunsize,
  1481. struct ReportLUNdata *physdev, u32 *nphysicals,
  1482. struct ReportLUNdata *logdev, u32 *nlogicals)
  1483. {
  1484. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1485. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1486. return -1;
  1487. }
  1488. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1489. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1490. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1491. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1492. *nphysicals - HPSA_MAX_PHYS_LUN);
  1493. *nphysicals = HPSA_MAX_PHYS_LUN;
  1494. }
  1495. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1496. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1497. return -1;
  1498. }
  1499. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1500. /* Reject Logicals in excess of our max capability. */
  1501. if (*nlogicals > HPSA_MAX_LUN) {
  1502. dev_warn(&h->pdev->dev,
  1503. "maximum logical LUNs (%d) exceeded. "
  1504. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1505. *nlogicals - HPSA_MAX_LUN);
  1506. *nlogicals = HPSA_MAX_LUN;
  1507. }
  1508. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1509. dev_warn(&h->pdev->dev,
  1510. "maximum logical + physical LUNs (%d) exceeded. "
  1511. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1512. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1513. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1514. }
  1515. return 0;
  1516. }
  1517. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1518. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1519. struct ReportLUNdata *logdev_list)
  1520. {
  1521. /* Helper function, figure out where the LUN ID info is coming from
  1522. * given index i, lists of physical and logical devices, where in
  1523. * the list the raid controller is supposed to appear (first or last)
  1524. */
  1525. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1526. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1527. if (i == raid_ctlr_position)
  1528. return RAID_CTLR_LUNID;
  1529. if (i < logicals_start)
  1530. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1531. if (i < last_device)
  1532. return &logdev_list->LUN[i - nphysicals -
  1533. (raid_ctlr_position == 0)][0];
  1534. BUG();
  1535. return NULL;
  1536. }
  1537. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1538. {
  1539. /* the idea here is we could get notified
  1540. * that some devices have changed, so we do a report
  1541. * physical luns and report logical luns cmd, and adjust
  1542. * our list of devices accordingly.
  1543. *
  1544. * The scsi3addr's of devices won't change so long as the
  1545. * adapter is not reset. That means we can rescan and
  1546. * tell which devices we already know about, vs. new
  1547. * devices, vs. disappearing devices.
  1548. */
  1549. struct ReportLUNdata *physdev_list = NULL;
  1550. struct ReportLUNdata *logdev_list = NULL;
  1551. unsigned char *inq_buff = NULL;
  1552. u32 nphysicals = 0;
  1553. u32 nlogicals = 0;
  1554. u32 ndev_allocated = 0;
  1555. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1556. int ncurrent = 0;
  1557. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1558. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1559. int bus, target, lun;
  1560. int raid_ctlr_position;
  1561. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1562. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1563. GFP_KERNEL);
  1564. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1565. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1566. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1567. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1568. if (!currentsd || !physdev_list || !logdev_list ||
  1569. !inq_buff || !tmpdevice) {
  1570. dev_err(&h->pdev->dev, "out of memory\n");
  1571. goto out;
  1572. }
  1573. memset(lunzerobits, 0, sizeof(lunzerobits));
  1574. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1575. logdev_list, &nlogicals))
  1576. goto out;
  1577. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1578. * but each of them 4 times through different paths. The plus 1
  1579. * is for the RAID controller.
  1580. */
  1581. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1582. /* Allocate the per device structures */
  1583. for (i = 0; i < ndevs_to_allocate; i++) {
  1584. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1585. if (!currentsd[i]) {
  1586. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1587. __FILE__, __LINE__);
  1588. goto out;
  1589. }
  1590. ndev_allocated++;
  1591. }
  1592. if (unlikely(is_scsi_rev_5(h)))
  1593. raid_ctlr_position = 0;
  1594. else
  1595. raid_ctlr_position = nphysicals + nlogicals;
  1596. /* adjust our table of devices */
  1597. nmsa2xxx_enclosures = 0;
  1598. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1599. u8 *lunaddrbytes;
  1600. /* Figure out where the LUN ID info is coming from */
  1601. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1602. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1603. /* skip masked physical devices. */
  1604. if (lunaddrbytes[3] & 0xC0 &&
  1605. i < nphysicals + (raid_ctlr_position == 0))
  1606. continue;
  1607. /* Get device type, vendor, model, device id */
  1608. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1609. continue; /* skip it if we can't talk to it. */
  1610. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1611. tmpdevice);
  1612. this_device = currentsd[ncurrent];
  1613. /*
  1614. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1615. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1616. * is nonetheless an enclosure device there. We have to
  1617. * present that otherwise linux won't find anything if
  1618. * there is no lun 0.
  1619. */
  1620. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1621. lunaddrbytes, bus, target, lun, lunzerobits,
  1622. &nmsa2xxx_enclosures)) {
  1623. ncurrent++;
  1624. this_device = currentsd[ncurrent];
  1625. }
  1626. *this_device = *tmpdevice;
  1627. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1628. switch (this_device->devtype) {
  1629. case TYPE_ROM: {
  1630. /* We don't *really* support actual CD-ROM devices,
  1631. * just "One Button Disaster Recovery" tape drive
  1632. * which temporarily pretends to be a CD-ROM drive.
  1633. * So we check that the device is really an OBDR tape
  1634. * device by checking for "$DR-10" in bytes 43-48 of
  1635. * the inquiry data.
  1636. */
  1637. char obdr_sig[7];
  1638. #define OBDR_TAPE_SIG "$DR-10"
  1639. strncpy(obdr_sig, &inq_buff[43], 6);
  1640. obdr_sig[6] = '\0';
  1641. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1642. /* Not OBDR device, ignore it. */
  1643. break;
  1644. }
  1645. ncurrent++;
  1646. break;
  1647. case TYPE_DISK:
  1648. if (i < nphysicals)
  1649. break;
  1650. ncurrent++;
  1651. break;
  1652. case TYPE_TAPE:
  1653. case TYPE_MEDIUM_CHANGER:
  1654. ncurrent++;
  1655. break;
  1656. case TYPE_RAID:
  1657. /* Only present the Smartarray HBA as a RAID controller.
  1658. * If it's a RAID controller other than the HBA itself
  1659. * (an external RAID controller, MSA500 or similar)
  1660. * don't present it.
  1661. */
  1662. if (!is_hba_lunid(lunaddrbytes))
  1663. break;
  1664. ncurrent++;
  1665. break;
  1666. default:
  1667. break;
  1668. }
  1669. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1670. break;
  1671. }
  1672. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1673. out:
  1674. kfree(tmpdevice);
  1675. for (i = 0; i < ndev_allocated; i++)
  1676. kfree(currentsd[i]);
  1677. kfree(currentsd);
  1678. kfree(inq_buff);
  1679. kfree(physdev_list);
  1680. kfree(logdev_list);
  1681. }
  1682. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1683. * dma mapping and fills in the scatter gather entries of the
  1684. * hpsa command, cp.
  1685. */
  1686. static int hpsa_scatter_gather(struct ctlr_info *h,
  1687. struct CommandList *cp,
  1688. struct scsi_cmnd *cmd)
  1689. {
  1690. unsigned int len;
  1691. struct scatterlist *sg;
  1692. u64 addr64;
  1693. int use_sg, i, sg_index, chained;
  1694. struct SGDescriptor *curr_sg;
  1695. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1696. use_sg = scsi_dma_map(cmd);
  1697. if (use_sg < 0)
  1698. return use_sg;
  1699. if (!use_sg)
  1700. goto sglist_finished;
  1701. curr_sg = cp->SG;
  1702. chained = 0;
  1703. sg_index = 0;
  1704. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1705. if (i == h->max_cmd_sg_entries - 1 &&
  1706. use_sg > h->max_cmd_sg_entries) {
  1707. chained = 1;
  1708. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1709. sg_index = 0;
  1710. }
  1711. addr64 = (u64) sg_dma_address(sg);
  1712. len = sg_dma_len(sg);
  1713. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1714. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1715. curr_sg->Len = len;
  1716. curr_sg->Ext = 0; /* we are not chaining */
  1717. curr_sg++;
  1718. }
  1719. if (use_sg + chained > h->maxSG)
  1720. h->maxSG = use_sg + chained;
  1721. if (chained) {
  1722. cp->Header.SGList = h->max_cmd_sg_entries;
  1723. cp->Header.SGTotal = (u16) (use_sg + 1);
  1724. hpsa_map_sg_chain_block(h, cp);
  1725. return 0;
  1726. }
  1727. sglist_finished:
  1728. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1729. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1730. return 0;
  1731. }
  1732. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1733. void (*done)(struct scsi_cmnd *))
  1734. {
  1735. struct ctlr_info *h;
  1736. struct hpsa_scsi_dev_t *dev;
  1737. unsigned char scsi3addr[8];
  1738. struct CommandList *c;
  1739. unsigned long flags;
  1740. /* Get the ptr to our adapter structure out of cmd->host. */
  1741. h = sdev_to_hba(cmd->device);
  1742. dev = cmd->device->hostdata;
  1743. if (!dev) {
  1744. cmd->result = DID_NO_CONNECT << 16;
  1745. done(cmd);
  1746. return 0;
  1747. }
  1748. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1749. /* Need a lock as this is being allocated from the pool */
  1750. spin_lock_irqsave(&h->lock, flags);
  1751. c = cmd_alloc(h);
  1752. spin_unlock_irqrestore(&h->lock, flags);
  1753. if (c == NULL) { /* trouble... */
  1754. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1755. return SCSI_MLQUEUE_HOST_BUSY;
  1756. }
  1757. /* Fill in the command list header */
  1758. cmd->scsi_done = done; /* save this for use by completion code */
  1759. /* save c in case we have to abort it */
  1760. cmd->host_scribble = (unsigned char *) c;
  1761. c->cmd_type = CMD_SCSI;
  1762. c->scsi_cmd = cmd;
  1763. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1764. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1765. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1766. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1767. /* Fill in the request block... */
  1768. c->Request.Timeout = 0;
  1769. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1770. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1771. c->Request.CDBLen = cmd->cmd_len;
  1772. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1773. c->Request.Type.Type = TYPE_CMD;
  1774. c->Request.Type.Attribute = ATTR_SIMPLE;
  1775. switch (cmd->sc_data_direction) {
  1776. case DMA_TO_DEVICE:
  1777. c->Request.Type.Direction = XFER_WRITE;
  1778. break;
  1779. case DMA_FROM_DEVICE:
  1780. c->Request.Type.Direction = XFER_READ;
  1781. break;
  1782. case DMA_NONE:
  1783. c->Request.Type.Direction = XFER_NONE;
  1784. break;
  1785. case DMA_BIDIRECTIONAL:
  1786. /* This can happen if a buggy application does a scsi passthru
  1787. * and sets both inlen and outlen to non-zero. ( see
  1788. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1789. */
  1790. c->Request.Type.Direction = XFER_RSVD;
  1791. /* This is technically wrong, and hpsa controllers should
  1792. * reject it with CMD_INVALID, which is the most correct
  1793. * response, but non-fibre backends appear to let it
  1794. * slide by, and give the same results as if this field
  1795. * were set correctly. Either way is acceptable for
  1796. * our purposes here.
  1797. */
  1798. break;
  1799. default:
  1800. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1801. cmd->sc_data_direction);
  1802. BUG();
  1803. break;
  1804. }
  1805. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1806. cmd_free(h, c);
  1807. return SCSI_MLQUEUE_HOST_BUSY;
  1808. }
  1809. enqueue_cmd_and_start_io(h, c);
  1810. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1811. return 0;
  1812. }
  1813. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1814. static void hpsa_scan_start(struct Scsi_Host *sh)
  1815. {
  1816. struct ctlr_info *h = shost_to_hba(sh);
  1817. unsigned long flags;
  1818. /* wait until any scan already in progress is finished. */
  1819. while (1) {
  1820. spin_lock_irqsave(&h->scan_lock, flags);
  1821. if (h->scan_finished)
  1822. break;
  1823. spin_unlock_irqrestore(&h->scan_lock, flags);
  1824. wait_event(h->scan_wait_queue, h->scan_finished);
  1825. /* Note: We don't need to worry about a race between this
  1826. * thread and driver unload because the midlayer will
  1827. * have incremented the reference count, so unload won't
  1828. * happen if we're in here.
  1829. */
  1830. }
  1831. h->scan_finished = 0; /* mark scan as in progress */
  1832. spin_unlock_irqrestore(&h->scan_lock, flags);
  1833. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1834. spin_lock_irqsave(&h->scan_lock, flags);
  1835. h->scan_finished = 1; /* mark scan as finished. */
  1836. wake_up_all(&h->scan_wait_queue);
  1837. spin_unlock_irqrestore(&h->scan_lock, flags);
  1838. }
  1839. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1840. unsigned long elapsed_time)
  1841. {
  1842. struct ctlr_info *h = shost_to_hba(sh);
  1843. unsigned long flags;
  1844. int finished;
  1845. spin_lock_irqsave(&h->scan_lock, flags);
  1846. finished = h->scan_finished;
  1847. spin_unlock_irqrestore(&h->scan_lock, flags);
  1848. return finished;
  1849. }
  1850. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1851. int qdepth, int reason)
  1852. {
  1853. struct ctlr_info *h = sdev_to_hba(sdev);
  1854. if (reason != SCSI_QDEPTH_DEFAULT)
  1855. return -ENOTSUPP;
  1856. if (qdepth < 1)
  1857. qdepth = 1;
  1858. else
  1859. if (qdepth > h->nr_cmds)
  1860. qdepth = h->nr_cmds;
  1861. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1862. return sdev->queue_depth;
  1863. }
  1864. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1865. {
  1866. /* we are being forcibly unloaded, and may not refuse. */
  1867. scsi_remove_host(h->scsi_host);
  1868. scsi_host_put(h->scsi_host);
  1869. h->scsi_host = NULL;
  1870. }
  1871. static int hpsa_register_scsi(struct ctlr_info *h)
  1872. {
  1873. int rc;
  1874. rc = hpsa_scsi_detect(h);
  1875. if (rc != 0)
  1876. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1877. " hpsa_scsi_detect(), rc is %d\n", rc);
  1878. return rc;
  1879. }
  1880. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1881. unsigned char lunaddr[])
  1882. {
  1883. int rc = 0;
  1884. int count = 0;
  1885. int waittime = 1; /* seconds */
  1886. struct CommandList *c;
  1887. c = cmd_special_alloc(h);
  1888. if (!c) {
  1889. dev_warn(&h->pdev->dev, "out of memory in "
  1890. "wait_for_device_to_become_ready.\n");
  1891. return IO_ERROR;
  1892. }
  1893. /* Send test unit ready until device ready, or give up. */
  1894. while (count < HPSA_TUR_RETRY_LIMIT) {
  1895. /* Wait for a bit. do this first, because if we send
  1896. * the TUR right away, the reset will just abort it.
  1897. */
  1898. msleep(1000 * waittime);
  1899. count++;
  1900. /* Increase wait time with each try, up to a point. */
  1901. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1902. waittime = waittime * 2;
  1903. /* Send the Test Unit Ready */
  1904. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1905. hpsa_scsi_do_simple_cmd_core(h, c);
  1906. /* no unmap needed here because no data xfer. */
  1907. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1908. break;
  1909. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1910. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1911. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1912. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1913. break;
  1914. dev_warn(&h->pdev->dev, "waiting %d secs "
  1915. "for device to become ready.\n", waittime);
  1916. rc = 1; /* device not ready. */
  1917. }
  1918. if (rc)
  1919. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1920. else
  1921. dev_warn(&h->pdev->dev, "device is ready.\n");
  1922. cmd_special_free(h, c);
  1923. return rc;
  1924. }
  1925. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1926. * complaining. Doing a host- or bus-reset can't do anything good here.
  1927. */
  1928. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1929. {
  1930. int rc;
  1931. struct ctlr_info *h;
  1932. struct hpsa_scsi_dev_t *dev;
  1933. /* find the controller to which the command to be aborted was sent */
  1934. h = sdev_to_hba(scsicmd->device);
  1935. if (h == NULL) /* paranoia */
  1936. return FAILED;
  1937. dev = scsicmd->device->hostdata;
  1938. if (!dev) {
  1939. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1940. "device lookup failed.\n");
  1941. return FAILED;
  1942. }
  1943. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1944. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1945. /* send a reset to the SCSI LUN which the command was sent to */
  1946. rc = hpsa_send_reset(h, dev->scsi3addr);
  1947. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1948. return SUCCESS;
  1949. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1950. return FAILED;
  1951. }
  1952. /*
  1953. * For operations that cannot sleep, a command block is allocated at init,
  1954. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1955. * which ones are free or in use. Lock must be held when calling this.
  1956. * cmd_free() is the complement.
  1957. */
  1958. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1959. {
  1960. struct CommandList *c;
  1961. int i;
  1962. union u64bit temp64;
  1963. dma_addr_t cmd_dma_handle, err_dma_handle;
  1964. do {
  1965. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1966. if (i == h->nr_cmds)
  1967. return NULL;
  1968. } while (test_and_set_bit
  1969. (i & (BITS_PER_LONG - 1),
  1970. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1971. c = h->cmd_pool + i;
  1972. memset(c, 0, sizeof(*c));
  1973. cmd_dma_handle = h->cmd_pool_dhandle
  1974. + i * sizeof(*c);
  1975. c->err_info = h->errinfo_pool + i;
  1976. memset(c->err_info, 0, sizeof(*c->err_info));
  1977. err_dma_handle = h->errinfo_pool_dhandle
  1978. + i * sizeof(*c->err_info);
  1979. h->nr_allocs++;
  1980. c->cmdindex = i;
  1981. INIT_HLIST_NODE(&c->list);
  1982. c->busaddr = (u32) cmd_dma_handle;
  1983. temp64.val = (u64) err_dma_handle;
  1984. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1985. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1986. c->ErrDesc.Len = sizeof(*c->err_info);
  1987. c->h = h;
  1988. return c;
  1989. }
  1990. /* For operations that can wait for kmalloc to possibly sleep,
  1991. * this routine can be called. Lock need not be held to call
  1992. * cmd_special_alloc. cmd_special_free() is the complement.
  1993. */
  1994. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1995. {
  1996. struct CommandList *c;
  1997. union u64bit temp64;
  1998. dma_addr_t cmd_dma_handle, err_dma_handle;
  1999. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2000. if (c == NULL)
  2001. return NULL;
  2002. memset(c, 0, sizeof(*c));
  2003. c->cmdindex = -1;
  2004. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2005. &err_dma_handle);
  2006. if (c->err_info == NULL) {
  2007. pci_free_consistent(h->pdev,
  2008. sizeof(*c), c, cmd_dma_handle);
  2009. return NULL;
  2010. }
  2011. memset(c->err_info, 0, sizeof(*c->err_info));
  2012. INIT_HLIST_NODE(&c->list);
  2013. c->busaddr = (u32) cmd_dma_handle;
  2014. temp64.val = (u64) err_dma_handle;
  2015. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2016. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2017. c->ErrDesc.Len = sizeof(*c->err_info);
  2018. c->h = h;
  2019. return c;
  2020. }
  2021. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2022. {
  2023. int i;
  2024. i = c - h->cmd_pool;
  2025. clear_bit(i & (BITS_PER_LONG - 1),
  2026. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2027. h->nr_frees++;
  2028. }
  2029. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2030. {
  2031. union u64bit temp64;
  2032. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2033. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2034. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2035. c->err_info, (dma_addr_t) temp64.val);
  2036. pci_free_consistent(h->pdev, sizeof(*c),
  2037. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2038. }
  2039. #ifdef CONFIG_COMPAT
  2040. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2041. {
  2042. IOCTL32_Command_struct __user *arg32 =
  2043. (IOCTL32_Command_struct __user *) arg;
  2044. IOCTL_Command_struct arg64;
  2045. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2046. int err;
  2047. u32 cp;
  2048. err = 0;
  2049. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2050. sizeof(arg64.LUN_info));
  2051. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2052. sizeof(arg64.Request));
  2053. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2054. sizeof(arg64.error_info));
  2055. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2056. err |= get_user(cp, &arg32->buf);
  2057. arg64.buf = compat_ptr(cp);
  2058. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2059. if (err)
  2060. return -EFAULT;
  2061. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2062. if (err)
  2063. return err;
  2064. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2065. sizeof(arg32->error_info));
  2066. if (err)
  2067. return -EFAULT;
  2068. return err;
  2069. }
  2070. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2071. int cmd, void *arg)
  2072. {
  2073. BIG_IOCTL32_Command_struct __user *arg32 =
  2074. (BIG_IOCTL32_Command_struct __user *) arg;
  2075. BIG_IOCTL_Command_struct arg64;
  2076. BIG_IOCTL_Command_struct __user *p =
  2077. compat_alloc_user_space(sizeof(arg64));
  2078. int err;
  2079. u32 cp;
  2080. err = 0;
  2081. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2082. sizeof(arg64.LUN_info));
  2083. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2084. sizeof(arg64.Request));
  2085. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2086. sizeof(arg64.error_info));
  2087. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2088. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2089. err |= get_user(cp, &arg32->buf);
  2090. arg64.buf = compat_ptr(cp);
  2091. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2092. if (err)
  2093. return -EFAULT;
  2094. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2095. if (err)
  2096. return err;
  2097. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2098. sizeof(arg32->error_info));
  2099. if (err)
  2100. return -EFAULT;
  2101. return err;
  2102. }
  2103. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2104. {
  2105. switch (cmd) {
  2106. case CCISS_GETPCIINFO:
  2107. case CCISS_GETINTINFO:
  2108. case CCISS_SETINTINFO:
  2109. case CCISS_GETNODENAME:
  2110. case CCISS_SETNODENAME:
  2111. case CCISS_GETHEARTBEAT:
  2112. case CCISS_GETBUSTYPES:
  2113. case CCISS_GETFIRMVER:
  2114. case CCISS_GETDRIVVER:
  2115. case CCISS_REVALIDVOLS:
  2116. case CCISS_DEREGDISK:
  2117. case CCISS_REGNEWDISK:
  2118. case CCISS_REGNEWD:
  2119. case CCISS_RESCANDISK:
  2120. case CCISS_GETLUNINFO:
  2121. return hpsa_ioctl(dev, cmd, arg);
  2122. case CCISS_PASSTHRU32:
  2123. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2124. case CCISS_BIG_PASSTHRU32:
  2125. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2126. default:
  2127. return -ENOIOCTLCMD;
  2128. }
  2129. }
  2130. #endif
  2131. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2132. {
  2133. struct hpsa_pci_info pciinfo;
  2134. if (!argp)
  2135. return -EINVAL;
  2136. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2137. pciinfo.bus = h->pdev->bus->number;
  2138. pciinfo.dev_fn = h->pdev->devfn;
  2139. pciinfo.board_id = h->board_id;
  2140. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2141. return -EFAULT;
  2142. return 0;
  2143. }
  2144. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2145. {
  2146. DriverVer_type DriverVer;
  2147. unsigned char vmaj, vmin, vsubmin;
  2148. int rc;
  2149. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2150. &vmaj, &vmin, &vsubmin);
  2151. if (rc != 3) {
  2152. dev_info(&h->pdev->dev, "driver version string '%s' "
  2153. "unrecognized.", HPSA_DRIVER_VERSION);
  2154. vmaj = 0;
  2155. vmin = 0;
  2156. vsubmin = 0;
  2157. }
  2158. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2159. if (!argp)
  2160. return -EINVAL;
  2161. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2162. return -EFAULT;
  2163. return 0;
  2164. }
  2165. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2166. {
  2167. IOCTL_Command_struct iocommand;
  2168. struct CommandList *c;
  2169. char *buff = NULL;
  2170. union u64bit temp64;
  2171. if (!argp)
  2172. return -EINVAL;
  2173. if (!capable(CAP_SYS_RAWIO))
  2174. return -EPERM;
  2175. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2176. return -EFAULT;
  2177. if ((iocommand.buf_size < 1) &&
  2178. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2179. return -EINVAL;
  2180. }
  2181. if (iocommand.buf_size > 0) {
  2182. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2183. if (buff == NULL)
  2184. return -EFAULT;
  2185. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2186. /* Copy the data into the buffer we created */
  2187. if (copy_from_user(buff, iocommand.buf,
  2188. iocommand.buf_size)) {
  2189. kfree(buff);
  2190. return -EFAULT;
  2191. }
  2192. } else {
  2193. memset(buff, 0, iocommand.buf_size);
  2194. }
  2195. }
  2196. c = cmd_special_alloc(h);
  2197. if (c == NULL) {
  2198. kfree(buff);
  2199. return -ENOMEM;
  2200. }
  2201. /* Fill in the command type */
  2202. c->cmd_type = CMD_IOCTL_PEND;
  2203. /* Fill in Command Header */
  2204. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2205. if (iocommand.buf_size > 0) { /* buffer to fill */
  2206. c->Header.SGList = 1;
  2207. c->Header.SGTotal = 1;
  2208. } else { /* no buffers to fill */
  2209. c->Header.SGList = 0;
  2210. c->Header.SGTotal = 0;
  2211. }
  2212. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2213. /* use the kernel address the cmd block for tag */
  2214. c->Header.Tag.lower = c->busaddr;
  2215. /* Fill in Request block */
  2216. memcpy(&c->Request, &iocommand.Request,
  2217. sizeof(c->Request));
  2218. /* Fill in the scatter gather information */
  2219. if (iocommand.buf_size > 0) {
  2220. temp64.val = pci_map_single(h->pdev, buff,
  2221. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2222. c->SG[0].Addr.lower = temp64.val32.lower;
  2223. c->SG[0].Addr.upper = temp64.val32.upper;
  2224. c->SG[0].Len = iocommand.buf_size;
  2225. c->SG[0].Ext = 0; /* we are not chaining*/
  2226. }
  2227. hpsa_scsi_do_simple_cmd_core(h, c);
  2228. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2229. check_ioctl_unit_attention(h, c);
  2230. /* Copy the error information out */
  2231. memcpy(&iocommand.error_info, c->err_info,
  2232. sizeof(iocommand.error_info));
  2233. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2234. kfree(buff);
  2235. cmd_special_free(h, c);
  2236. return -EFAULT;
  2237. }
  2238. if (iocommand.Request.Type.Direction == XFER_READ &&
  2239. iocommand.buf_size > 0) {
  2240. /* Copy the data out of the buffer we created */
  2241. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2242. kfree(buff);
  2243. cmd_special_free(h, c);
  2244. return -EFAULT;
  2245. }
  2246. }
  2247. kfree(buff);
  2248. cmd_special_free(h, c);
  2249. return 0;
  2250. }
  2251. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2252. {
  2253. BIG_IOCTL_Command_struct *ioc;
  2254. struct CommandList *c;
  2255. unsigned char **buff = NULL;
  2256. int *buff_size = NULL;
  2257. union u64bit temp64;
  2258. BYTE sg_used = 0;
  2259. int status = 0;
  2260. int i;
  2261. u32 left;
  2262. u32 sz;
  2263. BYTE __user *data_ptr;
  2264. if (!argp)
  2265. return -EINVAL;
  2266. if (!capable(CAP_SYS_RAWIO))
  2267. return -EPERM;
  2268. ioc = (BIG_IOCTL_Command_struct *)
  2269. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2270. if (!ioc) {
  2271. status = -ENOMEM;
  2272. goto cleanup1;
  2273. }
  2274. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2275. status = -EFAULT;
  2276. goto cleanup1;
  2277. }
  2278. if ((ioc->buf_size < 1) &&
  2279. (ioc->Request.Type.Direction != XFER_NONE)) {
  2280. status = -EINVAL;
  2281. goto cleanup1;
  2282. }
  2283. /* Check kmalloc limits using all SGs */
  2284. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2285. status = -EINVAL;
  2286. goto cleanup1;
  2287. }
  2288. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2289. status = -EINVAL;
  2290. goto cleanup1;
  2291. }
  2292. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2293. if (!buff) {
  2294. status = -ENOMEM;
  2295. goto cleanup1;
  2296. }
  2297. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2298. if (!buff_size) {
  2299. status = -ENOMEM;
  2300. goto cleanup1;
  2301. }
  2302. left = ioc->buf_size;
  2303. data_ptr = ioc->buf;
  2304. while (left) {
  2305. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2306. buff_size[sg_used] = sz;
  2307. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2308. if (buff[sg_used] == NULL) {
  2309. status = -ENOMEM;
  2310. goto cleanup1;
  2311. }
  2312. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2313. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2314. status = -ENOMEM;
  2315. goto cleanup1;
  2316. }
  2317. } else
  2318. memset(buff[sg_used], 0, sz);
  2319. left -= sz;
  2320. data_ptr += sz;
  2321. sg_used++;
  2322. }
  2323. c = cmd_special_alloc(h);
  2324. if (c == NULL) {
  2325. status = -ENOMEM;
  2326. goto cleanup1;
  2327. }
  2328. c->cmd_type = CMD_IOCTL_PEND;
  2329. c->Header.ReplyQueue = 0;
  2330. c->Header.SGList = c->Header.SGTotal = sg_used;
  2331. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2332. c->Header.Tag.lower = c->busaddr;
  2333. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2334. if (ioc->buf_size > 0) {
  2335. int i;
  2336. for (i = 0; i < sg_used; i++) {
  2337. temp64.val = pci_map_single(h->pdev, buff[i],
  2338. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2339. c->SG[i].Addr.lower = temp64.val32.lower;
  2340. c->SG[i].Addr.upper = temp64.val32.upper;
  2341. c->SG[i].Len = buff_size[i];
  2342. /* we are not chaining */
  2343. c->SG[i].Ext = 0;
  2344. }
  2345. }
  2346. hpsa_scsi_do_simple_cmd_core(h, c);
  2347. if (sg_used)
  2348. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2349. check_ioctl_unit_attention(h, c);
  2350. /* Copy the error information out */
  2351. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2352. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2353. cmd_special_free(h, c);
  2354. status = -EFAULT;
  2355. goto cleanup1;
  2356. }
  2357. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2358. /* Copy the data out of the buffer we created */
  2359. BYTE __user *ptr = ioc->buf;
  2360. for (i = 0; i < sg_used; i++) {
  2361. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2362. cmd_special_free(h, c);
  2363. status = -EFAULT;
  2364. goto cleanup1;
  2365. }
  2366. ptr += buff_size[i];
  2367. }
  2368. }
  2369. cmd_special_free(h, c);
  2370. status = 0;
  2371. cleanup1:
  2372. if (buff) {
  2373. for (i = 0; i < sg_used; i++)
  2374. kfree(buff[i]);
  2375. kfree(buff);
  2376. }
  2377. kfree(buff_size);
  2378. kfree(ioc);
  2379. return status;
  2380. }
  2381. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2382. struct CommandList *c)
  2383. {
  2384. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2385. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2386. (void) check_for_unit_attention(h, c);
  2387. }
  2388. /*
  2389. * ioctl
  2390. */
  2391. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2392. {
  2393. struct ctlr_info *h;
  2394. void __user *argp = (void __user *)arg;
  2395. h = sdev_to_hba(dev);
  2396. switch (cmd) {
  2397. case CCISS_DEREGDISK:
  2398. case CCISS_REGNEWDISK:
  2399. case CCISS_REGNEWD:
  2400. hpsa_scan_start(h->scsi_host);
  2401. return 0;
  2402. case CCISS_GETPCIINFO:
  2403. return hpsa_getpciinfo_ioctl(h, argp);
  2404. case CCISS_GETDRIVVER:
  2405. return hpsa_getdrivver_ioctl(h, argp);
  2406. case CCISS_PASSTHRU:
  2407. return hpsa_passthru_ioctl(h, argp);
  2408. case CCISS_BIG_PASSTHRU:
  2409. return hpsa_big_passthru_ioctl(h, argp);
  2410. default:
  2411. return -ENOTTY;
  2412. }
  2413. }
  2414. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2415. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2416. int cmd_type)
  2417. {
  2418. int pci_dir = XFER_NONE;
  2419. c->cmd_type = CMD_IOCTL_PEND;
  2420. c->Header.ReplyQueue = 0;
  2421. if (buff != NULL && size > 0) {
  2422. c->Header.SGList = 1;
  2423. c->Header.SGTotal = 1;
  2424. } else {
  2425. c->Header.SGList = 0;
  2426. c->Header.SGTotal = 0;
  2427. }
  2428. c->Header.Tag.lower = c->busaddr;
  2429. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2430. c->Request.Type.Type = cmd_type;
  2431. if (cmd_type == TYPE_CMD) {
  2432. switch (cmd) {
  2433. case HPSA_INQUIRY:
  2434. /* are we trying to read a vital product page */
  2435. if (page_code != 0) {
  2436. c->Request.CDB[1] = 0x01;
  2437. c->Request.CDB[2] = page_code;
  2438. }
  2439. c->Request.CDBLen = 6;
  2440. c->Request.Type.Attribute = ATTR_SIMPLE;
  2441. c->Request.Type.Direction = XFER_READ;
  2442. c->Request.Timeout = 0;
  2443. c->Request.CDB[0] = HPSA_INQUIRY;
  2444. c->Request.CDB[4] = size & 0xFF;
  2445. break;
  2446. case HPSA_REPORT_LOG:
  2447. case HPSA_REPORT_PHYS:
  2448. /* Talking to controller so It's a physical command
  2449. mode = 00 target = 0. Nothing to write.
  2450. */
  2451. c->Request.CDBLen = 12;
  2452. c->Request.Type.Attribute = ATTR_SIMPLE;
  2453. c->Request.Type.Direction = XFER_READ;
  2454. c->Request.Timeout = 0;
  2455. c->Request.CDB[0] = cmd;
  2456. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2457. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2458. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2459. c->Request.CDB[9] = size & 0xFF;
  2460. break;
  2461. case HPSA_CACHE_FLUSH:
  2462. c->Request.CDBLen = 12;
  2463. c->Request.Type.Attribute = ATTR_SIMPLE;
  2464. c->Request.Type.Direction = XFER_WRITE;
  2465. c->Request.Timeout = 0;
  2466. c->Request.CDB[0] = BMIC_WRITE;
  2467. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2468. break;
  2469. case TEST_UNIT_READY:
  2470. c->Request.CDBLen = 6;
  2471. c->Request.Type.Attribute = ATTR_SIMPLE;
  2472. c->Request.Type.Direction = XFER_NONE;
  2473. c->Request.Timeout = 0;
  2474. break;
  2475. default:
  2476. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2477. BUG();
  2478. return;
  2479. }
  2480. } else if (cmd_type == TYPE_MSG) {
  2481. switch (cmd) {
  2482. case HPSA_DEVICE_RESET_MSG:
  2483. c->Request.CDBLen = 16;
  2484. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2485. c->Request.Type.Attribute = ATTR_SIMPLE;
  2486. c->Request.Type.Direction = XFER_NONE;
  2487. c->Request.Timeout = 0; /* Don't time out */
  2488. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2489. c->Request.CDB[1] = 0x03; /* Reset target above */
  2490. /* If bytes 4-7 are zero, it means reset the */
  2491. /* LunID device */
  2492. c->Request.CDB[4] = 0x00;
  2493. c->Request.CDB[5] = 0x00;
  2494. c->Request.CDB[6] = 0x00;
  2495. c->Request.CDB[7] = 0x00;
  2496. break;
  2497. default:
  2498. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2499. cmd);
  2500. BUG();
  2501. }
  2502. } else {
  2503. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2504. BUG();
  2505. }
  2506. switch (c->Request.Type.Direction) {
  2507. case XFER_READ:
  2508. pci_dir = PCI_DMA_FROMDEVICE;
  2509. break;
  2510. case XFER_WRITE:
  2511. pci_dir = PCI_DMA_TODEVICE;
  2512. break;
  2513. case XFER_NONE:
  2514. pci_dir = PCI_DMA_NONE;
  2515. break;
  2516. default:
  2517. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2518. }
  2519. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2520. return;
  2521. }
  2522. /*
  2523. * Map (physical) PCI mem into (virtual) kernel space
  2524. */
  2525. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2526. {
  2527. ulong page_base = ((ulong) base) & PAGE_MASK;
  2528. ulong page_offs = ((ulong) base) - page_base;
  2529. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2530. return page_remapped ? (page_remapped + page_offs) : NULL;
  2531. }
  2532. /* Takes cmds off the submission queue and sends them to the hardware,
  2533. * then puts them on the queue of cmds waiting for completion.
  2534. */
  2535. static void start_io(struct ctlr_info *h)
  2536. {
  2537. struct CommandList *c;
  2538. while (!hlist_empty(&h->reqQ)) {
  2539. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2540. /* can't do anything if fifo is full */
  2541. if ((h->access.fifo_full(h))) {
  2542. dev_warn(&h->pdev->dev, "fifo full\n");
  2543. break;
  2544. }
  2545. /* Get the first entry from the Request Q */
  2546. removeQ(c);
  2547. h->Qdepth--;
  2548. /* Tell the controller execute command */
  2549. h->access.submit_command(h, c);
  2550. /* Put job onto the completed Q */
  2551. addQ(&h->cmpQ, c);
  2552. }
  2553. }
  2554. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2555. {
  2556. return h->access.command_completed(h);
  2557. }
  2558. static inline bool interrupt_pending(struct ctlr_info *h)
  2559. {
  2560. return h->access.intr_pending(h);
  2561. }
  2562. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2563. {
  2564. return (h->access.intr_pending(h) == 0) ||
  2565. (h->interrupts_enabled == 0);
  2566. }
  2567. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2568. u32 raw_tag)
  2569. {
  2570. if (unlikely(tag_index >= h->nr_cmds)) {
  2571. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2572. return 1;
  2573. }
  2574. return 0;
  2575. }
  2576. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2577. {
  2578. removeQ(c);
  2579. if (likely(c->cmd_type == CMD_SCSI))
  2580. complete_scsi_command(c, 0, raw_tag);
  2581. else if (c->cmd_type == CMD_IOCTL_PEND)
  2582. complete(c->waiting);
  2583. }
  2584. static inline u32 hpsa_tag_contains_index(u32 tag)
  2585. {
  2586. return tag & DIRECT_LOOKUP_BIT;
  2587. }
  2588. static inline u32 hpsa_tag_to_index(u32 tag)
  2589. {
  2590. return tag >> DIRECT_LOOKUP_SHIFT;
  2591. }
  2592. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2593. {
  2594. #define HPSA_ERROR_BITS 0x03
  2595. return tag & ~HPSA_ERROR_BITS;
  2596. }
  2597. /* process completion of an indexed ("direct lookup") command */
  2598. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2599. u32 raw_tag)
  2600. {
  2601. u32 tag_index;
  2602. struct CommandList *c;
  2603. tag_index = hpsa_tag_to_index(raw_tag);
  2604. if (bad_tag(h, tag_index, raw_tag))
  2605. return next_command(h);
  2606. c = h->cmd_pool + tag_index;
  2607. finish_cmd(c, raw_tag);
  2608. return next_command(h);
  2609. }
  2610. /* process completion of a non-indexed command */
  2611. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2612. u32 raw_tag)
  2613. {
  2614. u32 tag;
  2615. struct CommandList *c = NULL;
  2616. struct hlist_node *tmp;
  2617. tag = hpsa_tag_discard_error_bits(raw_tag);
  2618. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2619. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2620. finish_cmd(c, raw_tag);
  2621. return next_command(h);
  2622. }
  2623. }
  2624. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2625. return next_command(h);
  2626. }
  2627. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2628. {
  2629. struct ctlr_info *h = dev_id;
  2630. unsigned long flags;
  2631. u32 raw_tag;
  2632. if (interrupt_not_for_us(h))
  2633. return IRQ_NONE;
  2634. spin_lock_irqsave(&h->lock, flags);
  2635. while (interrupt_pending(h)) {
  2636. raw_tag = get_next_completion(h);
  2637. while (raw_tag != FIFO_EMPTY) {
  2638. if (hpsa_tag_contains_index(raw_tag))
  2639. raw_tag = process_indexed_cmd(h, raw_tag);
  2640. else
  2641. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2642. }
  2643. }
  2644. spin_unlock_irqrestore(&h->lock, flags);
  2645. return IRQ_HANDLED;
  2646. }
  2647. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2648. {
  2649. struct ctlr_info *h = dev_id;
  2650. unsigned long flags;
  2651. u32 raw_tag;
  2652. spin_lock_irqsave(&h->lock, flags);
  2653. raw_tag = get_next_completion(h);
  2654. while (raw_tag != FIFO_EMPTY) {
  2655. if (hpsa_tag_contains_index(raw_tag))
  2656. raw_tag = process_indexed_cmd(h, raw_tag);
  2657. else
  2658. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2659. }
  2660. spin_unlock_irqrestore(&h->lock, flags);
  2661. return IRQ_HANDLED;
  2662. }
  2663. /* Send a message CDB to the firmware. */
  2664. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2665. unsigned char type)
  2666. {
  2667. struct Command {
  2668. struct CommandListHeader CommandHeader;
  2669. struct RequestBlock Request;
  2670. struct ErrDescriptor ErrorDescriptor;
  2671. };
  2672. struct Command *cmd;
  2673. static const size_t cmd_sz = sizeof(*cmd) +
  2674. sizeof(cmd->ErrorDescriptor);
  2675. dma_addr_t paddr64;
  2676. uint32_t paddr32, tag;
  2677. void __iomem *vaddr;
  2678. int i, err;
  2679. vaddr = pci_ioremap_bar(pdev, 0);
  2680. if (vaddr == NULL)
  2681. return -ENOMEM;
  2682. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2683. * CCISS commands, so they must be allocated from the lower 4GiB of
  2684. * memory.
  2685. */
  2686. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2687. if (err) {
  2688. iounmap(vaddr);
  2689. return -ENOMEM;
  2690. }
  2691. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2692. if (cmd == NULL) {
  2693. iounmap(vaddr);
  2694. return -ENOMEM;
  2695. }
  2696. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2697. * although there's no guarantee, we assume that the address is at
  2698. * least 4-byte aligned (most likely, it's page-aligned).
  2699. */
  2700. paddr32 = paddr64;
  2701. cmd->CommandHeader.ReplyQueue = 0;
  2702. cmd->CommandHeader.SGList = 0;
  2703. cmd->CommandHeader.SGTotal = 0;
  2704. cmd->CommandHeader.Tag.lower = paddr32;
  2705. cmd->CommandHeader.Tag.upper = 0;
  2706. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2707. cmd->Request.CDBLen = 16;
  2708. cmd->Request.Type.Type = TYPE_MSG;
  2709. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2710. cmd->Request.Type.Direction = XFER_NONE;
  2711. cmd->Request.Timeout = 0; /* Don't time out */
  2712. cmd->Request.CDB[0] = opcode;
  2713. cmd->Request.CDB[1] = type;
  2714. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2715. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2716. cmd->ErrorDescriptor.Addr.upper = 0;
  2717. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2718. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2719. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2720. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2721. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2722. break;
  2723. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2724. }
  2725. iounmap(vaddr);
  2726. /* we leak the DMA buffer here ... no choice since the controller could
  2727. * still complete the command.
  2728. */
  2729. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2730. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2731. opcode, type);
  2732. return -ETIMEDOUT;
  2733. }
  2734. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2735. if (tag & HPSA_ERROR_BIT) {
  2736. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2737. opcode, type);
  2738. return -EIO;
  2739. }
  2740. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2741. opcode, type);
  2742. return 0;
  2743. }
  2744. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2745. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2746. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2747. void * __iomem vaddr, bool use_doorbell)
  2748. {
  2749. u16 pmcsr;
  2750. int pos;
  2751. if (use_doorbell) {
  2752. /* For everything after the P600, the PCI power state method
  2753. * of resetting the controller doesn't work, so we have this
  2754. * other way using the doorbell register.
  2755. */
  2756. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2757. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2758. msleep(1000);
  2759. } else { /* Try to do it the PCI power state way */
  2760. /* Quoting from the Open CISS Specification: "The Power
  2761. * Management Control/Status Register (CSR) controls the power
  2762. * state of the device. The normal operating state is D0,
  2763. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2764. * the controller, place the interface device in D3 then to D0,
  2765. * this causes a secondary PCI reset which will reset the
  2766. * controller." */
  2767. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2768. if (pos == 0) {
  2769. dev_err(&pdev->dev,
  2770. "hpsa_reset_controller: "
  2771. "PCI PM not supported\n");
  2772. return -ENODEV;
  2773. }
  2774. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2775. /* enter the D3hot power management state */
  2776. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2777. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2778. pmcsr |= PCI_D3hot;
  2779. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2780. msleep(500);
  2781. /* enter the D0 power management state */
  2782. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2783. pmcsr |= PCI_D0;
  2784. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2785. msleep(500);
  2786. }
  2787. return 0;
  2788. }
  2789. /* This does a hard reset of the controller using PCI power management
  2790. * states or the using the doorbell register.
  2791. */
  2792. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2793. {
  2794. u64 cfg_offset;
  2795. u32 cfg_base_addr;
  2796. u64 cfg_base_addr_index;
  2797. void __iomem *vaddr;
  2798. unsigned long paddr;
  2799. u32 misc_fw_support, active_transport;
  2800. int rc;
  2801. struct CfgTable __iomem *cfgtable;
  2802. bool use_doorbell;
  2803. u32 board_id;
  2804. u16 command_register;
  2805. /* For controllers as old as the P600, this is very nearly
  2806. * the same thing as
  2807. *
  2808. * pci_save_state(pci_dev);
  2809. * pci_set_power_state(pci_dev, PCI_D3hot);
  2810. * pci_set_power_state(pci_dev, PCI_D0);
  2811. * pci_restore_state(pci_dev);
  2812. *
  2813. * For controllers newer than the P600, the pci power state
  2814. * method of resetting doesn't work so we have another way
  2815. * using the doorbell register.
  2816. */
  2817. /* Exclude 640x boards. These are two pci devices in one slot
  2818. * which share a battery backed cache module. One controls the
  2819. * cache, the other accesses the cache through the one that controls
  2820. * it. If we reset the one controlling the cache, the other will
  2821. * likely not be happy. Just forbid resetting this conjoined mess.
  2822. * The 640x isn't really supported by hpsa anyway.
  2823. */
  2824. rc = hpsa_lookup_board_id(pdev, &board_id);
  2825. if (rc < 0) {
  2826. dev_warn(&pdev->dev, "Not resetting device.\n");
  2827. return -ENODEV;
  2828. }
  2829. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2830. return -ENOTSUPP;
  2831. /* Save the PCI command register */
  2832. pci_read_config_word(pdev, 4, &command_register);
  2833. /* Turn the board off. This is so that later pci_restore_state()
  2834. * won't turn the board on before the rest of config space is ready.
  2835. */
  2836. pci_disable_device(pdev);
  2837. pci_save_state(pdev);
  2838. /* find the first memory BAR, so we can find the cfg table */
  2839. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2840. if (rc)
  2841. return rc;
  2842. vaddr = remap_pci_mem(paddr, 0x250);
  2843. if (!vaddr)
  2844. return -ENOMEM;
  2845. /* find cfgtable in order to check if reset via doorbell is supported */
  2846. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2847. &cfg_base_addr_index, &cfg_offset);
  2848. if (rc)
  2849. goto unmap_vaddr;
  2850. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2851. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2852. if (!cfgtable) {
  2853. rc = -ENOMEM;
  2854. goto unmap_vaddr;
  2855. }
  2856. /* If reset via doorbell register is supported, use that. */
  2857. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2858. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2859. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2860. if (rc)
  2861. goto unmap_cfgtable;
  2862. pci_restore_state(pdev);
  2863. rc = pci_enable_device(pdev);
  2864. if (rc) {
  2865. dev_warn(&pdev->dev, "failed to enable device.\n");
  2866. goto unmap_cfgtable;
  2867. }
  2868. pci_write_config_word(pdev, 4, command_register);
  2869. /* Some devices (notably the HP Smart Array 5i Controller)
  2870. need a little pause here */
  2871. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2872. /* Wait for board to become not ready, then ready. */
  2873. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  2874. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  2875. if (rc)
  2876. dev_warn(&pdev->dev,
  2877. "failed waiting for board to become not ready\n");
  2878. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  2879. if (rc) {
  2880. dev_warn(&pdev->dev,
  2881. "failed waiting for board to become ready\n");
  2882. goto unmap_cfgtable;
  2883. }
  2884. dev_info(&pdev->dev, "board ready.\n");
  2885. /* Controller should be in simple mode at this point. If it's not,
  2886. * It means we're on one of those controllers which doesn't support
  2887. * the doorbell reset method and on which the PCI power management reset
  2888. * method doesn't work (P800, for example.)
  2889. * In those cases, pretend the reset worked and hope for the best.
  2890. */
  2891. active_transport = readl(&cfgtable->TransportActive);
  2892. if (active_transport & PERFORMANT_MODE) {
  2893. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2894. " proceeding anyway.\n");
  2895. rc = -ENOTSUPP;
  2896. }
  2897. unmap_cfgtable:
  2898. iounmap(cfgtable);
  2899. unmap_vaddr:
  2900. iounmap(vaddr);
  2901. return rc;
  2902. }
  2903. /*
  2904. * We cannot read the structure directly, for portability we must use
  2905. * the io functions.
  2906. * This is for debug only.
  2907. */
  2908. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2909. {
  2910. #ifdef HPSA_DEBUG
  2911. int i;
  2912. char temp_name[17];
  2913. dev_info(dev, "Controller Configuration information\n");
  2914. dev_info(dev, "------------------------------------\n");
  2915. for (i = 0; i < 4; i++)
  2916. temp_name[i] = readb(&(tb->Signature[i]));
  2917. temp_name[4] = '\0';
  2918. dev_info(dev, " Signature = %s\n", temp_name);
  2919. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2920. dev_info(dev, " Transport methods supported = 0x%x\n",
  2921. readl(&(tb->TransportSupport)));
  2922. dev_info(dev, " Transport methods active = 0x%x\n",
  2923. readl(&(tb->TransportActive)));
  2924. dev_info(dev, " Requested transport Method = 0x%x\n",
  2925. readl(&(tb->HostWrite.TransportRequest)));
  2926. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2927. readl(&(tb->HostWrite.CoalIntDelay)));
  2928. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2929. readl(&(tb->HostWrite.CoalIntCount)));
  2930. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2931. readl(&(tb->CmdsOutMax)));
  2932. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2933. for (i = 0; i < 16; i++)
  2934. temp_name[i] = readb(&(tb->ServerName[i]));
  2935. temp_name[16] = '\0';
  2936. dev_info(dev, " Server Name = %s\n", temp_name);
  2937. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2938. readl(&(tb->HeartBeat)));
  2939. #endif /* HPSA_DEBUG */
  2940. }
  2941. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2942. {
  2943. int i, offset, mem_type, bar_type;
  2944. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2945. return 0;
  2946. offset = 0;
  2947. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2948. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2949. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2950. offset += 4;
  2951. else {
  2952. mem_type = pci_resource_flags(pdev, i) &
  2953. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2954. switch (mem_type) {
  2955. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2956. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2957. offset += 4; /* 32 bit */
  2958. break;
  2959. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2960. offset += 8;
  2961. break;
  2962. default: /* reserved in PCI 2.2 */
  2963. dev_warn(&pdev->dev,
  2964. "base address is invalid\n");
  2965. return -1;
  2966. break;
  2967. }
  2968. }
  2969. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2970. return i + 1;
  2971. }
  2972. return -1;
  2973. }
  2974. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2975. * controllers that are capable. If not, we use IO-APIC mode.
  2976. */
  2977. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2978. {
  2979. #ifdef CONFIG_PCI_MSI
  2980. int err;
  2981. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2982. {0, 2}, {0, 3}
  2983. };
  2984. /* Some boards advertise MSI but don't really support it */
  2985. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  2986. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  2987. goto default_int_mode;
  2988. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  2989. dev_info(&h->pdev->dev, "MSIX\n");
  2990. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  2991. if (!err) {
  2992. h->intr[0] = hpsa_msix_entries[0].vector;
  2993. h->intr[1] = hpsa_msix_entries[1].vector;
  2994. h->intr[2] = hpsa_msix_entries[2].vector;
  2995. h->intr[3] = hpsa_msix_entries[3].vector;
  2996. h->msix_vector = 1;
  2997. return;
  2998. }
  2999. if (err > 0) {
  3000. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3001. "available\n", err);
  3002. goto default_int_mode;
  3003. } else {
  3004. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3005. err);
  3006. goto default_int_mode;
  3007. }
  3008. }
  3009. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3010. dev_info(&h->pdev->dev, "MSI\n");
  3011. if (!pci_enable_msi(h->pdev))
  3012. h->msi_vector = 1;
  3013. else
  3014. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3015. }
  3016. default_int_mode:
  3017. #endif /* CONFIG_PCI_MSI */
  3018. /* if we get here we're going to use the default interrupt mode */
  3019. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3020. }
  3021. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3022. {
  3023. int i;
  3024. u32 subsystem_vendor_id, subsystem_device_id;
  3025. subsystem_vendor_id = pdev->subsystem_vendor;
  3026. subsystem_device_id = pdev->subsystem_device;
  3027. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3028. subsystem_vendor_id;
  3029. for (i = 0; i < ARRAY_SIZE(products); i++)
  3030. if (*board_id == products[i].board_id)
  3031. return i;
  3032. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3033. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3034. !hpsa_allow_any) {
  3035. dev_warn(&pdev->dev, "unrecognized board ID: "
  3036. "0x%08x, ignoring.\n", *board_id);
  3037. return -ENODEV;
  3038. }
  3039. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3040. }
  3041. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3042. {
  3043. u16 command;
  3044. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3045. return ((command & PCI_COMMAND_MEMORY) == 0);
  3046. }
  3047. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3048. unsigned long *memory_bar)
  3049. {
  3050. int i;
  3051. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3052. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3053. /* addressing mode bits already removed */
  3054. *memory_bar = pci_resource_start(pdev, i);
  3055. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3056. *memory_bar);
  3057. return 0;
  3058. }
  3059. dev_warn(&pdev->dev, "no memory BAR found\n");
  3060. return -ENODEV;
  3061. }
  3062. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3063. void __iomem *vaddr, int wait_for_ready)
  3064. {
  3065. int i, iterations;
  3066. u32 scratchpad;
  3067. if (wait_for_ready)
  3068. iterations = HPSA_BOARD_READY_ITERATIONS;
  3069. else
  3070. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3071. for (i = 0; i < iterations; i++) {
  3072. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3073. if (wait_for_ready) {
  3074. if (scratchpad == HPSA_FIRMWARE_READY)
  3075. return 0;
  3076. } else {
  3077. if (scratchpad != HPSA_FIRMWARE_READY)
  3078. return 0;
  3079. }
  3080. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3081. }
  3082. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3083. return -ENODEV;
  3084. }
  3085. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3086. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3087. u64 *cfg_offset)
  3088. {
  3089. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3090. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3091. *cfg_base_addr &= (u32) 0x0000ffff;
  3092. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3093. if (*cfg_base_addr_index == -1) {
  3094. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3095. return -ENODEV;
  3096. }
  3097. return 0;
  3098. }
  3099. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3100. {
  3101. u64 cfg_offset;
  3102. u32 cfg_base_addr;
  3103. u64 cfg_base_addr_index;
  3104. u32 trans_offset;
  3105. int rc;
  3106. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3107. &cfg_base_addr_index, &cfg_offset);
  3108. if (rc)
  3109. return rc;
  3110. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3111. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3112. if (!h->cfgtable)
  3113. return -ENOMEM;
  3114. /* Find performant mode table. */
  3115. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3116. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3117. cfg_base_addr_index)+cfg_offset+trans_offset,
  3118. sizeof(*h->transtable));
  3119. if (!h->transtable)
  3120. return -ENOMEM;
  3121. return 0;
  3122. }
  3123. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3124. {
  3125. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3126. /* Limit commands in memory limited kdump scenario. */
  3127. if (reset_devices && h->max_commands > 32)
  3128. h->max_commands = 32;
  3129. if (h->max_commands < 16) {
  3130. dev_warn(&h->pdev->dev, "Controller reports "
  3131. "max supported commands of %d, an obvious lie. "
  3132. "Using 16. Ensure that firmware is up to date.\n",
  3133. h->max_commands);
  3134. h->max_commands = 16;
  3135. }
  3136. }
  3137. /* Interrogate the hardware for some limits:
  3138. * max commands, max SG elements without chaining, and with chaining,
  3139. * SG chain block size, etc.
  3140. */
  3141. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3142. {
  3143. hpsa_get_max_perf_mode_cmds(h);
  3144. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3145. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3146. /*
  3147. * Limit in-command s/g elements to 32 save dma'able memory.
  3148. * Howvever spec says if 0, use 31
  3149. */
  3150. h->max_cmd_sg_entries = 31;
  3151. if (h->maxsgentries > 512) {
  3152. h->max_cmd_sg_entries = 32;
  3153. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3154. h->maxsgentries--; /* save one for chain pointer */
  3155. } else {
  3156. h->maxsgentries = 31; /* default to traditional values */
  3157. h->chainsize = 0;
  3158. }
  3159. }
  3160. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3161. {
  3162. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3163. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3164. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3165. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3166. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3167. return false;
  3168. }
  3169. return true;
  3170. }
  3171. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3172. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3173. {
  3174. #ifdef CONFIG_X86
  3175. u32 prefetch;
  3176. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3177. prefetch |= 0x100;
  3178. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3179. #endif
  3180. }
  3181. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3182. * in a prefetch beyond physical memory.
  3183. */
  3184. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3185. {
  3186. u32 dma_prefetch;
  3187. if (h->board_id != 0x3225103C)
  3188. return;
  3189. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3190. dma_prefetch |= 0x8000;
  3191. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3192. }
  3193. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3194. {
  3195. int i;
  3196. u32 doorbell_value;
  3197. unsigned long flags;
  3198. /* under certain very rare conditions, this can take awhile.
  3199. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3200. * as we enter this code.)
  3201. */
  3202. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3203. spin_lock_irqsave(&h->lock, flags);
  3204. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3205. spin_unlock_irqrestore(&h->lock, flags);
  3206. if (!doorbell_value & CFGTBL_ChangeReq)
  3207. break;
  3208. /* delay and try again */
  3209. usleep_range(10000, 20000);
  3210. }
  3211. }
  3212. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3213. {
  3214. u32 trans_support;
  3215. trans_support = readl(&(h->cfgtable->TransportSupport));
  3216. if (!(trans_support & SIMPLE_MODE))
  3217. return -ENOTSUPP;
  3218. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3219. /* Update the field, and then ring the doorbell */
  3220. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3221. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3222. hpsa_wait_for_mode_change_ack(h);
  3223. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3224. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3225. dev_warn(&h->pdev->dev,
  3226. "unable to get board into simple mode\n");
  3227. return -ENODEV;
  3228. }
  3229. return 0;
  3230. }
  3231. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3232. {
  3233. int prod_index, err;
  3234. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3235. if (prod_index < 0)
  3236. return -ENODEV;
  3237. h->product_name = products[prod_index].product_name;
  3238. h->access = *(products[prod_index].access);
  3239. if (hpsa_board_disabled(h->pdev)) {
  3240. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3241. return -ENODEV;
  3242. }
  3243. err = pci_enable_device(h->pdev);
  3244. if (err) {
  3245. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3246. return err;
  3247. }
  3248. err = pci_request_regions(h->pdev, "hpsa");
  3249. if (err) {
  3250. dev_err(&h->pdev->dev,
  3251. "cannot obtain PCI resources, aborting\n");
  3252. return err;
  3253. }
  3254. hpsa_interrupt_mode(h);
  3255. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3256. if (err)
  3257. goto err_out_free_res;
  3258. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3259. if (!h->vaddr) {
  3260. err = -ENOMEM;
  3261. goto err_out_free_res;
  3262. }
  3263. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3264. if (err)
  3265. goto err_out_free_res;
  3266. err = hpsa_find_cfgtables(h);
  3267. if (err)
  3268. goto err_out_free_res;
  3269. hpsa_find_board_params(h);
  3270. if (!hpsa_CISS_signature_present(h)) {
  3271. err = -ENODEV;
  3272. goto err_out_free_res;
  3273. }
  3274. hpsa_enable_scsi_prefetch(h);
  3275. hpsa_p600_dma_prefetch_quirk(h);
  3276. err = hpsa_enter_simple_mode(h);
  3277. if (err)
  3278. goto err_out_free_res;
  3279. return 0;
  3280. err_out_free_res:
  3281. if (h->transtable)
  3282. iounmap(h->transtable);
  3283. if (h->cfgtable)
  3284. iounmap(h->cfgtable);
  3285. if (h->vaddr)
  3286. iounmap(h->vaddr);
  3287. /*
  3288. * Deliberately omit pci_disable_device(): it does something nasty to
  3289. * Smart Array controllers that pci_enable_device does not undo
  3290. */
  3291. pci_release_regions(h->pdev);
  3292. return err;
  3293. }
  3294. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3295. {
  3296. int rc;
  3297. #define HBA_INQUIRY_BYTE_COUNT 64
  3298. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3299. if (!h->hba_inquiry_data)
  3300. return;
  3301. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3302. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3303. if (rc != 0) {
  3304. kfree(h->hba_inquiry_data);
  3305. h->hba_inquiry_data = NULL;
  3306. }
  3307. }
  3308. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3309. {
  3310. int rc, i;
  3311. if (!reset_devices)
  3312. return 0;
  3313. /* Reset the controller with a PCI power-cycle or via doorbell */
  3314. rc = hpsa_kdump_hard_reset_controller(pdev);
  3315. /* -ENOTSUPP here means we cannot reset the controller
  3316. * but it's already (and still) up and running in
  3317. * "performant mode". Or, it might be 640x, which can't reset
  3318. * due to concerns about shared bbwc between 6402/6404 pair.
  3319. */
  3320. if (rc == -ENOTSUPP)
  3321. return 0; /* just try to do the kdump anyhow. */
  3322. if (rc)
  3323. return -ENODEV;
  3324. /* Now try to get the controller to respond to a no-op */
  3325. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3326. if (hpsa_noop(pdev) == 0)
  3327. break;
  3328. else
  3329. dev_warn(&pdev->dev, "no-op failed%s\n",
  3330. (i < 11 ? "; re-trying" : ""));
  3331. }
  3332. return 0;
  3333. }
  3334. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3335. const struct pci_device_id *ent)
  3336. {
  3337. int dac, rc;
  3338. struct ctlr_info *h;
  3339. if (number_of_controllers == 0)
  3340. printk(KERN_INFO DRIVER_NAME "\n");
  3341. rc = hpsa_init_reset_devices(pdev);
  3342. if (rc)
  3343. return rc;
  3344. /* Command structures must be aligned on a 32-byte boundary because
  3345. * the 5 lower bits of the address are used by the hardware. and by
  3346. * the driver. See comments in hpsa.h for more info.
  3347. */
  3348. #define COMMANDLIST_ALIGNMENT 32
  3349. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3350. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3351. if (!h)
  3352. return -ENOMEM;
  3353. h->pdev = pdev;
  3354. h->busy_initializing = 1;
  3355. INIT_HLIST_HEAD(&h->cmpQ);
  3356. INIT_HLIST_HEAD(&h->reqQ);
  3357. spin_lock_init(&h->lock);
  3358. spin_lock_init(&h->scan_lock);
  3359. rc = hpsa_pci_init(h);
  3360. if (rc != 0)
  3361. goto clean1;
  3362. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3363. h->ctlr = number_of_controllers;
  3364. number_of_controllers++;
  3365. /* configure PCI DMA stuff */
  3366. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3367. if (rc == 0) {
  3368. dac = 1;
  3369. } else {
  3370. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3371. if (rc == 0) {
  3372. dac = 0;
  3373. } else {
  3374. dev_err(&pdev->dev, "no suitable DMA available\n");
  3375. goto clean1;
  3376. }
  3377. }
  3378. /* make sure the board interrupts are off */
  3379. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3380. if (h->msix_vector || h->msi_vector)
  3381. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
  3382. IRQF_DISABLED, h->devname, h);
  3383. else
  3384. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
  3385. IRQF_DISABLED, h->devname, h);
  3386. if (rc) {
  3387. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3388. h->intr[PERF_MODE_INT], h->devname);
  3389. goto clean2;
  3390. }
  3391. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3392. h->devname, pdev->device,
  3393. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3394. h->cmd_pool_bits =
  3395. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3396. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3397. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3398. h->nr_cmds * sizeof(*h->cmd_pool),
  3399. &(h->cmd_pool_dhandle));
  3400. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3401. h->nr_cmds * sizeof(*h->errinfo_pool),
  3402. &(h->errinfo_pool_dhandle));
  3403. if ((h->cmd_pool_bits == NULL)
  3404. || (h->cmd_pool == NULL)
  3405. || (h->errinfo_pool == NULL)) {
  3406. dev_err(&pdev->dev, "out of memory");
  3407. rc = -ENOMEM;
  3408. goto clean4;
  3409. }
  3410. if (hpsa_allocate_sg_chain_blocks(h))
  3411. goto clean4;
  3412. init_waitqueue_head(&h->scan_wait_queue);
  3413. h->scan_finished = 1; /* no scan currently in progress */
  3414. pci_set_drvdata(pdev, h);
  3415. memset(h->cmd_pool_bits, 0,
  3416. ((h->nr_cmds + BITS_PER_LONG -
  3417. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3418. hpsa_scsi_setup(h);
  3419. /* Turn the interrupts on so we can service requests */
  3420. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3421. hpsa_put_ctlr_into_performant_mode(h);
  3422. hpsa_hba_inquiry(h);
  3423. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3424. h->busy_initializing = 0;
  3425. return 1;
  3426. clean4:
  3427. hpsa_free_sg_chain_blocks(h);
  3428. kfree(h->cmd_pool_bits);
  3429. if (h->cmd_pool)
  3430. pci_free_consistent(h->pdev,
  3431. h->nr_cmds * sizeof(struct CommandList),
  3432. h->cmd_pool, h->cmd_pool_dhandle);
  3433. if (h->errinfo_pool)
  3434. pci_free_consistent(h->pdev,
  3435. h->nr_cmds * sizeof(struct ErrorInfo),
  3436. h->errinfo_pool,
  3437. h->errinfo_pool_dhandle);
  3438. free_irq(h->intr[PERF_MODE_INT], h);
  3439. clean2:
  3440. clean1:
  3441. h->busy_initializing = 0;
  3442. kfree(h);
  3443. return rc;
  3444. }
  3445. static void hpsa_flush_cache(struct ctlr_info *h)
  3446. {
  3447. char *flush_buf;
  3448. struct CommandList *c;
  3449. flush_buf = kzalloc(4, GFP_KERNEL);
  3450. if (!flush_buf)
  3451. return;
  3452. c = cmd_special_alloc(h);
  3453. if (!c) {
  3454. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3455. goto out_of_memory;
  3456. }
  3457. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3458. RAID_CTLR_LUNID, TYPE_CMD);
  3459. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3460. if (c->err_info->CommandStatus != 0)
  3461. dev_warn(&h->pdev->dev,
  3462. "error flushing cache on controller\n");
  3463. cmd_special_free(h, c);
  3464. out_of_memory:
  3465. kfree(flush_buf);
  3466. }
  3467. static void hpsa_shutdown(struct pci_dev *pdev)
  3468. {
  3469. struct ctlr_info *h;
  3470. h = pci_get_drvdata(pdev);
  3471. /* Turn board interrupts off and send the flush cache command
  3472. * sendcmd will turn off interrupt, and send the flush...
  3473. * To write all data in the battery backed cache to disks
  3474. */
  3475. hpsa_flush_cache(h);
  3476. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3477. free_irq(h->intr[PERF_MODE_INT], h);
  3478. #ifdef CONFIG_PCI_MSI
  3479. if (h->msix_vector)
  3480. pci_disable_msix(h->pdev);
  3481. else if (h->msi_vector)
  3482. pci_disable_msi(h->pdev);
  3483. #endif /* CONFIG_PCI_MSI */
  3484. }
  3485. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3486. {
  3487. struct ctlr_info *h;
  3488. if (pci_get_drvdata(pdev) == NULL) {
  3489. dev_err(&pdev->dev, "unable to remove device \n");
  3490. return;
  3491. }
  3492. h = pci_get_drvdata(pdev);
  3493. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3494. hpsa_shutdown(pdev);
  3495. iounmap(h->vaddr);
  3496. iounmap(h->transtable);
  3497. iounmap(h->cfgtable);
  3498. hpsa_free_sg_chain_blocks(h);
  3499. pci_free_consistent(h->pdev,
  3500. h->nr_cmds * sizeof(struct CommandList),
  3501. h->cmd_pool, h->cmd_pool_dhandle);
  3502. pci_free_consistent(h->pdev,
  3503. h->nr_cmds * sizeof(struct ErrorInfo),
  3504. h->errinfo_pool, h->errinfo_pool_dhandle);
  3505. pci_free_consistent(h->pdev, h->reply_pool_size,
  3506. h->reply_pool, h->reply_pool_dhandle);
  3507. kfree(h->cmd_pool_bits);
  3508. kfree(h->blockFetchTable);
  3509. kfree(h->hba_inquiry_data);
  3510. /*
  3511. * Deliberately omit pci_disable_device(): it does something nasty to
  3512. * Smart Array controllers that pci_enable_device does not undo
  3513. */
  3514. pci_release_regions(pdev);
  3515. pci_set_drvdata(pdev, NULL);
  3516. kfree(h);
  3517. }
  3518. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3519. __attribute__((unused)) pm_message_t state)
  3520. {
  3521. return -ENOSYS;
  3522. }
  3523. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3524. {
  3525. return -ENOSYS;
  3526. }
  3527. static struct pci_driver hpsa_pci_driver = {
  3528. .name = "hpsa",
  3529. .probe = hpsa_init_one,
  3530. .remove = __devexit_p(hpsa_remove_one),
  3531. .id_table = hpsa_pci_device_id, /* id_table */
  3532. .shutdown = hpsa_shutdown,
  3533. .suspend = hpsa_suspend,
  3534. .resume = hpsa_resume,
  3535. };
  3536. /* Fill in bucket_map[], given nsgs (the max number of
  3537. * scatter gather elements supported) and bucket[],
  3538. * which is an array of 8 integers. The bucket[] array
  3539. * contains 8 different DMA transfer sizes (in 16
  3540. * byte increments) which the controller uses to fetch
  3541. * commands. This function fills in bucket_map[], which
  3542. * maps a given number of scatter gather elements to one of
  3543. * the 8 DMA transfer sizes. The point of it is to allow the
  3544. * controller to only do as much DMA as needed to fetch the
  3545. * command, with the DMA transfer size encoded in the lower
  3546. * bits of the command address.
  3547. */
  3548. static void calc_bucket_map(int bucket[], int num_buckets,
  3549. int nsgs, int *bucket_map)
  3550. {
  3551. int i, j, b, size;
  3552. /* even a command with 0 SGs requires 4 blocks */
  3553. #define MINIMUM_TRANSFER_BLOCKS 4
  3554. #define NUM_BUCKETS 8
  3555. /* Note, bucket_map must have nsgs+1 entries. */
  3556. for (i = 0; i <= nsgs; i++) {
  3557. /* Compute size of a command with i SG entries */
  3558. size = i + MINIMUM_TRANSFER_BLOCKS;
  3559. b = num_buckets; /* Assume the biggest bucket */
  3560. /* Find the bucket that is just big enough */
  3561. for (j = 0; j < 8; j++) {
  3562. if (bucket[j] >= size) {
  3563. b = j;
  3564. break;
  3565. }
  3566. }
  3567. /* for a command with i SG entries, use bucket b. */
  3568. bucket_map[i] = b;
  3569. }
  3570. }
  3571. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3572. {
  3573. int i;
  3574. unsigned long register_value;
  3575. /* This is a bit complicated. There are 8 registers on
  3576. * the controller which we write to to tell it 8 different
  3577. * sizes of commands which there may be. It's a way of
  3578. * reducing the DMA done to fetch each command. Encoded into
  3579. * each command's tag are 3 bits which communicate to the controller
  3580. * which of the eight sizes that command fits within. The size of
  3581. * each command depends on how many scatter gather entries there are.
  3582. * Each SG entry requires 16 bytes. The eight registers are programmed
  3583. * with the number of 16-byte blocks a command of that size requires.
  3584. * The smallest command possible requires 5 such 16 byte blocks.
  3585. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3586. * blocks. Note, this only extends to the SG entries contained
  3587. * within the command block, and does not extend to chained blocks
  3588. * of SG elements. bft[] contains the eight values we write to
  3589. * the registers. They are not evenly distributed, but have more
  3590. * sizes for small commands, and fewer sizes for larger commands.
  3591. */
  3592. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3593. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3594. /* 5 = 1 s/g entry or 4k
  3595. * 6 = 2 s/g entry or 8k
  3596. * 8 = 4 s/g entry or 16k
  3597. * 10 = 6 s/g entry or 24k
  3598. */
  3599. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3600. /* Controller spec: zero out this buffer. */
  3601. memset(h->reply_pool, 0, h->reply_pool_size);
  3602. h->reply_pool_head = h->reply_pool;
  3603. bft[7] = h->max_sg_entries + 4;
  3604. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3605. for (i = 0; i < 8; i++)
  3606. writel(bft[i], &h->transtable->BlockFetch[i]);
  3607. /* size of controller ring buffer */
  3608. writel(h->max_commands, &h->transtable->RepQSize);
  3609. writel(1, &h->transtable->RepQCount);
  3610. writel(0, &h->transtable->RepQCtrAddrLow32);
  3611. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3612. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3613. writel(0, &h->transtable->RepQAddr0High32);
  3614. writel(CFGTBL_Trans_Performant,
  3615. &(h->cfgtable->HostWrite.TransportRequest));
  3616. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3617. hpsa_wait_for_mode_change_ack(h);
  3618. register_value = readl(&(h->cfgtable->TransportActive));
  3619. if (!(register_value & CFGTBL_Trans_Performant)) {
  3620. dev_warn(&h->pdev->dev, "unable to get board into"
  3621. " performant mode\n");
  3622. return;
  3623. }
  3624. }
  3625. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3626. {
  3627. u32 trans_support;
  3628. if (hpsa_simple_mode)
  3629. return;
  3630. trans_support = readl(&(h->cfgtable->TransportSupport));
  3631. if (!(trans_support & PERFORMANT_MODE))
  3632. return;
  3633. hpsa_get_max_perf_mode_cmds(h);
  3634. h->max_sg_entries = 32;
  3635. /* Performant mode ring buffer and supporting data structures */
  3636. h->reply_pool_size = h->max_commands * sizeof(u64);
  3637. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3638. &(h->reply_pool_dhandle));
  3639. /* Need a block fetch table for performant mode */
  3640. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3641. sizeof(u32)), GFP_KERNEL);
  3642. if ((h->reply_pool == NULL)
  3643. || (h->blockFetchTable == NULL))
  3644. goto clean_up;
  3645. hpsa_enter_performant_mode(h);
  3646. /* Change the access methods to the performant access methods */
  3647. h->access = SA5_performant_access;
  3648. h->transMethod = CFGTBL_Trans_Performant;
  3649. return;
  3650. clean_up:
  3651. if (h->reply_pool)
  3652. pci_free_consistent(h->pdev, h->reply_pool_size,
  3653. h->reply_pool, h->reply_pool_dhandle);
  3654. kfree(h->blockFetchTable);
  3655. }
  3656. /*
  3657. * This is it. Register the PCI driver information for the cards we control
  3658. * the OS will call our registered routines when it finds one of our cards.
  3659. */
  3660. static int __init hpsa_init(void)
  3661. {
  3662. return pci_register_driver(&hpsa_pci_driver);
  3663. }
  3664. static void __exit hpsa_cleanup(void)
  3665. {
  3666. pci_unregister_driver(&hpsa_pci_driver);
  3667. }
  3668. module_init(hpsa_init);
  3669. module_exit(hpsa_cleanup);