stamp.c 74 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/io.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/nand.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/plat-ram.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/flash.h>
  19. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  20. #include <linux/usb/isp1362.h>
  21. #endif
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/adp5588.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/ata_platform.h>
  26. #include <linux/irq.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/usb/sl811.h>
  29. #include <linux/spi/mmc_spi.h>
  30. #include <linux/leds.h>
  31. #include <linux/input.h>
  32. #include <asm/dma.h>
  33. #include <asm/bfin5xx_spi.h>
  34. #include <asm/reboot.h>
  35. #include <asm/portmux.h>
  36. #include <asm/dpmc.h>
  37. #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
  38. #include <linux/regulator/fixed.h>
  39. #endif
  40. #include <linux/regulator/machine.h>
  41. #include <linux/regulator/consumer.h>
  42. #include <linux/regulator/userspace-consumer.h>
  43. /*
  44. * Name the Board for the /proc/cpuinfo
  45. */
  46. const char bfin_board_name[] = "ADI BF537-STAMP";
  47. /*
  48. * Driver needs to know address, irq and flag pin.
  49. */
  50. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  51. #include <linux/usb/isp1760.h>
  52. static struct resource bfin_isp1760_resources[] = {
  53. [0] = {
  54. .start = 0x203C0000,
  55. .end = 0x203C0000 + 0x000fffff,
  56. .flags = IORESOURCE_MEM,
  57. },
  58. [1] = {
  59. .start = IRQ_PF7,
  60. .end = IRQ_PF7,
  61. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  62. },
  63. };
  64. static struct isp1760_platform_data isp1760_priv = {
  65. .is_isp1761 = 0,
  66. .bus_width_16 = 1,
  67. .port1_otg = 0,
  68. .analog_oc = 0,
  69. .dack_polarity_high = 0,
  70. .dreq_polarity_high = 0,
  71. };
  72. static struct platform_device bfin_isp1760_device = {
  73. .name = "isp1760",
  74. .id = 0,
  75. .dev = {
  76. .platform_data = &isp1760_priv,
  77. },
  78. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  79. .resource = bfin_isp1760_resources,
  80. };
  81. #endif
  82. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  83. #include <linux/gpio_keys.h>
  84. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  85. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  86. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  87. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  88. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  89. };
  90. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  91. .buttons = bfin_gpio_keys_table,
  92. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  93. };
  94. static struct platform_device bfin_device_gpiokeys = {
  95. .name = "gpio-keys",
  96. .dev = {
  97. .platform_data = &bfin_gpio_keys_data,
  98. },
  99. };
  100. #endif
  101. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  102. static struct resource bfin_pcmcia_cf_resources[] = {
  103. {
  104. .start = 0x20310000, /* IO PORT */
  105. .end = 0x20312000,
  106. .flags = IORESOURCE_MEM,
  107. }, {
  108. .start = 0x20311000, /* Attribute Memory */
  109. .end = 0x20311FFF,
  110. .flags = IORESOURCE_MEM,
  111. }, {
  112. .start = IRQ_PF4,
  113. .end = IRQ_PF4,
  114. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  115. }, {
  116. .start = 6, /* Card Detect PF6 */
  117. .end = 6,
  118. .flags = IORESOURCE_IRQ,
  119. },
  120. };
  121. static struct platform_device bfin_pcmcia_cf_device = {
  122. .name = "bfin_cf_pcmcia",
  123. .id = -1,
  124. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  125. .resource = bfin_pcmcia_cf_resources,
  126. };
  127. #endif
  128. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  129. static struct platform_device rtc_device = {
  130. .name = "rtc-bfin",
  131. .id = -1,
  132. };
  133. #endif
  134. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  135. #include <linux/smc91x.h>
  136. static struct smc91x_platdata smc91x_info = {
  137. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  138. .leda = RPC_LED_100_10,
  139. .ledb = RPC_LED_TX_RX,
  140. };
  141. static struct resource smc91x_resources[] = {
  142. {
  143. .name = "smc91x-regs",
  144. .start = 0x20300300,
  145. .end = 0x20300300 + 16,
  146. .flags = IORESOURCE_MEM,
  147. }, {
  148. .start = IRQ_PF7,
  149. .end = IRQ_PF7,
  150. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  151. },
  152. };
  153. static struct platform_device smc91x_device = {
  154. .name = "smc91x",
  155. .id = 0,
  156. .num_resources = ARRAY_SIZE(smc91x_resources),
  157. .resource = smc91x_resources,
  158. .dev = {
  159. .platform_data = &smc91x_info,
  160. },
  161. };
  162. #endif
  163. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  164. static struct resource dm9000_resources[] = {
  165. [0] = {
  166. .start = 0x203FB800,
  167. .end = 0x203FB800 + 1,
  168. .flags = IORESOURCE_MEM,
  169. },
  170. [1] = {
  171. .start = 0x203FB804,
  172. .end = 0x203FB804 + 1,
  173. .flags = IORESOURCE_MEM,
  174. },
  175. [2] = {
  176. .start = IRQ_PF9,
  177. .end = IRQ_PF9,
  178. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  179. },
  180. };
  181. static struct platform_device dm9000_device = {
  182. .name = "dm9000",
  183. .id = -1,
  184. .num_resources = ARRAY_SIZE(dm9000_resources),
  185. .resource = dm9000_resources,
  186. };
  187. #endif
  188. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  189. static struct resource sl811_hcd_resources[] = {
  190. {
  191. .start = 0x20340000,
  192. .end = 0x20340000,
  193. .flags = IORESOURCE_MEM,
  194. }, {
  195. .start = 0x20340004,
  196. .end = 0x20340004,
  197. .flags = IORESOURCE_MEM,
  198. }, {
  199. .start = IRQ_PF4,
  200. .end = IRQ_PF4,
  201. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  202. },
  203. };
  204. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  205. void sl811_port_power(struct device *dev, int is_on)
  206. {
  207. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  208. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  209. }
  210. #endif
  211. static struct sl811_platform_data sl811_priv = {
  212. .potpg = 10,
  213. .power = 250, /* == 500mA */
  214. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  215. .port_power = &sl811_port_power,
  216. #endif
  217. };
  218. static struct platform_device sl811_hcd_device = {
  219. .name = "sl811-hcd",
  220. .id = 0,
  221. .dev = {
  222. .platform_data = &sl811_priv,
  223. },
  224. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  225. .resource = sl811_hcd_resources,
  226. };
  227. #endif
  228. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  229. static struct resource isp1362_hcd_resources[] = {
  230. {
  231. .start = 0x20360000,
  232. .end = 0x20360000,
  233. .flags = IORESOURCE_MEM,
  234. }, {
  235. .start = 0x20360004,
  236. .end = 0x20360004,
  237. .flags = IORESOURCE_MEM,
  238. }, {
  239. .start = IRQ_PF3,
  240. .end = IRQ_PF3,
  241. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  242. },
  243. };
  244. static struct isp1362_platform_data isp1362_priv = {
  245. .sel15Kres = 1,
  246. .clknotstop = 0,
  247. .oc_enable = 0,
  248. .int_act_high = 0,
  249. .int_edge_triggered = 0,
  250. .remote_wakeup_connected = 0,
  251. .no_power_switching = 1,
  252. .power_switching_mode = 0,
  253. };
  254. static struct platform_device isp1362_hcd_device = {
  255. .name = "isp1362-hcd",
  256. .id = 0,
  257. .dev = {
  258. .platform_data = &isp1362_priv,
  259. },
  260. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  261. .resource = isp1362_hcd_resources,
  262. };
  263. #endif
  264. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  265. unsigned short bfin_can_peripherals[] = {
  266. P_CAN0_RX, P_CAN0_TX, 0
  267. };
  268. static struct resource bfin_can_resources[] = {
  269. {
  270. .start = 0xFFC02A00,
  271. .end = 0xFFC02FFF,
  272. .flags = IORESOURCE_MEM,
  273. },
  274. {
  275. .start = IRQ_CAN_RX,
  276. .end = IRQ_CAN_RX,
  277. .flags = IORESOURCE_IRQ,
  278. },
  279. {
  280. .start = IRQ_CAN_TX,
  281. .end = IRQ_CAN_TX,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. {
  285. .start = IRQ_CAN_ERROR,
  286. .end = IRQ_CAN_ERROR,
  287. .flags = IORESOURCE_IRQ,
  288. },
  289. };
  290. static struct platform_device bfin_can_device = {
  291. .name = "bfin_can",
  292. .num_resources = ARRAY_SIZE(bfin_can_resources),
  293. .resource = bfin_can_resources,
  294. .dev = {
  295. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  296. },
  297. };
  298. #endif
  299. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  300. static struct platform_device bfin_mii_bus = {
  301. .name = "bfin_mii_bus",
  302. };
  303. static struct platform_device bfin_mac_device = {
  304. .name = "bfin_mac",
  305. .dev.platform_data = &bfin_mii_bus,
  306. };
  307. #endif
  308. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  309. static struct resource net2272_bfin_resources[] = {
  310. {
  311. .start = 0x20300000,
  312. .end = 0x20300000 + 0x100,
  313. .flags = IORESOURCE_MEM,
  314. }, {
  315. .start = IRQ_PF7,
  316. .end = IRQ_PF7,
  317. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  318. },
  319. };
  320. static struct platform_device net2272_bfin_device = {
  321. .name = "net2272",
  322. .id = -1,
  323. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  324. .resource = net2272_bfin_resources,
  325. };
  326. #endif
  327. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  328. #ifdef CONFIG_MTD_PARTITIONS
  329. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  330. static struct mtd_partition bfin_plat_nand_partitions[] = {
  331. {
  332. .name = "linux kernel(nand)",
  333. .size = 0x400000,
  334. .offset = 0,
  335. }, {
  336. .name = "file system(nand)",
  337. .size = MTDPART_SIZ_FULL,
  338. .offset = MTDPART_OFS_APPEND,
  339. },
  340. };
  341. #endif
  342. #define BFIN_NAND_PLAT_CLE 2
  343. #define BFIN_NAND_PLAT_ALE 1
  344. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  345. {
  346. struct nand_chip *this = mtd->priv;
  347. if (cmd == NAND_CMD_NONE)
  348. return;
  349. if (ctrl & NAND_CLE)
  350. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  351. else
  352. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  353. }
  354. #define BFIN_NAND_PLAT_READY GPIO_PF3
  355. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  356. {
  357. return gpio_get_value(BFIN_NAND_PLAT_READY);
  358. }
  359. static struct platform_nand_data bfin_plat_nand_data = {
  360. .chip = {
  361. .nr_chips = 1,
  362. .chip_delay = 30,
  363. #ifdef CONFIG_MTD_PARTITIONS
  364. .part_probe_types = part_probes,
  365. .partitions = bfin_plat_nand_partitions,
  366. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  367. #endif
  368. },
  369. .ctrl = {
  370. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  371. .dev_ready = bfin_plat_nand_dev_ready,
  372. },
  373. };
  374. #define MAX(x, y) (x > y ? x : y)
  375. static struct resource bfin_plat_nand_resources = {
  376. .start = 0x20212000,
  377. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  378. .flags = IORESOURCE_MEM,
  379. };
  380. static struct platform_device bfin_async_nand_device = {
  381. .name = "gen_nand",
  382. .id = -1,
  383. .num_resources = 1,
  384. .resource = &bfin_plat_nand_resources,
  385. .dev = {
  386. .platform_data = &bfin_plat_nand_data,
  387. },
  388. };
  389. static void bfin_plat_nand_init(void)
  390. {
  391. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  392. }
  393. #else
  394. static void bfin_plat_nand_init(void) {}
  395. #endif
  396. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  397. static struct mtd_partition stamp_partitions[] = {
  398. {
  399. .name = "bootloader(nor)",
  400. .size = 0x40000,
  401. .offset = 0,
  402. }, {
  403. .name = "linux kernel(nor)",
  404. .size = 0x180000,
  405. .offset = MTDPART_OFS_APPEND,
  406. }, {
  407. .name = "file system(nor)",
  408. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  409. .offset = MTDPART_OFS_APPEND,
  410. }, {
  411. .name = "MAC Address(nor)",
  412. .size = MTDPART_SIZ_FULL,
  413. .offset = 0x3F0000,
  414. .mask_flags = MTD_WRITEABLE,
  415. }
  416. };
  417. static struct physmap_flash_data stamp_flash_data = {
  418. .width = 2,
  419. .parts = stamp_partitions,
  420. .nr_parts = ARRAY_SIZE(stamp_partitions),
  421. #ifdef CONFIG_ROMKERNEL
  422. .probe_type = "map_rom",
  423. #endif
  424. };
  425. static struct resource stamp_flash_resource = {
  426. .start = 0x20000000,
  427. .end = 0x203fffff,
  428. .flags = IORESOURCE_MEM,
  429. };
  430. static struct platform_device stamp_flash_device = {
  431. .name = "physmap-flash",
  432. .id = 0,
  433. .dev = {
  434. .platform_data = &stamp_flash_data,
  435. },
  436. .num_resources = 1,
  437. .resource = &stamp_flash_resource,
  438. };
  439. #endif
  440. #if defined(CONFIG_MTD_M25P80) \
  441. || defined(CONFIG_MTD_M25P80_MODULE)
  442. static struct mtd_partition bfin_spi_flash_partitions[] = {
  443. {
  444. .name = "bootloader(spi)",
  445. .size = 0x00040000,
  446. .offset = 0,
  447. .mask_flags = MTD_CAP_ROM
  448. }, {
  449. .name = "linux kernel(spi)",
  450. .size = 0x180000,
  451. .offset = MTDPART_OFS_APPEND,
  452. }, {
  453. .name = "file system(spi)",
  454. .size = MTDPART_SIZ_FULL,
  455. .offset = MTDPART_OFS_APPEND,
  456. }
  457. };
  458. static struct flash_platform_data bfin_spi_flash_data = {
  459. .name = "m25p80",
  460. .parts = bfin_spi_flash_partitions,
  461. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  462. /* .type = "m25p64", */
  463. };
  464. /* SPI flash chip (m25p64) */
  465. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  466. .enable_dma = 0, /* use dma transfer with this chip*/
  467. .bits_per_word = 8,
  468. };
  469. #endif
  470. #if defined(CONFIG_BFIN_SPI_ADC) \
  471. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  472. /* SPI ADC chip */
  473. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  474. .enable_dma = 1, /* use dma transfer with this chip*/
  475. .bits_per_word = 16,
  476. };
  477. #endif
  478. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  479. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  480. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  481. .enable_dma = 0,
  482. .bits_per_word = 16,
  483. };
  484. #endif
  485. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) \
  486. || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  487. static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
  488. .enable_dma = 0,
  489. .bits_per_word = 8,
  490. };
  491. #endif
  492. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) \
  493. || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  494. static struct bfin5xx_spi_chip adav801_spi_chip_info = {
  495. .enable_dma = 0,
  496. .bits_per_word = 8,
  497. };
  498. #endif
  499. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  500. #include <linux/input/ad714x.h>
  501. static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
  502. .enable_dma = 0,
  503. .bits_per_word = 16,
  504. };
  505. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  506. {
  507. .start_stage = 0,
  508. .end_stage = 7,
  509. .max_coord = 128,
  510. },
  511. };
  512. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  513. {
  514. .keycode = BTN_FORWARD,
  515. .l_mask = 0,
  516. .h_mask = 0x600,
  517. },
  518. {
  519. .keycode = BTN_LEFT,
  520. .l_mask = 0,
  521. .h_mask = 0x500,
  522. },
  523. {
  524. .keycode = BTN_MIDDLE,
  525. .l_mask = 0,
  526. .h_mask = 0x800,
  527. },
  528. {
  529. .keycode = BTN_RIGHT,
  530. .l_mask = 0x100,
  531. .h_mask = 0x400,
  532. },
  533. {
  534. .keycode = BTN_BACK,
  535. .l_mask = 0x200,
  536. .h_mask = 0x400,
  537. },
  538. };
  539. static struct ad714x_platform_data ad7147_spi_platform_data = {
  540. .slider_num = 1,
  541. .button_num = 5,
  542. .slider = ad7147_spi_slider_plat,
  543. .button = ad7147_spi_button_plat,
  544. .stage_cfg_reg = {
  545. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  546. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  547. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  548. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  549. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  550. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  551. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  552. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  553. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  554. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  555. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  556. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  557. },
  558. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  559. };
  560. #endif
  561. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  562. #include <linux/input/ad714x.h>
  563. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  564. {
  565. .keycode = BTN_1,
  566. .l_mask = 0,
  567. .h_mask = 0x1,
  568. },
  569. {
  570. .keycode = BTN_2,
  571. .l_mask = 0,
  572. .h_mask = 0x2,
  573. },
  574. {
  575. .keycode = BTN_3,
  576. .l_mask = 0,
  577. .h_mask = 0x4,
  578. },
  579. {
  580. .keycode = BTN_4,
  581. .l_mask = 0x0,
  582. .h_mask = 0x8,
  583. },
  584. };
  585. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  586. .button_num = 4,
  587. .button = ad7142_i2c_button_plat,
  588. .stage_cfg_reg = {
  589. /* fixme: figure out right setting for all comoponent according
  590. * to hardware feature of EVAL-AD7142EB board */
  591. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  592. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  593. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  594. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  595. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  596. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  597. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  598. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  599. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  600. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  601. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  602. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  603. },
  604. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  605. };
  606. #endif
  607. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  608. static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
  609. .enable_dma = 0,
  610. .bits_per_word = 16,
  611. };
  612. #endif
  613. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  614. unsigned short ad2s120x_platform_data[] = {
  615. /* used as SAMPLE and RDVEL */
  616. GPIO_PF5, GPIO_PF6, 0
  617. };
  618. static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
  619. .enable_dma = 0,
  620. .bits_per_word = 16,
  621. };
  622. #endif
  623. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  624. unsigned short ad2s1210_platform_data[] = {
  625. /* use as SAMPLE, A0, A1 */
  626. GPIO_PF7, GPIO_PF8, GPIO_PF9,
  627. # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
  628. /* the RES0 and RES1 pins */
  629. GPIO_PF4, GPIO_PF5,
  630. # endif
  631. 0,
  632. };
  633. static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
  634. .enable_dma = 0,
  635. .bits_per_word = 8,
  636. };
  637. #endif
  638. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  639. static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
  640. .enable_dma = 0,
  641. .bits_per_word = 16,
  642. };
  643. #endif
  644. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  645. static unsigned short ad7816_platform_data[] = {
  646. GPIO_PF4, /* rdwr_pin */
  647. GPIO_PF5, /* convert_pin */
  648. GPIO_PF7, /* busy_pin */
  649. 0,
  650. };
  651. static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
  652. .enable_dma = 0,
  653. .bits_per_word = 8,
  654. };
  655. #endif
  656. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  657. static unsigned long adt7310_platform_data[3] = {
  658. /* INT bound temperature alarm event. line 1 */
  659. IRQ_PG4, IRQF_TRIGGER_LOW,
  660. /* CT bound temperature alarm event irq_flags. line 0 */
  661. IRQF_TRIGGER_LOW,
  662. };
  663. static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
  664. .enable_dma = 0,
  665. .bits_per_word = 8,
  666. };
  667. #endif
  668. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  669. static unsigned short ad7298_platform_data[] = {
  670. GPIO_PF7, /* busy_pin */
  671. 0,
  672. };
  673. static struct bfin5xx_spi_chip ad7298_spi_chip_info = {
  674. .enable_dma = 0,
  675. .bits_per_word = 16,
  676. };
  677. #endif
  678. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  679. static unsigned long adt7316_spi_data[2] = {
  680. IRQF_TRIGGER_LOW, /* interrupt flags */
  681. GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  682. };
  683. static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
  684. .enable_dma = 0,
  685. .bits_per_word = 8,
  686. };
  687. #endif
  688. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  689. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  690. static int bfin_mmc_spi_init(struct device *dev,
  691. irqreturn_t (*detect_int)(int, void *), void *data)
  692. {
  693. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  694. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  695. }
  696. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  697. {
  698. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  699. }
  700. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  701. .init = bfin_mmc_spi_init,
  702. .exit = bfin_mmc_spi_exit,
  703. .detect_delay = 100, /* msecs */
  704. };
  705. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  706. .enable_dma = 0,
  707. .bits_per_word = 8,
  708. .pio_interrupt = 0,
  709. };
  710. #endif
  711. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  712. #include <linux/spi/ad7877.h>
  713. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  714. .enable_dma = 0,
  715. .bits_per_word = 16,
  716. };
  717. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  718. .model = 7877,
  719. .vref_delay_usecs = 50, /* internal, no capacitor */
  720. .x_plate_ohms = 419,
  721. .y_plate_ohms = 486,
  722. .pressure_max = 1000,
  723. .pressure_min = 0,
  724. .stopacq_polarity = 1,
  725. .first_conversion_delay = 3,
  726. .acquisition_time = 1,
  727. .averaging = 1,
  728. .pen_down_acc_interval = 1,
  729. };
  730. #endif
  731. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  732. #include <linux/spi/ad7879.h>
  733. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  734. .model = 7879, /* Model = AD7879 */
  735. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  736. .pressure_max = 10000,
  737. .pressure_min = 0,
  738. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  739. .acquisition_time = 1, /* 4us acquisition time per sample */
  740. .median = 2, /* do 8 measurements */
  741. .averaging = 1, /* take the average of 4 middle samples */
  742. .pen_down_acc_interval = 255, /* 9.4 ms */
  743. .gpio_export = 1, /* Export GPIO to gpiolib */
  744. .gpio_base = -1, /* Dynamic allocation */
  745. };
  746. #endif
  747. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  748. #include <linux/input/adxl34x.h>
  749. static const struct adxl34x_platform_data adxl34x_info = {
  750. .x_axis_offset = 0,
  751. .y_axis_offset = 0,
  752. .z_axis_offset = 0,
  753. .tap_threshold = 0x31,
  754. .tap_duration = 0x10,
  755. .tap_latency = 0x60,
  756. .tap_window = 0xF0,
  757. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  758. .act_axis_control = 0xFF,
  759. .activity_threshold = 5,
  760. .inactivity_threshold = 3,
  761. .inactivity_time = 4,
  762. .free_fall_threshold = 0x7,
  763. .free_fall_time = 0x20,
  764. .data_rate = 0x8,
  765. .data_range = ADXL_FULL_RES,
  766. .ev_type = EV_ABS,
  767. .ev_code_x = ABS_X, /* EV_REL */
  768. .ev_code_y = ABS_Y, /* EV_REL */
  769. .ev_code_z = ABS_Z, /* EV_REL */
  770. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  771. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  772. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  773. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  774. .fifo_mode = ADXL_FIFO_STREAM,
  775. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  776. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  777. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  778. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  779. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  780. };
  781. #endif
  782. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  783. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  784. .enable_dma = 0,
  785. .bits_per_word = 16,
  786. };
  787. #endif
  788. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  789. static struct bfin5xx_spi_chip spidev_chip_info = {
  790. .enable_dma = 0,
  791. .bits_per_word = 8,
  792. };
  793. #endif
  794. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  795. static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
  796. .enable_dma = 0,
  797. .bits_per_word = 8,
  798. };
  799. #endif
  800. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  801. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  802. .enable_dma = 1,
  803. .bits_per_word = 8,
  804. };
  805. #endif
  806. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  807. static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
  808. .bits_per_word = 16,
  809. };
  810. #include <linux/spi/adf702x.h>
  811. #define TXREG 0x0160A470
  812. static const u32 adf7021_regs[] = {
  813. 0x09608FA0,
  814. 0x00575011,
  815. 0x00A7F092,
  816. 0x2B141563,
  817. 0x81F29E94,
  818. 0x00003155,
  819. 0x050A4F66,
  820. 0x00000007,
  821. 0x00000008,
  822. 0x000231E9,
  823. 0x3296354A,
  824. 0x891A2B3B,
  825. 0x00000D9C,
  826. 0x0000000D,
  827. 0x0000000E,
  828. 0x0000000F,
  829. };
  830. static struct adf702x_platform_data adf7021_platform_data = {
  831. .regs_base = (void *)SPORT1_TCR1,
  832. .dma_ch_rx = CH_SPORT1_RX,
  833. .dma_ch_tx = CH_SPORT1_TX,
  834. .irq_sport_err = IRQ_SPORT1_ERROR,
  835. .gpio_int_rfs = GPIO_PF8,
  836. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  837. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  838. .adf702x_model = MODEL_ADF7021,
  839. .adf702x_regs = adf7021_regs,
  840. .tx_reg = TXREG,
  841. };
  842. static inline void adf702x_mac_init(void)
  843. {
  844. random_ether_addr(adf7021_platform_data.mac_addr);
  845. }
  846. #else
  847. static inline void adf702x_mac_init(void) {}
  848. #endif
  849. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  850. #include <linux/spi/ads7846.h>
  851. static struct bfin5xx_spi_chip ad7873_spi_chip_info = {
  852. .bits_per_word = 8,
  853. };
  854. static int ads7873_get_pendown_state(void)
  855. {
  856. return gpio_get_value(GPIO_PF6);
  857. }
  858. static struct ads7846_platform_data __initdata ad7873_pdata = {
  859. .model = 7873, /* AD7873 */
  860. .x_max = 0xfff,
  861. .y_max = 0xfff,
  862. .x_plate_ohms = 620,
  863. .debounce_max = 1,
  864. .debounce_rep = 0,
  865. .debounce_tol = (~0),
  866. .get_pendown_state = ads7873_get_pendown_state,
  867. };
  868. #endif
  869. #if defined(CONFIG_MTD_DATAFLASH) \
  870. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  871. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  872. {
  873. .name = "bootloader(spi)",
  874. .size = 0x00040000,
  875. .offset = 0,
  876. .mask_flags = MTD_CAP_ROM
  877. }, {
  878. .name = "linux kernel(spi)",
  879. .size = 0x180000,
  880. .offset = MTDPART_OFS_APPEND,
  881. }, {
  882. .name = "file system(spi)",
  883. .size = MTDPART_SIZ_FULL,
  884. .offset = MTDPART_OFS_APPEND,
  885. }
  886. };
  887. static struct flash_platform_data bfin_spi_dataflash_data = {
  888. .name = "SPI Dataflash",
  889. .parts = bfin_spi_dataflash_partitions,
  890. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  891. };
  892. /* DataFlash chip */
  893. static struct bfin5xx_spi_chip data_flash_chip_info = {
  894. .enable_dma = 0, /* use dma transfer with this chip*/
  895. .bits_per_word = 8,
  896. };
  897. #endif
  898. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  899. static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
  900. .enable_dma = 0, /* use dma transfer with this chip*/
  901. .bits_per_word = 8,
  902. };
  903. #endif
  904. #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
  905. static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
  906. .enable_dma = 0, /* use dma transfer with this chip*/
  907. .bits_per_word = 8,
  908. };
  909. #endif
  910. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  911. #if defined(CONFIG_MTD_M25P80) \
  912. || defined(CONFIG_MTD_M25P80_MODULE)
  913. {
  914. /* the modalias must be the same as spi device driver name */
  915. .modalias = "m25p80", /* Name of spi_driver for this device */
  916. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  917. .bus_num = 0, /* Framework bus number */
  918. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  919. .platform_data = &bfin_spi_flash_data,
  920. .controller_data = &spi_flash_chip_info,
  921. .mode = SPI_MODE_3,
  922. },
  923. #endif
  924. #if defined(CONFIG_MTD_DATAFLASH) \
  925. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  926. { /* DataFlash chip */
  927. .modalias = "mtd_dataflash",
  928. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  929. .bus_num = 0, /* Framework bus number */
  930. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  931. .platform_data = &bfin_spi_dataflash_data,
  932. .controller_data = &data_flash_chip_info,
  933. .mode = SPI_MODE_3,
  934. },
  935. #endif
  936. #if defined(CONFIG_BFIN_SPI_ADC) \
  937. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  938. {
  939. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  940. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  941. .bus_num = 0, /* Framework bus number */
  942. .chip_select = 1, /* Framework chip select. */
  943. .platform_data = NULL, /* No spi_driver specific config */
  944. .controller_data = &spi_adc_chip_info,
  945. },
  946. #endif
  947. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  948. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  949. {
  950. .modalias = "ad183x",
  951. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  952. .bus_num = 0,
  953. .chip_select = 4,
  954. .platform_data = "ad1836", /* only includes chip name for the moment */
  955. .controller_data = &ad1836_spi_chip_info,
  956. .mode = SPI_MODE_3,
  957. },
  958. #endif
  959. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  960. {
  961. .modalias = "ad193x",
  962. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  963. .bus_num = 0,
  964. .chip_select = 5,
  965. .controller_data = &ad1938_spi_chip_info,
  966. .mode = SPI_MODE_3,
  967. },
  968. #endif
  969. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  970. {
  971. .modalias = "adav80x",
  972. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  973. .bus_num = 0,
  974. .chip_select = 1,
  975. .controller_data = &adav801_spi_chip_info,
  976. .mode = SPI_MODE_3,
  977. },
  978. #endif
  979. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  980. {
  981. .modalias = "ad714x_captouch",
  982. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  983. .irq = IRQ_PF4,
  984. .bus_num = 0,
  985. .chip_select = 5,
  986. .mode = SPI_MODE_3,
  987. .platform_data = &ad7147_spi_platform_data,
  988. .controller_data = &ad7147_spi_chip_info,
  989. },
  990. #endif
  991. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  992. {
  993. .modalias = "ad2s90",
  994. .bus_num = 0,
  995. .chip_select = 3, /* change it for your board */
  996. .mode = SPI_MODE_3,
  997. .platform_data = NULL,
  998. .controller_data = &ad2s90_spi_chip_info,
  999. },
  1000. #endif
  1001. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  1002. {
  1003. .modalias = "ad2s120x",
  1004. .bus_num = 0,
  1005. .chip_select = 4, /* CS, change it for your board */
  1006. .platform_data = ad2s120x_platform_data,
  1007. .controller_data = &ad2s120x_spi_chip_info,
  1008. },
  1009. #endif
  1010. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  1011. {
  1012. .modalias = "ad2s1210",
  1013. .max_speed_hz = 8192000,
  1014. .bus_num = 0,
  1015. .chip_select = 4, /* CS, change it for your board */
  1016. .platform_data = ad2s1210_platform_data,
  1017. .controller_data = &ad2s1210_spi_chip_info,
  1018. },
  1019. #endif
  1020. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  1021. {
  1022. .modalias = "ad7314",
  1023. .max_speed_hz = 1000000,
  1024. .bus_num = 0,
  1025. .chip_select = 4, /* CS, change it for your board */
  1026. .controller_data = &ad7314_spi_chip_info,
  1027. .mode = SPI_MODE_1,
  1028. },
  1029. #endif
  1030. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  1031. {
  1032. .modalias = "ad7818",
  1033. .max_speed_hz = 1000000,
  1034. .bus_num = 0,
  1035. .chip_select = 4, /* CS, change it for your board */
  1036. .platform_data = ad7816_platform_data,
  1037. .controller_data = &ad7816_spi_chip_info,
  1038. .mode = SPI_MODE_3,
  1039. },
  1040. #endif
  1041. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  1042. {
  1043. .modalias = "adt7310",
  1044. .max_speed_hz = 1000000,
  1045. .irq = IRQ_PG5, /* CT alarm event. Line 0 */
  1046. .bus_num = 0,
  1047. .chip_select = 4, /* CS, change it for your board */
  1048. .platform_data = adt7310_platform_data,
  1049. .controller_data = &adt7310_spi_chip_info,
  1050. .mode = SPI_MODE_3,
  1051. },
  1052. #endif
  1053. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  1054. {
  1055. .modalias = "ad7298",
  1056. .max_speed_hz = 1000000,
  1057. .bus_num = 0,
  1058. .chip_select = 4, /* CS, change it for your board */
  1059. .platform_data = ad7298_platform_data,
  1060. .controller_data = &ad7298_spi_chip_info,
  1061. .mode = SPI_MODE_3,
  1062. },
  1063. #endif
  1064. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  1065. {
  1066. .modalias = "adt7316",
  1067. .max_speed_hz = 1000000,
  1068. .irq = IRQ_PG5, /* interrupt line */
  1069. .bus_num = 0,
  1070. .chip_select = 4, /* CS, change it for your board */
  1071. .platform_data = adt7316_spi_data,
  1072. .controller_data = &adt7316_spi_chip_info,
  1073. .mode = SPI_MODE_3,
  1074. },
  1075. #endif
  1076. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  1077. {
  1078. .modalias = "mmc_spi",
  1079. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1080. .bus_num = 0,
  1081. .chip_select = 4,
  1082. .platform_data = &bfin_mmc_spi_pdata,
  1083. .controller_data = &mmc_spi_chip_info,
  1084. .mode = SPI_MODE_3,
  1085. },
  1086. #endif
  1087. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1088. {
  1089. .modalias = "ad7877",
  1090. .platform_data = &bfin_ad7877_ts_info,
  1091. .irq = IRQ_PF6,
  1092. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1093. .bus_num = 0,
  1094. .chip_select = 1,
  1095. .controller_data = &spi_ad7877_chip_info,
  1096. },
  1097. #endif
  1098. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  1099. {
  1100. .modalias = "ad7879",
  1101. .platform_data = &bfin_ad7879_ts_info,
  1102. .irq = IRQ_PF7,
  1103. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1104. .bus_num = 0,
  1105. .chip_select = 1,
  1106. .controller_data = &spi_ad7879_chip_info,
  1107. .mode = SPI_CPHA | SPI_CPOL,
  1108. },
  1109. #endif
  1110. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1111. {
  1112. .modalias = "spidev",
  1113. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1114. .bus_num = 0,
  1115. .chip_select = 1,
  1116. .controller_data = &spidev_chip_info,
  1117. },
  1118. #endif
  1119. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1120. {
  1121. .modalias = "bfin-lq035q1-spi",
  1122. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1123. .bus_num = 0,
  1124. .chip_select = 2,
  1125. .controller_data = &lq035q1_spi_chip_info,
  1126. .mode = SPI_CPHA | SPI_CPOL,
  1127. },
  1128. #endif
  1129. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  1130. {
  1131. .modalias = "enc28j60",
  1132. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1133. .irq = IRQ_PF6,
  1134. .bus_num = 0,
  1135. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1136. .controller_data = &enc28j60_spi_chip_info,
  1137. .mode = SPI_MODE_0,
  1138. },
  1139. #endif
  1140. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1141. {
  1142. .modalias = "adxl34x",
  1143. .platform_data = &adxl34x_info,
  1144. .irq = IRQ_PF6,
  1145. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1146. .bus_num = 0,
  1147. .chip_select = 2,
  1148. .controller_data = &spi_adxl34x_chip_info,
  1149. .mode = SPI_MODE_3,
  1150. },
  1151. #endif
  1152. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  1153. {
  1154. .modalias = "adf702x",
  1155. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  1156. .bus_num = 0,
  1157. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1158. .controller_data = &adf7021_spi_chip_info,
  1159. .platform_data = &adf7021_platform_data,
  1160. .mode = SPI_MODE_0,
  1161. },
  1162. #endif
  1163. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  1164. {
  1165. .modalias = "ads7846",
  1166. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1167. .bus_num = 0,
  1168. .irq = IRQ_PF6,
  1169. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1170. .controller_data = &ad7873_spi_chip_info,
  1171. .platform_data = &ad7873_pdata,
  1172. .mode = SPI_MODE_0,
  1173. },
  1174. #endif
  1175. #if defined(CONFIG_AD7476) \
  1176. || defined(CONFIG_AD7476_MODULE)
  1177. {
  1178. .modalias = "ad7476", /* Name of spi_driver for this device */
  1179. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  1180. .bus_num = 0, /* Framework bus number */
  1181. .chip_select = 1, /* Framework chip select. */
  1182. .platform_data = NULL, /* No spi_driver specific config */
  1183. .controller_data = &spi_ad7476_chip_info,
  1184. .mode = SPI_MODE_3,
  1185. },
  1186. #endif
  1187. #if defined(CONFIG_ADE7753) \
  1188. || defined(CONFIG_ADE7753_MODULE)
  1189. {
  1190. .modalias = "ade7753",
  1191. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1192. .bus_num = 0,
  1193. .chip_select = 1, /* CS, change it for your board */
  1194. .platform_data = NULL, /* No spi_driver specific config */
  1195. .mode = SPI_MODE_1,
  1196. },
  1197. #endif
  1198. #if defined(CONFIG_ADE7754) \
  1199. || defined(CONFIG_ADE7754_MODULE)
  1200. {
  1201. .modalias = "ade7754",
  1202. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1203. .bus_num = 0,
  1204. .chip_select = 1, /* CS, change it for your board */
  1205. .platform_data = NULL, /* No spi_driver specific config */
  1206. .mode = SPI_MODE_1,
  1207. },
  1208. #endif
  1209. #if defined(CONFIG_ADE7758) \
  1210. || defined(CONFIG_ADE7758_MODULE)
  1211. {
  1212. .modalias = "ade7758",
  1213. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1214. .bus_num = 0,
  1215. .chip_select = 1, /* CS, change it for your board */
  1216. .platform_data = NULL, /* No spi_driver specific config */
  1217. .mode = SPI_MODE_1,
  1218. },
  1219. #endif
  1220. #if defined(CONFIG_ADE7759) \
  1221. || defined(CONFIG_ADE7759_MODULE)
  1222. {
  1223. .modalias = "ade7759",
  1224. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1225. .bus_num = 0,
  1226. .chip_select = 1, /* CS, change it for your board */
  1227. .platform_data = NULL, /* No spi_driver specific config */
  1228. .mode = SPI_MODE_1,
  1229. },
  1230. #endif
  1231. #if defined(CONFIG_ADE7854_SPI) \
  1232. || defined(CONFIG_ADE7854_SPI_MODULE)
  1233. {
  1234. .modalias = "ade7854",
  1235. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1236. .bus_num = 0,
  1237. .chip_select = 1, /* CS, change it for your board */
  1238. .platform_data = NULL, /* No spi_driver specific config */
  1239. .mode = SPI_MODE_3,
  1240. },
  1241. #endif
  1242. #if defined(CONFIG_ADIS16060) \
  1243. || defined(CONFIG_ADIS16060_MODULE)
  1244. {
  1245. .modalias = "adis16060_r",
  1246. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1247. .bus_num = 0,
  1248. .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
  1249. .platform_data = NULL, /* No spi_driver specific config */
  1250. .mode = SPI_MODE_0,
  1251. },
  1252. {
  1253. .modalias = "adis16060_w",
  1254. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1255. .bus_num = 0,
  1256. .chip_select = 2, /* CS for write, change it for your board */
  1257. .platform_data = NULL, /* No spi_driver specific config */
  1258. .mode = SPI_MODE_1,
  1259. },
  1260. #endif
  1261. #if defined(CONFIG_ADIS16130) \
  1262. || defined(CONFIG_ADIS16130_MODULE)
  1263. {
  1264. .modalias = "adis16130",
  1265. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1266. .bus_num = 0,
  1267. .chip_select = 1, /* CS for read, change it for your board */
  1268. .platform_data = NULL, /* No spi_driver specific config */
  1269. .mode = SPI_MODE_3,
  1270. },
  1271. #endif
  1272. #if defined(CONFIG_ADIS16201) \
  1273. || defined(CONFIG_ADIS16201_MODULE)
  1274. {
  1275. .modalias = "adis16201",
  1276. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1277. .bus_num = 0,
  1278. .chip_select = 5, /* CS, change it for your board */
  1279. .platform_data = NULL, /* No spi_driver specific config */
  1280. .mode = SPI_MODE_3,
  1281. .irq = IRQ_PF4,
  1282. },
  1283. #endif
  1284. #if defined(CONFIG_ADIS16203) \
  1285. || defined(CONFIG_ADIS16203_MODULE)
  1286. {
  1287. .modalias = "adis16203",
  1288. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1289. .bus_num = 0,
  1290. .chip_select = 5, /* CS, change it for your board */
  1291. .platform_data = NULL, /* No spi_driver specific config */
  1292. .mode = SPI_MODE_3,
  1293. .irq = IRQ_PF4,
  1294. },
  1295. #endif
  1296. #if defined(CONFIG_ADIS16204) \
  1297. || defined(CONFIG_ADIS16204_MODULE)
  1298. {
  1299. .modalias = "adis16204",
  1300. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1301. .bus_num = 0,
  1302. .chip_select = 5, /* CS, change it for your board */
  1303. .platform_data = NULL, /* No spi_driver specific config */
  1304. .mode = SPI_MODE_3,
  1305. .irq = IRQ_PF4,
  1306. },
  1307. #endif
  1308. #if defined(CONFIG_ADIS16209) \
  1309. || defined(CONFIG_ADIS16209_MODULE)
  1310. {
  1311. .modalias = "adis16209",
  1312. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1313. .bus_num = 0,
  1314. .chip_select = 5, /* CS, change it for your board */
  1315. .platform_data = NULL, /* No spi_driver specific config */
  1316. .mode = SPI_MODE_3,
  1317. .irq = IRQ_PF4,
  1318. },
  1319. #endif
  1320. #if defined(CONFIG_ADIS16220) \
  1321. || defined(CONFIG_ADIS16220_MODULE)
  1322. {
  1323. .modalias = "adis16220",
  1324. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1325. .bus_num = 0,
  1326. .chip_select = 5, /* CS, change it for your board */
  1327. .platform_data = NULL, /* No spi_driver specific config */
  1328. .mode = SPI_MODE_3,
  1329. .irq = IRQ_PF4,
  1330. },
  1331. #endif
  1332. #if defined(CONFIG_ADIS16240) \
  1333. || defined(CONFIG_ADIS16240_MODULE)
  1334. {
  1335. .modalias = "adis16240",
  1336. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1337. .bus_num = 0,
  1338. .chip_select = 5, /* CS, change it for your board */
  1339. .platform_data = NULL, /* No spi_driver specific config */
  1340. .mode = SPI_MODE_3,
  1341. .irq = IRQ_PF4,
  1342. },
  1343. #endif
  1344. #if defined(CONFIG_ADIS16260) \
  1345. || defined(CONFIG_ADIS16260_MODULE)
  1346. {
  1347. .modalias = "adis16260",
  1348. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1349. .bus_num = 0,
  1350. .chip_select = 5, /* CS, change it for your board */
  1351. .platform_data = NULL, /* No spi_driver specific config */
  1352. .mode = SPI_MODE_3,
  1353. .irq = IRQ_PF4,
  1354. },
  1355. #endif
  1356. #if defined(CONFIG_ADIS16261) \
  1357. || defined(CONFIG_ADIS16261_MODULE)
  1358. {
  1359. .modalias = "adis16261",
  1360. .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
  1361. .bus_num = 0,
  1362. .chip_select = 1, /* CS, change it for your board */
  1363. .platform_data = NULL, /* No spi_driver specific config */
  1364. .mode = SPI_MODE_3,
  1365. },
  1366. #endif
  1367. #if defined(CONFIG_ADIS16300) \
  1368. || defined(CONFIG_ADIS16300_MODULE)
  1369. {
  1370. .modalias = "adis16300",
  1371. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1372. .bus_num = 0,
  1373. .chip_select = 5, /* CS, change it for your board */
  1374. .platform_data = NULL, /* No spi_driver specific config */
  1375. .mode = SPI_MODE_3,
  1376. .irq = IRQ_PF4,
  1377. },
  1378. #endif
  1379. #if defined(CONFIG_ADIS16350) \
  1380. || defined(CONFIG_ADIS16350_MODULE)
  1381. {
  1382. .modalias = "adis16364",
  1383. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1384. .bus_num = 0,
  1385. .chip_select = 5, /* CS, change it for your board */
  1386. .platform_data = NULL, /* No spi_driver specific config */
  1387. .mode = SPI_MODE_3,
  1388. .irq = IRQ_PF4,
  1389. },
  1390. #endif
  1391. #if defined(CONFIG_ADIS16400) \
  1392. || defined(CONFIG_ADIS16400_MODULE)
  1393. {
  1394. .modalias = "adis16400",
  1395. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1396. .bus_num = 0,
  1397. .chip_select = 1, /* CS, change it for your board */
  1398. .platform_data = NULL, /* No spi_driver specific config */
  1399. .mode = SPI_MODE_3,
  1400. },
  1401. #endif
  1402. };
  1403. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1404. /* SPI controller data */
  1405. static struct bfin5xx_spi_master bfin_spi0_info = {
  1406. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  1407. .enable_dma = 1, /* master has the ability to do dma transfer */
  1408. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1409. };
  1410. /* SPI (0) */
  1411. static struct resource bfin_spi0_resource[] = {
  1412. [0] = {
  1413. .start = SPI0_REGBASE,
  1414. .end = SPI0_REGBASE + 0xFF,
  1415. .flags = IORESOURCE_MEM,
  1416. },
  1417. [1] = {
  1418. .start = CH_SPI,
  1419. .end = CH_SPI,
  1420. .flags = IORESOURCE_DMA,
  1421. },
  1422. [2] = {
  1423. .start = IRQ_SPI,
  1424. .end = IRQ_SPI,
  1425. .flags = IORESOURCE_IRQ,
  1426. },
  1427. };
  1428. static struct platform_device bfin_spi0_device = {
  1429. .name = "bfin-spi",
  1430. .id = 0, /* Bus number */
  1431. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1432. .resource = bfin_spi0_resource,
  1433. .dev = {
  1434. .platform_data = &bfin_spi0_info, /* Passed to driver */
  1435. },
  1436. };
  1437. #endif /* spi master and devices */
  1438. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1439. /* SPORT SPI controller data */
  1440. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  1441. .num_chipselect = 1, /* master only supports one device */
  1442. .enable_dma = 0, /* master don't support DMA */
  1443. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  1444. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  1445. };
  1446. static struct resource bfin_sport_spi0_resource[] = {
  1447. [0] = {
  1448. .start = SPORT0_TCR1,
  1449. .end = SPORT0_TCR1 + 0xFF,
  1450. .flags = IORESOURCE_MEM,
  1451. },
  1452. [1] = {
  1453. .start = IRQ_SPORT0_ERROR,
  1454. .end = IRQ_SPORT0_ERROR,
  1455. .flags = IORESOURCE_IRQ,
  1456. },
  1457. };
  1458. static struct platform_device bfin_sport_spi0_device = {
  1459. .name = "bfin-sport-spi",
  1460. .id = 1, /* Bus number */
  1461. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  1462. .resource = bfin_sport_spi0_resource,
  1463. .dev = {
  1464. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  1465. },
  1466. };
  1467. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  1468. .num_chipselect = 1, /* master only supports one device */
  1469. .enable_dma = 0, /* master don't support DMA */
  1470. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1471. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1472. };
  1473. static struct resource bfin_sport_spi1_resource[] = {
  1474. [0] = {
  1475. .start = SPORT1_TCR1,
  1476. .end = SPORT1_TCR1 + 0xFF,
  1477. .flags = IORESOURCE_MEM,
  1478. },
  1479. [1] = {
  1480. .start = IRQ_SPORT1_ERROR,
  1481. .end = IRQ_SPORT1_ERROR,
  1482. .flags = IORESOURCE_IRQ,
  1483. },
  1484. };
  1485. static struct platform_device bfin_sport_spi1_device = {
  1486. .name = "bfin-sport-spi",
  1487. .id = 2, /* Bus number */
  1488. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1489. .resource = bfin_sport_spi1_resource,
  1490. .dev = {
  1491. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1492. },
  1493. };
  1494. #endif /* sport spi master and devices */
  1495. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1496. static struct platform_device bfin_fb_device = {
  1497. .name = "bf537-lq035",
  1498. };
  1499. #endif
  1500. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1501. #include <asm/bfin-lq035q1.h>
  1502. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1503. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1504. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1505. .use_bl = 0, /* let something else control the LCD Blacklight */
  1506. .gpio_bl = GPIO_PF7,
  1507. };
  1508. static struct resource bfin_lq035q1_resources[] = {
  1509. {
  1510. .start = IRQ_PPI_ERROR,
  1511. .end = IRQ_PPI_ERROR,
  1512. .flags = IORESOURCE_IRQ,
  1513. },
  1514. };
  1515. static struct platform_device bfin_lq035q1_device = {
  1516. .name = "bfin-lq035q1",
  1517. .id = -1,
  1518. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1519. .resource = bfin_lq035q1_resources,
  1520. .dev = {
  1521. .platform_data = &bfin_lq035q1_data,
  1522. },
  1523. };
  1524. #endif
  1525. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1526. #ifdef CONFIG_SERIAL_BFIN_UART0
  1527. static struct resource bfin_uart0_resources[] = {
  1528. {
  1529. .start = UART0_THR,
  1530. .end = UART0_GCTL+2,
  1531. .flags = IORESOURCE_MEM,
  1532. },
  1533. {
  1534. .start = IRQ_UART0_RX,
  1535. .end = IRQ_UART0_RX+1,
  1536. .flags = IORESOURCE_IRQ,
  1537. },
  1538. {
  1539. .start = IRQ_UART0_ERROR,
  1540. .end = IRQ_UART0_ERROR,
  1541. .flags = IORESOURCE_IRQ,
  1542. },
  1543. {
  1544. .start = CH_UART0_TX,
  1545. .end = CH_UART0_TX,
  1546. .flags = IORESOURCE_DMA,
  1547. },
  1548. {
  1549. .start = CH_UART0_RX,
  1550. .end = CH_UART0_RX,
  1551. .flags = IORESOURCE_DMA,
  1552. },
  1553. #ifdef CONFIG_BFIN_UART0_CTSRTS
  1554. { /* CTS pin */
  1555. .start = GPIO_PG7,
  1556. .end = GPIO_PG7,
  1557. .flags = IORESOURCE_IO,
  1558. },
  1559. { /* RTS pin */
  1560. .start = GPIO_PG6,
  1561. .end = GPIO_PG6,
  1562. .flags = IORESOURCE_IO,
  1563. },
  1564. #endif
  1565. };
  1566. unsigned short bfin_uart0_peripherals[] = {
  1567. P_UART0_TX, P_UART0_RX, 0
  1568. };
  1569. static struct platform_device bfin_uart0_device = {
  1570. .name = "bfin-uart",
  1571. .id = 0,
  1572. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  1573. .resource = bfin_uart0_resources,
  1574. .dev = {
  1575. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  1576. },
  1577. };
  1578. #endif
  1579. #ifdef CONFIG_SERIAL_BFIN_UART1
  1580. static struct resource bfin_uart1_resources[] = {
  1581. {
  1582. .start = UART1_THR,
  1583. .end = UART1_GCTL+2,
  1584. .flags = IORESOURCE_MEM,
  1585. },
  1586. {
  1587. .start = IRQ_UART1_RX,
  1588. .end = IRQ_UART1_RX+1,
  1589. .flags = IORESOURCE_IRQ,
  1590. },
  1591. {
  1592. .start = IRQ_UART1_ERROR,
  1593. .end = IRQ_UART1_ERROR,
  1594. .flags = IORESOURCE_IRQ,
  1595. },
  1596. {
  1597. .start = CH_UART1_TX,
  1598. .end = CH_UART1_TX,
  1599. .flags = IORESOURCE_DMA,
  1600. },
  1601. {
  1602. .start = CH_UART1_RX,
  1603. .end = CH_UART1_RX,
  1604. .flags = IORESOURCE_DMA,
  1605. },
  1606. };
  1607. unsigned short bfin_uart1_peripherals[] = {
  1608. P_UART1_TX, P_UART1_RX, 0
  1609. };
  1610. static struct platform_device bfin_uart1_device = {
  1611. .name = "bfin-uart",
  1612. .id = 1,
  1613. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  1614. .resource = bfin_uart1_resources,
  1615. .dev = {
  1616. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  1617. },
  1618. };
  1619. #endif
  1620. #endif
  1621. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1622. #ifdef CONFIG_BFIN_SIR0
  1623. static struct resource bfin_sir0_resources[] = {
  1624. {
  1625. .start = 0xFFC00400,
  1626. .end = 0xFFC004FF,
  1627. .flags = IORESOURCE_MEM,
  1628. },
  1629. {
  1630. .start = IRQ_UART0_RX,
  1631. .end = IRQ_UART0_RX+1,
  1632. .flags = IORESOURCE_IRQ,
  1633. },
  1634. {
  1635. .start = CH_UART0_RX,
  1636. .end = CH_UART0_RX+1,
  1637. .flags = IORESOURCE_DMA,
  1638. },
  1639. };
  1640. static struct platform_device bfin_sir0_device = {
  1641. .name = "bfin_sir",
  1642. .id = 0,
  1643. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  1644. .resource = bfin_sir0_resources,
  1645. };
  1646. #endif
  1647. #ifdef CONFIG_BFIN_SIR1
  1648. static struct resource bfin_sir1_resources[] = {
  1649. {
  1650. .start = 0xFFC02000,
  1651. .end = 0xFFC020FF,
  1652. .flags = IORESOURCE_MEM,
  1653. },
  1654. {
  1655. .start = IRQ_UART1_RX,
  1656. .end = IRQ_UART1_RX+1,
  1657. .flags = IORESOURCE_IRQ,
  1658. },
  1659. {
  1660. .start = CH_UART1_RX,
  1661. .end = CH_UART1_RX+1,
  1662. .flags = IORESOURCE_DMA,
  1663. },
  1664. };
  1665. static struct platform_device bfin_sir1_device = {
  1666. .name = "bfin_sir",
  1667. .id = 1,
  1668. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  1669. .resource = bfin_sir1_resources,
  1670. };
  1671. #endif
  1672. #endif
  1673. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1674. static struct resource bfin_twi0_resource[] = {
  1675. [0] = {
  1676. .start = TWI0_REGBASE,
  1677. .end = TWI0_REGBASE,
  1678. .flags = IORESOURCE_MEM,
  1679. },
  1680. [1] = {
  1681. .start = IRQ_TWI,
  1682. .end = IRQ_TWI,
  1683. .flags = IORESOURCE_IRQ,
  1684. },
  1685. };
  1686. static struct platform_device i2c_bfin_twi_device = {
  1687. .name = "i2c-bfin-twi",
  1688. .id = 0,
  1689. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1690. .resource = bfin_twi0_resource,
  1691. };
  1692. #endif
  1693. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1694. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1695. [0] = KEY_GRAVE,
  1696. [1] = KEY_1,
  1697. [2] = KEY_2,
  1698. [3] = KEY_3,
  1699. [4] = KEY_4,
  1700. [5] = KEY_5,
  1701. [6] = KEY_6,
  1702. [7] = KEY_7,
  1703. [8] = KEY_8,
  1704. [9] = KEY_9,
  1705. [10] = KEY_0,
  1706. [11] = KEY_MINUS,
  1707. [12] = KEY_EQUAL,
  1708. [13] = KEY_BACKSLASH,
  1709. [15] = KEY_KP0,
  1710. [16] = KEY_Q,
  1711. [17] = KEY_W,
  1712. [18] = KEY_E,
  1713. [19] = KEY_R,
  1714. [20] = KEY_T,
  1715. [21] = KEY_Y,
  1716. [22] = KEY_U,
  1717. [23] = KEY_I,
  1718. [24] = KEY_O,
  1719. [25] = KEY_P,
  1720. [26] = KEY_LEFTBRACE,
  1721. [27] = KEY_RIGHTBRACE,
  1722. [29] = KEY_KP1,
  1723. [30] = KEY_KP2,
  1724. [31] = KEY_KP3,
  1725. [32] = KEY_A,
  1726. [33] = KEY_S,
  1727. [34] = KEY_D,
  1728. [35] = KEY_F,
  1729. [36] = KEY_G,
  1730. [37] = KEY_H,
  1731. [38] = KEY_J,
  1732. [39] = KEY_K,
  1733. [40] = KEY_L,
  1734. [41] = KEY_SEMICOLON,
  1735. [42] = KEY_APOSTROPHE,
  1736. [43] = KEY_BACKSLASH,
  1737. [45] = KEY_KP4,
  1738. [46] = KEY_KP5,
  1739. [47] = KEY_KP6,
  1740. [48] = KEY_102ND,
  1741. [49] = KEY_Z,
  1742. [50] = KEY_X,
  1743. [51] = KEY_C,
  1744. [52] = KEY_V,
  1745. [53] = KEY_B,
  1746. [54] = KEY_N,
  1747. [55] = KEY_M,
  1748. [56] = KEY_COMMA,
  1749. [57] = KEY_DOT,
  1750. [58] = KEY_SLASH,
  1751. [60] = KEY_KPDOT,
  1752. [61] = KEY_KP7,
  1753. [62] = KEY_KP8,
  1754. [63] = KEY_KP9,
  1755. [64] = KEY_SPACE,
  1756. [65] = KEY_BACKSPACE,
  1757. [66] = KEY_TAB,
  1758. [67] = KEY_KPENTER,
  1759. [68] = KEY_ENTER,
  1760. [69] = KEY_ESC,
  1761. [70] = KEY_DELETE,
  1762. [74] = KEY_KPMINUS,
  1763. [76] = KEY_UP,
  1764. [77] = KEY_DOWN,
  1765. [78] = KEY_RIGHT,
  1766. [79] = KEY_LEFT,
  1767. };
  1768. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1769. .rows = 8,
  1770. .cols = 10,
  1771. .keymap = adp5588_keymap,
  1772. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1773. .repeat = 0,
  1774. };
  1775. #endif
  1776. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1777. #include <linux/mfd/adp5520.h>
  1778. /*
  1779. * ADP5520/5501 Backlight Data
  1780. */
  1781. static struct adp5520_backlight_platform_data adp5520_backlight_data = {
  1782. .fade_in = ADP5520_FADE_T_1200ms,
  1783. .fade_out = ADP5520_FADE_T_1200ms,
  1784. .fade_led_law = ADP5520_BL_LAW_LINEAR,
  1785. .en_ambl_sens = 1,
  1786. .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
  1787. .l1_daylight_max = ADP5520_BL_CUR_mA(15),
  1788. .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
  1789. .l2_office_max = ADP5520_BL_CUR_mA(7),
  1790. .l2_office_dim = ADP5520_BL_CUR_mA(0),
  1791. .l3_dark_max = ADP5520_BL_CUR_mA(3),
  1792. .l3_dark_dim = ADP5520_BL_CUR_mA(0),
  1793. .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
  1794. .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
  1795. .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
  1796. .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
  1797. };
  1798. /*
  1799. * ADP5520/5501 LEDs Data
  1800. */
  1801. static struct led_info adp5520_leds[] = {
  1802. {
  1803. .name = "adp5520-led1",
  1804. .default_trigger = "none",
  1805. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  1806. },
  1807. #ifdef ADP5520_EN_ALL_LEDS
  1808. {
  1809. .name = "adp5520-led2",
  1810. .default_trigger = "none",
  1811. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1812. },
  1813. {
  1814. .name = "adp5520-led3",
  1815. .default_trigger = "none",
  1816. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1817. },
  1818. #endif
  1819. };
  1820. static struct adp5520_leds_platform_data adp5520_leds_data = {
  1821. .num_leds = ARRAY_SIZE(adp5520_leds),
  1822. .leds = adp5520_leds,
  1823. .fade_in = ADP5520_FADE_T_600ms,
  1824. .fade_out = ADP5520_FADE_T_600ms,
  1825. .led_on_time = ADP5520_LED_ONT_600ms,
  1826. };
  1827. /*
  1828. * ADP5520 GPIO Data
  1829. */
  1830. static struct adp5520_gpio_platform_data adp5520_gpio_data = {
  1831. .gpio_start = 50,
  1832. .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1833. .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1834. };
  1835. /*
  1836. * ADP5520 Keypad Data
  1837. */
  1838. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1839. [ADP5520_KEY(0, 0)] = KEY_GRAVE,
  1840. [ADP5520_KEY(0, 1)] = KEY_1,
  1841. [ADP5520_KEY(0, 2)] = KEY_2,
  1842. [ADP5520_KEY(0, 3)] = KEY_3,
  1843. [ADP5520_KEY(1, 0)] = KEY_4,
  1844. [ADP5520_KEY(1, 1)] = KEY_5,
  1845. [ADP5520_KEY(1, 2)] = KEY_6,
  1846. [ADP5520_KEY(1, 3)] = KEY_7,
  1847. [ADP5520_KEY(2, 0)] = KEY_8,
  1848. [ADP5520_KEY(2, 1)] = KEY_9,
  1849. [ADP5520_KEY(2, 2)] = KEY_0,
  1850. [ADP5520_KEY(2, 3)] = KEY_MINUS,
  1851. [ADP5520_KEY(3, 0)] = KEY_EQUAL,
  1852. [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
  1853. [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
  1854. [ADP5520_KEY(3, 3)] = KEY_ENTER,
  1855. };
  1856. static struct adp5520_keys_platform_data adp5520_keys_data = {
  1857. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  1858. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  1859. .keymap = adp5520_keymap,
  1860. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1861. .repeat = 0,
  1862. };
  1863. /*
  1864. * ADP5520/5501 Multifuction Device Init Data
  1865. */
  1866. static struct adp5520_platform_data adp5520_pdev_data = {
  1867. .backlight = &adp5520_backlight_data,
  1868. .leds = &adp5520_leds_data,
  1869. .gpio = &adp5520_gpio_data,
  1870. .keys = &adp5520_keys_data,
  1871. };
  1872. #endif
  1873. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  1874. static struct adp5588_gpio_platform_data adp5588_gpio_data = {
  1875. .gpio_start = 50,
  1876. .pullup_dis_mask = 0,
  1877. };
  1878. #endif
  1879. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  1880. #include <linux/i2c/adp8870.h>
  1881. static struct led_info adp8870_leds[] = {
  1882. {
  1883. .name = "adp8870-led7",
  1884. .default_trigger = "none",
  1885. .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
  1886. },
  1887. };
  1888. static struct adp8870_backlight_platform_data adp8870_pdata = {
  1889. .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
  1890. ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1891. .pwm_assign = 0, /* 1 = Enables PWM mode */
  1892. .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1893. .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1894. .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1895. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1896. .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1897. .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1898. .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1899. .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1900. .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1901. .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1902. .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1903. .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1904. .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1905. .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1906. .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1907. .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1908. .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1909. .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1910. .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1911. .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1912. .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1913. .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1914. .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1915. .leds = adp8870_leds,
  1916. .num_leds = ARRAY_SIZE(adp8870_leds),
  1917. .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1918. .led_fade_in = ADP8870_FADE_T_600ms,
  1919. .led_fade_out = ADP8870_FADE_T_600ms,
  1920. .led_on_time = ADP8870_LED_ONT_200ms,
  1921. };
  1922. #endif
  1923. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  1924. #include <linux/i2c/adp8860.h>
  1925. static struct led_info adp8860_leds[] = {
  1926. {
  1927. .name = "adp8860-led7",
  1928. .default_trigger = "none",
  1929. .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
  1930. },
  1931. };
  1932. static struct adp8860_backlight_platform_data adp8860_pdata = {
  1933. .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
  1934. ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1935. .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1936. .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1937. .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1938. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1939. .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1940. .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1941. .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1942. .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1943. .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1944. .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1945. .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1946. .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1947. .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1948. .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1949. .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1950. .leds = adp8860_leds,
  1951. .num_leds = ARRAY_SIZE(adp8860_leds),
  1952. .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1953. .led_fade_in = ADP8860_FADE_T_600ms,
  1954. .led_fade_out = ADP8860_FADE_T_600ms,
  1955. .led_on_time = ADP8860_LED_ONT_200ms,
  1956. };
  1957. #endif
  1958. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  1959. static struct regulator_consumer_supply ad5398_consumer = {
  1960. .supply = "current",
  1961. };
  1962. static struct regulator_init_data ad5398_regulator_data = {
  1963. .constraints = {
  1964. .name = "current range",
  1965. .max_uA = 120000,
  1966. .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
  1967. },
  1968. .num_consumer_supplies = 1,
  1969. .consumer_supplies = &ad5398_consumer,
  1970. };
  1971. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  1972. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  1973. static struct platform_device ad5398_virt_consumer_device = {
  1974. .name = "reg-virt-consumer",
  1975. .id = 0,
  1976. .dev = {
  1977. .platform_data = "current", /* Passed to driver */
  1978. },
  1979. };
  1980. #endif
  1981. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  1982. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  1983. static struct regulator_bulk_data ad5398_bulk_data = {
  1984. .supply = "current",
  1985. };
  1986. static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
  1987. .name = "ad5398",
  1988. .num_supplies = 1,
  1989. .supplies = &ad5398_bulk_data,
  1990. };
  1991. static struct platform_device ad5398_userspace_consumer_device = {
  1992. .name = "reg-userspace-consumer",
  1993. .id = 0,
  1994. .dev = {
  1995. .platform_data = &ad5398_userspace_comsumer_data,
  1996. },
  1997. };
  1998. #endif
  1999. #endif
  2000. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  2001. /* INT bound temperature alarm event. line 1 */
  2002. static unsigned long adt7410_platform_data[2] = {
  2003. IRQ_PG4, IRQF_TRIGGER_LOW,
  2004. };
  2005. #endif
  2006. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  2007. /* INT bound temperature alarm event. line 1 */
  2008. static unsigned long adt7316_i2c_data[2] = {
  2009. IRQF_TRIGGER_LOW, /* interrupt flags */
  2010. GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  2011. };
  2012. #endif
  2013. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  2014. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  2015. {
  2016. I2C_BOARD_INFO("ad1937", 0x04),
  2017. },
  2018. #endif
  2019. #if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
  2020. {
  2021. I2C_BOARD_INFO("adav803", 0x10),
  2022. },
  2023. #endif
  2024. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  2025. {
  2026. I2C_BOARD_INFO("ad7142_captouch", 0x2C),
  2027. .irq = IRQ_PG5,
  2028. .platform_data = (void *)&ad7142_i2c_platform_data,
  2029. },
  2030. #endif
  2031. #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
  2032. {
  2033. I2C_BOARD_INFO("ad7150", 0x48),
  2034. .irq = IRQ_PG5, /* fixme: use real interrupt number */
  2035. },
  2036. #endif
  2037. #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
  2038. {
  2039. I2C_BOARD_INFO("ad7152", 0x48),
  2040. },
  2041. #endif
  2042. #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
  2043. {
  2044. I2C_BOARD_INFO("ad774x", 0x48),
  2045. },
  2046. #endif
  2047. #if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
  2048. {
  2049. I2C_BOARD_INFO("ad7414", 0x9),
  2050. .irq = IRQ_PG5,
  2051. .irq_flags = IRQF_TRIGGER_LOW,
  2052. },
  2053. #endif
  2054. #if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
  2055. {
  2056. I2C_BOARD_INFO("ad7417", 0xb),
  2057. .irq = IRQ_PG5,
  2058. .irq_flags = IRQF_TRIGGER_LOW,
  2059. .platform_data = (void *)GPIO_PF4,
  2060. },
  2061. #endif
  2062. #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
  2063. {
  2064. I2C_BOARD_INFO("ade7854", 0x38),
  2065. },
  2066. #endif
  2067. #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
  2068. {
  2069. I2C_BOARD_INFO("adt75", 0x9),
  2070. .irq = IRQ_PG5,
  2071. .irq_flags = IRQF_TRIGGER_LOW,
  2072. },
  2073. #endif
  2074. #if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
  2075. {
  2076. I2C_BOARD_INFO("adt7408", 0x18),
  2077. .irq = IRQ_PG5,
  2078. .irq_flags = IRQF_TRIGGER_LOW,
  2079. },
  2080. #endif
  2081. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  2082. {
  2083. I2C_BOARD_INFO("adt7410", 0x48),
  2084. /* CT critical temperature event. line 0 */
  2085. .irq = IRQ_PG5,
  2086. .irq_flags = IRQF_TRIGGER_LOW,
  2087. .platform_data = (void *)&adt7410_platform_data,
  2088. },
  2089. #endif
  2090. #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
  2091. {
  2092. I2C_BOARD_INFO("ad7291", 0x20),
  2093. .irq = IRQ_PG5,
  2094. .irq_flags = IRQF_TRIGGER_LOW,
  2095. },
  2096. #endif
  2097. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  2098. {
  2099. I2C_BOARD_INFO("adt7316", 0x48),
  2100. .irq = IRQ_PG6,
  2101. .platform_data = (void *)&adt7316_i2c_data,
  2102. },
  2103. #endif
  2104. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2105. {
  2106. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  2107. },
  2108. #endif
  2109. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  2110. {
  2111. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  2112. .irq = IRQ_PG6,
  2113. },
  2114. #endif
  2115. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  2116. {
  2117. I2C_BOARD_INFO("ad7879", 0x2F),
  2118. .irq = IRQ_PG5,
  2119. .platform_data = (void *)&bfin_ad7879_ts_info,
  2120. },
  2121. #endif
  2122. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  2123. {
  2124. I2C_BOARD_INFO("adp5588-keys", 0x34),
  2125. .irq = IRQ_PG0,
  2126. .platform_data = (void *)&adp5588_kpad_data,
  2127. },
  2128. #endif
  2129. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  2130. {
  2131. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  2132. .irq = IRQ_PG0,
  2133. .platform_data = (void *)&adp5520_pdev_data,
  2134. },
  2135. #endif
  2136. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  2137. {
  2138. I2C_BOARD_INFO("adxl34x", 0x53),
  2139. .irq = IRQ_PG3,
  2140. .platform_data = (void *)&adxl34x_info,
  2141. },
  2142. #endif
  2143. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  2144. {
  2145. I2C_BOARD_INFO("adp5588-gpio", 0x34),
  2146. .platform_data = (void *)&adp5588_gpio_data,
  2147. },
  2148. #endif
  2149. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  2150. {
  2151. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  2152. },
  2153. #endif
  2154. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2155. {
  2156. I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
  2157. },
  2158. #endif
  2159. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  2160. {
  2161. I2C_BOARD_INFO("adp8870", 0x2B),
  2162. .platform_data = (void *)&adp8870_pdata,
  2163. },
  2164. #endif
  2165. #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
  2166. {
  2167. I2C_BOARD_INFO("adau1371", 0x1A),
  2168. },
  2169. #endif
  2170. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  2171. {
  2172. I2C_BOARD_INFO("adau1761", 0x38),
  2173. },
  2174. #endif
  2175. #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
  2176. {
  2177. I2C_BOARD_INFO("adau1361", 0x38),
  2178. },
  2179. #endif
  2180. #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
  2181. {
  2182. I2C_BOARD_INFO("ad5258", 0x18),
  2183. },
  2184. #endif
  2185. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  2186. {
  2187. I2C_BOARD_INFO("ssm2602", 0x1b),
  2188. },
  2189. #endif
  2190. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2191. {
  2192. I2C_BOARD_INFO("ad5398", 0xC),
  2193. .platform_data = (void *)&ad5398_regulator_data,
  2194. },
  2195. #endif
  2196. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  2197. {
  2198. I2C_BOARD_INFO("adp8860", 0x2A),
  2199. .platform_data = (void *)&adp8860_pdata,
  2200. },
  2201. #endif
  2202. #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
  2203. {
  2204. I2C_BOARD_INFO("adau1373", 0x1A),
  2205. },
  2206. #endif
  2207. };
  2208. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2209. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2210. static struct resource bfin_sport0_uart_resources[] = {
  2211. {
  2212. .start = SPORT0_TCR1,
  2213. .end = SPORT0_MRCS3+4,
  2214. .flags = IORESOURCE_MEM,
  2215. },
  2216. {
  2217. .start = IRQ_SPORT0_RX,
  2218. .end = IRQ_SPORT0_RX+1,
  2219. .flags = IORESOURCE_IRQ,
  2220. },
  2221. {
  2222. .start = IRQ_SPORT0_ERROR,
  2223. .end = IRQ_SPORT0_ERROR,
  2224. .flags = IORESOURCE_IRQ,
  2225. },
  2226. };
  2227. unsigned short bfin_sport0_peripherals[] = {
  2228. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  2229. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  2230. };
  2231. static struct platform_device bfin_sport0_uart_device = {
  2232. .name = "bfin-sport-uart",
  2233. .id = 0,
  2234. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  2235. .resource = bfin_sport0_uart_resources,
  2236. .dev = {
  2237. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2238. },
  2239. };
  2240. #endif
  2241. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2242. static struct resource bfin_sport1_uart_resources[] = {
  2243. {
  2244. .start = SPORT1_TCR1,
  2245. .end = SPORT1_MRCS3+4,
  2246. .flags = IORESOURCE_MEM,
  2247. },
  2248. {
  2249. .start = IRQ_SPORT1_RX,
  2250. .end = IRQ_SPORT1_RX+1,
  2251. .flags = IORESOURCE_IRQ,
  2252. },
  2253. {
  2254. .start = IRQ_SPORT1_ERROR,
  2255. .end = IRQ_SPORT1_ERROR,
  2256. .flags = IORESOURCE_IRQ,
  2257. },
  2258. };
  2259. unsigned short bfin_sport1_peripherals[] = {
  2260. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  2261. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  2262. };
  2263. static struct platform_device bfin_sport1_uart_device = {
  2264. .name = "bfin-sport-uart",
  2265. .id = 1,
  2266. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  2267. .resource = bfin_sport1_uart_resources,
  2268. .dev = {
  2269. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  2270. },
  2271. };
  2272. #endif
  2273. #endif
  2274. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2275. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2276. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  2277. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2278. #define PATA_INT IRQ_PF5
  2279. static struct pata_platform_info bfin_pata_platform_data = {
  2280. .ioport_shift = 1,
  2281. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  2282. };
  2283. static struct resource bfin_pata_resources[] = {
  2284. {
  2285. .start = 0x20314020,
  2286. .end = 0x2031403F,
  2287. .flags = IORESOURCE_MEM,
  2288. },
  2289. {
  2290. .start = 0x2031401C,
  2291. .end = 0x2031401F,
  2292. .flags = IORESOURCE_MEM,
  2293. },
  2294. {
  2295. .start = PATA_INT,
  2296. .end = PATA_INT,
  2297. .flags = IORESOURCE_IRQ,
  2298. },
  2299. };
  2300. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  2301. static struct pata_platform_info bfin_pata_platform_data = {
  2302. .ioport_shift = 0,
  2303. };
  2304. /* CompactFlash Storage Card Memory Mapped Adressing
  2305. * /REG = A11 = 1
  2306. */
  2307. static struct resource bfin_pata_resources[] = {
  2308. {
  2309. .start = 0x20211800,
  2310. .end = 0x20211807,
  2311. .flags = IORESOURCE_MEM,
  2312. },
  2313. {
  2314. .start = 0x2021180E, /* Device Ctl */
  2315. .end = 0x2021180E,
  2316. .flags = IORESOURCE_MEM,
  2317. },
  2318. };
  2319. #endif
  2320. static struct platform_device bfin_pata_device = {
  2321. .name = "pata_platform",
  2322. .id = -1,
  2323. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  2324. .resource = bfin_pata_resources,
  2325. .dev = {
  2326. .platform_data = &bfin_pata_platform_data,
  2327. }
  2328. };
  2329. #endif
  2330. static const unsigned int cclk_vlev_datasheet[] =
  2331. {
  2332. VRPAIR(VLEV_085, 250000000),
  2333. VRPAIR(VLEV_090, 376000000),
  2334. VRPAIR(VLEV_095, 426000000),
  2335. VRPAIR(VLEV_100, 426000000),
  2336. VRPAIR(VLEV_105, 476000000),
  2337. VRPAIR(VLEV_110, 476000000),
  2338. VRPAIR(VLEV_115, 476000000),
  2339. VRPAIR(VLEV_120, 500000000),
  2340. VRPAIR(VLEV_125, 533000000),
  2341. VRPAIR(VLEV_130, 600000000),
  2342. };
  2343. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  2344. .tuple_tab = cclk_vlev_datasheet,
  2345. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  2346. .vr_settling_time = 25 /* us */,
  2347. };
  2348. static struct platform_device bfin_dpmc = {
  2349. .name = "bfin dpmc",
  2350. .dev = {
  2351. .platform_data = &bfin_dmpc_vreg_data,
  2352. },
  2353. };
  2354. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2355. static struct platform_device bfin_i2s = {
  2356. .name = "bfin-i2s",
  2357. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2358. /* TODO: add platform data here */
  2359. };
  2360. #endif
  2361. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  2362. static struct platform_device bfin_tdm = {
  2363. .name = "bfin-tdm",
  2364. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2365. /* TODO: add platform data here */
  2366. };
  2367. #endif
  2368. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2369. static struct platform_device bfin_ac97 = {
  2370. .name = "bfin-ac97",
  2371. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2372. /* TODO: add platform data here */
  2373. };
  2374. #endif
  2375. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2376. #define REGULATOR_ADP122 "adp122"
  2377. #define REGULATOR_ADP122_UV 2500000
  2378. static struct regulator_consumer_supply adp122_consumers = {
  2379. .supply = REGULATOR_ADP122,
  2380. };
  2381. static struct regulator_init_data adp_switch_regulator_data = {
  2382. .constraints = {
  2383. .name = REGULATOR_ADP122,
  2384. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  2385. .min_uV = REGULATOR_ADP122_UV,
  2386. .max_uV = REGULATOR_ADP122_UV,
  2387. .min_uA = 0,
  2388. .max_uA = 300000,
  2389. },
  2390. .num_consumer_supplies = 1, /* only 1 */
  2391. .consumer_supplies = &adp122_consumers,
  2392. };
  2393. static struct fixed_voltage_config adp_switch_pdata = {
  2394. .supply_name = REGULATOR_ADP122,
  2395. .microvolts = REGULATOR_ADP122_UV,
  2396. .gpio = GPIO_PF2,
  2397. .enable_high = 1,
  2398. .enabled_at_boot = 0,
  2399. .init_data = &adp_switch_regulator_data,
  2400. };
  2401. static struct platform_device adp_switch_device = {
  2402. .name = "reg-fixed-voltage",
  2403. .id = 0,
  2404. .dev = {
  2405. .platform_data = &adp_switch_pdata,
  2406. },
  2407. };
  2408. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2409. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2410. static struct regulator_bulk_data adp122_bulk_data = {
  2411. .supply = REGULATOR_ADP122,
  2412. };
  2413. static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
  2414. .name = REGULATOR_ADP122,
  2415. .num_supplies = 1,
  2416. .supplies = &adp122_bulk_data,
  2417. };
  2418. static struct platform_device adp122_userspace_consumer_device = {
  2419. .name = "reg-userspace-consumer",
  2420. .id = 0,
  2421. .dev = {
  2422. .platform_data = &adp122_userspace_comsumer_data,
  2423. },
  2424. };
  2425. #endif
  2426. #endif
  2427. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2428. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2429. static struct resource iio_gpio_trigger_resources[] = {
  2430. [0] = {
  2431. .start = IRQ_PF5,
  2432. .end = IRQ_PF5,
  2433. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  2434. },
  2435. };
  2436. static struct platform_device iio_gpio_trigger = {
  2437. .name = "iio_gpio_trigger",
  2438. .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
  2439. .resource = iio_gpio_trigger_resources,
  2440. };
  2441. #endif
  2442. static struct platform_device *stamp_devices[] __initdata = {
  2443. &bfin_dpmc,
  2444. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  2445. &bfin_pcmcia_cf_device,
  2446. #endif
  2447. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  2448. &rtc_device,
  2449. #endif
  2450. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  2451. &sl811_hcd_device,
  2452. #endif
  2453. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  2454. &isp1362_hcd_device,
  2455. #endif
  2456. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  2457. &bfin_isp1760_device,
  2458. #endif
  2459. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  2460. &smc91x_device,
  2461. #endif
  2462. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  2463. &dm9000_device,
  2464. #endif
  2465. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  2466. &bfin_can_device,
  2467. #endif
  2468. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  2469. &bfin_mii_bus,
  2470. &bfin_mac_device,
  2471. #endif
  2472. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  2473. &net2272_bfin_device,
  2474. #endif
  2475. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  2476. &bfin_spi0_device,
  2477. #endif
  2478. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  2479. &bfin_sport_spi0_device,
  2480. &bfin_sport_spi1_device,
  2481. #endif
  2482. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2483. &bfin_fb_device,
  2484. #endif
  2485. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  2486. &bfin_lq035q1_device,
  2487. #endif
  2488. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  2489. #ifdef CONFIG_SERIAL_BFIN_UART0
  2490. &bfin_uart0_device,
  2491. #endif
  2492. #ifdef CONFIG_SERIAL_BFIN_UART1
  2493. &bfin_uart1_device,
  2494. #endif
  2495. #endif
  2496. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  2497. #ifdef CONFIG_BFIN_SIR0
  2498. &bfin_sir0_device,
  2499. #endif
  2500. #ifdef CONFIG_BFIN_SIR1
  2501. &bfin_sir1_device,
  2502. #endif
  2503. #endif
  2504. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  2505. &i2c_bfin_twi_device,
  2506. #endif
  2507. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2508. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2509. &bfin_sport0_uart_device,
  2510. #endif
  2511. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2512. &bfin_sport1_uart_device,
  2513. #endif
  2514. #endif
  2515. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2516. &bfin_pata_device,
  2517. #endif
  2518. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  2519. &bfin_device_gpiokeys,
  2520. #endif
  2521. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  2522. &bfin_async_nand_device,
  2523. #endif
  2524. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  2525. &stamp_flash_device,
  2526. #endif
  2527. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2528. &bfin_i2s,
  2529. #endif
  2530. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  2531. &bfin_tdm,
  2532. #endif
  2533. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2534. &bfin_ac97,
  2535. #endif
  2536. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2537. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  2538. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  2539. &ad5398_virt_consumer_device,
  2540. #endif
  2541. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2542. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2543. &ad5398_userspace_consumer_device,
  2544. #endif
  2545. #endif
  2546. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2547. &adp_switch_device,
  2548. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2549. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2550. &adp122_userspace_consumer_device,
  2551. #endif
  2552. #endif
  2553. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2554. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2555. &iio_gpio_trigger,
  2556. #endif
  2557. };
  2558. static int __init stamp_init(void)
  2559. {
  2560. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  2561. bfin_plat_nand_init();
  2562. adf702x_mac_init();
  2563. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  2564. i2c_register_board_info(0, bfin_i2c_board_info,
  2565. ARRAY_SIZE(bfin_i2c_board_info));
  2566. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  2567. return 0;
  2568. }
  2569. arch_initcall(stamp_init);
  2570. static struct platform_device *stamp_early_devices[] __initdata = {
  2571. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  2572. #ifdef CONFIG_SERIAL_BFIN_UART0
  2573. &bfin_uart0_device,
  2574. #endif
  2575. #ifdef CONFIG_SERIAL_BFIN_UART1
  2576. &bfin_uart1_device,
  2577. #endif
  2578. #endif
  2579. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  2580. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2581. &bfin_sport0_uart_device,
  2582. #endif
  2583. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2584. &bfin_sport1_uart_device,
  2585. #endif
  2586. #endif
  2587. };
  2588. void __init native_machine_early_platform_add_devices(void)
  2589. {
  2590. printk(KERN_INFO "register early platform devices\n");
  2591. early_platform_add_devices(stamp_early_devices,
  2592. ARRAY_SIZE(stamp_early_devices));
  2593. }
  2594. void native_machine_restart(char *cmd)
  2595. {
  2596. /* workaround reboot hang when booting from SPI */
  2597. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  2598. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  2599. }
  2600. /*
  2601. * Currently the MAC address is saved in Flash by U-Boot
  2602. */
  2603. #define FLASH_MAC 0x203f0000
  2604. void bfin_get_ether_addr(char *addr)
  2605. {
  2606. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  2607. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  2608. }
  2609. EXPORT_SYMBOL(bfin_get_ether_addr);