w83627hf.c 44 KB

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  1. /*
  2. w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
  5. Philip Edelbrock <phil@netroedge.com>,
  6. and Mark Studebaker <mdsxyz123@yahoo.com>
  7. Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. /*
  21. Supports following chips:
  22. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  23. w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
  24. w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
  25. w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
  26. w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
  27. For other winbond chips, and for i2c support in the above chips,
  28. use w83781d.c.
  29. Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  30. supported yet.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/slab.h>
  35. #include <linux/jiffies.h>
  36. #include <linux/i2c.h>
  37. #include <linux/i2c-sensor.h>
  38. #include <linux/i2c-vid.h>
  39. #include <linux/hwmon.h>
  40. #include <linux/err.h>
  41. #include <asm/io.h>
  42. #include "lm75.h"
  43. static u16 force_addr;
  44. module_param(force_addr, ushort, 0);
  45. MODULE_PARM_DESC(force_addr,
  46. "Initialize the base address of the sensors");
  47. static u8 force_i2c = 0x1f;
  48. module_param(force_i2c, byte, 0);
  49. MODULE_PARM_DESC(force_i2c,
  50. "Initialize the i2c address of the sensors");
  51. /* Addresses to scan */
  52. static unsigned short normal_i2c[] = { I2C_CLIENT_END };
  53. static unsigned int normal_isa[] = { 0, I2C_CLIENT_ISA_END };
  54. /* Insmod parameters */
  55. SENSORS_INSMOD_4(w83627hf, w83627thf, w83697hf, w83637hf);
  56. static int init = 1;
  57. module_param(init, bool, 0);
  58. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  59. /* modified from kernel/include/traps.c */
  60. static int REG; /* The register to read/write */
  61. #define DEV 0x07 /* Register: Logical device select */
  62. static int VAL; /* The value to read/write */
  63. /* logical device numbers for superio_select (below) */
  64. #define W83627HF_LD_FDC 0x00
  65. #define W83627HF_LD_PRT 0x01
  66. #define W83627HF_LD_UART1 0x02
  67. #define W83627HF_LD_UART2 0x03
  68. #define W83627HF_LD_KBC 0x05
  69. #define W83627HF_LD_CIR 0x06 /* w83627hf only */
  70. #define W83627HF_LD_GAME 0x07
  71. #define W83627HF_LD_MIDI 0x07
  72. #define W83627HF_LD_GPIO1 0x07
  73. #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
  74. #define W83627HF_LD_GPIO2 0x08
  75. #define W83627HF_LD_GPIO3 0x09
  76. #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
  77. #define W83627HF_LD_ACPI 0x0a
  78. #define W83627HF_LD_HWM 0x0b
  79. #define DEVID 0x20 /* Register: Device ID */
  80. #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
  81. #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
  82. #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
  83. static inline void
  84. superio_outb(int reg, int val)
  85. {
  86. outb(reg, REG);
  87. outb(val, VAL);
  88. }
  89. static inline int
  90. superio_inb(int reg)
  91. {
  92. outb(reg, REG);
  93. return inb(VAL);
  94. }
  95. static inline void
  96. superio_select(int ld)
  97. {
  98. outb(DEV, REG);
  99. outb(ld, VAL);
  100. }
  101. static inline void
  102. superio_enter(void)
  103. {
  104. outb(0x87, REG);
  105. outb(0x87, REG);
  106. }
  107. static inline void
  108. superio_exit(void)
  109. {
  110. outb(0xAA, REG);
  111. }
  112. #define W627_DEVID 0x52
  113. #define W627THF_DEVID 0x82
  114. #define W697_DEVID 0x60
  115. #define W637_DEVID 0x70
  116. #define WINB_ACT_REG 0x30
  117. #define WINB_BASE_REG 0x60
  118. /* Constants specified below */
  119. /* Length of ISA address segment */
  120. #define WINB_EXTENT 8
  121. /* Where are the ISA address/data registers relative to the base address */
  122. #define W83781D_ADDR_REG_OFFSET 5
  123. #define W83781D_DATA_REG_OFFSET 6
  124. /* The W83781D registers */
  125. /* The W83782D registers for nr=7,8 are in bank 5 */
  126. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  127. (0x554 + (((nr) - 7) * 2)))
  128. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  129. (0x555 + (((nr) - 7) * 2)))
  130. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  131. (0x550 + (nr) - 7))
  132. #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
  133. #define W83781D_REG_FAN(nr) (0x27 + (nr))
  134. #define W83781D_REG_TEMP2_CONFIG 0x152
  135. #define W83781D_REG_TEMP3_CONFIG 0x252
  136. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  137. ((nr == 2) ? (0x0150) : \
  138. (0x27)))
  139. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  140. ((nr == 2) ? (0x153) : \
  141. (0x3A)))
  142. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  143. ((nr == 2) ? (0x155) : \
  144. (0x39)))
  145. #define W83781D_REG_BANK 0x4E
  146. #define W83781D_REG_CONFIG 0x40
  147. #define W83781D_REG_ALARM1 0x41
  148. #define W83781D_REG_ALARM2 0x42
  149. #define W83781D_REG_ALARM3 0x450
  150. #define W83781D_REG_IRQ 0x4C
  151. #define W83781D_REG_BEEP_CONFIG 0x4D
  152. #define W83781D_REG_BEEP_INTS1 0x56
  153. #define W83781D_REG_BEEP_INTS2 0x57
  154. #define W83781D_REG_BEEP_INTS3 0x453
  155. #define W83781D_REG_VID_FANDIV 0x47
  156. #define W83781D_REG_CHIPID 0x49
  157. #define W83781D_REG_WCHIPID 0x58
  158. #define W83781D_REG_CHIPMAN 0x4F
  159. #define W83781D_REG_PIN 0x4B
  160. #define W83781D_REG_VBAT 0x5D
  161. #define W83627HF_REG_PWM1 0x5A
  162. #define W83627HF_REG_PWM2 0x5B
  163. #define W83627HF_REG_PWMCLK12 0x5C
  164. #define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */
  165. #define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */
  166. #define W83627THF_REG_PWM3 0x11 /* 637HF too */
  167. #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */
  168. static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
  169. static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
  170. W83627THF_REG_PWM3 };
  171. #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
  172. regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
  173. #define W83781D_REG_I2C_ADDR 0x48
  174. #define W83781D_REG_I2C_SUBADDR 0x4A
  175. /* Sensor selection */
  176. #define W83781D_REG_SCFG1 0x5D
  177. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  178. #define W83781D_REG_SCFG2 0x59
  179. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  180. #define W83781D_DEFAULT_BETA 3435
  181. /* Conversions. Limit checking is only done on the TO_REG
  182. variants. Note that you should be a bit careful with which arguments
  183. these macros are called: arguments may be evaluated more than once.
  184. Fixing this is just not worth it. */
  185. #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
  186. #define IN_FROM_REG(val) ((val) * 16)
  187. static inline u8 FAN_TO_REG(long rpm, int div)
  188. {
  189. if (rpm == 0)
  190. return 255;
  191. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  192. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
  193. 254);
  194. }
  195. #define TEMP_MIN (-128000)
  196. #define TEMP_MAX ( 127000)
  197. /* TEMP: 0.001C/bit (-128C to +127C)
  198. REG: 1C/bit, two's complement */
  199. static u8 TEMP_TO_REG(int temp)
  200. {
  201. int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
  202. ntemp += (ntemp<0 ? -500 : 500);
  203. return (u8)(ntemp / 1000);
  204. }
  205. static int TEMP_FROM_REG(u8 reg)
  206. {
  207. return (s8)reg * 1000;
  208. }
  209. #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
  210. #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
  211. #define BEEP_MASK_FROM_REG(val) (val)
  212. #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
  213. #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
  214. #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
  215. #define DIV_FROM_REG(val) (1 << (val))
  216. static inline u8 DIV_TO_REG(long val)
  217. {
  218. int i;
  219. val = SENSORS_LIMIT(val, 1, 128) >> 1;
  220. for (i = 0; i < 7; i++) {
  221. if (val == 0)
  222. break;
  223. val >>= 1;
  224. }
  225. return ((u8) i);
  226. }
  227. /* For each registered chip, we need to keep some data in memory. That
  228. data is pointed to by w83627hf_list[NR]->data. The structure itself is
  229. dynamically allocated, at the same time when a new client is allocated. */
  230. struct w83627hf_data {
  231. struct i2c_client client;
  232. struct class_device *class_dev;
  233. struct semaphore lock;
  234. enum chips type;
  235. struct semaphore update_lock;
  236. char valid; /* !=0 if following fields are valid */
  237. unsigned long last_updated; /* In jiffies */
  238. struct i2c_client *lm75; /* for secondary I2C addresses */
  239. /* pointer to array of 2 subclients */
  240. u8 in[9]; /* Register value */
  241. u8 in_max[9]; /* Register value */
  242. u8 in_min[9]; /* Register value */
  243. u8 fan[3]; /* Register value */
  244. u8 fan_min[3]; /* Register value */
  245. u8 temp;
  246. u8 temp_max; /* Register value */
  247. u8 temp_max_hyst; /* Register value */
  248. u16 temp_add[2]; /* Register value */
  249. u16 temp_max_add[2]; /* Register value */
  250. u16 temp_max_hyst_add[2]; /* Register value */
  251. u8 fan_div[3]; /* Register encoding, shifted right */
  252. u8 vid; /* Register encoding, combined */
  253. u32 alarms; /* Register encoding, combined */
  254. u32 beep_mask; /* Register encoding, combined */
  255. u8 beep_enable; /* Boolean */
  256. u8 pwm[3]; /* Register value */
  257. u16 sens[3]; /* 782D/783S only.
  258. 1 = pentium diode; 2 = 3904 diode;
  259. 3000-5000 = thermistor beta.
  260. Default = 3435.
  261. Other Betas unimplemented */
  262. u8 vrm;
  263. u8 vrm_ovt; /* Register value, 627thf & 637hf only */
  264. };
  265. static int w83627hf_attach_adapter(struct i2c_adapter *adapter);
  266. static int w83627hf_detect(struct i2c_adapter *adapter, int address,
  267. int kind);
  268. static int w83627hf_detach_client(struct i2c_client *client);
  269. static int w83627hf_read_value(struct i2c_client *client, u16 register);
  270. static int w83627hf_write_value(struct i2c_client *client, u16 register,
  271. u16 value);
  272. static struct w83627hf_data *w83627hf_update_device(struct device *dev);
  273. static void w83627hf_init_client(struct i2c_client *client);
  274. static struct i2c_driver w83627hf_driver = {
  275. .owner = THIS_MODULE,
  276. .name = "w83627hf",
  277. .id = I2C_DRIVERID_W83627HF,
  278. .flags = I2C_DF_NOTIFY,
  279. .attach_adapter = w83627hf_attach_adapter,
  280. .detach_client = w83627hf_detach_client,
  281. };
  282. /* following are the sysfs callback functions */
  283. #define show_in_reg(reg) \
  284. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  285. { \
  286. struct w83627hf_data *data = w83627hf_update_device(dev); \
  287. return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
  288. }
  289. show_in_reg(in)
  290. show_in_reg(in_min)
  291. show_in_reg(in_max)
  292. #define store_in_reg(REG, reg) \
  293. static ssize_t \
  294. store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
  295. { \
  296. struct i2c_client *client = to_i2c_client(dev); \
  297. struct w83627hf_data *data = i2c_get_clientdata(client); \
  298. u32 val; \
  299. \
  300. val = simple_strtoul(buf, NULL, 10); \
  301. \
  302. down(&data->update_lock); \
  303. data->in_##reg[nr] = IN_TO_REG(val); \
  304. w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
  305. data->in_##reg[nr]); \
  306. \
  307. up(&data->update_lock); \
  308. return count; \
  309. }
  310. store_in_reg(MIN, min)
  311. store_in_reg(MAX, max)
  312. #define sysfs_in_offset(offset) \
  313. static ssize_t \
  314. show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  315. { \
  316. return show_in(dev, buf, offset); \
  317. } \
  318. static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
  319. #define sysfs_in_reg_offset(reg, offset) \
  320. static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  321. { \
  322. return show_in_##reg (dev, buf, offset); \
  323. } \
  324. static ssize_t \
  325. store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
  326. const char *buf, size_t count) \
  327. { \
  328. return store_in_##reg (dev, buf, count, offset); \
  329. } \
  330. static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
  331. show_regs_in_##reg##offset, store_regs_in_##reg##offset);
  332. #define sysfs_in_offsets(offset) \
  333. sysfs_in_offset(offset) \
  334. sysfs_in_reg_offset(min, offset) \
  335. sysfs_in_reg_offset(max, offset)
  336. sysfs_in_offsets(1);
  337. sysfs_in_offsets(2);
  338. sysfs_in_offsets(3);
  339. sysfs_in_offsets(4);
  340. sysfs_in_offsets(5);
  341. sysfs_in_offsets(6);
  342. sysfs_in_offsets(7);
  343. sysfs_in_offsets(8);
  344. /* use a different set of functions for in0 */
  345. static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
  346. {
  347. long in0;
  348. if ((data->vrm_ovt & 0x01) &&
  349. (w83627thf == data->type || w83637hf == data->type))
  350. /* use VRM9 calculation */
  351. in0 = (long)((reg * 488 + 70000 + 50) / 100);
  352. else
  353. /* use VRM8 (standard) calculation */
  354. in0 = (long)IN_FROM_REG(reg);
  355. return sprintf(buf,"%ld\n", in0);
  356. }
  357. static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
  358. {
  359. struct w83627hf_data *data = w83627hf_update_device(dev);
  360. return show_in_0(data, buf, data->in[0]);
  361. }
  362. static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
  363. {
  364. struct w83627hf_data *data = w83627hf_update_device(dev);
  365. return show_in_0(data, buf, data->in_min[0]);
  366. }
  367. static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
  368. {
  369. struct w83627hf_data *data = w83627hf_update_device(dev);
  370. return show_in_0(data, buf, data->in_max[0]);
  371. }
  372. static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
  373. const char *buf, size_t count)
  374. {
  375. struct i2c_client *client = to_i2c_client(dev);
  376. struct w83627hf_data *data = i2c_get_clientdata(client);
  377. u32 val;
  378. val = simple_strtoul(buf, NULL, 10);
  379. down(&data->update_lock);
  380. if ((data->vrm_ovt & 0x01) &&
  381. (w83627thf == data->type || w83637hf == data->type))
  382. /* use VRM9 calculation */
  383. data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
  384. else
  385. /* use VRM8 (standard) calculation */
  386. data->in_min[0] = IN_TO_REG(val);
  387. w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
  388. up(&data->update_lock);
  389. return count;
  390. }
  391. static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
  392. const char *buf, size_t count)
  393. {
  394. struct i2c_client *client = to_i2c_client(dev);
  395. struct w83627hf_data *data = i2c_get_clientdata(client);
  396. u32 val;
  397. val = simple_strtoul(buf, NULL, 10);
  398. down(&data->update_lock);
  399. if ((data->vrm_ovt & 0x01) &&
  400. (w83627thf == data->type || w83637hf == data->type))
  401. /* use VRM9 calculation */
  402. data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
  403. else
  404. /* use VRM8 (standard) calculation */
  405. data->in_max[0] = IN_TO_REG(val);
  406. w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
  407. up(&data->update_lock);
  408. return count;
  409. }
  410. static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
  411. static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
  412. show_regs_in_min0, store_regs_in_min0);
  413. static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
  414. show_regs_in_max0, store_regs_in_max0);
  415. #define device_create_file_in(client, offset) \
  416. do { \
  417. device_create_file(&client->dev, &dev_attr_in##offset##_input); \
  418. device_create_file(&client->dev, &dev_attr_in##offset##_min); \
  419. device_create_file(&client->dev, &dev_attr_in##offset##_max); \
  420. } while (0)
  421. #define show_fan_reg(reg) \
  422. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  423. { \
  424. struct w83627hf_data *data = w83627hf_update_device(dev); \
  425. return sprintf(buf,"%ld\n", \
  426. FAN_FROM_REG(data->reg[nr-1], \
  427. (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
  428. }
  429. show_fan_reg(fan);
  430. show_fan_reg(fan_min);
  431. static ssize_t
  432. store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
  433. {
  434. struct i2c_client *client = to_i2c_client(dev);
  435. struct w83627hf_data *data = i2c_get_clientdata(client);
  436. u32 val;
  437. val = simple_strtoul(buf, NULL, 10);
  438. down(&data->update_lock);
  439. data->fan_min[nr - 1] =
  440. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
  441. w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
  442. data->fan_min[nr - 1]);
  443. up(&data->update_lock);
  444. return count;
  445. }
  446. #define sysfs_fan_offset(offset) \
  447. static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  448. { \
  449. return show_fan(dev, buf, offset); \
  450. } \
  451. static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
  452. #define sysfs_fan_min_offset(offset) \
  453. static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  454. { \
  455. return show_fan_min(dev, buf, offset); \
  456. } \
  457. static ssize_t \
  458. store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  459. { \
  460. return store_fan_min(dev, buf, count, offset); \
  461. } \
  462. static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
  463. show_regs_fan_min##offset, store_regs_fan_min##offset);
  464. sysfs_fan_offset(1);
  465. sysfs_fan_min_offset(1);
  466. sysfs_fan_offset(2);
  467. sysfs_fan_min_offset(2);
  468. sysfs_fan_offset(3);
  469. sysfs_fan_min_offset(3);
  470. #define device_create_file_fan(client, offset) \
  471. do { \
  472. device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
  473. device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
  474. } while (0)
  475. #define show_temp_reg(reg) \
  476. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  477. { \
  478. struct w83627hf_data *data = w83627hf_update_device(dev); \
  479. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  480. return sprintf(buf,"%ld\n", \
  481. (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  482. } else { /* TEMP1 */ \
  483. return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  484. } \
  485. }
  486. show_temp_reg(temp);
  487. show_temp_reg(temp_max);
  488. show_temp_reg(temp_max_hyst);
  489. #define store_temp_reg(REG, reg) \
  490. static ssize_t \
  491. store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
  492. { \
  493. struct i2c_client *client = to_i2c_client(dev); \
  494. struct w83627hf_data *data = i2c_get_clientdata(client); \
  495. u32 val; \
  496. \
  497. val = simple_strtoul(buf, NULL, 10); \
  498. \
  499. down(&data->update_lock); \
  500. \
  501. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  502. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  503. w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
  504. data->temp_##reg##_add[nr-2]); \
  505. } else { /* TEMP1 */ \
  506. data->temp_##reg = TEMP_TO_REG(val); \
  507. w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
  508. data->temp_##reg); \
  509. } \
  510. \
  511. up(&data->update_lock); \
  512. return count; \
  513. }
  514. store_temp_reg(OVER, max);
  515. store_temp_reg(HYST, max_hyst);
  516. #define sysfs_temp_offset(offset) \
  517. static ssize_t \
  518. show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  519. { \
  520. return show_temp(dev, buf, offset); \
  521. } \
  522. static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
  523. #define sysfs_temp_reg_offset(reg, offset) \
  524. static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  525. { \
  526. return show_temp_##reg (dev, buf, offset); \
  527. } \
  528. static ssize_t \
  529. store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
  530. const char *buf, size_t count) \
  531. { \
  532. return store_temp_##reg (dev, buf, count, offset); \
  533. } \
  534. static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
  535. show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
  536. #define sysfs_temp_offsets(offset) \
  537. sysfs_temp_offset(offset) \
  538. sysfs_temp_reg_offset(max, offset) \
  539. sysfs_temp_reg_offset(max_hyst, offset)
  540. sysfs_temp_offsets(1);
  541. sysfs_temp_offsets(2);
  542. sysfs_temp_offsets(3);
  543. #define device_create_file_temp(client, offset) \
  544. do { \
  545. device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
  546. device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
  547. device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
  548. } while (0)
  549. static ssize_t
  550. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  551. {
  552. struct w83627hf_data *data = w83627hf_update_device(dev);
  553. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  554. }
  555. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  556. #define device_create_file_vid(client) \
  557. device_create_file(&client->dev, &dev_attr_cpu0_vid)
  558. static ssize_t
  559. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  560. {
  561. struct w83627hf_data *data = w83627hf_update_device(dev);
  562. return sprintf(buf, "%ld\n", (long) data->vrm);
  563. }
  564. static ssize_t
  565. store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
  566. {
  567. struct i2c_client *client = to_i2c_client(dev);
  568. struct w83627hf_data *data = i2c_get_clientdata(client);
  569. u32 val;
  570. val = simple_strtoul(buf, NULL, 10);
  571. data->vrm = val;
  572. return count;
  573. }
  574. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  575. #define device_create_file_vrm(client) \
  576. device_create_file(&client->dev, &dev_attr_vrm)
  577. static ssize_t
  578. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  579. {
  580. struct w83627hf_data *data = w83627hf_update_device(dev);
  581. return sprintf(buf, "%ld\n", (long) data->alarms);
  582. }
  583. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  584. #define device_create_file_alarms(client) \
  585. device_create_file(&client->dev, &dev_attr_alarms)
  586. #define show_beep_reg(REG, reg) \
  587. static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
  588. { \
  589. struct w83627hf_data *data = w83627hf_update_device(dev); \
  590. return sprintf(buf,"%ld\n", \
  591. (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
  592. }
  593. show_beep_reg(ENABLE, enable)
  594. show_beep_reg(MASK, mask)
  595. #define BEEP_ENABLE 0 /* Store beep_enable */
  596. #define BEEP_MASK 1 /* Store beep_mask */
  597. static ssize_t
  598. store_beep_reg(struct device *dev, const char *buf, size_t count,
  599. int update_mask)
  600. {
  601. struct i2c_client *client = to_i2c_client(dev);
  602. struct w83627hf_data *data = i2c_get_clientdata(client);
  603. u32 val, val2;
  604. val = simple_strtoul(buf, NULL, 10);
  605. down(&data->update_lock);
  606. if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
  607. data->beep_mask = BEEP_MASK_TO_REG(val);
  608. w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
  609. data->beep_mask & 0xff);
  610. w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
  611. ((data->beep_mask) >> 16) & 0xff);
  612. val2 = (data->beep_mask >> 8) & 0x7f;
  613. } else { /* We are storing beep_enable */
  614. val2 =
  615. w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
  616. data->beep_enable = BEEP_ENABLE_TO_REG(val);
  617. }
  618. w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
  619. val2 | data->beep_enable << 7);
  620. up(&data->update_lock);
  621. return count;
  622. }
  623. #define sysfs_beep(REG, reg) \
  624. static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
  625. { \
  626. return show_beep_##reg(dev, attr, buf); \
  627. } \
  628. static ssize_t \
  629. store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  630. { \
  631. return store_beep_reg(dev, buf, count, BEEP_##REG); \
  632. } \
  633. static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
  634. show_regs_beep_##reg, store_regs_beep_##reg);
  635. sysfs_beep(ENABLE, enable);
  636. sysfs_beep(MASK, mask);
  637. #define device_create_file_beep(client) \
  638. do { \
  639. device_create_file(&client->dev, &dev_attr_beep_enable); \
  640. device_create_file(&client->dev, &dev_attr_beep_mask); \
  641. } while (0)
  642. static ssize_t
  643. show_fan_div_reg(struct device *dev, char *buf, int nr)
  644. {
  645. struct w83627hf_data *data = w83627hf_update_device(dev);
  646. return sprintf(buf, "%ld\n",
  647. (long) DIV_FROM_REG(data->fan_div[nr - 1]));
  648. }
  649. /* Note: we save and restore the fan minimum here, because its value is
  650. determined in part by the fan divisor. This follows the principle of
  651. least suprise; the user doesn't expect the fan minimum to change just
  652. because the divisor changed. */
  653. static ssize_t
  654. store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
  655. {
  656. struct i2c_client *client = to_i2c_client(dev);
  657. struct w83627hf_data *data = i2c_get_clientdata(client);
  658. unsigned long min;
  659. u8 reg;
  660. unsigned long val = simple_strtoul(buf, NULL, 10);
  661. down(&data->update_lock);
  662. /* Save fan_min */
  663. min = FAN_FROM_REG(data->fan_min[nr],
  664. DIV_FROM_REG(data->fan_div[nr]));
  665. data->fan_div[nr] = DIV_TO_REG(val);
  666. reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  667. & (nr==0 ? 0xcf : 0x3f))
  668. | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
  669. w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  670. reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
  671. & ~(1 << (5 + nr)))
  672. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  673. w83627hf_write_value(client, W83781D_REG_VBAT, reg);
  674. /* Restore fan_min */
  675. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  676. w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
  677. up(&data->update_lock);
  678. return count;
  679. }
  680. #define sysfs_fan_div(offset) \
  681. static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  682. { \
  683. return show_fan_div_reg(dev, buf, offset); \
  684. } \
  685. static ssize_t \
  686. store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
  687. const char *buf, size_t count) \
  688. { \
  689. return store_fan_div_reg(dev, buf, count, offset - 1); \
  690. } \
  691. static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
  692. show_regs_fan_div_##offset, store_regs_fan_div_##offset);
  693. sysfs_fan_div(1);
  694. sysfs_fan_div(2);
  695. sysfs_fan_div(3);
  696. #define device_create_file_fan_div(client, offset) \
  697. do { \
  698. device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
  699. } while (0)
  700. static ssize_t
  701. show_pwm_reg(struct device *dev, char *buf, int nr)
  702. {
  703. struct w83627hf_data *data = w83627hf_update_device(dev);
  704. return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
  705. }
  706. static ssize_t
  707. store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
  708. {
  709. struct i2c_client *client = to_i2c_client(dev);
  710. struct w83627hf_data *data = i2c_get_clientdata(client);
  711. u32 val;
  712. val = simple_strtoul(buf, NULL, 10);
  713. down(&data->update_lock);
  714. if (data->type == w83627thf) {
  715. /* bits 0-3 are reserved in 627THF */
  716. data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
  717. w83627hf_write_value(client,
  718. W836X7HF_REG_PWM(data->type, nr),
  719. data->pwm[nr - 1] |
  720. (w83627hf_read_value(client,
  721. W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
  722. } else {
  723. data->pwm[nr - 1] = PWM_TO_REG(val);
  724. w83627hf_write_value(client,
  725. W836X7HF_REG_PWM(data->type, nr),
  726. data->pwm[nr - 1]);
  727. }
  728. up(&data->update_lock);
  729. return count;
  730. }
  731. #define sysfs_pwm(offset) \
  732. static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  733. { \
  734. return show_pwm_reg(dev, buf, offset); \
  735. } \
  736. static ssize_t \
  737. store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  738. { \
  739. return store_pwm_reg(dev, buf, count, offset); \
  740. } \
  741. static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
  742. show_regs_pwm_##offset, store_regs_pwm_##offset);
  743. sysfs_pwm(1);
  744. sysfs_pwm(2);
  745. sysfs_pwm(3);
  746. #define device_create_file_pwm(client, offset) \
  747. do { \
  748. device_create_file(&client->dev, &dev_attr_pwm##offset); \
  749. } while (0)
  750. static ssize_t
  751. show_sensor_reg(struct device *dev, char *buf, int nr)
  752. {
  753. struct w83627hf_data *data = w83627hf_update_device(dev);
  754. return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
  755. }
  756. static ssize_t
  757. store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
  758. {
  759. struct i2c_client *client = to_i2c_client(dev);
  760. struct w83627hf_data *data = i2c_get_clientdata(client);
  761. u32 val, tmp;
  762. val = simple_strtoul(buf, NULL, 10);
  763. down(&data->update_lock);
  764. switch (val) {
  765. case 1: /* PII/Celeron diode */
  766. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  767. w83627hf_write_value(client, W83781D_REG_SCFG1,
  768. tmp | BIT_SCFG1[nr - 1]);
  769. tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
  770. w83627hf_write_value(client, W83781D_REG_SCFG2,
  771. tmp | BIT_SCFG2[nr - 1]);
  772. data->sens[nr - 1] = val;
  773. break;
  774. case 2: /* 3904 */
  775. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  776. w83627hf_write_value(client, W83781D_REG_SCFG1,
  777. tmp | BIT_SCFG1[nr - 1]);
  778. tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
  779. w83627hf_write_value(client, W83781D_REG_SCFG2,
  780. tmp & ~BIT_SCFG2[nr - 1]);
  781. data->sens[nr - 1] = val;
  782. break;
  783. case W83781D_DEFAULT_BETA: /* thermistor */
  784. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  785. w83627hf_write_value(client, W83781D_REG_SCFG1,
  786. tmp & ~BIT_SCFG1[nr - 1]);
  787. data->sens[nr - 1] = val;
  788. break;
  789. default:
  790. dev_err(&client->dev,
  791. "Invalid sensor type %ld; must be 1, 2, or %d\n",
  792. (long) val, W83781D_DEFAULT_BETA);
  793. break;
  794. }
  795. up(&data->update_lock);
  796. return count;
  797. }
  798. #define sysfs_sensor(offset) \
  799. static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  800. { \
  801. return show_sensor_reg(dev, buf, offset); \
  802. } \
  803. static ssize_t \
  804. store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  805. { \
  806. return store_sensor_reg(dev, buf, count, offset); \
  807. } \
  808. static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
  809. show_regs_sensor_##offset, store_regs_sensor_##offset);
  810. sysfs_sensor(1);
  811. sysfs_sensor(2);
  812. sysfs_sensor(3);
  813. #define device_create_file_sensor(client, offset) \
  814. do { \
  815. device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
  816. } while (0)
  817. /* This function is called when:
  818. * w83627hf_driver is inserted (when this module is loaded), for each
  819. available adapter
  820. * when a new adapter is inserted (and w83627hf_driver is still present) */
  821. static int w83627hf_attach_adapter(struct i2c_adapter *adapter)
  822. {
  823. return i2c_detect(adapter, &addr_data, w83627hf_detect);
  824. }
  825. static int w83627hf_find(int sioaddr, int *address)
  826. {
  827. u16 val;
  828. REG = sioaddr;
  829. VAL = sioaddr + 1;
  830. superio_enter();
  831. val= superio_inb(DEVID);
  832. if(val != W627_DEVID &&
  833. val != W627THF_DEVID &&
  834. val != W697_DEVID &&
  835. val != W637_DEVID) {
  836. superio_exit();
  837. return -ENODEV;
  838. }
  839. superio_select(W83627HF_LD_HWM);
  840. val = (superio_inb(WINB_BASE_REG) << 8) |
  841. superio_inb(WINB_BASE_REG + 1);
  842. *address = val & ~(WINB_EXTENT - 1);
  843. if (*address == 0 && force_addr == 0) {
  844. superio_exit();
  845. return -ENODEV;
  846. }
  847. if (force_addr)
  848. *address = force_addr; /* so detect will get called */
  849. superio_exit();
  850. return 0;
  851. }
  852. int w83627hf_detect(struct i2c_adapter *adapter, int address,
  853. int kind)
  854. {
  855. int val;
  856. struct i2c_client *new_client;
  857. struct w83627hf_data *data;
  858. int err = 0;
  859. const char *client_name = "";
  860. if (!i2c_is_isa_adapter(adapter)) {
  861. err = -ENODEV;
  862. goto ERROR0;
  863. }
  864. if(force_addr)
  865. address = force_addr & ~(WINB_EXTENT - 1);
  866. if (!request_region(address, WINB_EXTENT, w83627hf_driver.name)) {
  867. err = -EBUSY;
  868. goto ERROR0;
  869. }
  870. if(force_addr) {
  871. printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
  872. superio_enter();
  873. superio_select(W83627HF_LD_HWM);
  874. superio_outb(WINB_BASE_REG, address >> 8);
  875. superio_outb(WINB_BASE_REG+1, address & 0xff);
  876. superio_exit();
  877. }
  878. superio_enter();
  879. val= superio_inb(DEVID);
  880. if(val == W627_DEVID)
  881. kind = w83627hf;
  882. else if(val == W697_DEVID)
  883. kind = w83697hf;
  884. else if(val == W627THF_DEVID)
  885. kind = w83627thf;
  886. else if(val == W637_DEVID)
  887. kind = w83637hf;
  888. else {
  889. dev_info(&adapter->dev,
  890. "Unsupported chip (dev_id=0x%02X).\n", val);
  891. goto ERROR1;
  892. }
  893. superio_select(W83627HF_LD_HWM);
  894. if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
  895. superio_outb(WINB_ACT_REG, 1);
  896. superio_exit();
  897. /* OK. For now, we presume we have a valid client. We now create the
  898. client structure, even though we cannot fill it completely yet.
  899. But it allows us to access w83627hf_{read,write}_value. */
  900. if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
  901. err = -ENOMEM;
  902. goto ERROR1;
  903. }
  904. memset(data, 0, sizeof(struct w83627hf_data));
  905. new_client = &data->client;
  906. i2c_set_clientdata(new_client, data);
  907. new_client->addr = address;
  908. init_MUTEX(&data->lock);
  909. new_client->adapter = adapter;
  910. new_client->driver = &w83627hf_driver;
  911. new_client->flags = 0;
  912. if (kind == w83627hf) {
  913. client_name = "w83627hf";
  914. } else if (kind == w83627thf) {
  915. client_name = "w83627thf";
  916. } else if (kind == w83697hf) {
  917. client_name = "w83697hf";
  918. } else if (kind == w83637hf) {
  919. client_name = "w83637hf";
  920. }
  921. /* Fill in the remaining client fields and put into the global list */
  922. strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
  923. data->type = kind;
  924. data->valid = 0;
  925. init_MUTEX(&data->update_lock);
  926. /* Tell the I2C layer a new client has arrived */
  927. if ((err = i2c_attach_client(new_client)))
  928. goto ERROR2;
  929. data->lm75 = NULL;
  930. /* Initialize the chip */
  931. w83627hf_init_client(new_client);
  932. /* A few vars need to be filled upon startup */
  933. data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
  934. data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
  935. data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
  936. /* Register sysfs hooks */
  937. data->class_dev = hwmon_device_register(&new_client->dev);
  938. if (IS_ERR(data->class_dev)) {
  939. err = PTR_ERR(data->class_dev);
  940. goto ERROR3;
  941. }
  942. device_create_file_in(new_client, 0);
  943. if (kind != w83697hf)
  944. device_create_file_in(new_client, 1);
  945. device_create_file_in(new_client, 2);
  946. device_create_file_in(new_client, 3);
  947. device_create_file_in(new_client, 4);
  948. if (kind != w83627thf && kind != w83637hf) {
  949. device_create_file_in(new_client, 5);
  950. device_create_file_in(new_client, 6);
  951. }
  952. device_create_file_in(new_client, 7);
  953. device_create_file_in(new_client, 8);
  954. device_create_file_fan(new_client, 1);
  955. device_create_file_fan(new_client, 2);
  956. if (kind != w83697hf)
  957. device_create_file_fan(new_client, 3);
  958. device_create_file_temp(new_client, 1);
  959. device_create_file_temp(new_client, 2);
  960. if (kind != w83697hf)
  961. device_create_file_temp(new_client, 3);
  962. if (kind != w83697hf)
  963. device_create_file_vid(new_client);
  964. if (kind != w83697hf)
  965. device_create_file_vrm(new_client);
  966. device_create_file_fan_div(new_client, 1);
  967. device_create_file_fan_div(new_client, 2);
  968. if (kind != w83697hf)
  969. device_create_file_fan_div(new_client, 3);
  970. device_create_file_alarms(new_client);
  971. device_create_file_beep(new_client);
  972. device_create_file_pwm(new_client, 1);
  973. device_create_file_pwm(new_client, 2);
  974. if (kind == w83627thf || kind == w83637hf)
  975. device_create_file_pwm(new_client, 3);
  976. device_create_file_sensor(new_client, 1);
  977. device_create_file_sensor(new_client, 2);
  978. if (kind != w83697hf)
  979. device_create_file_sensor(new_client, 3);
  980. return 0;
  981. ERROR3:
  982. i2c_detach_client(new_client);
  983. ERROR2:
  984. kfree(data);
  985. ERROR1:
  986. release_region(address, WINB_EXTENT);
  987. ERROR0:
  988. return err;
  989. }
  990. static int w83627hf_detach_client(struct i2c_client *client)
  991. {
  992. struct w83627hf_data *data = i2c_get_clientdata(client);
  993. int err;
  994. hwmon_device_unregister(data->class_dev);
  995. if ((err = i2c_detach_client(client))) {
  996. dev_err(&client->dev,
  997. "Client deregistration failed, client not detached.\n");
  998. return err;
  999. }
  1000. release_region(client->addr, WINB_EXTENT);
  1001. kfree(data);
  1002. return 0;
  1003. }
  1004. /*
  1005. ISA access must always be locked explicitly!
  1006. We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1007. would slow down the W83781D access and should not be necessary.
  1008. There are some ugly typecasts here, but the good news is - they should
  1009. nowhere else be necessary! */
  1010. static int w83627hf_read_value(struct i2c_client *client, u16 reg)
  1011. {
  1012. struct w83627hf_data *data = i2c_get_clientdata(client);
  1013. int res, word_sized;
  1014. down(&data->lock);
  1015. word_sized = (((reg & 0xff00) == 0x100)
  1016. || ((reg & 0xff00) == 0x200))
  1017. && (((reg & 0x00ff) == 0x50)
  1018. || ((reg & 0x00ff) == 0x53)
  1019. || ((reg & 0x00ff) == 0x55));
  1020. if (reg & 0xff00) {
  1021. outb_p(W83781D_REG_BANK,
  1022. client->addr + W83781D_ADDR_REG_OFFSET);
  1023. outb_p(reg >> 8,
  1024. client->addr + W83781D_DATA_REG_OFFSET);
  1025. }
  1026. outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
  1027. res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
  1028. if (word_sized) {
  1029. outb_p((reg & 0xff) + 1,
  1030. client->addr + W83781D_ADDR_REG_OFFSET);
  1031. res =
  1032. (res << 8) + inb_p(client->addr +
  1033. W83781D_DATA_REG_OFFSET);
  1034. }
  1035. if (reg & 0xff00) {
  1036. outb_p(W83781D_REG_BANK,
  1037. client->addr + W83781D_ADDR_REG_OFFSET);
  1038. outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
  1039. }
  1040. up(&data->lock);
  1041. return res;
  1042. }
  1043. static int w83627thf_read_gpio5(struct i2c_client *client)
  1044. {
  1045. int res = 0xff, sel;
  1046. superio_enter();
  1047. superio_select(W83627HF_LD_GPIO5);
  1048. /* Make sure these GPIO pins are enabled */
  1049. if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
  1050. dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
  1051. goto exit;
  1052. }
  1053. /* Make sure the pins are configured for input
  1054. There must be at least five (VRM 9), and possibly 6 (VRM 10) */
  1055. sel = superio_inb(W83627THF_GPIO5_IOSR);
  1056. if ((sel & 0x1f) != 0x1f) {
  1057. dev_dbg(&client->dev, "GPIO5 not configured for VID "
  1058. "function\n");
  1059. goto exit;
  1060. }
  1061. dev_info(&client->dev, "Reading VID from GPIO5\n");
  1062. res = superio_inb(W83627THF_GPIO5_DR) & sel;
  1063. exit:
  1064. superio_exit();
  1065. return res;
  1066. }
  1067. static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
  1068. {
  1069. struct w83627hf_data *data = i2c_get_clientdata(client);
  1070. int word_sized;
  1071. down(&data->lock);
  1072. word_sized = (((reg & 0xff00) == 0x100)
  1073. || ((reg & 0xff00) == 0x200))
  1074. && (((reg & 0x00ff) == 0x53)
  1075. || ((reg & 0x00ff) == 0x55));
  1076. if (reg & 0xff00) {
  1077. outb_p(W83781D_REG_BANK,
  1078. client->addr + W83781D_ADDR_REG_OFFSET);
  1079. outb_p(reg >> 8,
  1080. client->addr + W83781D_DATA_REG_OFFSET);
  1081. }
  1082. outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
  1083. if (word_sized) {
  1084. outb_p(value >> 8,
  1085. client->addr + W83781D_DATA_REG_OFFSET);
  1086. outb_p((reg & 0xff) + 1,
  1087. client->addr + W83781D_ADDR_REG_OFFSET);
  1088. }
  1089. outb_p(value & 0xff,
  1090. client->addr + W83781D_DATA_REG_OFFSET);
  1091. if (reg & 0xff00) {
  1092. outb_p(W83781D_REG_BANK,
  1093. client->addr + W83781D_ADDR_REG_OFFSET);
  1094. outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
  1095. }
  1096. up(&data->lock);
  1097. return 0;
  1098. }
  1099. /* Called when we have found a new W83781D. It should set limits, etc. */
  1100. static void w83627hf_init_client(struct i2c_client *client)
  1101. {
  1102. struct w83627hf_data *data = i2c_get_clientdata(client);
  1103. int i;
  1104. int type = data->type;
  1105. u8 tmp;
  1106. if(init) {
  1107. /* save this register */
  1108. i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
  1109. /* Reset all except Watchdog values and last conversion values
  1110. This sets fan-divs to 2, among others */
  1111. w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
  1112. /* Restore the register and disable power-on abnormal beep.
  1113. This saves FAN 1/2/3 input/output values set by BIOS. */
  1114. w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1115. /* Disable master beep-enable (reset turns it on).
  1116. Individual beeps should be reset to off but for some reason
  1117. disabling this bit helps some people not get beeped */
  1118. w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
  1119. }
  1120. /* Minimize conflicts with other winbond i2c-only clients... */
  1121. /* disable i2c subclients... how to disable main i2c client?? */
  1122. /* force i2c address to relatively uncommon address */
  1123. w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
  1124. w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
  1125. /* Read VID only once */
  1126. if (w83627hf == data->type || w83637hf == data->type) {
  1127. int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
  1128. int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
  1129. data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
  1130. } else if (w83627thf == data->type) {
  1131. data->vid = w83627thf_read_gpio5(client) & 0x3f;
  1132. }
  1133. /* Read VRM & OVT Config only once */
  1134. if (w83627thf == data->type || w83637hf == data->type) {
  1135. data->vrm_ovt =
  1136. w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
  1137. data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
  1138. } else {
  1139. /* Convert VID to voltage based on default VRM */
  1140. data->vrm = i2c_which_vrm();
  1141. }
  1142. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  1143. for (i = 1; i <= 3; i++) {
  1144. if (!(tmp & BIT_SCFG1[i - 1])) {
  1145. data->sens[i - 1] = W83781D_DEFAULT_BETA;
  1146. } else {
  1147. if (w83627hf_read_value
  1148. (client,
  1149. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1150. data->sens[i - 1] = 1;
  1151. else
  1152. data->sens[i - 1] = 2;
  1153. }
  1154. if ((type == w83697hf) && (i == 2))
  1155. break;
  1156. }
  1157. if(init) {
  1158. /* Enable temp2 */
  1159. tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
  1160. if (tmp & 0x01) {
  1161. dev_warn(&client->dev, "Enabling temp2, readings "
  1162. "might not make sense\n");
  1163. w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
  1164. tmp & 0xfe);
  1165. }
  1166. /* Enable temp3 */
  1167. if (type != w83697hf) {
  1168. tmp = w83627hf_read_value(client,
  1169. W83781D_REG_TEMP3_CONFIG);
  1170. if (tmp & 0x01) {
  1171. dev_warn(&client->dev, "Enabling temp3, "
  1172. "readings might not make sense\n");
  1173. w83627hf_write_value(client,
  1174. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1175. }
  1176. }
  1177. if (type == w83627hf) {
  1178. /* enable PWM2 control (can't hurt since PWM reg
  1179. should have been reset to 0xff) */
  1180. w83627hf_write_value(client, W83627HF_REG_PWMCLK12,
  1181. 0x19);
  1182. }
  1183. /* enable comparator mode for temp2 and temp3 so
  1184. alarm indication will work correctly */
  1185. i = w83627hf_read_value(client, W83781D_REG_IRQ);
  1186. if (!(i & 0x40))
  1187. w83627hf_write_value(client, W83781D_REG_IRQ,
  1188. i | 0x40);
  1189. }
  1190. /* Start monitoring */
  1191. w83627hf_write_value(client, W83781D_REG_CONFIG,
  1192. (w83627hf_read_value(client,
  1193. W83781D_REG_CONFIG) & 0xf7)
  1194. | 0x01);
  1195. }
  1196. static struct w83627hf_data *w83627hf_update_device(struct device *dev)
  1197. {
  1198. struct i2c_client *client = to_i2c_client(dev);
  1199. struct w83627hf_data *data = i2c_get_clientdata(client);
  1200. int i;
  1201. down(&data->update_lock);
  1202. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1203. || !data->valid) {
  1204. for (i = 0; i <= 8; i++) {
  1205. /* skip missing sensors */
  1206. if (((data->type == w83697hf) && (i == 1)) ||
  1207. ((data->type == w83627thf || data->type == w83637hf)
  1208. && (i == 4 || i == 5)))
  1209. continue;
  1210. data->in[i] =
  1211. w83627hf_read_value(client, W83781D_REG_IN(i));
  1212. data->in_min[i] =
  1213. w83627hf_read_value(client,
  1214. W83781D_REG_IN_MIN(i));
  1215. data->in_max[i] =
  1216. w83627hf_read_value(client,
  1217. W83781D_REG_IN_MAX(i));
  1218. }
  1219. for (i = 1; i <= 3; i++) {
  1220. data->fan[i - 1] =
  1221. w83627hf_read_value(client, W83781D_REG_FAN(i));
  1222. data->fan_min[i - 1] =
  1223. w83627hf_read_value(client,
  1224. W83781D_REG_FAN_MIN(i));
  1225. }
  1226. for (i = 1; i <= 3; i++) {
  1227. u8 tmp = w83627hf_read_value(client,
  1228. W836X7HF_REG_PWM(data->type, i));
  1229. /* bits 0-3 are reserved in 627THF */
  1230. if (data->type == w83627thf)
  1231. tmp &= 0xf0;
  1232. data->pwm[i - 1] = tmp;
  1233. if(i == 2 &&
  1234. (data->type == w83627hf || data->type == w83697hf))
  1235. break;
  1236. }
  1237. data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
  1238. data->temp_max =
  1239. w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
  1240. data->temp_max_hyst =
  1241. w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
  1242. data->temp_add[0] =
  1243. w83627hf_read_value(client, W83781D_REG_TEMP(2));
  1244. data->temp_max_add[0] =
  1245. w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
  1246. data->temp_max_hyst_add[0] =
  1247. w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
  1248. if (data->type != w83697hf) {
  1249. data->temp_add[1] =
  1250. w83627hf_read_value(client, W83781D_REG_TEMP(3));
  1251. data->temp_max_add[1] =
  1252. w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
  1253. data->temp_max_hyst_add[1] =
  1254. w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
  1255. }
  1256. i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
  1257. data->fan_div[0] = (i >> 4) & 0x03;
  1258. data->fan_div[1] = (i >> 6) & 0x03;
  1259. if (data->type != w83697hf) {
  1260. data->fan_div[2] = (w83627hf_read_value(client,
  1261. W83781D_REG_PIN) >> 6) & 0x03;
  1262. }
  1263. i = w83627hf_read_value(client, W83781D_REG_VBAT);
  1264. data->fan_div[0] |= (i >> 3) & 0x04;
  1265. data->fan_div[1] |= (i >> 4) & 0x04;
  1266. if (data->type != w83697hf)
  1267. data->fan_div[2] |= (i >> 5) & 0x04;
  1268. data->alarms =
  1269. w83627hf_read_value(client, W83781D_REG_ALARM1) |
  1270. (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
  1271. (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
  1272. i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
  1273. data->beep_enable = i >> 7;
  1274. data->beep_mask = ((i & 0x7f) << 8) |
  1275. w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
  1276. w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
  1277. data->last_updated = jiffies;
  1278. data->valid = 1;
  1279. }
  1280. up(&data->update_lock);
  1281. return data;
  1282. }
  1283. static int __init sensors_w83627hf_init(void)
  1284. {
  1285. int addr;
  1286. if (w83627hf_find(0x2e, &addr)
  1287. && w83627hf_find(0x4e, &addr)) {
  1288. return -ENODEV;
  1289. }
  1290. normal_isa[0] = addr;
  1291. return i2c_add_driver(&w83627hf_driver);
  1292. }
  1293. static void __exit sensors_w83627hf_exit(void)
  1294. {
  1295. i2c_del_driver(&w83627hf_driver);
  1296. }
  1297. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1298. "Philip Edelbrock <phil@netroedge.com>, "
  1299. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1300. MODULE_DESCRIPTION("W83627HF driver");
  1301. MODULE_LICENSE("GPL");
  1302. module_init(sensors_w83627hf_init);
  1303. module_exit(sensors_w83627hf_exit);