platform.c 5.1 KB

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  1. /*
  2. * DBAu1xxx board platform device registration
  3. *
  4. * Copyright (C) 2009 Manuel Lauss
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/platform_device.h>
  23. #include <asm/mach-au1x00/au1000.h>
  24. #include <asm/mach-au1x00/au1000_dma.h>
  25. #include <asm/mach-au1x00/au1xxx.h>
  26. #include <asm/mach-db1x00/bcsr.h>
  27. #include "../platform.h"
  28. /* DB1xxx PCMCIA interrupt sources:
  29. * CD0/1 GPIO0/3
  30. * STSCHG0/1 GPIO1/4
  31. * CARD0/1 GPIO2/5
  32. * Db1550: 0/1, 21/22, 3/5
  33. */
  34. #define DB1XXX_HAS_PCMCIA
  35. #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  36. #if defined(CONFIG_MIPS_DB1000)
  37. #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT
  38. #define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT
  39. #define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT
  40. #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT
  41. #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
  42. #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
  43. #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
  44. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  45. #elif defined(CONFIG_MIPS_DB1100)
  46. #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
  47. #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
  48. #define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT
  49. #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT
  50. #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
  51. #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
  52. #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
  53. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  54. #elif defined(CONFIG_MIPS_DB1500)
  55. #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
  56. #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
  57. #define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT
  58. #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT
  59. #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
  60. #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
  61. #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
  62. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  63. #elif defined(CONFIG_MIPS_DB1550)
  64. #define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
  65. #define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
  66. #define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT
  67. #define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT
  68. #define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
  69. #define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
  70. #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */
  71. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  72. #else
  73. /* other board: no PCMCIA */
  74. #undef DB1XXX_HAS_PCMCIA
  75. #undef F_SWAPPED
  76. #define F_SWAPPED 0
  77. #if defined(CONFIG_MIPS_BOSPORUS)
  78. #define BOARD_FLASH_SIZE 0x01000000 /* 16MB */
  79. #define BOARD_FLASH_WIDTH 2 /* 16-bits */
  80. #elif defined(CONFIG_MIPS_MIRAGE)
  81. #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */
  82. #define BOARD_FLASH_WIDTH 4 /* 32-bits */
  83. #endif
  84. #endif
  85. static struct resource alchemy_ac97c_res[] = {
  86. [0] = {
  87. .start = AU1000_AC97_PHYS_ADDR,
  88. .end = AU1000_AC97_PHYS_ADDR + 0xfff,
  89. .flags = IORESOURCE_MEM,
  90. },
  91. [1] = {
  92. .start = DMA_ID_AC97C_TX,
  93. .end = DMA_ID_AC97C_TX,
  94. .flags = IORESOURCE_DMA,
  95. },
  96. [2] = {
  97. .start = DMA_ID_AC97C_RX,
  98. .end = DMA_ID_AC97C_RX,
  99. .flags = IORESOURCE_DMA,
  100. },
  101. };
  102. static struct platform_device alchemy_ac97c_dev = {
  103. .name = "alchemy-ac97c",
  104. .id = -1,
  105. .resource = alchemy_ac97c_res,
  106. .num_resources = ARRAY_SIZE(alchemy_ac97c_res),
  107. };
  108. static struct platform_device alchemy_ac97c_dma_dev = {
  109. .name = "alchemy-pcm-dma",
  110. .id = 0,
  111. };
  112. static struct platform_device db1x00_codec_dev = {
  113. .name = "ac97-codec",
  114. .id = -1,
  115. };
  116. static struct platform_device db1x00_audio_dev = {
  117. .name = "db1000-audio",
  118. };
  119. static int __init db1xxx_dev_init(void)
  120. {
  121. #ifdef DB1XXX_HAS_PCMCIA
  122. db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR,
  123. PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
  124. PCMCIA_MEM_PHYS_ADDR,
  125. PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
  126. PCMCIA_IO_PHYS_ADDR,
  127. PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
  128. DB1XXX_PCMCIA_CARD0,
  129. DB1XXX_PCMCIA_CD0,
  130. /*DB1XXX_PCMCIA_STSCHG0*/0,
  131. 0,
  132. 0);
  133. db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
  134. PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
  135. PCMCIA_MEM_PHYS_ADDR + 0x004000000,
  136. PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
  137. PCMCIA_IO_PHYS_ADDR + 0x004000000,
  138. PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
  139. DB1XXX_PCMCIA_CARD1,
  140. DB1XXX_PCMCIA_CD1,
  141. /*DB1XXX_PCMCIA_STSCHG1*/0,
  142. 0,
  143. 1);
  144. #endif
  145. db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
  146. platform_device_register(&db1x00_codec_dev);
  147. platform_device_register(&alchemy_ac97c_dma_dev);
  148. platform_device_register(&alchemy_ac97c_dev);
  149. platform_device_register(&db1x00_audio_dev);
  150. return 0;
  151. }
  152. device_initcall(db1xxx_dev_init);