hw_breakpoint.h 3.1 KB

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  1. /*
  2. * PowerPC BookIII S hardware breakpoint definitions
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. *
  18. * Copyright 2010, IBM Corporation.
  19. * Author: K.Prasad <prasad@linux.vnet.ibm.com>
  20. *
  21. */
  22. #ifndef _PPC_BOOK3S_64_HW_BREAKPOINT_H
  23. #define _PPC_BOOK3S_64_HW_BREAKPOINT_H
  24. #ifdef __KERNEL__
  25. struct arch_hw_breakpoint {
  26. unsigned long address;
  27. u16 type;
  28. u16 len; /* length of the target data symbol */
  29. };
  30. /* Note: Don't change the the first 6 bits below as they are in the same order
  31. * as the dabr and dabrx.
  32. */
  33. #define HW_BRK_TYPE_READ 0x01
  34. #define HW_BRK_TYPE_WRITE 0x02
  35. #define HW_BRK_TYPE_TRANSLATE 0x04
  36. #define HW_BRK_TYPE_USER 0x08
  37. #define HW_BRK_TYPE_KERNEL 0x10
  38. #define HW_BRK_TYPE_HYP 0x20
  39. #define HW_BRK_TYPE_EXTRANEOUS_IRQ 0x80
  40. /* bits that overlap with the bottom 3 bits of the dabr */
  41. #define HW_BRK_TYPE_RDWR (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)
  42. #define HW_BRK_TYPE_DABR (HW_BRK_TYPE_RDWR | HW_BRK_TYPE_TRANSLATE)
  43. #define HW_BRK_TYPE_PRIV_ALL (HW_BRK_TYPE_USER | HW_BRK_TYPE_KERNEL | \
  44. HW_BRK_TYPE_HYP)
  45. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  46. #include <linux/kdebug.h>
  47. #include <asm/reg.h>
  48. #include <asm/debug.h>
  49. struct perf_event;
  50. struct pmu;
  51. struct perf_sample_data;
  52. #define HW_BREAKPOINT_ALIGN 0x7
  53. /* Maximum permissible length of any HW Breakpoint */
  54. #define HW_BREAKPOINT_LEN 0x8
  55. extern int hw_breakpoint_slots(int type);
  56. extern int arch_bp_generic_fields(int type, int *gen_bp_type);
  57. extern int arch_check_bp_in_kernelspace(struct perf_event *bp);
  58. extern int arch_validate_hwbkpt_settings(struct perf_event *bp);
  59. extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
  60. unsigned long val, void *data);
  61. int arch_install_hw_breakpoint(struct perf_event *bp);
  62. void arch_uninstall_hw_breakpoint(struct perf_event *bp);
  63. void hw_breakpoint_pmu_read(struct perf_event *bp);
  64. extern void flush_ptrace_hw_breakpoint(struct task_struct *tsk);
  65. extern struct pmu perf_ops_bp;
  66. extern void ptrace_triggered(struct perf_event *bp,
  67. struct perf_sample_data *data, struct pt_regs *regs);
  68. static inline void hw_breakpoint_disable(void)
  69. {
  70. struct arch_hw_breakpoint brk;
  71. brk.address = 0;
  72. brk.type = 0;
  73. brk.len = 0;
  74. set_break(&brk);
  75. }
  76. extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs);
  77. #else /* CONFIG_HAVE_HW_BREAKPOINT */
  78. static inline void hw_breakpoint_disable(void) { }
  79. static inline void thread_change_pc(struct task_struct *tsk,
  80. struct pt_regs *regs) { }
  81. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  82. #endif /* __KERNEL__ */
  83. #endif /* _PPC_BOOK3S_64_HW_BREAKPOINT_H */