ohci-pnx4008.c 12 KB

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  1. /*
  2. * drivers/usb/host/ohci-pnx4008.c
  3. *
  4. * driver for Philips PNX4008 USB Host
  5. *
  6. * Authors: Dmitry Chigirev <source@mvista.com>
  7. * Vitaly Wool <vitalywool@gmail.com>
  8. *
  9. * register initialization is based on code examples provided by Philips
  10. * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
  11. *
  12. * NOTE: This driver does not have suspend/resume functionality
  13. * This driver is intended for engineering development purposes only
  14. *
  15. * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
  16. * the terms of the GNU General Public License version 2. This program
  17. * is licensed "as is" without any warranty of any kind, whether express
  18. * or implied.
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/i2c.h>
  23. #include <asm/hardware.h>
  24. #include <asm/io.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/arch/platform.h>
  27. #include <asm/arch/irqs.h>
  28. #include <asm/arch/gpio.h>
  29. #define USB_CTRL IO_ADDRESS(PNX4008_PWRMAN_BASE + 0x64)
  30. /* USB_CTRL bit defines */
  31. #define USB_SLAVE_HCLK_EN (1 << 24)
  32. #define USB_HOST_NEED_CLK_EN (1 << 21)
  33. #define USB_OTG_CLK_CTRL IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xFF4)
  34. #define USB_OTG_CLK_STAT IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xFF8)
  35. /* USB_OTG_CLK_CTRL bit defines */
  36. #define AHB_M_CLOCK_ON (1 << 4)
  37. #define OTG_CLOCK_ON (1 << 3)
  38. #define I2C_CLOCK_ON (1 << 2)
  39. #define DEV_CLOCK_ON (1 << 1)
  40. #define HOST_CLOCK_ON (1 << 0)
  41. #define USB_OTG_STAT_CONTROL IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0x110)
  42. /* USB_OTG_STAT_CONTROL bit defines */
  43. #define TRANSPARENT_I2C_EN (1 << 7)
  44. #define HOST_EN (1 << 0)
  45. /* ISP1301 USB transceiver I2C registers */
  46. #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */
  47. #define MC1_SPEED_REG (1 << 0)
  48. #define MC1_SUSPEND_REG (1 << 1)
  49. #define MC1_DAT_SE0 (1 << 2)
  50. #define MC1_TRANSPARENT (1 << 3)
  51. #define MC1_BDIS_ACON_EN (1 << 4)
  52. #define MC1_OE_INT_EN (1 << 5)
  53. #define MC1_UART_EN (1 << 6)
  54. #define MC1_MASK 0x7f
  55. #define ISP1301_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */
  56. #define MC2_GLOBAL_PWR_DN (1 << 0)
  57. #define MC2_SPD_SUSP_CTRL (1 << 1)
  58. #define MC2_BI_DI (1 << 2)
  59. #define MC2_TRANSP_BDIR0 (1 << 3)
  60. #define MC2_TRANSP_BDIR1 (1 << 4)
  61. #define MC2_AUDIO_EN (1 << 5)
  62. #define MC2_PSW_EN (1 << 6)
  63. #define MC2_EN2V7 (1 << 7)
  64. #define ISP1301_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */
  65. # define OTG1_DP_PULLUP (1 << 0)
  66. # define OTG1_DM_PULLUP (1 << 1)
  67. # define OTG1_DP_PULLDOWN (1 << 2)
  68. # define OTG1_DM_PULLDOWN (1 << 3)
  69. # define OTG1_ID_PULLDOWN (1 << 4)
  70. # define OTG1_VBUS_DRV (1 << 5)
  71. # define OTG1_VBUS_DISCHRG (1 << 6)
  72. # define OTG1_VBUS_CHRG (1 << 7)
  73. #define ISP1301_OTG_STATUS 0x10 /* u8 readonly */
  74. # define OTG_B_SESS_END (1 << 6)
  75. # define OTG_B_SESS_VLD (1 << 7)
  76. #define ISP1301_I2C_ADDR 0x2C
  77. #define ISP1301_I2C_MODE_CONTROL_1 0x4
  78. #define ISP1301_I2C_MODE_CONTROL_2 0x12
  79. #define ISP1301_I2C_OTG_CONTROL_1 0x6
  80. #define ISP1301_I2C_OTG_CONTROL_2 0x10
  81. #define ISP1301_I2C_INTERRUPT_SOURCE 0x8
  82. #define ISP1301_I2C_INTERRUPT_LATCH 0xA
  83. #define ISP1301_I2C_INTERRUPT_FALLING 0xC
  84. #define ISP1301_I2C_INTERRUPT_RISING 0xE
  85. #define ISP1301_I2C_REG_CLEAR_ADDR 1
  86. struct i2c_driver isp1301_driver;
  87. struct i2c_client *isp1301_i2c_client;
  88. extern int usb_disabled(void);
  89. extern int ocpi_enable(void);
  90. static struct clk *usb_clk;
  91. static int isp1301_probe(struct i2c_adapter *adap);
  92. static int isp1301_detach(struct i2c_client *client);
  93. static const unsigned short normal_i2c[] =
  94. { ISP1301_I2C_ADDR, ISP1301_I2C_ADDR + 1, I2C_CLIENT_END };
  95. static const unsigned short dummy_i2c_addrlist[] = { I2C_CLIENT_END };
  96. static struct i2c_client_address_data addr_data = {
  97. .normal_i2c = normal_i2c,
  98. .probe = dummy_i2c_addrlist,
  99. .ignore = dummy_i2c_addrlist,
  100. };
  101. struct i2c_driver isp1301_driver = {
  102. .driver = {
  103. .name = "isp1301_pnx",
  104. },
  105. .attach_adapter = isp1301_probe,
  106. .detach_client = isp1301_detach,
  107. };
  108. static int isp1301_attach(struct i2c_adapter *adap, int addr, int kind)
  109. {
  110. struct i2c_client *c;
  111. int err;
  112. c = kzalloc(sizeof(*c), GFP_KERNEL);
  113. if (!c)
  114. return -ENOMEM;
  115. strlcpy(c->name, "isp1301_pnx", I2C_NAME_SIZE);
  116. c->flags = 0;
  117. c->addr = addr;
  118. c->adapter = adap;
  119. c->driver = &isp1301_driver;
  120. err = i2c_attach_client(c);
  121. if (err) {
  122. kfree(c);
  123. return err;
  124. }
  125. isp1301_i2c_client = c;
  126. return 0;
  127. }
  128. static int isp1301_probe(struct i2c_adapter *adap)
  129. {
  130. return i2c_probe(adap, &addr_data, isp1301_attach);
  131. }
  132. static int isp1301_detach(struct i2c_client *client)
  133. {
  134. i2c_detach_client(client);
  135. kfree(isp1301_i2c_client);
  136. return 0;
  137. }
  138. static void i2c_write(u8 buf, u8 subaddr)
  139. {
  140. char tmpbuf[2];
  141. tmpbuf[0] = subaddr; /*register number */
  142. tmpbuf[1] = buf; /*register data */
  143. i2c_master_send(isp1301_i2c_client, &tmpbuf[0], 2);
  144. }
  145. static void isp1301_configure(void)
  146. {
  147. /* PNX4008 only supports DAT_SE0 USB mode */
  148. /* PNX4008 R2A requires setting the MAX603 to output 3.6V */
  149. /* Power up externel charge-pump */
  150. i2c_write(MC1_DAT_SE0 | MC1_SPEED_REG, ISP1301_I2C_MODE_CONTROL_1);
  151. i2c_write(~(MC1_DAT_SE0 | MC1_SPEED_REG),
  152. ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  153. i2c_write(MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL,
  154. ISP1301_I2C_MODE_CONTROL_2);
  155. i2c_write(~(MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL),
  156. ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR);
  157. i2c_write(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN,
  158. ISP1301_I2C_OTG_CONTROL_1);
  159. i2c_write(~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN),
  160. ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  161. i2c_write(0xFF,
  162. ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR);
  163. i2c_write(0xFF,
  164. ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR);
  165. i2c_write(0xFF,
  166. ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR);
  167. }
  168. static inline void isp1301_vbus_on(void)
  169. {
  170. i2c_write(OTG1_VBUS_DRV, ISP1301_I2C_OTG_CONTROL_1);
  171. }
  172. static inline void isp1301_vbus_off(void)
  173. {
  174. i2c_write(OTG1_VBUS_DRV,
  175. ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  176. }
  177. static void pnx4008_start_hc(void)
  178. {
  179. unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
  180. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  181. isp1301_vbus_on();
  182. }
  183. static void pnx4008_stop_hc(void)
  184. {
  185. unsigned long tmp;
  186. isp1301_vbus_off();
  187. tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
  188. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  189. }
  190. static int __devinit ohci_pnx4008_start(struct usb_hcd *hcd)
  191. {
  192. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  193. int ret;
  194. if ((ret = ohci_init(ohci)) < 0)
  195. return ret;
  196. if ((ret = ohci_run(ohci)) < 0) {
  197. dev_err(hcd->self.controller, "can't start\n");
  198. ohci_stop(hcd);
  199. return ret;
  200. }
  201. return 0;
  202. }
  203. static const struct hc_driver ohci_pnx4008_hc_driver = {
  204. .description = hcd_name,
  205. .product_desc = "pnx4008 OHCI",
  206. /*
  207. * generic hardware linkage
  208. */
  209. .irq = ohci_irq,
  210. .flags = HCD_USB11 | HCD_MEMORY,
  211. .hcd_priv_size = sizeof(struct ohci_hcd),
  212. /*
  213. * basic lifecycle operations
  214. */
  215. .start = ohci_pnx4008_start,
  216. .stop = ohci_stop,
  217. .shutdown = ohci_shutdown,
  218. /*
  219. * managing i/o requests and associated device resources
  220. */
  221. .urb_enqueue = ohci_urb_enqueue,
  222. .urb_dequeue = ohci_urb_dequeue,
  223. .endpoint_disable = ohci_endpoint_disable,
  224. /*
  225. * scheduling support
  226. */
  227. .get_frame_number = ohci_get_frame,
  228. /*
  229. * root hub support
  230. */
  231. .hub_status_data = ohci_hub_status_data,
  232. .hub_control = ohci_hub_control,
  233. .hub_irq_enable = ohci_rhsc_enable,
  234. #ifdef CONFIG_PM
  235. .bus_suspend = ohci_bus_suspend,
  236. .bus_resume = ohci_bus_resume,
  237. #endif
  238. .start_port_reset = ohci_start_port_reset,
  239. };
  240. #define USB_CLOCK_MASK (AHB_M_CLOCK_ON| OTG_CLOCK_ON | HOST_CLOCK_ON | I2C_CLOCK_ON)
  241. static void pnx4008_set_usb_bits(void)
  242. {
  243. start_int_set_falling_edge(SE_USB_OTG_ATX_INT_N);
  244. start_int_ack(SE_USB_OTG_ATX_INT_N);
  245. start_int_umask(SE_USB_OTG_ATX_INT_N);
  246. start_int_set_rising_edge(SE_USB_OTG_TIMER_INT);
  247. start_int_ack(SE_USB_OTG_TIMER_INT);
  248. start_int_umask(SE_USB_OTG_TIMER_INT);
  249. start_int_set_rising_edge(SE_USB_I2C_INT);
  250. start_int_ack(SE_USB_I2C_INT);
  251. start_int_umask(SE_USB_I2C_INT);
  252. start_int_set_rising_edge(SE_USB_INT);
  253. start_int_ack(SE_USB_INT);
  254. start_int_umask(SE_USB_INT);
  255. start_int_set_rising_edge(SE_USB_NEED_CLK_INT);
  256. start_int_ack(SE_USB_NEED_CLK_INT);
  257. start_int_umask(SE_USB_NEED_CLK_INT);
  258. start_int_set_rising_edge(SE_USB_AHB_NEED_CLK_INT);
  259. start_int_ack(SE_USB_AHB_NEED_CLK_INT);
  260. start_int_umask(SE_USB_AHB_NEED_CLK_INT);
  261. }
  262. static void pnx4008_unset_usb_bits(void)
  263. {
  264. start_int_mask(SE_USB_OTG_ATX_INT_N);
  265. start_int_mask(SE_USB_OTG_TIMER_INT);
  266. start_int_mask(SE_USB_I2C_INT);
  267. start_int_mask(SE_USB_INT);
  268. start_int_mask(SE_USB_NEED_CLK_INT);
  269. start_int_mask(SE_USB_AHB_NEED_CLK_INT);
  270. }
  271. static int __devinit usb_hcd_pnx4008_probe(struct platform_device *pdev)
  272. {
  273. struct usb_hcd *hcd = 0;
  274. struct ohci_hcd *ohci;
  275. const struct hc_driver *driver = &ohci_pnx4008_hc_driver;
  276. int ret = 0, irq;
  277. dev_dbg(&pdev->dev, "%s: " DRIVER_INFO " (pnx4008)\n", hcd_name);
  278. if (usb_disabled()) {
  279. err("USB is disabled");
  280. ret = -ENODEV;
  281. goto out;
  282. }
  283. if (pdev->num_resources != 2
  284. || pdev->resource[0].flags != IORESOURCE_MEM
  285. || pdev->resource[1].flags != IORESOURCE_IRQ) {
  286. err("Invalid resource configuration");
  287. ret = -ENODEV;
  288. goto out;
  289. }
  290. /* Enable AHB slave USB clock, needed for further USB clock control */
  291. __raw_writel(USB_SLAVE_HCLK_EN | (1 << 19), USB_CTRL);
  292. ret = i2c_add_driver(&isp1301_driver);
  293. if (ret < 0) {
  294. err("failed to connect I2C to ISP1301 USB Transceiver");
  295. goto out;
  296. }
  297. isp1301_configure();
  298. /* Enable USB PLL */
  299. usb_clk = clk_get(&pdev->dev, "ck_pll5");
  300. if (IS_ERR(usb_clk)) {
  301. err("failed to acquire USB PLL");
  302. ret = PTR_ERR(usb_clk);
  303. goto out1;
  304. }
  305. ret = clk_enable(usb_clk);
  306. if (ret < 0) {
  307. err("failed to start USB PLL");
  308. goto out2;
  309. }
  310. ret = clk_set_rate(usb_clk, 48000);
  311. if (ret < 0) {
  312. err("failed to set USB clock rate");
  313. goto out3;
  314. }
  315. __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
  316. /* Set to enable all needed USB clocks */
  317. __raw_writel(USB_CLOCK_MASK, USB_OTG_CLK_CTRL);
  318. while ((__raw_readl(USB_OTG_CLK_STAT) & USB_CLOCK_MASK) !=
  319. USB_CLOCK_MASK) ;
  320. hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
  321. if (!hcd) {
  322. err("Failed to allocate HC buffer");
  323. ret = -ENOMEM;
  324. goto out3;
  325. }
  326. /* Set all USB bits in the Start Enable register */
  327. pnx4008_set_usb_bits();
  328. hcd->rsrc_start = pdev->resource[0].start;
  329. hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
  330. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
  331. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  332. ret = -ENOMEM;
  333. goto out4;
  334. }
  335. hcd->regs = (void __iomem *)pdev->resource[0].start;
  336. irq = platform_get_irq(pdev, 0);
  337. if (irq < 0) {
  338. ret = -ENXIO;
  339. goto out4;
  340. }
  341. pnx4008_start_hc();
  342. platform_set_drvdata(pdev, hcd);
  343. ohci = hcd_to_ohci(hcd);
  344. ohci_hcd_init(ohci);
  345. dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq);
  346. ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
  347. if (ret == 0)
  348. return ret;
  349. pnx4008_stop_hc();
  350. out4:
  351. pnx4008_unset_usb_bits();
  352. usb_put_hcd(hcd);
  353. out3:
  354. clk_disable(usb_clk);
  355. out2:
  356. clk_put(usb_clk);
  357. out1:
  358. i2c_del_driver(&isp1301_driver);
  359. out:
  360. return ret;
  361. }
  362. static int usb_hcd_pnx4008_remove(struct platform_device *pdev)
  363. {
  364. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  365. usb_remove_hcd(hcd);
  366. pnx4008_stop_hc();
  367. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  368. usb_put_hcd(hcd);
  369. pnx4008_unset_usb_bits();
  370. clk_disable(usb_clk);
  371. clk_put(usb_clk);
  372. i2c_del_driver(&isp1301_driver);
  373. platform_set_drvdata(pdev, NULL);
  374. return 0;
  375. }
  376. /* work with hotplug and coldplug */
  377. MODULE_ALIAS("platform:usb-ohci");
  378. static struct platform_driver usb_hcd_pnx4008_driver = {
  379. .driver = {
  380. .name = "usb-ohci",
  381. .owner = THIS_MODULE,
  382. },
  383. .probe = usb_hcd_pnx4008_probe,
  384. .remove = usb_hcd_pnx4008_remove,
  385. };