iwch_provider.c 32 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203
  1. /*
  2. * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
  3. * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/device.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/delay.h>
  39. #include <linux/errno.h>
  40. #include <linux/list.h>
  41. #include <linux/spinlock.h>
  42. #include <linux/ethtool.h>
  43. #include <asm/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/byteorder.h>
  46. #include <rdma/iw_cm.h>
  47. #include <rdma/ib_verbs.h>
  48. #include <rdma/ib_smi.h>
  49. #include <rdma/ib_user_verbs.h>
  50. #include "cxio_hal.h"
  51. #include "iwch.h"
  52. #include "iwch_provider.h"
  53. #include "iwch_cm.h"
  54. #include "iwch_user.h"
  55. static int iwch_modify_port(struct ib_device *ibdev,
  56. u8 port, int port_modify_mask,
  57. struct ib_port_modify *props)
  58. {
  59. return -ENOSYS;
  60. }
  61. static struct ib_ah *iwch_ah_create(struct ib_pd *pd,
  62. struct ib_ah_attr *ah_attr)
  63. {
  64. return ERR_PTR(-ENOSYS);
  65. }
  66. static int iwch_ah_destroy(struct ib_ah *ah)
  67. {
  68. return -ENOSYS;
  69. }
  70. static int iwch_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  71. {
  72. return -ENOSYS;
  73. }
  74. static int iwch_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  75. {
  76. return -ENOSYS;
  77. }
  78. static int iwch_process_mad(struct ib_device *ibdev,
  79. int mad_flags,
  80. u8 port_num,
  81. struct ib_wc *in_wc,
  82. struct ib_grh *in_grh,
  83. struct ib_mad *in_mad, struct ib_mad *out_mad)
  84. {
  85. return -ENOSYS;
  86. }
  87. static int iwch_dealloc_ucontext(struct ib_ucontext *context)
  88. {
  89. struct iwch_dev *rhp = to_iwch_dev(context->device);
  90. struct iwch_ucontext *ucontext = to_iwch_ucontext(context);
  91. struct iwch_mm_entry *mm, *tmp;
  92. PDBG("%s context %p\n", __FUNCTION__, context);
  93. list_for_each_entry_safe(mm, tmp, &ucontext->mmaps, entry)
  94. kfree(mm);
  95. cxio_release_ucontext(&rhp->rdev, &ucontext->uctx);
  96. kfree(ucontext);
  97. return 0;
  98. }
  99. static struct ib_ucontext *iwch_alloc_ucontext(struct ib_device *ibdev,
  100. struct ib_udata *udata)
  101. {
  102. struct iwch_ucontext *context;
  103. struct iwch_dev *rhp = to_iwch_dev(ibdev);
  104. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  105. context = kzalloc(sizeof(*context), GFP_KERNEL);
  106. if (!context)
  107. return ERR_PTR(-ENOMEM);
  108. cxio_init_ucontext(&rhp->rdev, &context->uctx);
  109. INIT_LIST_HEAD(&context->mmaps);
  110. spin_lock_init(&context->mmap_lock);
  111. return &context->ibucontext;
  112. }
  113. static int iwch_destroy_cq(struct ib_cq *ib_cq)
  114. {
  115. struct iwch_cq *chp;
  116. PDBG("%s ib_cq %p\n", __FUNCTION__, ib_cq);
  117. chp = to_iwch_cq(ib_cq);
  118. remove_handle(chp->rhp, &chp->rhp->cqidr, chp->cq.cqid);
  119. atomic_dec(&chp->refcnt);
  120. wait_event(chp->wait, !atomic_read(&chp->refcnt));
  121. cxio_destroy_cq(&chp->rhp->rdev, &chp->cq);
  122. kfree(chp);
  123. return 0;
  124. }
  125. static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries,
  126. struct ib_ucontext *ib_context,
  127. struct ib_udata *udata)
  128. {
  129. struct iwch_dev *rhp;
  130. struct iwch_cq *chp;
  131. struct iwch_create_cq_resp uresp;
  132. struct iwch_create_cq_req ureq;
  133. struct iwch_ucontext *ucontext = NULL;
  134. PDBG("%s ib_dev %p entries %d\n", __FUNCTION__, ibdev, entries);
  135. rhp = to_iwch_dev(ibdev);
  136. chp = kzalloc(sizeof(*chp), GFP_KERNEL);
  137. if (!chp)
  138. return ERR_PTR(-ENOMEM);
  139. if (ib_context) {
  140. ucontext = to_iwch_ucontext(ib_context);
  141. if (!t3a_device(rhp)) {
  142. if (ib_copy_from_udata(&ureq, udata, sizeof (ureq))) {
  143. kfree(chp);
  144. return ERR_PTR(-EFAULT);
  145. }
  146. chp->user_rptr_addr = (u32 __user *)(unsigned long)ureq.user_rptr_addr;
  147. }
  148. }
  149. if (t3a_device(rhp)) {
  150. /*
  151. * T3A: Add some fluff to handle extra CQEs inserted
  152. * for various errors.
  153. * Additional CQE possibilities:
  154. * TERMINATE,
  155. * incoming RDMA WRITE Failures
  156. * incoming RDMA READ REQUEST FAILUREs
  157. * NOTE: We cannot ensure the CQ won't overflow.
  158. */
  159. entries += 16;
  160. }
  161. entries = roundup_pow_of_two(entries);
  162. chp->cq.size_log2 = ilog2(entries);
  163. if (cxio_create_cq(&rhp->rdev, &chp->cq)) {
  164. kfree(chp);
  165. return ERR_PTR(-ENOMEM);
  166. }
  167. chp->rhp = rhp;
  168. chp->ibcq.cqe = (1 << chp->cq.size_log2) - 1;
  169. spin_lock_init(&chp->lock);
  170. atomic_set(&chp->refcnt, 1);
  171. init_waitqueue_head(&chp->wait);
  172. insert_handle(rhp, &rhp->cqidr, chp, chp->cq.cqid);
  173. if (ucontext) {
  174. struct iwch_mm_entry *mm;
  175. mm = kmalloc(sizeof *mm, GFP_KERNEL);
  176. if (!mm) {
  177. iwch_destroy_cq(&chp->ibcq);
  178. return ERR_PTR(-ENOMEM);
  179. }
  180. uresp.cqid = chp->cq.cqid;
  181. uresp.size_log2 = chp->cq.size_log2;
  182. spin_lock(&ucontext->mmap_lock);
  183. uresp.key = ucontext->key;
  184. ucontext->key += PAGE_SIZE;
  185. spin_unlock(&ucontext->mmap_lock);
  186. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  187. kfree(mm);
  188. iwch_destroy_cq(&chp->ibcq);
  189. return ERR_PTR(-EFAULT);
  190. }
  191. mm->key = uresp.key;
  192. mm->addr = virt_to_phys(chp->cq.queue);
  193. mm->len = PAGE_ALIGN((1UL << uresp.size_log2) *
  194. sizeof (struct t3_cqe));
  195. insert_mmap(ucontext, mm);
  196. }
  197. PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n",
  198. chp->cq.cqid, chp, (1 << chp->cq.size_log2),
  199. (unsigned long long) chp->cq.dma_addr);
  200. return &chp->ibcq;
  201. }
  202. static int iwch_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata)
  203. {
  204. #ifdef notyet
  205. struct iwch_cq *chp = to_iwch_cq(cq);
  206. struct t3_cq oldcq, newcq;
  207. int ret;
  208. PDBG("%s ib_cq %p cqe %d\n", __FUNCTION__, cq, cqe);
  209. /* We don't downsize... */
  210. if (cqe <= cq->cqe)
  211. return 0;
  212. /* create new t3_cq with new size */
  213. cqe = roundup_pow_of_two(cqe+1);
  214. newcq.size_log2 = ilog2(cqe);
  215. /* Dont allow resize to less than the current wce count */
  216. if (cqe < Q_COUNT(chp->cq.rptr, chp->cq.wptr)) {
  217. return -ENOMEM;
  218. }
  219. /* Quiesce all QPs using this CQ */
  220. ret = iwch_quiesce_qps(chp);
  221. if (ret) {
  222. return ret;
  223. }
  224. ret = cxio_create_cq(&chp->rhp->rdev, &newcq);
  225. if (ret) {
  226. return ret;
  227. }
  228. /* copy CQEs */
  229. memcpy(newcq.queue, chp->cq.queue, (1 << chp->cq.size_log2) *
  230. sizeof(struct t3_cqe));
  231. /* old iwch_qp gets new t3_cq but keeps old cqid */
  232. oldcq = chp->cq;
  233. chp->cq = newcq;
  234. chp->cq.cqid = oldcq.cqid;
  235. /* resize new t3_cq to update the HW context */
  236. ret = cxio_resize_cq(&chp->rhp->rdev, &chp->cq);
  237. if (ret) {
  238. chp->cq = oldcq;
  239. return ret;
  240. }
  241. chp->ibcq.cqe = (1<<chp->cq.size_log2) - 1;
  242. /* destroy old t3_cq */
  243. oldcq.cqid = newcq.cqid;
  244. ret = cxio_destroy_cq(&chp->rhp->rdev, &oldcq);
  245. if (ret) {
  246. printk(KERN_ERR MOD "%s - cxio_destroy_cq failed %d\n",
  247. __FUNCTION__, ret);
  248. }
  249. /* add user hooks here */
  250. /* resume qps */
  251. ret = iwch_resume_qps(chp);
  252. return ret;
  253. #else
  254. return -ENOSYS;
  255. #endif
  256. }
  257. static int iwch_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify notify)
  258. {
  259. struct iwch_dev *rhp;
  260. struct iwch_cq *chp;
  261. enum t3_cq_opcode cq_op;
  262. int err;
  263. unsigned long flag;
  264. u32 rptr;
  265. chp = to_iwch_cq(ibcq);
  266. rhp = chp->rhp;
  267. if (notify == IB_CQ_SOLICITED)
  268. cq_op = CQ_ARM_SE;
  269. else
  270. cq_op = CQ_ARM_AN;
  271. if (chp->user_rptr_addr) {
  272. if (get_user(rptr, chp->user_rptr_addr))
  273. return -EFAULT;
  274. spin_lock_irqsave(&chp->lock, flag);
  275. chp->cq.rptr = rptr;
  276. } else
  277. spin_lock_irqsave(&chp->lock, flag);
  278. PDBG("%s rptr 0x%x\n", __FUNCTION__, chp->cq.rptr);
  279. err = cxio_hal_cq_op(&rhp->rdev, &chp->cq, cq_op, 0);
  280. spin_unlock_irqrestore(&chp->lock, flag);
  281. if (err)
  282. printk(KERN_ERR MOD "Error %d rearming CQID 0x%x\n", err,
  283. chp->cq.cqid);
  284. return err;
  285. }
  286. static int iwch_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  287. {
  288. int len = vma->vm_end - vma->vm_start;
  289. u32 key = vma->vm_pgoff << PAGE_SHIFT;
  290. struct cxio_rdev *rdev_p;
  291. int ret = 0;
  292. struct iwch_mm_entry *mm;
  293. struct iwch_ucontext *ucontext;
  294. PDBG("%s pgoff 0x%lx key 0x%x len %d\n", __FUNCTION__, vma->vm_pgoff,
  295. key, len);
  296. if (vma->vm_start & (PAGE_SIZE-1)) {
  297. return -EINVAL;
  298. }
  299. rdev_p = &(to_iwch_dev(context->device)->rdev);
  300. ucontext = to_iwch_ucontext(context);
  301. mm = remove_mmap(ucontext, key, len);
  302. if (!mm)
  303. return -EINVAL;
  304. kfree(mm);
  305. if ((mm->addr >= rdev_p->rnic_info.udbell_physbase) &&
  306. (mm->addr < (rdev_p->rnic_info.udbell_physbase +
  307. rdev_p->rnic_info.udbell_len))) {
  308. /*
  309. * Map T3 DB register.
  310. */
  311. if (vma->vm_flags & VM_READ) {
  312. return -EPERM;
  313. }
  314. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  315. vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
  316. vma->vm_flags &= ~VM_MAYREAD;
  317. ret = io_remap_pfn_range(vma, vma->vm_start,
  318. mm->addr >> PAGE_SHIFT,
  319. len, vma->vm_page_prot);
  320. } else {
  321. /*
  322. * Map WQ or CQ contig dma memory...
  323. */
  324. ret = remap_pfn_range(vma, vma->vm_start,
  325. mm->addr >> PAGE_SHIFT,
  326. len, vma->vm_page_prot);
  327. }
  328. return ret;
  329. }
  330. static int iwch_deallocate_pd(struct ib_pd *pd)
  331. {
  332. struct iwch_dev *rhp;
  333. struct iwch_pd *php;
  334. php = to_iwch_pd(pd);
  335. rhp = php->rhp;
  336. PDBG("%s ibpd %p pdid 0x%x\n", __FUNCTION__, pd, php->pdid);
  337. cxio_hal_put_pdid(rhp->rdev.rscp, php->pdid);
  338. kfree(php);
  339. return 0;
  340. }
  341. static struct ib_pd *iwch_allocate_pd(struct ib_device *ibdev,
  342. struct ib_ucontext *context,
  343. struct ib_udata *udata)
  344. {
  345. struct iwch_pd *php;
  346. u32 pdid;
  347. struct iwch_dev *rhp;
  348. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  349. rhp = (struct iwch_dev *) ibdev;
  350. pdid = cxio_hal_get_pdid(rhp->rdev.rscp);
  351. if (!pdid)
  352. return ERR_PTR(-EINVAL);
  353. php = kzalloc(sizeof(*php), GFP_KERNEL);
  354. if (!php) {
  355. cxio_hal_put_pdid(rhp->rdev.rscp, pdid);
  356. return ERR_PTR(-ENOMEM);
  357. }
  358. php->pdid = pdid;
  359. php->rhp = rhp;
  360. if (context) {
  361. if (ib_copy_to_udata(udata, &php->pdid, sizeof (__u32))) {
  362. iwch_deallocate_pd(&php->ibpd);
  363. return ERR_PTR(-EFAULT);
  364. }
  365. }
  366. PDBG("%s pdid 0x%0x ptr 0x%p\n", __FUNCTION__, pdid, php);
  367. return &php->ibpd;
  368. }
  369. static int iwch_dereg_mr(struct ib_mr *ib_mr)
  370. {
  371. struct iwch_dev *rhp;
  372. struct iwch_mr *mhp;
  373. u32 mmid;
  374. PDBG("%s ib_mr %p\n", __FUNCTION__, ib_mr);
  375. /* There can be no memory windows */
  376. if (atomic_read(&ib_mr->usecnt))
  377. return -EINVAL;
  378. mhp = to_iwch_mr(ib_mr);
  379. rhp = mhp->rhp;
  380. mmid = mhp->attr.stag >> 8;
  381. cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
  382. mhp->attr.pbl_addr);
  383. remove_handle(rhp, &rhp->mmidr, mmid);
  384. if (mhp->kva)
  385. kfree((void *) (unsigned long) mhp->kva);
  386. PDBG("%s mmid 0x%x ptr %p\n", __FUNCTION__, mmid, mhp);
  387. kfree(mhp);
  388. return 0;
  389. }
  390. static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
  391. struct ib_phys_buf *buffer_list,
  392. int num_phys_buf,
  393. int acc,
  394. u64 *iova_start)
  395. {
  396. __be64 *page_list;
  397. int shift;
  398. u64 total_size;
  399. int npages;
  400. struct iwch_dev *rhp;
  401. struct iwch_pd *php;
  402. struct iwch_mr *mhp;
  403. int ret;
  404. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  405. php = to_iwch_pd(pd);
  406. rhp = php->rhp;
  407. acc = iwch_convert_access(acc);
  408. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  409. if (!mhp)
  410. return ERR_PTR(-ENOMEM);
  411. /* First check that we have enough alignment */
  412. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) {
  413. ret = -EINVAL;
  414. goto err;
  415. }
  416. if (num_phys_buf > 1 &&
  417. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) {
  418. ret = -EINVAL;
  419. goto err;
  420. }
  421. ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start,
  422. &total_size, &npages, &shift, &page_list);
  423. if (ret)
  424. goto err;
  425. mhp->rhp = rhp;
  426. mhp->attr.pdid = php->pdid;
  427. mhp->attr.zbva = 0;
  428. /* NOTE: TPT perms are backwards from BIND WR perms! */
  429. mhp->attr.perms = (acc & 0x1) << 3;
  430. mhp->attr.perms |= (acc & 0x2) << 1;
  431. mhp->attr.perms |= (acc & 0x4) >> 1;
  432. mhp->attr.perms |= (acc & 0x8) >> 3;
  433. mhp->attr.va_fbo = *iova_start;
  434. mhp->attr.page_size = shift - 12;
  435. mhp->attr.len = (u32) total_size;
  436. mhp->attr.pbl_size = npages;
  437. ret = iwch_register_mem(rhp, php, mhp, shift, page_list);
  438. kfree(page_list);
  439. if (ret) {
  440. goto err;
  441. }
  442. return &mhp->ibmr;
  443. err:
  444. kfree(mhp);
  445. return ERR_PTR(ret);
  446. }
  447. static int iwch_reregister_phys_mem(struct ib_mr *mr,
  448. int mr_rereg_mask,
  449. struct ib_pd *pd,
  450. struct ib_phys_buf *buffer_list,
  451. int num_phys_buf,
  452. int acc, u64 * iova_start)
  453. {
  454. struct iwch_mr mh, *mhp;
  455. struct iwch_pd *php;
  456. struct iwch_dev *rhp;
  457. int new_acc;
  458. __be64 *page_list = NULL;
  459. int shift = 0;
  460. u64 total_size;
  461. int npages;
  462. int ret;
  463. PDBG("%s ib_mr %p ib_pd %p\n", __FUNCTION__, mr, pd);
  464. /* There can be no memory windows */
  465. if (atomic_read(&mr->usecnt))
  466. return -EINVAL;
  467. mhp = to_iwch_mr(mr);
  468. rhp = mhp->rhp;
  469. php = to_iwch_pd(mr->pd);
  470. /* make sure we are on the same adapter */
  471. if (rhp != php->rhp)
  472. return -EINVAL;
  473. new_acc = mhp->attr.perms;
  474. memcpy(&mh, mhp, sizeof *mhp);
  475. if (mr_rereg_mask & IB_MR_REREG_PD)
  476. php = to_iwch_pd(pd);
  477. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  478. mh.attr.perms = iwch_convert_access(acc);
  479. if (mr_rereg_mask & IB_MR_REREG_TRANS)
  480. ret = build_phys_page_list(buffer_list, num_phys_buf,
  481. iova_start,
  482. &total_size, &npages,
  483. &shift, &page_list);
  484. ret = iwch_reregister_mem(rhp, php, &mh, shift, page_list, npages);
  485. kfree(page_list);
  486. if (ret) {
  487. return ret;
  488. }
  489. if (mr_rereg_mask & IB_MR_REREG_PD)
  490. mhp->attr.pdid = php->pdid;
  491. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  492. mhp->attr.perms = acc;
  493. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  494. mhp->attr.zbva = 0;
  495. mhp->attr.va_fbo = *iova_start;
  496. mhp->attr.page_size = shift - 12;
  497. mhp->attr.len = (u32) total_size;
  498. mhp->attr.pbl_size = npages;
  499. }
  500. return 0;
  501. }
  502. static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  503. int acc, struct ib_udata *udata)
  504. {
  505. __be64 *pages;
  506. int shift, n, len;
  507. int i, j, k;
  508. int err = 0;
  509. struct ib_umem_chunk *chunk;
  510. struct iwch_dev *rhp;
  511. struct iwch_pd *php;
  512. struct iwch_mr *mhp;
  513. struct iwch_reg_user_mr_resp uresp;
  514. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  515. shift = ffs(region->page_size) - 1;
  516. php = to_iwch_pd(pd);
  517. rhp = php->rhp;
  518. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  519. if (!mhp)
  520. return ERR_PTR(-ENOMEM);
  521. n = 0;
  522. list_for_each_entry(chunk, &region->chunk_list, list)
  523. n += chunk->nents;
  524. pages = kmalloc(n * sizeof(u64), GFP_KERNEL);
  525. if (!pages) {
  526. err = -ENOMEM;
  527. goto err;
  528. }
  529. acc = iwch_convert_access(acc);
  530. i = n = 0;
  531. list_for_each_entry(chunk, &region->chunk_list, list)
  532. for (j = 0; j < chunk->nmap; ++j) {
  533. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  534. for (k = 0; k < len; ++k) {
  535. pages[i++] = cpu_to_be64(sg_dma_address(
  536. &chunk->page_list[j]) +
  537. region->page_size * k);
  538. }
  539. }
  540. mhp->rhp = rhp;
  541. mhp->attr.pdid = php->pdid;
  542. mhp->attr.zbva = 0;
  543. mhp->attr.perms = (acc & 0x1) << 3;
  544. mhp->attr.perms |= (acc & 0x2) << 1;
  545. mhp->attr.perms |= (acc & 0x4) >> 1;
  546. mhp->attr.perms |= (acc & 0x8) >> 3;
  547. mhp->attr.va_fbo = region->virt_base;
  548. mhp->attr.page_size = shift - 12;
  549. mhp->attr.len = (u32) region->length;
  550. mhp->attr.pbl_size = i;
  551. err = iwch_register_mem(rhp, php, mhp, shift, pages);
  552. kfree(pages);
  553. if (err)
  554. goto err;
  555. if (udata && t3b_device(rhp)) {
  556. uresp.pbl_addr = (mhp->attr.pbl_addr -
  557. rhp->rdev.rnic_info.pbl_base) >> 3;
  558. PDBG("%s user resp pbl_addr 0x%x\n", __FUNCTION__,
  559. uresp.pbl_addr);
  560. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  561. iwch_dereg_mr(&mhp->ibmr);
  562. err = -EFAULT;
  563. goto err;
  564. }
  565. }
  566. return &mhp->ibmr;
  567. err:
  568. kfree(mhp);
  569. return ERR_PTR(err);
  570. }
  571. static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
  572. {
  573. struct ib_phys_buf bl;
  574. u64 kva;
  575. struct ib_mr *ibmr;
  576. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  577. /*
  578. * T3 only supports 32 bits of size.
  579. */
  580. bl.size = 0xffffffff;
  581. bl.addr = 0;
  582. kva = 0;
  583. ibmr = iwch_register_phys_mem(pd, &bl, 1, acc, &kva);
  584. return ibmr;
  585. }
  586. static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd)
  587. {
  588. struct iwch_dev *rhp;
  589. struct iwch_pd *php;
  590. struct iwch_mw *mhp;
  591. u32 mmid;
  592. u32 stag = 0;
  593. int ret;
  594. php = to_iwch_pd(pd);
  595. rhp = php->rhp;
  596. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  597. if (!mhp)
  598. return ERR_PTR(-ENOMEM);
  599. ret = cxio_allocate_window(&rhp->rdev, &stag, php->pdid);
  600. if (ret) {
  601. kfree(mhp);
  602. return ERR_PTR(ret);
  603. }
  604. mhp->rhp = rhp;
  605. mhp->attr.pdid = php->pdid;
  606. mhp->attr.type = TPT_MW;
  607. mhp->attr.stag = stag;
  608. mmid = (stag) >> 8;
  609. insert_handle(rhp, &rhp->mmidr, mhp, mmid);
  610. PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __FUNCTION__, mmid, mhp, stag);
  611. return &(mhp->ibmw);
  612. }
  613. static int iwch_dealloc_mw(struct ib_mw *mw)
  614. {
  615. struct iwch_dev *rhp;
  616. struct iwch_mw *mhp;
  617. u32 mmid;
  618. mhp = to_iwch_mw(mw);
  619. rhp = mhp->rhp;
  620. mmid = (mw->rkey) >> 8;
  621. cxio_deallocate_window(&rhp->rdev, mhp->attr.stag);
  622. remove_handle(rhp, &rhp->mmidr, mmid);
  623. kfree(mhp);
  624. PDBG("%s ib_mw %p mmid 0x%x ptr %p\n", __FUNCTION__, mw, mmid, mhp);
  625. return 0;
  626. }
  627. static int iwch_destroy_qp(struct ib_qp *ib_qp)
  628. {
  629. struct iwch_dev *rhp;
  630. struct iwch_qp *qhp;
  631. struct iwch_qp_attributes attrs;
  632. struct iwch_ucontext *ucontext;
  633. qhp = to_iwch_qp(ib_qp);
  634. rhp = qhp->rhp;
  635. if (qhp->attr.state == IWCH_QP_STATE_RTS) {
  636. attrs.next_state = IWCH_QP_STATE_ERROR;
  637. iwch_modify_qp(rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, &attrs, 0);
  638. }
  639. wait_event(qhp->wait, !qhp->ep);
  640. remove_handle(rhp, &rhp->qpidr, qhp->wq.qpid);
  641. atomic_dec(&qhp->refcnt);
  642. wait_event(qhp->wait, !atomic_read(&qhp->refcnt));
  643. ucontext = ib_qp->uobject ? to_iwch_ucontext(ib_qp->uobject->context)
  644. : NULL;
  645. cxio_destroy_qp(&rhp->rdev, &qhp->wq,
  646. ucontext ? &ucontext->uctx : &rhp->rdev.uctx);
  647. PDBG("%s ib_qp %p qpid 0x%0x qhp %p\n", __FUNCTION__,
  648. ib_qp, qhp->wq.qpid, qhp);
  649. kfree(qhp);
  650. return 0;
  651. }
  652. static struct ib_qp *iwch_create_qp(struct ib_pd *pd,
  653. struct ib_qp_init_attr *attrs,
  654. struct ib_udata *udata)
  655. {
  656. struct iwch_dev *rhp;
  657. struct iwch_qp *qhp;
  658. struct iwch_pd *php;
  659. struct iwch_cq *schp;
  660. struct iwch_cq *rchp;
  661. struct iwch_create_qp_resp uresp;
  662. int wqsize, sqsize, rqsize;
  663. struct iwch_ucontext *ucontext;
  664. PDBG("%s ib_pd %p\n", __FUNCTION__, pd);
  665. if (attrs->qp_type != IB_QPT_RC)
  666. return ERR_PTR(-EINVAL);
  667. php = to_iwch_pd(pd);
  668. rhp = php->rhp;
  669. schp = get_chp(rhp, ((struct iwch_cq *) attrs->send_cq)->cq.cqid);
  670. rchp = get_chp(rhp, ((struct iwch_cq *) attrs->recv_cq)->cq.cqid);
  671. if (!schp || !rchp)
  672. return ERR_PTR(-EINVAL);
  673. /* The RQT size must be # of entries + 1 rounded up to a power of two */
  674. rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr);
  675. if (rqsize == attrs->cap.max_recv_wr)
  676. rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr+1);
  677. /* T3 doesn't support RQT depth < 16 */
  678. if (rqsize < 16)
  679. rqsize = 16;
  680. if (rqsize > T3_MAX_RQ_SIZE)
  681. return ERR_PTR(-EINVAL);
  682. /*
  683. * NOTE: The SQ and total WQ sizes don't need to be
  684. * a power of two. However, all the code assumes
  685. * they are. EG: Q_FREECNT() and friends.
  686. */
  687. sqsize = roundup_pow_of_two(attrs->cap.max_send_wr);
  688. wqsize = roundup_pow_of_two(rqsize + sqsize);
  689. PDBG("%s wqsize %d sqsize %d rqsize %d\n", __FUNCTION__,
  690. wqsize, sqsize, rqsize);
  691. qhp = kzalloc(sizeof(*qhp), GFP_KERNEL);
  692. if (!qhp)
  693. return ERR_PTR(-ENOMEM);
  694. qhp->wq.size_log2 = ilog2(wqsize);
  695. qhp->wq.rq_size_log2 = ilog2(rqsize);
  696. qhp->wq.sq_size_log2 = ilog2(sqsize);
  697. ucontext = pd->uobject ? to_iwch_ucontext(pd->uobject->context) : NULL;
  698. if (cxio_create_qp(&rhp->rdev, !udata, &qhp->wq,
  699. ucontext ? &ucontext->uctx : &rhp->rdev.uctx)) {
  700. kfree(qhp);
  701. return ERR_PTR(-ENOMEM);
  702. }
  703. attrs->cap.max_recv_wr = rqsize - 1;
  704. attrs->cap.max_send_wr = sqsize;
  705. qhp->rhp = rhp;
  706. qhp->attr.pd = php->pdid;
  707. qhp->attr.scq = ((struct iwch_cq *) attrs->send_cq)->cq.cqid;
  708. qhp->attr.rcq = ((struct iwch_cq *) attrs->recv_cq)->cq.cqid;
  709. qhp->attr.sq_num_entries = attrs->cap.max_send_wr;
  710. qhp->attr.rq_num_entries = attrs->cap.max_recv_wr;
  711. qhp->attr.sq_max_sges = attrs->cap.max_send_sge;
  712. qhp->attr.sq_max_sges_rdma_write = attrs->cap.max_send_sge;
  713. qhp->attr.rq_max_sges = attrs->cap.max_recv_sge;
  714. qhp->attr.state = IWCH_QP_STATE_IDLE;
  715. qhp->attr.next_state = IWCH_QP_STATE_IDLE;
  716. /*
  717. * XXX - These don't get passed in from the openib user
  718. * at create time. The CM sets them via a QP modify.
  719. * Need to fix... I think the CM should
  720. */
  721. qhp->attr.enable_rdma_read = 1;
  722. qhp->attr.enable_rdma_write = 1;
  723. qhp->attr.enable_bind = 1;
  724. qhp->attr.max_ord = 1;
  725. qhp->attr.max_ird = 1;
  726. spin_lock_init(&qhp->lock);
  727. init_waitqueue_head(&qhp->wait);
  728. atomic_set(&qhp->refcnt, 1);
  729. insert_handle(rhp, &rhp->qpidr, qhp, qhp->wq.qpid);
  730. if (udata) {
  731. struct iwch_mm_entry *mm1, *mm2;
  732. mm1 = kmalloc(sizeof *mm1, GFP_KERNEL);
  733. if (!mm1) {
  734. iwch_destroy_qp(&qhp->ibqp);
  735. return ERR_PTR(-ENOMEM);
  736. }
  737. mm2 = kmalloc(sizeof *mm2, GFP_KERNEL);
  738. if (!mm2) {
  739. kfree(mm1);
  740. iwch_destroy_qp(&qhp->ibqp);
  741. return ERR_PTR(-ENOMEM);
  742. }
  743. uresp.qpid = qhp->wq.qpid;
  744. uresp.size_log2 = qhp->wq.size_log2;
  745. uresp.sq_size_log2 = qhp->wq.sq_size_log2;
  746. uresp.rq_size_log2 = qhp->wq.rq_size_log2;
  747. spin_lock(&ucontext->mmap_lock);
  748. uresp.key = ucontext->key;
  749. ucontext->key += PAGE_SIZE;
  750. uresp.db_key = ucontext->key;
  751. ucontext->key += PAGE_SIZE;
  752. spin_unlock(&ucontext->mmap_lock);
  753. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  754. kfree(mm1);
  755. kfree(mm2);
  756. iwch_destroy_qp(&qhp->ibqp);
  757. return ERR_PTR(-EFAULT);
  758. }
  759. mm1->key = uresp.key;
  760. mm1->addr = virt_to_phys(qhp->wq.queue);
  761. mm1->len = PAGE_ALIGN(wqsize * sizeof (union t3_wr));
  762. insert_mmap(ucontext, mm1);
  763. mm2->key = uresp.db_key;
  764. mm2->addr = qhp->wq.udb & PAGE_MASK;
  765. mm2->len = PAGE_SIZE;
  766. insert_mmap(ucontext, mm2);
  767. }
  768. qhp->ibqp.qp_num = qhp->wq.qpid;
  769. init_timer(&(qhp->timer));
  770. PDBG("%s sq_num_entries %d, rq_num_entries %d "
  771. "qpid 0x%0x qhp %p dma_addr 0x%llx size %d\n",
  772. __FUNCTION__, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries,
  773. qhp->wq.qpid, qhp, (unsigned long long) qhp->wq.dma_addr,
  774. 1 << qhp->wq.size_log2);
  775. return &qhp->ibqp;
  776. }
  777. static int iwch_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  778. int attr_mask, struct ib_udata *udata)
  779. {
  780. struct iwch_dev *rhp;
  781. struct iwch_qp *qhp;
  782. enum iwch_qp_attr_mask mask = 0;
  783. struct iwch_qp_attributes attrs;
  784. PDBG("%s ib_qp %p\n", __FUNCTION__, ibqp);
  785. /* iwarp does not support the RTR state */
  786. if ((attr_mask & IB_QP_STATE) && (attr->qp_state == IB_QPS_RTR))
  787. attr_mask &= ~IB_QP_STATE;
  788. /* Make sure we still have something left to do */
  789. if (!attr_mask)
  790. return 0;
  791. memset(&attrs, 0, sizeof attrs);
  792. qhp = to_iwch_qp(ibqp);
  793. rhp = qhp->rhp;
  794. attrs.next_state = iwch_convert_state(attr->qp_state);
  795. attrs.enable_rdma_read = (attr->qp_access_flags &
  796. IB_ACCESS_REMOTE_READ) ? 1 : 0;
  797. attrs.enable_rdma_write = (attr->qp_access_flags &
  798. IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  799. attrs.enable_bind = (attr->qp_access_flags & IB_ACCESS_MW_BIND) ? 1 : 0;
  800. mask |= (attr_mask & IB_QP_STATE) ? IWCH_QP_ATTR_NEXT_STATE : 0;
  801. mask |= (attr_mask & IB_QP_ACCESS_FLAGS) ?
  802. (IWCH_QP_ATTR_ENABLE_RDMA_READ |
  803. IWCH_QP_ATTR_ENABLE_RDMA_WRITE |
  804. IWCH_QP_ATTR_ENABLE_RDMA_BIND) : 0;
  805. return iwch_modify_qp(rhp, qhp, mask, &attrs, 0);
  806. }
  807. void iwch_qp_add_ref(struct ib_qp *qp)
  808. {
  809. PDBG("%s ib_qp %p\n", __FUNCTION__, qp);
  810. atomic_inc(&(to_iwch_qp(qp)->refcnt));
  811. }
  812. void iwch_qp_rem_ref(struct ib_qp *qp)
  813. {
  814. PDBG("%s ib_qp %p\n", __FUNCTION__, qp);
  815. if (atomic_dec_and_test(&(to_iwch_qp(qp)->refcnt)))
  816. wake_up(&(to_iwch_qp(qp)->wait));
  817. }
  818. struct ib_qp *iwch_get_qp(struct ib_device *dev, int qpn)
  819. {
  820. PDBG("%s ib_dev %p qpn 0x%x\n", __FUNCTION__, dev, qpn);
  821. return (struct ib_qp *)get_qhp(to_iwch_dev(dev), qpn);
  822. }
  823. static int iwch_query_pkey(struct ib_device *ibdev,
  824. u8 port, u16 index, u16 * pkey)
  825. {
  826. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  827. *pkey = 0;
  828. return 0;
  829. }
  830. static int iwch_query_gid(struct ib_device *ibdev, u8 port,
  831. int index, union ib_gid *gid)
  832. {
  833. struct iwch_dev *dev;
  834. PDBG("%s ibdev %p, port %d, index %d, gid %p\n",
  835. __FUNCTION__, ibdev, port, index, gid);
  836. dev = to_iwch_dev(ibdev);
  837. BUG_ON(port == 0 || port > 2);
  838. memset(&(gid->raw[0]), 0, sizeof(gid->raw));
  839. memcpy(&(gid->raw[0]), dev->rdev.port_info.lldevs[port-1]->dev_addr, 6);
  840. return 0;
  841. }
  842. static int iwch_query_device(struct ib_device *ibdev,
  843. struct ib_device_attr *props)
  844. {
  845. struct iwch_dev *dev;
  846. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  847. dev = to_iwch_dev(ibdev);
  848. memset(props, 0, sizeof *props);
  849. memcpy(&props->sys_image_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
  850. props->device_cap_flags = dev->device_cap_flags;
  851. props->vendor_id = (u32)dev->rdev.rnic_info.pdev->vendor;
  852. props->vendor_part_id = (u32)dev->rdev.rnic_info.pdev->device;
  853. props->max_mr_size = ~0ull;
  854. props->max_qp = dev->attr.max_qps;
  855. props->max_qp_wr = dev->attr.max_wrs;
  856. props->max_sge = dev->attr.max_sge_per_wr;
  857. props->max_sge_rd = 1;
  858. props->max_qp_rd_atom = dev->attr.max_rdma_reads_per_qp;
  859. props->max_cq = dev->attr.max_cqs;
  860. props->max_cqe = dev->attr.max_cqes_per_cq;
  861. props->max_mr = dev->attr.max_mem_regs;
  862. props->max_pd = dev->attr.max_pds;
  863. props->local_ca_ack_delay = 0;
  864. return 0;
  865. }
  866. static int iwch_query_port(struct ib_device *ibdev,
  867. u8 port, struct ib_port_attr *props)
  868. {
  869. PDBG("%s ibdev %p\n", __FUNCTION__, ibdev);
  870. props->max_mtu = IB_MTU_4096;
  871. props->lid = 0;
  872. props->lmc = 0;
  873. props->sm_lid = 0;
  874. props->sm_sl = 0;
  875. props->state = IB_PORT_ACTIVE;
  876. props->phys_state = 0;
  877. props->port_cap_flags =
  878. IB_PORT_CM_SUP |
  879. IB_PORT_SNMP_TUNNEL_SUP |
  880. IB_PORT_REINIT_SUP |
  881. IB_PORT_DEVICE_MGMT_SUP |
  882. IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
  883. props->gid_tbl_len = 1;
  884. props->pkey_tbl_len = 1;
  885. props->qkey_viol_cntr = 0;
  886. props->active_width = 2;
  887. props->active_speed = 2;
  888. props->max_msg_sz = -1;
  889. return 0;
  890. }
  891. static ssize_t show_rev(struct class_device *cdev, char *buf)
  892. {
  893. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  894. ibdev.class_dev);
  895. PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev);
  896. return sprintf(buf, "%d\n", dev->rdev.t3cdev_p->type);
  897. }
  898. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  899. {
  900. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  901. ibdev.class_dev);
  902. struct ethtool_drvinfo info;
  903. struct net_device *lldev = dev->rdev.t3cdev_p->lldev;
  904. PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev);
  905. lldev->ethtool_ops->get_drvinfo(lldev, &info);
  906. return sprintf(buf, "%s\n", info.fw_version);
  907. }
  908. static ssize_t show_hca(struct class_device *cdev, char *buf)
  909. {
  910. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  911. ibdev.class_dev);
  912. struct ethtool_drvinfo info;
  913. struct net_device *lldev = dev->rdev.t3cdev_p->lldev;
  914. PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev);
  915. lldev->ethtool_ops->get_drvinfo(lldev, &info);
  916. return sprintf(buf, "%s\n", info.driver);
  917. }
  918. static ssize_t show_board(struct class_device *cdev, char *buf)
  919. {
  920. struct iwch_dev *dev = container_of(cdev, struct iwch_dev,
  921. ibdev.class_dev);
  922. PDBG("%s class dev 0x%p\n", __FUNCTION__, dev);
  923. return sprintf(buf, "%x.%x\n", dev->rdev.rnic_info.pdev->vendor,
  924. dev->rdev.rnic_info.pdev->device);
  925. }
  926. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  927. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  928. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  929. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  930. static struct class_device_attribute *iwch_class_attributes[] = {
  931. &class_device_attr_hw_rev,
  932. &class_device_attr_fw_ver,
  933. &class_device_attr_hca_type,
  934. &class_device_attr_board_id
  935. };
  936. int iwch_register_device(struct iwch_dev *dev)
  937. {
  938. int ret;
  939. int i;
  940. PDBG("%s iwch_dev %p\n", __FUNCTION__, dev);
  941. strlcpy(dev->ibdev.name, "cxgb3_%d", IB_DEVICE_NAME_MAX);
  942. memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid));
  943. memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
  944. dev->ibdev.owner = THIS_MODULE;
  945. dev->device_cap_flags =
  946. (IB_DEVICE_ZERO_STAG |
  947. IB_DEVICE_SEND_W_INV | IB_DEVICE_MEM_WINDOW);
  948. dev->ibdev.uverbs_cmd_mask =
  949. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  950. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  951. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  952. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  953. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  954. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  955. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  956. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  957. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  958. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  959. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  960. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  961. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  962. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  963. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  964. (1ull << IB_USER_VERBS_CMD_POST_SEND) |
  965. (1ull << IB_USER_VERBS_CMD_POST_RECV);
  966. dev->ibdev.node_type = RDMA_NODE_RNIC;
  967. memcpy(dev->ibdev.node_desc, IWCH_NODE_DESC, sizeof(IWCH_NODE_DESC));
  968. dev->ibdev.phys_port_cnt = dev->rdev.port_info.nports;
  969. dev->ibdev.dma_device = &(dev->rdev.rnic_info.pdev->dev);
  970. dev->ibdev.class_dev.dev = &(dev->rdev.rnic_info.pdev->dev);
  971. dev->ibdev.query_device = iwch_query_device;
  972. dev->ibdev.query_port = iwch_query_port;
  973. dev->ibdev.modify_port = iwch_modify_port;
  974. dev->ibdev.query_pkey = iwch_query_pkey;
  975. dev->ibdev.query_gid = iwch_query_gid;
  976. dev->ibdev.alloc_ucontext = iwch_alloc_ucontext;
  977. dev->ibdev.dealloc_ucontext = iwch_dealloc_ucontext;
  978. dev->ibdev.mmap = iwch_mmap;
  979. dev->ibdev.alloc_pd = iwch_allocate_pd;
  980. dev->ibdev.dealloc_pd = iwch_deallocate_pd;
  981. dev->ibdev.create_ah = iwch_ah_create;
  982. dev->ibdev.destroy_ah = iwch_ah_destroy;
  983. dev->ibdev.create_qp = iwch_create_qp;
  984. dev->ibdev.modify_qp = iwch_ib_modify_qp;
  985. dev->ibdev.destroy_qp = iwch_destroy_qp;
  986. dev->ibdev.create_cq = iwch_create_cq;
  987. dev->ibdev.destroy_cq = iwch_destroy_cq;
  988. dev->ibdev.resize_cq = iwch_resize_cq;
  989. dev->ibdev.poll_cq = iwch_poll_cq;
  990. dev->ibdev.get_dma_mr = iwch_get_dma_mr;
  991. dev->ibdev.reg_phys_mr = iwch_register_phys_mem;
  992. dev->ibdev.rereg_phys_mr = iwch_reregister_phys_mem;
  993. dev->ibdev.reg_user_mr = iwch_reg_user_mr;
  994. dev->ibdev.dereg_mr = iwch_dereg_mr;
  995. dev->ibdev.alloc_mw = iwch_alloc_mw;
  996. dev->ibdev.bind_mw = iwch_bind_mw;
  997. dev->ibdev.dealloc_mw = iwch_dealloc_mw;
  998. dev->ibdev.attach_mcast = iwch_multicast_attach;
  999. dev->ibdev.detach_mcast = iwch_multicast_detach;
  1000. dev->ibdev.process_mad = iwch_process_mad;
  1001. dev->ibdev.req_notify_cq = iwch_arm_cq;
  1002. dev->ibdev.post_send = iwch_post_send;
  1003. dev->ibdev.post_recv = iwch_post_receive;
  1004. dev->ibdev.iwcm =
  1005. (struct iw_cm_verbs *) kmalloc(sizeof(struct iw_cm_verbs),
  1006. GFP_KERNEL);
  1007. dev->ibdev.iwcm->connect = iwch_connect;
  1008. dev->ibdev.iwcm->accept = iwch_accept_cr;
  1009. dev->ibdev.iwcm->reject = iwch_reject_cr;
  1010. dev->ibdev.iwcm->create_listen = iwch_create_listen;
  1011. dev->ibdev.iwcm->destroy_listen = iwch_destroy_listen;
  1012. dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;
  1013. dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;
  1014. dev->ibdev.iwcm->get_qp = iwch_get_qp;
  1015. ret = ib_register_device(&dev->ibdev);
  1016. if (ret)
  1017. goto bail1;
  1018. for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i) {
  1019. ret = class_device_create_file(&dev->ibdev.class_dev,
  1020. iwch_class_attributes[i]);
  1021. if (ret) {
  1022. goto bail2;
  1023. }
  1024. }
  1025. return 0;
  1026. bail2:
  1027. ib_unregister_device(&dev->ibdev);
  1028. bail1:
  1029. return ret;
  1030. }
  1031. void iwch_unregister_device(struct iwch_dev *dev)
  1032. {
  1033. int i;
  1034. PDBG("%s iwch_dev %p\n", __FUNCTION__, dev);
  1035. for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i)
  1036. class_device_remove_file(&dev->ibdev.class_dev,
  1037. iwch_class_attributes[i]);
  1038. ib_unregister_device(&dev->ibdev);
  1039. return;
  1040. }