dsp_spos.c 52 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; either version 2 of the License, or
  5. * (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  15. *
  16. */
  17. /*
  18. * 2002-07 Benny Sjostrand benny@hostmobility.com
  19. */
  20. #include <sound/driver.h>
  21. #include <asm/io.h>
  22. #include <linux/delay.h>
  23. #include <linux/pci.h>
  24. #include <linux/pm.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/vmalloc.h>
  28. #include <sound/core.h>
  29. #include <sound/control.h>
  30. #include <sound/info.h>
  31. #include <sound/asoundef.h>
  32. #include <sound/cs46xx.h>
  33. #include "cs46xx_lib.h"
  34. #include "dsp_spos.h"
  35. static int cs46xx_dsp_async_init (cs46xx_t *chip, dsp_scb_descriptor_t * fg_entry);
  36. static wide_opcode_t wide_opcodes[] = {
  37. WIDE_FOR_BEGIN_LOOP,
  38. WIDE_FOR_BEGIN_LOOP2,
  39. WIDE_COND_GOTO_ADDR,
  40. WIDE_COND_GOTO_CALL,
  41. WIDE_TBEQ_COND_GOTO_ADDR,
  42. WIDE_TBEQ_COND_CALL_ADDR,
  43. WIDE_TBEQ_NCOND_GOTO_ADDR,
  44. WIDE_TBEQ_NCOND_CALL_ADDR,
  45. WIDE_TBEQ_COND_GOTO1_ADDR,
  46. WIDE_TBEQ_COND_CALL1_ADDR,
  47. WIDE_TBEQ_NCOND_GOTOI_ADDR,
  48. WIDE_TBEQ_NCOND_CALL1_ADDR
  49. };
  50. static int shadow_and_reallocate_code (cs46xx_t * chip,u32 * data,u32 size, u32 overlay_begin_address)
  51. {
  52. unsigned int i = 0, j, nreallocated = 0;
  53. u32 hival,loval,address;
  54. u32 mop_operands,mop_type,wide_op;
  55. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  56. snd_assert( ((size % 2) == 0), return -EINVAL);
  57. while (i < size) {
  58. loval = data[i++];
  59. hival = data[i++];
  60. if (ins->code.offset > 0) {
  61. mop_operands = (hival >> 6) & 0x03fff;
  62. mop_type = mop_operands >> 10;
  63. /* check for wide type instruction */
  64. if (mop_type == 0 &&
  65. (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  66. (mop_operands & WIDE_INSTR_MASK) != 0) {
  67. wide_op = loval & 0x7f;
  68. for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  69. if (wide_opcodes[j] == wide_op) {
  70. /* need to reallocate instruction */
  71. address = (hival & 0x00FFF) << 5;
  72. address |= loval >> 15;
  73. snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
  74. if ( !(address & 0x8000) ) {
  75. address += (ins->code.offset / 2) - overlay_begin_address;
  76. } else {
  77. snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
  78. }
  79. hival &= 0xFF000;
  80. loval &= 0x07FFF;
  81. hival |= ( (address >> 5) & 0x00FFF);
  82. loval |= ( (address << 15) & 0xF8000);
  83. address = (hival & 0x00FFF) << 5;
  84. address |= loval >> 15;
  85. snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
  86. nreallocated ++;
  87. } /* wide_opcodes[j] == wide_op */
  88. } /* for */
  89. } /* mod_type == 0 ... */
  90. } /* ins->code.offset > 0 */
  91. ins->code.data[ins->code.size++] = loval;
  92. ins->code.data[ins->code.size++] = hival;
  93. }
  94. snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
  95. return nreallocated;
  96. }
  97. static segment_desc_t * get_segment_desc (dsp_module_desc_t * module, int seg_type)
  98. {
  99. int i;
  100. for (i = 0;i < module->nsegments; ++i) {
  101. if (module->segments[i].segment_type == seg_type) {
  102. return (module->segments + i);
  103. }
  104. }
  105. return NULL;
  106. };
  107. static int find_free_symbol_index (dsp_spos_instance_t * ins)
  108. {
  109. int index = ins->symbol_table.nsymbols,i;
  110. for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
  111. if (ins->symbol_table.symbols[i].deleted) {
  112. index = i;
  113. break;
  114. }
  115. }
  116. return index;
  117. }
  118. static int add_symbols (cs46xx_t * chip, dsp_module_desc_t * module)
  119. {
  120. int i;
  121. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  122. if (module->symbol_table.nsymbols > 0) {
  123. if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
  124. module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
  125. module->overlay_begin_address = module->symbol_table.symbols[0].address;
  126. }
  127. }
  128. for (i = 0;i < module->symbol_table.nsymbols; ++i) {
  129. if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
  130. snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
  131. return -ENOMEM;
  132. }
  133. if (cs46xx_dsp_lookup_symbol(chip,
  134. module->symbol_table.symbols[i].symbol_name,
  135. module->symbol_table.symbols[i].symbol_type) == NULL) {
  136. ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
  137. ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
  138. ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
  139. ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
  140. if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
  141. ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
  142. ins->symbol_table.nsymbols++;
  143. } else {
  144. /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
  145. module->symbol_table.symbols[i].symbol_name); */
  146. }
  147. }
  148. return 0;
  149. }
  150. static symbol_entry_t * add_symbol (cs46xx_t * chip, char * symbol_name, u32 address, int type)
  151. {
  152. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  153. symbol_entry_t * symbol = NULL;
  154. int index;
  155. if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
  156. snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
  157. return NULL;
  158. }
  159. if (cs46xx_dsp_lookup_symbol(chip,
  160. symbol_name,
  161. type) != NULL) {
  162. snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
  163. return NULL;
  164. }
  165. index = find_free_symbol_index (ins);
  166. strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
  167. ins->symbol_table.symbols[index].address = address;
  168. ins->symbol_table.symbols[index].symbol_type = type;
  169. ins->symbol_table.symbols[index].module = NULL;
  170. ins->symbol_table.symbols[index].deleted = 0;
  171. symbol = (ins->symbol_table.symbols + index);
  172. if (index > ins->symbol_table.highest_frag_index)
  173. ins->symbol_table.highest_frag_index = index;
  174. if (index == ins->symbol_table.nsymbols)
  175. ins->symbol_table.nsymbols++; /* no frag. in list */
  176. return symbol;
  177. }
  178. dsp_spos_instance_t * cs46xx_dsp_spos_create (cs46xx_t * chip)
  179. {
  180. dsp_spos_instance_t * ins = kmalloc(sizeof(dsp_spos_instance_t), GFP_KERNEL);
  181. if (ins == NULL)
  182. return NULL;
  183. memset(ins, 0, sizeof(*ins));
  184. /* better to use vmalloc for this big table */
  185. ins->symbol_table.nsymbols = 0;
  186. ins->symbol_table.symbols = vmalloc(sizeof(symbol_entry_t) * DSP_MAX_SYMBOLS);
  187. ins->symbol_table.highest_frag_index = 0;
  188. if (ins->symbol_table.symbols == NULL) {
  189. cs46xx_dsp_spos_destroy(chip);
  190. return NULL;
  191. }
  192. ins->code.offset = 0;
  193. ins->code.size = 0;
  194. ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
  195. if (ins->code.data == NULL) {
  196. cs46xx_dsp_spos_destroy(chip);
  197. return NULL;
  198. }
  199. ins->nscb = 0;
  200. ins->ntask = 0;
  201. ins->nmodules = 0;
  202. ins->modules = kmalloc(sizeof(dsp_module_desc_t) * DSP_MAX_MODULES, GFP_KERNEL);
  203. if (ins->modules == NULL) {
  204. cs46xx_dsp_spos_destroy(chip);
  205. return NULL;
  206. }
  207. /* default SPDIF input sample rate
  208. to 48000 khz */
  209. ins->spdif_in_sample_rate = 48000;
  210. /* maximize volume */
  211. ins->dac_volume_right = 0x8000;
  212. ins->dac_volume_left = 0x8000;
  213. ins->spdif_input_volume_right = 0x8000;
  214. ins->spdif_input_volume_left = 0x8000;
  215. /* set left and right validity bits and
  216. default channel status */
  217. ins->spdif_csuv_default =
  218. ins->spdif_csuv_stream =
  219. /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) |
  220. /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
  221. /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
  222. /* left and right validity bits */ (1 << 13) | (1 << 12);
  223. return ins;
  224. }
  225. void cs46xx_dsp_spos_destroy (cs46xx_t * chip)
  226. {
  227. int i;
  228. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  229. snd_assert(ins != NULL, return);
  230. down(&chip->spos_mutex);
  231. for (i = 0; i < ins->nscb; ++i) {
  232. if (ins->scbs[i].deleted) continue;
  233. cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
  234. }
  235. kfree(ins->code.data);
  236. vfree(ins->symbol_table.symbols);
  237. kfree(ins->modules);
  238. kfree(ins);
  239. up(&chip->spos_mutex);
  240. }
  241. int cs46xx_dsp_load_module (cs46xx_t * chip, dsp_module_desc_t * module)
  242. {
  243. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  244. segment_desc_t * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
  245. segment_desc_t * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER);
  246. segment_desc_t * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE);
  247. u32 doffset, dsize;
  248. if (ins->nmodules == DSP_MAX_MODULES - 1) {
  249. snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
  250. return -ENOMEM;
  251. }
  252. snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
  253. if (ins->nmodules == 0) {
  254. snd_printdd("dsp_spos: clearing parameter area\n");
  255. snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
  256. }
  257. if (parameter == NULL) {
  258. snd_printdd("dsp_spos: module got no parameter segment\n");
  259. } else {
  260. if (ins->nmodules > 0) {
  261. snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n");
  262. }
  263. doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
  264. dsize = parameter->size * 4;
  265. snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
  266. doffset,doffset + dsize);
  267. if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
  268. snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n");
  269. return -EINVAL;
  270. }
  271. }
  272. if (ins->nmodules == 0) {
  273. snd_printdd("dsp_spos: clearing sample area\n");
  274. snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
  275. }
  276. if (sample == NULL) {
  277. snd_printdd("dsp_spos: module got no sample segment\n");
  278. } else {
  279. if (ins->nmodules > 0) {
  280. snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n");
  281. }
  282. doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET);
  283. dsize = sample->size * 4;
  284. snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
  285. doffset,doffset + dsize);
  286. if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
  287. snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
  288. return -EINVAL;
  289. }
  290. }
  291. if (ins->nmodules == 0) {
  292. snd_printdd("dsp_spos: clearing code area\n");
  293. snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
  294. }
  295. if (code == NULL) {
  296. snd_printdd("dsp_spos: module got no code segment\n");
  297. } else {
  298. if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
  299. snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
  300. return -ENOMEM;
  301. }
  302. module->load_address = ins->code.offset;
  303. module->overlay_begin_address = 0x000;
  304. /* if module has a code segment it must have
  305. symbol table */
  306. snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
  307. if (add_symbols(chip,module)) {
  308. snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
  309. return -ENOMEM;
  310. }
  311. doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
  312. dsize = code->size * 4;
  313. snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
  314. doffset,doffset + dsize);
  315. module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
  316. if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
  317. snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
  318. return -EINVAL;
  319. }
  320. ins->code.offset += code->size;
  321. }
  322. /* NOTE: module segments and symbol table must be
  323. statically allocated. Case that module data is
  324. not generated by the ospparser */
  325. ins->modules[ins->nmodules] = *module;
  326. ins->nmodules++;
  327. return 0;
  328. }
  329. symbol_entry_t * cs46xx_dsp_lookup_symbol (cs46xx_t * chip, char * symbol_name, int symbol_type)
  330. {
  331. int i;
  332. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  333. for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
  334. if (ins->symbol_table.symbols[i].deleted)
  335. continue;
  336. if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
  337. ins->symbol_table.symbols[i].symbol_type == symbol_type) {
  338. return (ins->symbol_table.symbols + i);
  339. }
  340. }
  341. #if 0
  342. printk ("dsp_spos: symbol <%s> type %02x not found\n",
  343. symbol_name,symbol_type);
  344. #endif
  345. return NULL;
  346. }
  347. static symbol_entry_t * cs46xx_dsp_lookup_symbol_addr (cs46xx_t * chip, u32 address, int symbol_type)
  348. {
  349. int i;
  350. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  351. for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
  352. if (ins->symbol_table.symbols[i].deleted)
  353. continue;
  354. if (ins->symbol_table.symbols[i].address == address &&
  355. ins->symbol_table.symbols[i].symbol_type == symbol_type) {
  356. return (ins->symbol_table.symbols + i);
  357. }
  358. }
  359. return NULL;
  360. }
  361. static void cs46xx_dsp_proc_symbol_table_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer)
  362. {
  363. cs46xx_t *chip = entry->private_data;
  364. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  365. int i;
  366. snd_iprintf(buffer, "SYMBOLS:\n");
  367. for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
  368. char *module_str = "system";
  369. if (ins->symbol_table.symbols[i].deleted)
  370. continue;
  371. if (ins->symbol_table.symbols[i].module != NULL) {
  372. module_str = ins->symbol_table.symbols[i].module->module_name;
  373. }
  374. snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
  375. ins->symbol_table.symbols[i].address,
  376. ins->symbol_table.symbols[i].symbol_type,
  377. ins->symbol_table.symbols[i].symbol_name,
  378. module_str);
  379. }
  380. }
  381. static void cs46xx_dsp_proc_modules_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer)
  382. {
  383. cs46xx_t *chip = entry->private_data;
  384. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  385. int i,j;
  386. down(&chip->spos_mutex);
  387. snd_iprintf(buffer, "MODULES:\n");
  388. for ( i = 0; i < ins->nmodules; ++i ) {
  389. snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
  390. snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols);
  391. snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups);
  392. for (j = 0; j < ins->modules[i].nsegments; ++ j) {
  393. segment_desc_t * desc = (ins->modules[i].segments + j);
  394. snd_iprintf(buffer, " segment %02x offset %08x size %08x\n",
  395. desc->segment_type,desc->offset, desc->size);
  396. }
  397. }
  398. up(&chip->spos_mutex);
  399. }
  400. static void cs46xx_dsp_proc_task_tree_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer)
  401. {
  402. cs46xx_t *chip = entry->private_data;
  403. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  404. int i,j,col;
  405. void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
  406. down(&chip->spos_mutex);
  407. snd_iprintf(buffer, "TASK TREES:\n");
  408. for ( i = 0; i < ins->ntask; ++i) {
  409. snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
  410. for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
  411. u32 val;
  412. if (col == 4) {
  413. snd_iprintf(buffer,"\n");
  414. col = 0;
  415. }
  416. val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
  417. snd_iprintf(buffer,"%08x ",val);
  418. }
  419. }
  420. snd_iprintf(buffer,"\n");
  421. up(&chip->spos_mutex);
  422. }
  423. static void cs46xx_dsp_proc_scb_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer)
  424. {
  425. cs46xx_t *chip = entry->private_data;
  426. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  427. int i;
  428. down(&chip->spos_mutex);
  429. snd_iprintf(buffer, "SCB's:\n");
  430. for ( i = 0; i < ins->nscb; ++i) {
  431. if (ins->scbs[i].deleted)
  432. continue;
  433. snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
  434. if (ins->scbs[i].parent_scb_ptr != NULL) {
  435. snd_iprintf(buffer,"parent [%s:%04x] ",
  436. ins->scbs[i].parent_scb_ptr->scb_name,
  437. ins->scbs[i].parent_scb_ptr->address);
  438. } else snd_iprintf(buffer,"parent [none] ");
  439. snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n",
  440. ins->scbs[i].sub_list_ptr->scb_name,
  441. ins->scbs[i].sub_list_ptr->address,
  442. ins->scbs[i].next_scb_ptr->scb_name,
  443. ins->scbs[i].next_scb_ptr->address,
  444. ins->scbs[i].task_entry->symbol_name,
  445. ins->scbs[i].task_entry->address);
  446. }
  447. snd_iprintf(buffer,"\n");
  448. up(&chip->spos_mutex);
  449. }
  450. static void cs46xx_dsp_proc_parameter_dump_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer)
  451. {
  452. cs46xx_t *chip = entry->private_data;
  453. /*dsp_spos_instance_t * ins = chip->dsp_spos_instance; */
  454. unsigned int i,col = 0;
  455. void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
  456. symbol_entry_t * symbol;
  457. for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
  458. if (col == 4) {
  459. snd_iprintf(buffer,"\n");
  460. col = 0;
  461. }
  462. if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
  463. col = 0;
  464. snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
  465. }
  466. if (col == 0) {
  467. snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
  468. }
  469. snd_iprintf(buffer,"%08X ",readl(dst + i));
  470. }
  471. }
  472. static void cs46xx_dsp_proc_sample_dump_read (snd_info_entry_t *entry, snd_info_buffer_t * buffer)
  473. {
  474. cs46xx_t *chip = entry->private_data;
  475. int i,col = 0;
  476. void __iomem *dst = chip->region.idx[2].remap_addr;
  477. snd_iprintf(buffer,"PCMREADER:\n");
  478. for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
  479. if (col == 4) {
  480. snd_iprintf(buffer,"\n");
  481. col = 0;
  482. }
  483. if (col == 0) {
  484. snd_iprintf(buffer, "%04X ",i);
  485. }
  486. snd_iprintf(buffer,"%08X ",readl(dst + i));
  487. }
  488. snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
  489. col = 0;
  490. for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
  491. if (col == 4) {
  492. snd_iprintf(buffer,"\n");
  493. col = 0;
  494. }
  495. if (col == 0) {
  496. snd_iprintf(buffer, "%04X ",i);
  497. }
  498. snd_iprintf(buffer,"%08X ",readl(dst + i));
  499. }
  500. snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
  501. col = 0;
  502. for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
  503. if (col == 4) {
  504. snd_iprintf(buffer,"\n");
  505. col = 0;
  506. }
  507. if (col == 0) {
  508. snd_iprintf(buffer, "%04X ",i);
  509. }
  510. snd_iprintf(buffer,"%08X ",readl(dst + i));
  511. }
  512. snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
  513. col = 0;
  514. for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
  515. if (col == 4) {
  516. snd_iprintf(buffer,"\n");
  517. col = 0;
  518. }
  519. if (col == 0) {
  520. snd_iprintf(buffer, "%04X ",i);
  521. }
  522. snd_iprintf(buffer,"%08X ",readl(dst + i));
  523. }
  524. snd_iprintf(buffer,"\n...\n");
  525. col = 0;
  526. for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
  527. if (col == 4) {
  528. snd_iprintf(buffer,"\n");
  529. col = 0;
  530. }
  531. if (col == 0) {
  532. snd_iprintf(buffer, "%04X ",i);
  533. }
  534. snd_iprintf(buffer,"%08X ",readl(dst + i));
  535. }
  536. snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
  537. col = 0;
  538. for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
  539. if (col == 4) {
  540. snd_iprintf(buffer,"\n");
  541. col = 0;
  542. }
  543. if (col == 0) {
  544. snd_iprintf(buffer, "%04X ",i);
  545. }
  546. snd_iprintf(buffer,"%08X ",readl(dst + i));
  547. }
  548. snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
  549. col = 0;
  550. for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
  551. if (col == 4) {
  552. snd_iprintf(buffer,"\n");
  553. col = 0;
  554. }
  555. if (col == 0) {
  556. snd_iprintf(buffer, "%04X ",i);
  557. }
  558. snd_iprintf(buffer,"%08X ",readl(dst + i));
  559. }
  560. #if 0
  561. snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
  562. col = 0;
  563. for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
  564. if (col == 4) {
  565. snd_iprintf(buffer,"\n");
  566. col = 0;
  567. }
  568. if (col == 0) {
  569. snd_iprintf(buffer, "%04X ",i);
  570. }
  571. snd_iprintf(buffer,"%08X ",readl(dst + i));
  572. }
  573. #endif
  574. snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
  575. col = 0;
  576. for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
  577. if (col == 4) {
  578. snd_iprintf(buffer,"\n");
  579. col = 0;
  580. }
  581. if (col == 0) {
  582. snd_iprintf(buffer, "%04X ",i);
  583. }
  584. snd_iprintf(buffer,"%08X ",readl(dst + i));
  585. }
  586. snd_iprintf(buffer,"\n");
  587. }
  588. int cs46xx_dsp_proc_init (snd_card_t * card, cs46xx_t *chip)
  589. {
  590. snd_info_entry_t *entry;
  591. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  592. int i;
  593. ins->snd_card = card;
  594. if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
  595. entry->content = SNDRV_INFO_CONTENT_TEXT;
  596. entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
  597. entry->c.text.read_size = 512;
  598. if (snd_info_register(entry) < 0) {
  599. snd_info_free_entry(entry);
  600. entry = NULL;
  601. }
  602. }
  603. ins->proc_dsp_dir = entry;
  604. if (!ins->proc_dsp_dir)
  605. return -ENOMEM;
  606. if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
  607. entry->content = SNDRV_INFO_CONTENT_TEXT;
  608. entry->private_data = chip;
  609. entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
  610. entry->c.text.read_size = 512;
  611. entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
  612. if (snd_info_register(entry) < 0) {
  613. snd_info_free_entry(entry);
  614. entry = NULL;
  615. }
  616. }
  617. ins->proc_sym_info_entry = entry;
  618. if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
  619. entry->content = SNDRV_INFO_CONTENT_TEXT;
  620. entry->private_data = chip;
  621. entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
  622. entry->c.text.read_size = 512;
  623. entry->c.text.read = cs46xx_dsp_proc_modules_read;
  624. if (snd_info_register(entry) < 0) {
  625. snd_info_free_entry(entry);
  626. entry = NULL;
  627. }
  628. }
  629. ins->proc_modules_info_entry = entry;
  630. if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
  631. entry->content = SNDRV_INFO_CONTENT_TEXT;
  632. entry->private_data = chip;
  633. entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
  634. entry->c.text.read_size = 512;
  635. entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
  636. if (snd_info_register(entry) < 0) {
  637. snd_info_free_entry(entry);
  638. entry = NULL;
  639. }
  640. }
  641. ins->proc_parameter_dump_info_entry = entry;
  642. if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
  643. entry->content = SNDRV_INFO_CONTENT_TEXT;
  644. entry->private_data = chip;
  645. entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
  646. entry->c.text.read_size = 512;
  647. entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
  648. if (snd_info_register(entry) < 0) {
  649. snd_info_free_entry(entry);
  650. entry = NULL;
  651. }
  652. }
  653. ins->proc_sample_dump_info_entry = entry;
  654. if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
  655. entry->content = SNDRV_INFO_CONTENT_TEXT;
  656. entry->private_data = chip;
  657. entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
  658. entry->c.text.read_size = 512;
  659. entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
  660. if (snd_info_register(entry) < 0) {
  661. snd_info_free_entry(entry);
  662. entry = NULL;
  663. }
  664. }
  665. ins->proc_task_info_entry = entry;
  666. if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
  667. entry->content = SNDRV_INFO_CONTENT_TEXT;
  668. entry->private_data = chip;
  669. entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
  670. entry->c.text.read_size = 1024;
  671. entry->c.text.read = cs46xx_dsp_proc_scb_read;
  672. if (snd_info_register(entry) < 0) {
  673. snd_info_free_entry(entry);
  674. entry = NULL;
  675. }
  676. }
  677. ins->proc_scb_info_entry = entry;
  678. down(&chip->spos_mutex);
  679. /* register/update SCB's entries on proc */
  680. for (i = 0; i < ins->nscb; ++i) {
  681. if (ins->scbs[i].deleted) continue;
  682. cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
  683. }
  684. up(&chip->spos_mutex);
  685. return 0;
  686. }
  687. int cs46xx_dsp_proc_done (cs46xx_t *chip)
  688. {
  689. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  690. int i;
  691. if (ins->proc_sym_info_entry) {
  692. snd_info_unregister(ins->proc_sym_info_entry);
  693. ins->proc_sym_info_entry = NULL;
  694. }
  695. if (ins->proc_modules_info_entry) {
  696. snd_info_unregister(ins->proc_modules_info_entry);
  697. ins->proc_modules_info_entry = NULL;
  698. }
  699. if (ins->proc_parameter_dump_info_entry) {
  700. snd_info_unregister(ins->proc_parameter_dump_info_entry);
  701. ins->proc_parameter_dump_info_entry = NULL;
  702. }
  703. if (ins->proc_sample_dump_info_entry) {
  704. snd_info_unregister(ins->proc_sample_dump_info_entry);
  705. ins->proc_sample_dump_info_entry = NULL;
  706. }
  707. if (ins->proc_scb_info_entry) {
  708. snd_info_unregister(ins->proc_scb_info_entry);
  709. ins->proc_scb_info_entry = NULL;
  710. }
  711. if (ins->proc_task_info_entry) {
  712. snd_info_unregister(ins->proc_task_info_entry);
  713. ins->proc_task_info_entry = NULL;
  714. }
  715. down(&chip->spos_mutex);
  716. for (i = 0; i < ins->nscb; ++i) {
  717. if (ins->scbs[i].deleted) continue;
  718. cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
  719. }
  720. up(&chip->spos_mutex);
  721. if (ins->proc_dsp_dir) {
  722. snd_info_unregister (ins->proc_dsp_dir);
  723. ins->proc_dsp_dir = NULL;
  724. }
  725. return 0;
  726. }
  727. static int debug_tree;
  728. static void _dsp_create_task_tree (cs46xx_t *chip,u32 * task_data, u32 dest, int size)
  729. {
  730. void __iomem *spdst = chip->region.idx[1].remap_addr +
  731. DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
  732. int i;
  733. for (i = 0; i < size; ++i) {
  734. if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
  735. writel(task_data[i],spdst);
  736. spdst += sizeof(u32);
  737. }
  738. }
  739. static int debug_scb;
  740. static void _dsp_create_scb (cs46xx_t *chip,u32 * scb_data, u32 dest)
  741. {
  742. void __iomem *spdst = chip->region.idx[1].remap_addr +
  743. DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
  744. int i;
  745. for (i = 0; i < 0x10; ++i) {
  746. if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
  747. writel(scb_data[i],spdst);
  748. spdst += sizeof(u32);
  749. }
  750. }
  751. static int find_free_scb_index (dsp_spos_instance_t * ins)
  752. {
  753. int index = ins->nscb, i;
  754. for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
  755. if (ins->scbs[i].deleted) {
  756. index = i;
  757. break;
  758. }
  759. }
  760. return index;
  761. }
  762. static dsp_scb_descriptor_t * _map_scb (cs46xx_t *chip,char * name,u32 dest)
  763. {
  764. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  765. dsp_scb_descriptor_t * desc = NULL;
  766. int index;
  767. if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
  768. snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
  769. return NULL;
  770. }
  771. index = find_free_scb_index (ins);
  772. strcpy(ins->scbs[index].scb_name, name);
  773. ins->scbs[index].address = dest;
  774. ins->scbs[index].index = index;
  775. ins->scbs[index].proc_info = NULL;
  776. ins->scbs[index].ref_count = 1;
  777. ins->scbs[index].deleted = 0;
  778. spin_lock_init(&ins->scbs[index].lock);
  779. desc = (ins->scbs + index);
  780. ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
  781. if (index > ins->scb_highest_frag_index)
  782. ins->scb_highest_frag_index = index;
  783. if (index == ins->nscb)
  784. ins->nscb++;
  785. return desc;
  786. }
  787. static dsp_task_descriptor_t * _map_task_tree (cs46xx_t *chip,char * name,u32 dest,u32 size)
  788. {
  789. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  790. dsp_task_descriptor_t * desc = NULL;
  791. if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
  792. snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
  793. return NULL;
  794. }
  795. strcpy(ins->tasks[ins->ntask].task_name,name);
  796. ins->tasks[ins->ntask].address = dest;
  797. ins->tasks[ins->ntask].size = size;
  798. /* quick find in list */
  799. ins->tasks[ins->ntask].index = ins->ntask;
  800. desc = (ins->tasks + ins->ntask);
  801. ins->ntask++;
  802. add_symbol (chip,name,dest,SYMBOL_PARAMETER);
  803. return desc;
  804. }
  805. dsp_scb_descriptor_t * cs46xx_dsp_create_scb (cs46xx_t *chip,char * name, u32 * scb_data,u32 dest)
  806. {
  807. dsp_scb_descriptor_t * desc;
  808. desc = _map_scb (chip,name,dest);
  809. if (desc) {
  810. _dsp_create_scb(chip,scb_data,dest);
  811. } else {
  812. snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
  813. }
  814. return desc;
  815. }
  816. static dsp_task_descriptor_t * cs46xx_dsp_create_task_tree (cs46xx_t *chip,char * name, u32 * task_data,u32 dest,int size)
  817. {
  818. dsp_task_descriptor_t * desc;
  819. desc = _map_task_tree (chip,name,dest,size);
  820. if (desc) {
  821. _dsp_create_task_tree(chip,task_data,dest,size);
  822. } else {
  823. snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
  824. }
  825. return desc;
  826. }
  827. int cs46xx_dsp_scb_and_task_init (cs46xx_t *chip)
  828. {
  829. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  830. symbol_entry_t * fg_task_tree_header_code;
  831. symbol_entry_t * task_tree_header_code;
  832. symbol_entry_t * task_tree_thread;
  833. symbol_entry_t * null_algorithm;
  834. symbol_entry_t * magic_snoop_task;
  835. dsp_scb_descriptor_t * timing_master_scb;
  836. dsp_scb_descriptor_t * codec_out_scb;
  837. dsp_scb_descriptor_t * codec_in_scb;
  838. dsp_scb_descriptor_t * src_task_scb;
  839. dsp_scb_descriptor_t * master_mix_scb;
  840. dsp_scb_descriptor_t * rear_mix_scb;
  841. dsp_scb_descriptor_t * record_mix_scb;
  842. dsp_scb_descriptor_t * write_back_scb;
  843. dsp_scb_descriptor_t * vari_decimate_scb;
  844. dsp_scb_descriptor_t * rear_codec_out_scb;
  845. dsp_scb_descriptor_t * clfe_codec_out_scb;
  846. dsp_scb_descriptor_t * magic_snoop_scb;
  847. int fifo_addr,fifo_span,valid_slots;
  848. static spos_control_block_t sposcb = {
  849. /* 0 */ HFG_TREE_SCB,HFG_STACK,
  850. /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
  851. /* 2 */ DSP_SPOS_DC,0,
  852. /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
  853. /* 4 */ 0,0,
  854. /* 5 */ DSP_SPOS_UU,0,
  855. /* 6 */ FG_TASK_HEADER_ADDR,0,
  856. /* 7 */ 0,0,
  857. /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
  858. /* 9 */ 0,
  859. /* A */ 0,HFG_FIRST_EXECUTE_MODE,
  860. /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
  861. /* C */ DSP_SPOS_DC_DC,
  862. /* D */ DSP_SPOS_DC_DC,
  863. /* E */ DSP_SPOS_DC_DC,
  864. /* F */ DSP_SPOS_DC_DC
  865. };
  866. cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
  867. null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
  868. if (null_algorithm == NULL) {
  869. snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
  870. return -EIO;
  871. }
  872. fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
  873. if (fg_task_tree_header_code == NULL) {
  874. snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
  875. return -EIO;
  876. }
  877. task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
  878. if (task_tree_header_code == NULL) {
  879. snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
  880. return -EIO;
  881. }
  882. task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
  883. if (task_tree_thread == NULL) {
  884. snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
  885. return -EIO;
  886. }
  887. magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
  888. if (magic_snoop_task == NULL) {
  889. snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
  890. return -EIO;
  891. }
  892. {
  893. /* create the null SCB */
  894. static generic_scb_t null_scb = {
  895. { 0, 0, 0, 0 },
  896. { 0, 0, 0, 0, 0 },
  897. NULL_SCB_ADDR, NULL_SCB_ADDR,
  898. 0, 0, 0, 0, 0,
  899. {
  900. 0,0,
  901. 0,0,
  902. }
  903. };
  904. null_scb.entry_point = null_algorithm->address;
  905. ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
  906. ins->the_null_scb->task_entry = null_algorithm;
  907. ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
  908. ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
  909. ins->the_null_scb->parent_scb_ptr = NULL;
  910. cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
  911. }
  912. {
  913. /* setup foreground task tree */
  914. static task_tree_control_block_t fg_task_tree_hdr = {
  915. { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
  916. DSP_SPOS_DC_DC,
  917. DSP_SPOS_DC_DC,
  918. 0x0000,DSP_SPOS_DC,
  919. DSP_SPOS_DC, DSP_SPOS_DC,
  920. DSP_SPOS_DC_DC,
  921. DSP_SPOS_DC_DC,
  922. DSP_SPOS_DC_DC,
  923. DSP_SPOS_DC,DSP_SPOS_DC },
  924. {
  925. BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
  926. 0,
  927. FG_TASK_HEADER_ADDR + TCBData,
  928. },
  929. {
  930. 4,0,
  931. 1,0,
  932. 2,SPOSCB_ADDR + HFGFlags,
  933. 0,0,
  934. FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
  935. },
  936. {
  937. DSP_SPOS_DC,0,
  938. DSP_SPOS_DC,DSP_SPOS_DC,
  939. DSP_SPOS_DC,DSP_SPOS_DC,
  940. DSP_SPOS_DC,DSP_SPOS_DC,
  941. DSP_SPOS_DC,DSP_SPOS_DC,
  942. DSP_SPOS_DCDC,
  943. DSP_SPOS_UU,1,
  944. DSP_SPOS_DCDC,
  945. DSP_SPOS_DCDC,
  946. DSP_SPOS_DCDC,
  947. DSP_SPOS_DCDC,
  948. DSP_SPOS_DCDC,
  949. DSP_SPOS_DCDC,
  950. DSP_SPOS_DCDC,
  951. DSP_SPOS_DCDC,
  952. DSP_SPOS_DCDC,
  953. DSP_SPOS_DCDC,
  954. DSP_SPOS_DCDC,
  955. DSP_SPOS_DCDC,
  956. DSP_SPOS_DCDC,
  957. DSP_SPOS_DCDC,
  958. DSP_SPOS_DCDC,
  959. DSP_SPOS_DCDC,
  960. DSP_SPOS_DCDC,
  961. DSP_SPOS_DCDC,
  962. DSP_SPOS_DCDC,
  963. DSP_SPOS_DCDC,
  964. DSP_SPOS_DCDC,
  965. DSP_SPOS_DCDC,
  966. DSP_SPOS_DCDC,
  967. DSP_SPOS_DCDC,
  968. DSP_SPOS_DCDC,
  969. DSP_SPOS_DCDC,
  970. DSP_SPOS_DCDC,
  971. DSP_SPOS_DCDC
  972. },
  973. {
  974. FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
  975. 0,0
  976. }
  977. };
  978. fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
  979. fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
  980. cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
  981. }
  982. {
  983. /* setup foreground task tree */
  984. static task_tree_control_block_t bg_task_tree_hdr = {
  985. { DSP_SPOS_DC_DC,
  986. DSP_SPOS_DC_DC,
  987. DSP_SPOS_DC_DC,
  988. DSP_SPOS_DC, DSP_SPOS_DC,
  989. DSP_SPOS_DC, DSP_SPOS_DC,
  990. DSP_SPOS_DC_DC,
  991. DSP_SPOS_DC_DC,
  992. DSP_SPOS_DC_DC,
  993. DSP_SPOS_DC,DSP_SPOS_DC },
  994. {
  995. NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */
  996. 0,
  997. BG_TREE_SCB_ADDR + TCBData,
  998. },
  999. {
  1000. 9999,0,
  1001. 0,1,
  1002. 0,SPOSCB_ADDR + HFGFlags,
  1003. 0,0,
  1004. BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
  1005. },
  1006. {
  1007. DSP_SPOS_DC,0,
  1008. DSP_SPOS_DC,DSP_SPOS_DC,
  1009. DSP_SPOS_DC,DSP_SPOS_DC,
  1010. DSP_SPOS_DC,DSP_SPOS_DC,
  1011. DSP_SPOS_DC,DSP_SPOS_DC,
  1012. DSP_SPOS_DCDC,
  1013. DSP_SPOS_UU,1,
  1014. DSP_SPOS_DCDC,
  1015. DSP_SPOS_DCDC,
  1016. DSP_SPOS_DCDC,
  1017. DSP_SPOS_DCDC,
  1018. DSP_SPOS_DCDC,
  1019. DSP_SPOS_DCDC,
  1020. DSP_SPOS_DCDC,
  1021. DSP_SPOS_DCDC,
  1022. DSP_SPOS_DCDC,
  1023. DSP_SPOS_DCDC,
  1024. DSP_SPOS_DCDC,
  1025. DSP_SPOS_DCDC,
  1026. DSP_SPOS_DCDC,
  1027. DSP_SPOS_DCDC,
  1028. DSP_SPOS_DCDC,
  1029. DSP_SPOS_DCDC,
  1030. DSP_SPOS_DCDC,
  1031. DSP_SPOS_DCDC,
  1032. DSP_SPOS_DCDC,
  1033. DSP_SPOS_DCDC,
  1034. DSP_SPOS_DCDC,
  1035. DSP_SPOS_DCDC,
  1036. DSP_SPOS_DCDC,
  1037. DSP_SPOS_DCDC,
  1038. DSP_SPOS_DCDC,
  1039. DSP_SPOS_DCDC,
  1040. DSP_SPOS_DCDC,
  1041. DSP_SPOS_DCDC
  1042. },
  1043. {
  1044. BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
  1045. 0,0
  1046. }
  1047. };
  1048. bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
  1049. bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
  1050. cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
  1051. }
  1052. /* create timing master SCB */
  1053. timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
  1054. /* create the CODEC output task */
  1055. codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
  1056. MASTERMIX_SCB_ADDR,
  1057. CODECOUT_SCB_ADDR,timing_master_scb,
  1058. SCB_ON_PARENT_SUBLIST_SCB);
  1059. if (!codec_out_scb) goto _fail_end;
  1060. /* create the master mix SCB */
  1061. master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
  1062. MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
  1063. codec_out_scb,
  1064. SCB_ON_PARENT_SUBLIST_SCB);
  1065. ins->master_mix_scb = master_mix_scb;
  1066. if (!master_mix_scb) goto _fail_end;
  1067. /* create codec in */
  1068. codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
  1069. CODEC_INPUT_BUF1,
  1070. CODECIN_SCB_ADDR,codec_out_scb,
  1071. SCB_ON_PARENT_NEXT_SCB);
  1072. if (!codec_in_scb) goto _fail_end;
  1073. ins->codec_in_scb = codec_in_scb;
  1074. /* create write back scb */
  1075. write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
  1076. WRITE_BACK_BUF1,WRITE_BACK_SPB,
  1077. WRITEBACK_SCB_ADDR,
  1078. timing_master_scb,
  1079. SCB_ON_PARENT_NEXT_SCB);
  1080. if (!write_back_scb) goto _fail_end;
  1081. {
  1082. static mix2_ostream_spb_t mix2_ostream_spb = {
  1083. 0x00020000,
  1084. 0x0000ffff
  1085. };
  1086. /* dirty hack ... */
  1087. _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2);
  1088. }
  1089. /* input sample converter */
  1090. vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
  1091. VARI_DECIMATE_BUF0,
  1092. VARI_DECIMATE_BUF1,
  1093. VARIDECIMATE_SCB_ADDR,
  1094. write_back_scb,
  1095. SCB_ON_PARENT_SUBLIST_SCB);
  1096. if (!vari_decimate_scb) goto _fail_end;
  1097. /* create the record mixer SCB */
  1098. record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
  1099. MIX_SAMPLE_BUF2,
  1100. RECORD_MIXER_SCB_ADDR,
  1101. vari_decimate_scb,
  1102. SCB_ON_PARENT_SUBLIST_SCB);
  1103. ins->record_mixer_scb = record_mix_scb;
  1104. if (!record_mix_scb) goto _fail_end;
  1105. valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
  1106. snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
  1107. if (chip->nr_ac97_codecs == 1) {
  1108. /* output on slot 5 and 11
  1109. on primary CODEC */
  1110. fifo_addr = 0x20;
  1111. fifo_span = 0x60;
  1112. /* enable slot 5 and 11 */
  1113. valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
  1114. } else {
  1115. /* output on slot 7 and 8
  1116. on secondary CODEC */
  1117. fifo_addr = 0x40;
  1118. fifo_span = 0x10;
  1119. /* enable slot 7 and 8 */
  1120. valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
  1121. }
  1122. /* create CODEC tasklet for rear speakers output*/
  1123. rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
  1124. REAR_MIXER_SCB_ADDR,
  1125. REAR_CODECOUT_SCB_ADDR,codec_in_scb,
  1126. SCB_ON_PARENT_NEXT_SCB);
  1127. if (!rear_codec_out_scb) goto _fail_end;
  1128. /* create the rear PCM channel mixer SCB */
  1129. rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
  1130. MIX_SAMPLE_BUF3,
  1131. REAR_MIXER_SCB_ADDR,
  1132. rear_codec_out_scb,
  1133. SCB_ON_PARENT_SUBLIST_SCB);
  1134. ins->rear_mix_scb = rear_mix_scb;
  1135. if (!rear_mix_scb) goto _fail_end;
  1136. if (chip->nr_ac97_codecs == 2) {
  1137. /* create CODEC tasklet for rear Center/LFE output
  1138. slot 6 and 9 on seconadry CODEC */
  1139. clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
  1140. CLFE_MIXER_SCB_ADDR,
  1141. CLFE_CODEC_SCB_ADDR,
  1142. rear_codec_out_scb,
  1143. SCB_ON_PARENT_NEXT_SCB);
  1144. if (!clfe_codec_out_scb) goto _fail_end;
  1145. /* create the rear PCM channel mixer SCB */
  1146. ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
  1147. MIX_SAMPLE_BUF4,
  1148. CLFE_MIXER_SCB_ADDR,
  1149. clfe_codec_out_scb,
  1150. SCB_ON_PARENT_SUBLIST_SCB);
  1151. if (!ins->center_lfe_mix_scb) goto _fail_end;
  1152. /* enable slot 6 and 9 */
  1153. valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
  1154. } else {
  1155. clfe_codec_out_scb = rear_codec_out_scb;
  1156. ins->center_lfe_mix_scb = rear_mix_scb;
  1157. }
  1158. /* enable slots depending on CODEC configuration */
  1159. snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
  1160. /* the magic snooper */
  1161. magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
  1162. OUTPUT_SNOOP_BUFFER,
  1163. codec_out_scb,
  1164. clfe_codec_out_scb,
  1165. SCB_ON_PARENT_NEXT_SCB);
  1166. if (!magic_snoop_scb) goto _fail_end;
  1167. ins->ref_snoop_scb = magic_snoop_scb;
  1168. /* SP IO access */
  1169. if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
  1170. magic_snoop_scb,
  1171. SCB_ON_PARENT_NEXT_SCB))
  1172. goto _fail_end;
  1173. /* SPDIF input sampel rate converter */
  1174. src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
  1175. ins->spdif_in_sample_rate,
  1176. SRC_OUTPUT_BUF1,
  1177. SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
  1178. master_mix_scb,
  1179. SCB_ON_PARENT_SUBLIST_SCB,1);
  1180. if (!src_task_scb) goto _fail_end;
  1181. cs46xx_src_unlink(chip,src_task_scb);
  1182. /* NOTE: when we now how to detect the SPDIF input
  1183. sample rate we will use this SRC to adjust it */
  1184. ins->spdif_in_src = src_task_scb;
  1185. cs46xx_dsp_async_init(chip,timing_master_scb);
  1186. return 0;
  1187. _fail_end:
  1188. snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
  1189. return -EINVAL;
  1190. }
  1191. static int cs46xx_dsp_async_init (cs46xx_t *chip, dsp_scb_descriptor_t * fg_entry)
  1192. {
  1193. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1194. symbol_entry_t * s16_async_codec_input_task;
  1195. symbol_entry_t * spdifo_task;
  1196. symbol_entry_t * spdifi_task;
  1197. dsp_scb_descriptor_t * spdifi_scb_desc,* spdifo_scb_desc,* async_codec_scb_desc;
  1198. s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
  1199. if (s16_async_codec_input_task == NULL) {
  1200. snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
  1201. return -EIO;
  1202. }
  1203. spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
  1204. if (spdifo_task == NULL) {
  1205. snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
  1206. return -EIO;
  1207. }
  1208. spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
  1209. if (spdifi_task == NULL) {
  1210. snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
  1211. return -EIO;
  1212. }
  1213. {
  1214. /* 0xBC0 */
  1215. spdifoscb_t spdifo_scb = {
  1216. /* 0 */ DSP_SPOS_UUUU,
  1217. {
  1218. /* 1 */ 0xb0,
  1219. /* 2 */ 0,
  1220. /* 3 */ 0,
  1221. /* 4 */ 0,
  1222. },
  1223. /* NOTE: the SPDIF output task read samples in mono
  1224. format, the AsynchFGTxSCB task writes to buffer
  1225. in stereo format
  1226. */
  1227. /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
  1228. /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC,
  1229. /* 7 */ 0,0,
  1230. /* 8 */ 0,
  1231. /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
  1232. /* A */ spdifo_task->address,
  1233. SPDIFO_SCB_INST + SPDIFOFIFOPointer,
  1234. {
  1235. /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
  1236. /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
  1237. },
  1238. /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
  1239. /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
  1240. /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */
  1241. };
  1242. /* 0xBB0 */
  1243. spdifiscb_t spdifi_scb = {
  1244. /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
  1245. /* 1 */ 0,
  1246. /* 2 */ 0,
  1247. /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */
  1248. /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
  1249. /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
  1250. /* 6 */ DSP_SPOS_UUUU, /* Free3 */
  1251. /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/
  1252. /* 8 */ DSP_SPOS_UUUU, /* TempStatus */
  1253. /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
  1254. /* A */ spdifi_task->address,
  1255. SPDIFI_SCB_INST + SPDIFIFIFOPointer,
  1256. /* NOTE: The SPDIF input task write the sample in mono
  1257. format from the HW FIFO, the AsynchFGRxSCB task reads
  1258. them in stereo
  1259. */
  1260. /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
  1261. /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
  1262. /* D */ 0x8048,0,
  1263. /* E */ 0x01f0,0x0001,
  1264. /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
  1265. };
  1266. /* 0xBA0 */
  1267. async_codec_input_scb_t async_codec_input_scb = {
  1268. /* 0 */ DSP_SPOS_UUUU,
  1269. /* 1 */ 0,
  1270. /* 2 */ 0,
  1271. /* 3 */ 1,4000,
  1272. /* 4 */ 0x0118,0x0001,
  1273. /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
  1274. /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
  1275. /* 7 */ DSP_SPOS_UU,0x3,
  1276. /* 8 */ DSP_SPOS_UUUU,
  1277. /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
  1278. /* A */ s16_async_codec_input_task->address,
  1279. HFG_TREE_SCB + AsyncCIOFIFOPointer,
  1280. /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
  1281. /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
  1282. #ifdef UseASER1Input
  1283. /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
  1284. Init. 0000:8042: for ASER1
  1285. 0000:8044: for ASER2 */
  1286. /* D */ 0x8042,0,
  1287. /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
  1288. Init 1 stero:8050 ASER1
  1289. Init 0 mono:8070 ASER2
  1290. Init 1 Stereo : 0100 ASER1 (Set by script) */
  1291. /* E */ 0x0100,0x0001,
  1292. #endif
  1293. #ifdef UseASER2Input
  1294. /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
  1295. Init. 0000:8042: for ASER1
  1296. 0000:8044: for ASER2 */
  1297. /* D */ 0x8044,0,
  1298. /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
  1299. Init 1 stero:8050 ASER1
  1300. Init 0 mono:8070 ASER2
  1301. Init 1 Stereo : 0100 ASER1 (Set by script) */
  1302. /* E */ 0x0110,0x0001,
  1303. #endif
  1304. /* short AsyncCIOutputBufModulo:AsyncCIFree;
  1305. AsyncCIOutputBufModulo: The modulo size for
  1306. the output buffer of this task */
  1307. /* F */ 0, /* DSP_SPOS_UUUU */
  1308. };
  1309. spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
  1310. snd_assert(spdifo_scb_desc, return -EIO);
  1311. spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
  1312. snd_assert(spdifi_scb_desc, return -EIO);
  1313. async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
  1314. snd_assert(async_codec_scb_desc, return -EIO);
  1315. async_codec_scb_desc->parent_scb_ptr = NULL;
  1316. async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
  1317. async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
  1318. async_codec_scb_desc->task_entry = s16_async_codec_input_task;
  1319. spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
  1320. spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
  1321. spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
  1322. spdifi_scb_desc->task_entry = spdifi_task;
  1323. spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
  1324. spdifo_scb_desc->next_scb_ptr = fg_entry;
  1325. spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
  1326. spdifo_scb_desc->task_entry = spdifo_task;
  1327. /* this one is faked, as the parnet of SPDIFO task
  1328. is the FG task tree */
  1329. fg_entry->parent_scb_ptr = spdifo_scb_desc;
  1330. /* for proc fs */
  1331. cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
  1332. cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
  1333. cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
  1334. /* Async MASTER ENABLE, affects both SPDIF input and output */
  1335. snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
  1336. }
  1337. return 0;
  1338. }
  1339. static void cs46xx_dsp_disable_spdif_hw (cs46xx_t *chip)
  1340. {
  1341. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1342. /* set SPDIF output FIFO slot */
  1343. snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
  1344. /* SPDIF output MASTER ENABLE */
  1345. cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
  1346. /* right and left validate bit */
  1347. /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
  1348. cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
  1349. /* clear fifo pointer */
  1350. cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
  1351. /* monitor state */
  1352. ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
  1353. }
  1354. int cs46xx_dsp_enable_spdif_hw (cs46xx_t *chip)
  1355. {
  1356. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1357. /* if hw-ctrl already enabled, turn off to reset logic ... */
  1358. cs46xx_dsp_disable_spdif_hw (chip);
  1359. udelay(50);
  1360. /* set SPDIF output FIFO slot */
  1361. snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
  1362. /* SPDIF output MASTER ENABLE */
  1363. cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
  1364. /* right and left validate bit */
  1365. cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
  1366. /* monitor state */
  1367. ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
  1368. return 0;
  1369. }
  1370. int cs46xx_dsp_enable_spdif_in (cs46xx_t *chip)
  1371. {
  1372. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1373. /* turn on amplifier */
  1374. chip->active_ctrl(chip, 1);
  1375. chip->amplifier_ctrl(chip, 1);
  1376. snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
  1377. snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
  1378. down(&chip->spos_mutex);
  1379. if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
  1380. /* time countdown enable */
  1381. cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
  1382. /* NOTE: 80000005 value is just magic. With all values
  1383. that I've tested this one seem to give the best result.
  1384. Got no explication why. (Benny) */
  1385. /* SPDIF input MASTER ENABLE */
  1386. cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
  1387. ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
  1388. }
  1389. /* create and start the asynchronous receiver SCB */
  1390. ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
  1391. ASYNCRX_SCB_ADDR,
  1392. SPDIFI_SCB_INST,
  1393. SPDIFI_IP_OUTPUT_BUFFER1,
  1394. ins->spdif_in_src,
  1395. SCB_ON_PARENT_SUBLIST_SCB);
  1396. spin_lock_irq(&chip->reg_lock);
  1397. /* reset SPDIF input sample buffer pointer */
  1398. /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
  1399. (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
  1400. /* reset FIFO ptr */
  1401. /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
  1402. cs46xx_src_link(chip,ins->spdif_in_src);
  1403. /* unmute SRC volume */
  1404. cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
  1405. spin_unlock_irq(&chip->reg_lock);
  1406. /* set SPDIF input sample rate and unmute
  1407. NOTE: only 48khz support for SPDIF input this time */
  1408. /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
  1409. /* monitor state */
  1410. ins->spdif_status_in = 1;
  1411. up(&chip->spos_mutex);
  1412. return 0;
  1413. }
  1414. int cs46xx_dsp_disable_spdif_in (cs46xx_t *chip)
  1415. {
  1416. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1417. snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
  1418. snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
  1419. down(&chip->spos_mutex);
  1420. /* Remove the asynchronous receiver SCB */
  1421. cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
  1422. ins->asynch_rx_scb = NULL;
  1423. cs46xx_src_unlink(chip,ins->spdif_in_src);
  1424. /* monitor state */
  1425. ins->spdif_status_in = 0;
  1426. up(&chip->spos_mutex);
  1427. /* restore amplifier */
  1428. chip->active_ctrl(chip, -1);
  1429. chip->amplifier_ctrl(chip, -1);
  1430. return 0;
  1431. }
  1432. int cs46xx_dsp_enable_pcm_capture (cs46xx_t *chip)
  1433. {
  1434. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1435. snd_assert (ins->pcm_input == NULL,return -EINVAL);
  1436. snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
  1437. down(&chip->spos_mutex);
  1438. ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
  1439. "PCMSerialInput_Wave");
  1440. up(&chip->spos_mutex);
  1441. return 0;
  1442. }
  1443. int cs46xx_dsp_disable_pcm_capture (cs46xx_t *chip)
  1444. {
  1445. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1446. snd_assert (ins->pcm_input != NULL,return -EINVAL);
  1447. down(&chip->spos_mutex);
  1448. cs46xx_dsp_remove_scb (chip,ins->pcm_input);
  1449. ins->pcm_input = NULL;
  1450. up(&chip->spos_mutex);
  1451. return 0;
  1452. }
  1453. int cs46xx_dsp_enable_adc_capture (cs46xx_t *chip)
  1454. {
  1455. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1456. snd_assert (ins->adc_input == NULL,return -EINVAL);
  1457. snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
  1458. down(&chip->spos_mutex);
  1459. ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
  1460. "PCMSerialInput_ADC");
  1461. up(&chip->spos_mutex);
  1462. return 0;
  1463. }
  1464. int cs46xx_dsp_disable_adc_capture (cs46xx_t *chip)
  1465. {
  1466. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1467. snd_assert (ins->adc_input != NULL,return -EINVAL);
  1468. down(&chip->spos_mutex);
  1469. cs46xx_dsp_remove_scb (chip,ins->adc_input);
  1470. ins->adc_input = NULL;
  1471. up(&chip->spos_mutex);
  1472. return 0;
  1473. }
  1474. int cs46xx_poke_via_dsp (cs46xx_t *chip,u32 address,u32 data)
  1475. {
  1476. u32 temp;
  1477. int i;
  1478. /* santiy check the parameters. (These numbers are not 100% correct. They are
  1479. a rough guess from looking at the controller spec.) */
  1480. if (address < 0x8000 || address >= 0x9000)
  1481. return -EINVAL;
  1482. /* initialize the SP_IO_WRITE SCB with the data. */
  1483. temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */
  1484. snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp);
  1485. snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
  1486. snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
  1487. /* Poke this location to tell the task to start */
  1488. snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
  1489. /* Verify that the task ran */
  1490. for (i=0; i<25; i++) {
  1491. udelay(125);
  1492. temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
  1493. if (temp == 0x00000000)
  1494. break;
  1495. }
  1496. if (i == 25) {
  1497. snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
  1498. return -EBUSY;
  1499. }
  1500. return 0;
  1501. }
  1502. int cs46xx_dsp_set_dac_volume (cs46xx_t * chip,u16 left,u16 right)
  1503. {
  1504. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1505. dsp_scb_descriptor_t * scb;
  1506. down(&chip->spos_mutex);
  1507. /* main output */
  1508. scb = ins->master_mix_scb->sub_list_ptr;
  1509. while (scb != ins->the_null_scb) {
  1510. cs46xx_dsp_scb_set_volume (chip,scb,left,right);
  1511. scb = scb->next_scb_ptr;
  1512. }
  1513. /* rear output */
  1514. scb = ins->rear_mix_scb->sub_list_ptr;
  1515. while (scb != ins->the_null_scb) {
  1516. cs46xx_dsp_scb_set_volume (chip,scb,left,right);
  1517. scb = scb->next_scb_ptr;
  1518. }
  1519. ins->dac_volume_left = left;
  1520. ins->dac_volume_right = right;
  1521. up(&chip->spos_mutex);
  1522. return 0;
  1523. }
  1524. int cs46xx_dsp_set_iec958_volume (cs46xx_t * chip,u16 left,u16 right) {
  1525. dsp_spos_instance_t * ins = chip->dsp_spos_instance;
  1526. down(&chip->spos_mutex);
  1527. if (ins->asynch_rx_scb != NULL)
  1528. cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
  1529. left,right);
  1530. ins->spdif_input_volume_left = left;
  1531. ins->spdif_input_volume_right = right;
  1532. up(&chip->spos_mutex);
  1533. return 0;
  1534. }