azt3328.c 50 KB

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  1. /*
  2. * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168).
  3. * Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
  4. *
  5. * Framework borrowed from Bart Hartgers's als4000.c.
  6. * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801),
  7. * found in a Fujitsu-Siemens PC ("Cordant", aluminum case).
  8. * Other versions are:
  9. * PCI168 A(W), sub ID 1800
  10. * PCI168 A/AP, sub ID 8000
  11. * Please give me feedback in case you try my driver with one of these!!
  12. *
  13. * GPL LICENSE
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  26. *
  27. * NOTES
  28. * Since Aztech does not provide any chipset documentation,
  29. * even on repeated request to various addresses,
  30. * and the answer that was finally given was negative
  31. * (and I was stupid enough to manage to get hold of a PCI168 soundcard
  32. * in the first place >:-P}),
  33. * I was forced to base this driver on reverse engineering
  34. * (3 weeks' worth of evenings filled with driver work).
  35. * (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros)
  36. *
  37. * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name
  38. * for compatibility reasons) has the following features:
  39. *
  40. * - builtin AC97 conformant codec (SNR over 80dB)
  41. * (really AC97 compliant?? I really doubt it when looking
  42. * at the mixer register layout)
  43. * - builtin genuine OPL3
  44. * - full duplex 16bit playback/record at independent sampling rate
  45. * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr??
  46. * - game port (legacy address support)
  47. * - built-in General DirectX timer having a 20 bits counter
  48. * with 1us resolution (FIXME: where is it?)
  49. * - I2S serial port for external DAC
  50. * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI
  51. * - supports hardware volume control
  52. * - single chip low cost solution (128 pin QFP)
  53. * - supports programmable Sub-vendor and Sub-system ID
  54. * required for Microsoft's logo compliance (FIXME: where?)
  55. * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms
  56. *
  57. * Certain PCI versions of this card are susceptible to DMA traffic underruns
  58. * in some systems (resulting in sound crackling/clicking/popping),
  59. * probably because they don't have a DMA FIFO buffer or so.
  60. * Overview (PCI ID/PCI subID/PCI rev.):
  61. * - no DMA crackling on SiS735: 0x50DC/0x1801/16
  62. * - unknown performance: 0x50DC/0x1801/10
  63. *
  64. * Crackling happens with VIA chipsets or, in my case, an SiS735, which is
  65. * supposed to be very fast and supposed to get rid of crackling much
  66. * better than a VIA, yet ironically I still get crackling, like many other
  67. * people with the same chipset.
  68. * Possible remedies:
  69. * - plug card into a different PCI slot, preferrably one that isn't shared
  70. * too much (this helps a lot, but not completely!)
  71. * - get rid of PCI VGA card, use AGP instead
  72. * - upgrade or downgrade BIOS
  73. * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX)
  74. * Not too helpful.
  75. * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS
  76. *
  77. * BUGS
  78. * - when Ctrl-C'ing mpg321, the playback loops a bit
  79. * (premature DMA playback reset?)
  80. * - full-duplex sometimes breaks (IRQ management issues?).
  81. * Once even a spontaneous REBOOT happened!!!
  82. *
  83. * TODO
  84. * - test MPU401 MIDI playback etc.
  85. * - power management (CONFIG_PM). See e.g. intel8x0 or cs4281.
  86. * This would be nice since the chip runs a bit hot, and it's *required*
  87. * anyway for proper ACPI power management. In other words: rest
  88. * assured that I *will* implement this very soon; as soon as Linux 2.5.x
  89. * has power management that's bugfree enough to work properly on my desktop.
  90. * - figure out what all unknown port bits are responsible for
  91. */
  92. #include <sound/driver.h>
  93. #include <asm/io.h>
  94. #include <linux/init.h>
  95. #include <linux/pci.h>
  96. #include <linux/delay.h>
  97. #include <linux/slab.h>
  98. #include <linux/gameport.h>
  99. #include <linux/moduleparam.h>
  100. #include <sound/core.h>
  101. #include <sound/control.h>
  102. #include <sound/pcm.h>
  103. #include <sound/rawmidi.h>
  104. #include <sound/mpu401.h>
  105. #include <sound/opl3.h>
  106. #include <sound/initval.h>
  107. #include "azt3328.h"
  108. MODULE_AUTHOR("Andreas Mohr <hw7oshyuv3001@sneakemail.com>");
  109. MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)");
  110. MODULE_LICENSE("GPL");
  111. MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}");
  112. #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
  113. #define SUPPORT_JOYSTICK 1
  114. #endif
  115. #define DEBUG_MISC 0
  116. #define DEBUG_CALLS 0
  117. #define DEBUG_MIXER 0
  118. #define DEBUG_PLAY_REC 0
  119. #define DEBUG_IO 0
  120. #define MIXER_TESTING 0
  121. #if DEBUG_MISC
  122. #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args)
  123. #else
  124. #define snd_azf3328_dbgmisc(format, args...)
  125. #endif
  126. #if DEBUG_CALLS
  127. #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args)
  128. #define snd_azf3328_dbgcallenter() printk(KERN_ERR "entering %s\n", __FUNCTION__)
  129. #define snd_azf3328_dbgcallleave() printk(KERN_ERR "leaving %s\n", __FUNCTION__)
  130. #else
  131. #define snd_azf3328_dbgcalls(format, args...)
  132. #define snd_azf3328_dbgcallenter()
  133. #define snd_azf3328_dbgcallleave()
  134. #endif
  135. #if DEBUG_MIXER
  136. #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args)
  137. #else
  138. #define snd_azf3328_dbgmixer(format, args...)
  139. #endif
  140. #if DEBUG_PLAY_REC
  141. #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args)
  142. #else
  143. #define snd_azf3328_dbgplay(format, args...)
  144. #endif
  145. #if DEBUG_IO
  146. #define snd_azf3328_dbgio(chip, where) \
  147. printk(KERN_ERR "%s: IDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", where, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS))
  148. #else
  149. #define snd_azf3328_dbgio(chip, where)
  150. #endif
  151. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  152. module_param_array(index, int, NULL, 0444);
  153. MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard.");
  154. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  155. module_param_array(id, charp, NULL, 0444);
  156. MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard.");
  157. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  158. module_param_array(enable, bool, NULL, 0444);
  159. MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard.");
  160. #ifdef SUPPORT_JOYSTICK
  161. static int joystick[SNDRV_CARDS];
  162. module_param_array(joystick, bool, NULL, 0444);
  163. MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard.");
  164. #endif
  165. typedef struct _snd_azf3328 azf3328_t;
  166. struct _snd_azf3328 {
  167. int irq;
  168. unsigned long codec_port;
  169. unsigned long io2_port;
  170. unsigned long mpu_port;
  171. unsigned long synth_port;
  172. unsigned long mixer_port;
  173. #ifdef SUPPORT_JOYSTICK
  174. struct gameport *gameport;
  175. #endif
  176. struct pci_dev *pci;
  177. snd_card_t *card;
  178. snd_pcm_t *pcm;
  179. snd_rawmidi_t *rmidi;
  180. snd_pcm_substream_t *playback_substream;
  181. snd_pcm_substream_t *capture_substream;
  182. unsigned int is_playing;
  183. unsigned int is_recording;
  184. spinlock_t reg_lock;
  185. };
  186. static struct pci_device_id snd_azf3328_ids[] = {
  187. { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */
  188. { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */
  189. { 0, }
  190. };
  191. MODULE_DEVICE_TABLE(pci, snd_azf3328_ids);
  192. static inline void snd_azf3328_io2_write(azf3328_t *chip, int reg, unsigned char value)
  193. {
  194. outb(value, chip->io2_port + reg);
  195. }
  196. static inline unsigned char snd_azf3328_io2_read(azf3328_t *chip, int reg)
  197. {
  198. return inb(chip->io2_port + reg);
  199. }
  200. static void snd_azf3328_mixer_write(azf3328_t *chip, int reg, unsigned long value, int type)
  201. {
  202. switch(type) {
  203. case WORD_VALUE:
  204. outw(value, chip->mixer_port + reg);
  205. break;
  206. case DWORD_VALUE:
  207. outl(value, chip->mixer_port + reg);
  208. break;
  209. case BYTE_VALUE:
  210. outb(value, chip->mixer_port + reg);
  211. break;
  212. }
  213. }
  214. static void snd_azf3328_mixer_set_mute(azf3328_t *chip, int reg, int do_mute)
  215. {
  216. unsigned char oldval;
  217. /* the mute bit is on the *second* (i.e. right) register of a
  218. * left/right channel setting */
  219. oldval = inb(chip->mixer_port + reg + 1);
  220. if (do_mute)
  221. oldval |= 0x80;
  222. else
  223. oldval &= ~0x80;
  224. outb(oldval, chip->mixer_port + reg + 1);
  225. }
  226. static void snd_azf3328_mixer_write_volume_gradually(azf3328_t *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay)
  227. {
  228. unsigned char curr_vol_left = 0, curr_vol_right = 0;
  229. int left_done = 0, right_done = 0;
  230. snd_azf3328_dbgcallenter();
  231. if (chan_sel & SET_CHAN_LEFT)
  232. curr_vol_left = inb(chip->mixer_port + reg + 1);
  233. else
  234. left_done = 1;
  235. if (chan_sel & SET_CHAN_RIGHT)
  236. curr_vol_right = inb(chip->mixer_port + reg + 0);
  237. else
  238. right_done = 1;
  239. /* take care of muting flag (0x80) contained in left channel */
  240. if (curr_vol_left & 0x80)
  241. dst_vol_left |= 0x80;
  242. else
  243. dst_vol_left &= ~0x80;
  244. do
  245. {
  246. if (!left_done)
  247. {
  248. if (curr_vol_left > dst_vol_left)
  249. curr_vol_left--;
  250. else
  251. if (curr_vol_left < dst_vol_left)
  252. curr_vol_left++;
  253. else
  254. left_done = 1;
  255. outb(curr_vol_left, chip->mixer_port + reg + 1);
  256. }
  257. if (!right_done)
  258. {
  259. if (curr_vol_right > dst_vol_right)
  260. curr_vol_right--;
  261. else
  262. if (curr_vol_right < dst_vol_right)
  263. curr_vol_right++;
  264. else
  265. right_done = 1;
  266. /* during volume change, the right channel is crackling
  267. * somewhat more than the left channel, unfortunately.
  268. * This seems to be a hardware issue. */
  269. outb(curr_vol_right, chip->mixer_port + reg + 0);
  270. }
  271. if (delay)
  272. mdelay(delay);
  273. }
  274. while ((!left_done) || (!right_done));
  275. snd_azf3328_dbgcallleave();
  276. }
  277. /*
  278. * general mixer element
  279. */
  280. typedef struct azf3328_mixer_reg {
  281. unsigned int reg;
  282. unsigned int lchan_shift, rchan_shift;
  283. unsigned int mask;
  284. unsigned int invert: 1;
  285. unsigned int stereo: 1;
  286. unsigned int enum_c: 4;
  287. } azf3328_mixer_reg_t;
  288. #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \
  289. ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | (mask << 16) | (invert << 24) | (stereo << 25) | (enum_c << 26))
  290. static void snd_azf3328_mixer_reg_decode(azf3328_mixer_reg_t *r, unsigned long val)
  291. {
  292. r->reg = val & 0xff;
  293. r->lchan_shift = (val >> 8) & 0x0f;
  294. r->rchan_shift = (val >> 12) & 0x0f;
  295. r->mask = (val >> 16) & 0xff;
  296. r->invert = (val >> 24) & 1;
  297. r->stereo = (val >> 25) & 1;
  298. r->enum_c = (val >> 26) & 0x0f;
  299. }
  300. /*
  301. * mixer switches/volumes
  302. */
  303. #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \
  304. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  305. .info = snd_azf3328_info_mixer, \
  306. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  307. .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \
  308. }
  309. #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \
  310. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  311. .info = snd_azf3328_info_mixer, \
  312. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  313. .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \
  314. }
  315. #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \
  316. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  317. .info = snd_azf3328_info_mixer, \
  318. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  319. .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \
  320. }
  321. #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \
  322. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  323. .info = snd_azf3328_info_mixer, \
  324. .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \
  325. .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \
  326. }
  327. #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \
  328. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  329. .info = snd_azf3328_info_mixer_enum, \
  330. .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \
  331. .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \
  332. }
  333. static int snd_azf3328_info_mixer(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  334. {
  335. azf3328_mixer_reg_t reg;
  336. snd_azf3328_dbgcallenter();
  337. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  338. uinfo->type = reg.mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  339. uinfo->count = reg.stereo + 1;
  340. uinfo->value.integer.min = 0;
  341. uinfo->value.integer.max = reg.mask;
  342. snd_azf3328_dbgcallleave();
  343. return 0;
  344. }
  345. static int snd_azf3328_get_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  346. {
  347. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  348. azf3328_mixer_reg_t reg;
  349. unsigned int oreg, val;
  350. snd_azf3328_dbgcallenter();
  351. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  352. oreg = inw(chip->mixer_port + reg.reg);
  353. val = (oreg >> reg.lchan_shift) & reg.mask;
  354. if (reg.invert)
  355. val = reg.mask - val;
  356. ucontrol->value.integer.value[0] = val;
  357. if (reg.stereo) {
  358. val = (oreg >> reg.rchan_shift) & reg.mask;
  359. if (reg.invert)
  360. val = reg.mask - val;
  361. ucontrol->value.integer.value[1] = val;
  362. }
  363. snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx (shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", reg.reg, oreg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo);
  364. snd_azf3328_dbgcallleave();
  365. return 0;
  366. }
  367. static int snd_azf3328_put_mixer(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  368. {
  369. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  370. azf3328_mixer_reg_t reg;
  371. unsigned int oreg, nreg, val;
  372. snd_azf3328_dbgcallenter();
  373. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  374. oreg = inw(chip->mixer_port + reg.reg);
  375. val = ucontrol->value.integer.value[0] & reg.mask;
  376. if (reg.invert)
  377. val = reg.mask - val;
  378. nreg = oreg & ~(reg.mask << reg.lchan_shift);
  379. nreg |= (val << reg.lchan_shift);
  380. if (reg.stereo) {
  381. val = ucontrol->value.integer.value[1] & reg.mask;
  382. if (reg.invert)
  383. val = reg.mask - val;
  384. nreg &= ~(reg.mask << reg.rchan_shift);
  385. nreg |= (val << reg.rchan_shift);
  386. }
  387. if (reg.mask >= 0x07) /* it's a volume control, so better take care */
  388. snd_azf3328_mixer_write_volume_gradually(chip, reg.reg, nreg >> 8, nreg & 0xff, SET_CHAN_LEFT|SET_CHAN_RIGHT, 0); /* just set both channels, doesn't matter */
  389. else
  390. outw(nreg, chip->mixer_port + reg.reg);
  391. snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], oreg, reg.lchan_shift, reg.rchan_shift, nreg, inw(chip->mixer_port + reg.reg));
  392. snd_azf3328_dbgcallleave();
  393. return (nreg != oreg);
  394. }
  395. static int snd_azf3328_info_mixer_enum(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  396. {
  397. azf3328_mixer_reg_t reg;
  398. static char *texts1[2] = { "ModemOut1", "ModemOut2" };
  399. static char *texts2[2] = { "MonoSelectSource1", "MonoSelectSource2" };
  400. static char *texts3[8] = {
  401. "Mic", "CD", "Video", "Aux", "Line",
  402. "Mix", "Mix Mono", "Phone"
  403. };
  404. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  405. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  406. uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1;
  407. uinfo->value.enumerated.items = reg.enum_c;
  408. if (uinfo->value.enumerated.item > reg.enum_c - 1U)
  409. uinfo->value.enumerated.item = reg.enum_c - 1U;
  410. if (reg.reg == IDX_MIXER_ADVCTL2)
  411. {
  412. if (reg.lchan_shift == 8) /* modem out sel */
  413. strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]);
  414. else /* mono sel source */
  415. strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]);
  416. }
  417. else
  418. strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item]
  419. );
  420. return 0;
  421. }
  422. static int snd_azf3328_get_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  423. {
  424. azf3328_mixer_reg_t reg;
  425. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  426. unsigned short val;
  427. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  428. val = inw(chip->mixer_port + reg.reg);
  429. if (reg.reg == IDX_MIXER_REC_SELECT)
  430. {
  431. ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1);
  432. ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1);
  433. }
  434. else
  435. ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1);
  436. snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], reg.lchan_shift, reg.enum_c);
  437. return 0;
  438. }
  439. static int snd_azf3328_put_mixer_enum(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  440. {
  441. azf3328_mixer_reg_t reg;
  442. azf3328_t *chip = snd_kcontrol_chip(kcontrol);
  443. unsigned int oreg, nreg, val;
  444. snd_azf3328_mixer_reg_decode(&reg, kcontrol->private_value);
  445. oreg = inw(chip->mixer_port + reg.reg);
  446. val = oreg;
  447. if (reg.reg == IDX_MIXER_REC_SELECT)
  448. {
  449. if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U ||
  450. ucontrol->value.enumerated.item[1] > reg.enum_c - 1U)
  451. return -EINVAL;
  452. val = (ucontrol->value.enumerated.item[0] << 8) |
  453. (ucontrol->value.enumerated.item[1] << 0);
  454. }
  455. else
  456. {
  457. if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U)
  458. return -EINVAL;
  459. val &= ~((reg.enum_c - 1) << reg.lchan_shift);
  460. val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift);
  461. }
  462. outw(val, chip->mixer_port + reg.reg);
  463. nreg = val;
  464. snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg);
  465. return (nreg != oreg);
  466. }
  467. static snd_kcontrol_new_t snd_azf3328_mixer_controls[] __devinitdata = {
  468. AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1),
  469. AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1),
  470. AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1),
  471. AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1),
  472. AZF3328_MIXER_SWITCH("Wave Playback 3D Bypass", IDX_MIXER_ADVCTL2, 7, 1),
  473. AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1),
  474. AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1),
  475. AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1),
  476. AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1),
  477. AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1),
  478. AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0),
  479. AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0),
  480. AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1),
  481. AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1),
  482. AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0),
  483. AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1),
  484. AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1),
  485. AZF3328_MIXER_SWITCH("PCBeep Playback Switch", IDX_MIXER_PCBEEP, 15, 1),
  486. AZF3328_MIXER_VOL_SPECIAL("PCBeep Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1),
  487. AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1),
  488. AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1),
  489. AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1),
  490. AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1),
  491. AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1),
  492. AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1),
  493. AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1),
  494. AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1),
  495. AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8),
  496. AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9),
  497. AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0),
  498. AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0),
  499. AZF3328_MIXER_SWITCH("3D Control - Toggle", IDX_MIXER_ADVCTL2, 13, 0),
  500. AZF3328_MIXER_VOL_SPECIAL("3D Control - Volume", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */
  501. AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */
  502. #if MIXER_TESTING
  503. AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0),
  504. AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0),
  505. AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0),
  506. AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0),
  507. AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0),
  508. AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0),
  509. AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0),
  510. AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0),
  511. AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0),
  512. AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0),
  513. AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0),
  514. AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0),
  515. AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0),
  516. AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0),
  517. AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0),
  518. AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0),
  519. #endif
  520. };
  521. #define AZF3328_INIT_VALUES (sizeof(snd_azf3328_init_values)/sizeof(unsigned int)/2)
  522. static unsigned int snd_azf3328_init_values[][2] = {
  523. { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f },
  524. { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f },
  525. { IDX_MIXER_BASSTREBLE, 0x0000 },
  526. { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f },
  527. { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f },
  528. { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f },
  529. { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f },
  530. { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f },
  531. { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f },
  532. { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f },
  533. { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f },
  534. { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f },
  535. { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 },
  536. };
  537. static int __devinit snd_azf3328_mixer_new(azf3328_t *chip)
  538. {
  539. snd_card_t *card;
  540. snd_kcontrol_new_t *sw;
  541. unsigned int idx;
  542. int err;
  543. snd_azf3328_dbgcallenter();
  544. snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
  545. card = chip->card;
  546. /* mixer reset */
  547. snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
  548. /* mute and zero volume channels */
  549. for (idx = 0; idx < AZF3328_INIT_VALUES; idx++) {
  550. snd_azf3328_mixer_write(chip, snd_azf3328_init_values[idx][0], snd_azf3328_init_values[idx][1], WORD_VALUE);
  551. }
  552. /* add mixer controls */
  553. sw = snd_azf3328_mixer_controls;
  554. for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) {
  555. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0)
  556. return err;
  557. }
  558. snd_component_add(card, "AZF3328 mixer");
  559. strcpy(card->mixername, "AZF3328 mixer");
  560. snd_azf3328_dbgcallleave();
  561. return 0;
  562. }
  563. static int snd_azf3328_hw_params(snd_pcm_substream_t * substream,
  564. snd_pcm_hw_params_t * hw_params)
  565. {
  566. int res;
  567. snd_azf3328_dbgcallenter();
  568. res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  569. snd_azf3328_dbgcallleave();
  570. return res;
  571. }
  572. static int snd_azf3328_hw_free(snd_pcm_substream_t * substream)
  573. {
  574. snd_azf3328_dbgcallenter();
  575. snd_pcm_lib_free_pages(substream);
  576. snd_azf3328_dbgcallleave();
  577. return 0;
  578. }
  579. static void snd_azf3328_setfmt(azf3328_t *chip,
  580. unsigned int reg,
  581. unsigned int bitrate,
  582. unsigned int format_width,
  583. unsigned int channels
  584. )
  585. {
  586. unsigned int val = 0xff00;
  587. unsigned long flags;
  588. snd_azf3328_dbgcallenter();
  589. switch (bitrate) {
  590. case 5512: val |= 0x0d; break; /* the AZF3328 names it "5510" for some strange reason */
  591. case 6620: val |= 0x0b; break;
  592. case 8000: val |= 0x00; break;
  593. case 9600: val |= 0x08; break;
  594. case 11025: val |= 0x01; break;
  595. case 16000: val |= 0x02; break;
  596. case 22050: val |= 0x03; break;
  597. case 32000: val |= 0x04; break;
  598. case 44100: val |= 0x05; break;
  599. case 48000: val |= 0x06; break;
  600. case 64000: val |= 0x07; break;
  601. default:
  602. snd_printk("unknown bitrate %d, assuming 44.1kHz!\n", bitrate);
  603. val |= 0x05; /* 44100 */
  604. break;
  605. }
  606. /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) */
  607. /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) */
  608. /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) */
  609. /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) */
  610. /* val = 0xff05; 5m11.556s (... -> 44100Hz) */
  611. /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */
  612. /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */
  613. /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */
  614. /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */
  615. if (channels == 2)
  616. val |= SOUNDFORMAT_FLAG_2CHANNELS;
  617. if (format_width == 16)
  618. val |= SOUNDFORMAT_FLAG_16BIT;
  619. spin_lock_irqsave(&chip->reg_lock, flags);
  620. /* set bitrate/format */
  621. outw(val, chip->codec_port+reg);
  622. /* changing the bitrate/format settings switches off the
  623. * audio output with an annoying click in case of 8/16bit format change
  624. * (maybe shutting down DAC/ADC?), thus immediately
  625. * do some tweaking to reenable it and get rid of the clicking
  626. * (FIXME: yes, it works, but what exactly am I doing here?? :)
  627. * FIXME: does this have some side effects for full-duplex
  628. * or other dramatic side effects? */
  629. if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */
  630. outw(inw(chip->codec_port + IDX_IO_PLAY_FLAGS)|DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
  631. spin_unlock_irqrestore(&chip->reg_lock, flags);
  632. snd_azf3328_dbgcallleave();
  633. }
  634. static void snd_azf3328_setdmaa(azf3328_t *chip,
  635. long unsigned int addr,
  636. unsigned int count,
  637. unsigned int size,
  638. int do_recording)
  639. {
  640. long unsigned int addr1;
  641. long unsigned int addr2;
  642. unsigned int count1;
  643. unsigned int count2;
  644. unsigned long flags;
  645. int reg_offs = do_recording ? 0x20 : 0x00;
  646. snd_azf3328_dbgcallenter();
  647. /* AZF3328 uses a two buffer pointer DMA playback approach */
  648. if (!chip->is_playing)
  649. {
  650. addr1 = addr;
  651. addr2 = addr+(size/2);
  652. count1 = (size/2)-1;
  653. count2 = (size/2)-1;
  654. #if DEBUG_PLAY_REC
  655. snd_azf3328_dbgplay("setting dma: buf1 %08lx[%d], buf2 %08lx[%d]\n", addr1, count1, addr2, count2);
  656. #endif
  657. spin_lock_irqsave(&chip->reg_lock, flags);
  658. outl(addr1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_1);
  659. outl(addr2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_START_2);
  660. outw(count1, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_1);
  661. outw(count2, chip->codec_port+reg_offs+IDX_IO_PLAY_DMA_LEN_2);
  662. spin_unlock_irqrestore(&chip->reg_lock, flags);
  663. }
  664. snd_azf3328_dbgcallleave();
  665. }
  666. static int snd_azf3328_playback_prepare(snd_pcm_substream_t *substream)
  667. {
  668. #if 0
  669. azf3328_t *chip = snd_pcm_substream_chip(substream);
  670. snd_pcm_runtime_t *runtime = substream->runtime;
  671. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  672. unsigned int count = snd_pcm_lib_period_bytes(substream);
  673. #endif
  674. snd_azf3328_dbgcallenter();
  675. #if 0
  676. snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
  677. snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0);
  678. #endif
  679. snd_azf3328_dbgcallleave();
  680. return 0;
  681. }
  682. static int snd_azf3328_capture_prepare(snd_pcm_substream_t * substream)
  683. {
  684. #if 0
  685. azf3328_t *chip = snd_pcm_substream_chip(substream);
  686. snd_pcm_runtime_t *runtime = substream->runtime;
  687. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  688. unsigned int count = snd_pcm_lib_period_bytes(substream);
  689. #endif
  690. snd_azf3328_dbgcallenter();
  691. #if 0
  692. snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
  693. snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1);
  694. #endif
  695. snd_azf3328_dbgcallleave();
  696. return 0;
  697. }
  698. static int snd_azf3328_playback_trigger(snd_pcm_substream_t * substream, int cmd)
  699. {
  700. azf3328_t *chip = snd_pcm_substream_chip(substream);
  701. snd_pcm_runtime_t *runtime = substream->runtime;
  702. int result = 0;
  703. unsigned int status1;
  704. snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd);
  705. switch (cmd) {
  706. case SNDRV_PCM_TRIGGER_START:
  707. snd_azf3328_dbgio(chip, "trigger1");
  708. /* mute WaveOut */
  709. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
  710. snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
  711. spin_lock(&chip->reg_lock);
  712. /* stop playback */
  713. status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
  714. status1 &= ~DMA_RESUME;
  715. outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
  716. /* FIXME: clear interrupts or what??? */
  717. outw(0xffff, chip->codec_port+IDX_IO_PLAY_IRQMASK);
  718. spin_unlock(&chip->reg_lock);
  719. snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 0);
  720. spin_lock(&chip->reg_lock);
  721. #ifdef WIN9X
  722. /* FIXME: enable playback/recording??? */
  723. status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
  724. outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
  725. /* start playback again */
  726. /* FIXME: what is this value (0x0010)??? */
  727. status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
  728. outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
  729. #else /* NT4 */
  730. outw(0x00, chip->codec_port+IDX_IO_PLAY_FLAGS);
  731. outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_PLAY_FLAGS);
  732. outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_PLAY_FLAGS);
  733. outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_PLAY_FLAGS);
  734. #endif
  735. spin_unlock(&chip->reg_lock);
  736. /* now unmute WaveOut */
  737. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
  738. snd_azf3328_dbgio(chip, "trigger2");
  739. chip->is_playing = 1;
  740. break;
  741. case SNDRV_PCM_TRIGGER_STOP:
  742. /* mute WaveOut */
  743. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1);
  744. spin_lock(&chip->reg_lock);
  745. /* stop playback */
  746. status1 = inw(chip->codec_port+IDX_IO_PLAY_FLAGS);
  747. status1 &= ~DMA_RESUME;
  748. outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
  749. status1 |= DMA_PLAY_SOMETHING1;
  750. outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
  751. status1 &= ~DMA_PLAY_SOMETHING1;
  752. outw(status1, chip->codec_port+IDX_IO_PLAY_FLAGS);
  753. spin_unlock(&chip->reg_lock);
  754. /* now unmute WaveOut */
  755. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0);
  756. chip->is_playing = 0;
  757. break;
  758. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  759. snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
  760. break;
  761. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  762. snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
  763. break;
  764. default:
  765. return -EINVAL;
  766. }
  767. snd_azf3328_dbgcallleave();
  768. return result;
  769. }
  770. /* this is just analogous to playback; I'm not quite sure whether recording
  771. * should actually be triggered like that */
  772. static int snd_azf3328_capture_trigger(snd_pcm_substream_t * substream, int cmd)
  773. {
  774. azf3328_t *chip = snd_pcm_substream_chip(substream);
  775. snd_pcm_runtime_t *runtime = substream->runtime;
  776. int result = 0;
  777. unsigned int status1;
  778. snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd);
  779. switch (cmd) {
  780. case SNDRV_PCM_TRIGGER_START:
  781. snd_azf3328_dbgio(chip, "trigger1");
  782. snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, runtime->rate, snd_pcm_format_width(runtime->format), runtime->channels);
  783. spin_lock(&chip->reg_lock);
  784. /* stop recording */
  785. status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
  786. status1 &= ~DMA_RESUME;
  787. outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
  788. /* FIXME: clear interrupts or what??? */
  789. outw(0xffff, chip->codec_port+IDX_IO_REC_IRQMASK);
  790. spin_unlock(&chip->reg_lock);
  791. snd_azf3328_setdmaa(chip, runtime->dma_addr, snd_pcm_lib_period_bytes(substream), snd_pcm_lib_buffer_bytes(substream), 1);
  792. spin_lock(&chip->reg_lock);
  793. #ifdef WIN9X
  794. /* FIXME: enable playback/recording??? */
  795. status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2;
  796. outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
  797. /* start playback again */
  798. /* FIXME: what is this value (0x0010)??? */
  799. status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
  800. outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
  801. #else
  802. outw(0x00, chip->codec_port+IDX_IO_REC_FLAGS);
  803. outw(DMA_PLAY_SOMETHING1, chip->codec_port+IDX_IO_REC_FLAGS);
  804. outw(DMA_PLAY_SOMETHING1|DMA_PLAY_SOMETHING2, chip->codec_port+IDX_IO_REC_FLAGS);
  805. outw(DMA_RESUME|SOMETHING_ALMOST_ALWAYS_SET|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port+IDX_IO_REC_FLAGS);
  806. #endif
  807. spin_unlock(&chip->reg_lock);
  808. snd_azf3328_dbgio(chip, "trigger2");
  809. chip->is_playing = 1;
  810. break;
  811. case SNDRV_PCM_TRIGGER_STOP:
  812. spin_lock(&chip->reg_lock);
  813. /* stop recording */
  814. status1 = inw(chip->codec_port+IDX_IO_REC_FLAGS);
  815. status1 &= ~DMA_RESUME;
  816. outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
  817. status1 |= DMA_PLAY_SOMETHING1;
  818. outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
  819. status1 &= ~DMA_PLAY_SOMETHING1;
  820. outw(status1, chip->codec_port+IDX_IO_REC_FLAGS);
  821. spin_unlock(&chip->reg_lock);
  822. chip->is_playing = 0;
  823. break;
  824. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  825. snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n");
  826. break;
  827. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  828. snd_printk("FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n");
  829. break;
  830. default:
  831. return -EINVAL;
  832. }
  833. snd_azf3328_dbgcallleave();
  834. return result;
  835. }
  836. static snd_pcm_uframes_t snd_azf3328_playback_pointer(snd_pcm_substream_t * substream)
  837. {
  838. azf3328_t *chip = snd_pcm_substream_chip(substream);
  839. unsigned long bufptr, playptr;
  840. unsigned long result;
  841. snd_pcm_uframes_t frmres;
  842. #ifdef QUERY_HARDWARE
  843. bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1);
  844. #else
  845. bufptr = substream->runtime->dma_addr;
  846. #endif
  847. playptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS);
  848. result = playptr - bufptr;
  849. frmres = bytes_to_frames( substream->runtime, result );
  850. snd_azf3328_dbgplay("result %lx, playptr %lx (base %x), frames %ld\n", result, playptr, substream->runtime->dma_addr, frmres);
  851. return frmres;
  852. }
  853. static snd_pcm_uframes_t snd_azf3328_capture_pointer(snd_pcm_substream_t * substream)
  854. {
  855. azf3328_t *chip = snd_pcm_substream_chip(substream);
  856. unsigned long bufptr, recptr;
  857. unsigned long result;
  858. snd_pcm_uframes_t frmres;
  859. #ifdef QUERY_HARDWARE
  860. bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1);
  861. #else
  862. bufptr = substream->runtime->dma_addr;
  863. #endif
  864. recptr = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS);
  865. result = recptr - bufptr;
  866. frmres = bytes_to_frames( substream->runtime, result );
  867. snd_azf3328_dbgplay("result %lx, rec ptr %lx (base %x), frames %ld\n", result, recptr, substream->runtime->dma_addr, frmres);
  868. return frmres;
  869. }
  870. static irqreturn_t snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  871. {
  872. azf3328_t *chip = dev_id;
  873. unsigned int status, which;
  874. static unsigned long count;
  875. status = inw(chip->codec_port+IDX_IO_IRQSTATUS);
  876. /* fast path out, to ease interrupt sharing */
  877. if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_SOMEIRQ)))
  878. return IRQ_NONE; /* must be interrupt for another device */
  879. snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQMASK %04x, IDX_IO_IRQSTATUS %04x\n", count, inw(chip->codec_port+IDX_IO_PLAY_FLAGS), inw(chip->codec_port+IDX_IO_PLAY_IRQMASK), inw(chip->codec_port+IDX_IO_IRQSTATUS));
  880. if (status & IRQ_PLAYBACK)
  881. {
  882. spin_lock(&chip->reg_lock);
  883. which = inw(chip->codec_port+IDX_IO_PLAY_IRQMASK);
  884. if (which & IRQ_FINISHED_PLAYBUF_1)
  885. /* ack IRQ */
  886. outw(which | IRQ_FINISHED_PLAYBUF_1, chip->codec_port+IDX_IO_PLAY_IRQMASK);
  887. if (which & IRQ_FINISHED_PLAYBUF_2)
  888. /* ack IRQ */
  889. outw(which | IRQ_FINISHED_PLAYBUF_2, chip->codec_port+IDX_IO_PLAY_IRQMASK);
  890. if (which & IRQ_PLAY_SOMETHING)
  891. {
  892. snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n");
  893. }
  894. if (chip->pcm && chip->playback_substream)
  895. {
  896. snd_azf3328_dbgplay("which %x, playptr %lx\n", which, inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
  897. snd_pcm_period_elapsed(chip->playback_substream);
  898. snd_azf3328_dbgplay("period done, playptr %lx.\n", inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS));
  899. }
  900. else
  901. snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n");
  902. spin_unlock(&chip->reg_lock);
  903. }
  904. if (status & IRQ_RECORDING)
  905. {
  906. spin_lock(&chip->reg_lock);
  907. which = inw(chip->codec_port+IDX_IO_REC_IRQMASK);
  908. if (which & IRQ_FINISHED_RECBUF_1)
  909. /* ack interrupt */
  910. outw(which | IRQ_FINISHED_RECBUF_1, chip->codec_port+IDX_IO_REC_IRQMASK);
  911. if (which & IRQ_FINISHED_RECBUF_2)
  912. /* ack interrupt */
  913. outw(which | IRQ_FINISHED_RECBUF_2, chip->codec_port+IDX_IO_REC_IRQMASK);
  914. if (which & IRQ_REC_SOMETHING)
  915. {
  916. snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n");
  917. }
  918. if (chip->pcm && chip->capture_substream)
  919. {
  920. snd_azf3328_dbgplay("which %x, recptr %lx\n", which, inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
  921. spin_unlock(&chip->reg_lock);
  922. snd_pcm_period_elapsed(chip->capture_substream);
  923. spin_lock(&chip->reg_lock);
  924. snd_azf3328_dbgplay("period done, recptr %lx.\n", inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS));
  925. }
  926. spin_unlock(&chip->reg_lock);
  927. }
  928. if (status & IRQ_MPU401)
  929. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
  930. if (status & IRQ_SOMEIRQ)
  931. snd_azf3328_dbgplay("azt3328: unknown IRQ type occurred, please report!\n");
  932. count++;
  933. return IRQ_HANDLED;
  934. }
  935. /*****************************************************************/
  936. static snd_pcm_hardware_t snd_azf3328_playback =
  937. {
  938. /* FIXME!! Correct? */
  939. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  940. SNDRV_PCM_INFO_MMAP_VALID),
  941. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  942. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
  943. .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
  944. .rate_min = 5512,
  945. .rate_max = 64000,
  946. .channels_min = 1,
  947. .channels_max = 2,
  948. .buffer_bytes_max = 65536,
  949. .period_bytes_min = 64,
  950. .period_bytes_max = 65536,
  951. .periods_min = 1,
  952. .periods_max = 1024,
  953. /* FIXME: maybe that card actually has a FIFO?
  954. * Hmm, it seems newer revisions do have one, but we still don't know
  955. * its size... */
  956. .fifo_size = 0,
  957. };
  958. static snd_pcm_hardware_t snd_azf3328_capture =
  959. {
  960. /* FIXME */
  961. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  962. SNDRV_PCM_INFO_MMAP_VALID),
  963. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  964. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE,
  965. .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_KNOT,
  966. .rate_min = 5512,
  967. .rate_max = 64000,
  968. .channels_min = 1,
  969. .channels_max = 2,
  970. .buffer_bytes_max = 65536,
  971. .period_bytes_min = 64,
  972. .period_bytes_max = 65536,
  973. .periods_min = 1,
  974. .periods_max = 1024,
  975. .fifo_size = 0,
  976. };
  977. static unsigned int snd_azf3328_fixed_rates[] = {
  978. 5512, 6620, 8000, 9600, 11025, 16000, 22050, 32000, 44100, 48000, 64000
  979. };
  980. static snd_pcm_hw_constraint_list_t snd_azf3328_hw_constraints_rates = {
  981. .count = ARRAY_SIZE(snd_azf3328_fixed_rates),
  982. .list = snd_azf3328_fixed_rates,
  983. .mask = 0,
  984. };
  985. /*****************************************************************/
  986. static int snd_azf3328_playback_open(snd_pcm_substream_t * substream)
  987. {
  988. azf3328_t *chip = snd_pcm_substream_chip(substream);
  989. snd_pcm_runtime_t *runtime = substream->runtime;
  990. snd_azf3328_dbgcallenter();
  991. chip->playback_substream = substream;
  992. runtime->hw = snd_azf3328_playback;
  993. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  994. &snd_azf3328_hw_constraints_rates);
  995. snd_azf3328_dbgcallleave();
  996. return 0;
  997. }
  998. static int snd_azf3328_capture_open(snd_pcm_substream_t * substream)
  999. {
  1000. azf3328_t *chip = snd_pcm_substream_chip(substream);
  1001. snd_pcm_runtime_t *runtime = substream->runtime;
  1002. snd_azf3328_dbgcallenter();
  1003. chip->capture_substream = substream;
  1004. runtime->hw = snd_azf3328_capture;
  1005. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  1006. &snd_azf3328_hw_constraints_rates);
  1007. snd_azf3328_dbgcallleave();
  1008. return 0;
  1009. }
  1010. static int snd_azf3328_playback_close(snd_pcm_substream_t * substream)
  1011. {
  1012. azf3328_t *chip = snd_pcm_substream_chip(substream);
  1013. snd_azf3328_dbgcallenter();
  1014. chip->playback_substream = NULL;
  1015. snd_azf3328_dbgcallleave();
  1016. return 0;
  1017. }
  1018. static int snd_azf3328_capture_close(snd_pcm_substream_t * substream)
  1019. {
  1020. azf3328_t *chip = snd_pcm_substream_chip(substream);
  1021. snd_azf3328_dbgcallenter();
  1022. chip->capture_substream = NULL;
  1023. snd_azf3328_dbgcallleave();
  1024. return 0;
  1025. }
  1026. /******************************************************************/
  1027. static snd_pcm_ops_t snd_azf3328_playback_ops = {
  1028. .open = snd_azf3328_playback_open,
  1029. .close = snd_azf3328_playback_close,
  1030. .ioctl = snd_pcm_lib_ioctl,
  1031. .hw_params = snd_azf3328_hw_params,
  1032. .hw_free = snd_azf3328_hw_free,
  1033. .prepare = snd_azf3328_playback_prepare,
  1034. .trigger = snd_azf3328_playback_trigger,
  1035. .pointer = snd_azf3328_playback_pointer
  1036. };
  1037. static snd_pcm_ops_t snd_azf3328_capture_ops = {
  1038. .open = snd_azf3328_capture_open,
  1039. .close = snd_azf3328_capture_close,
  1040. .ioctl = snd_pcm_lib_ioctl,
  1041. .hw_params = snd_azf3328_hw_params,
  1042. .hw_free = snd_azf3328_hw_free,
  1043. .prepare = snd_azf3328_capture_prepare,
  1044. .trigger = snd_azf3328_capture_trigger,
  1045. .pointer = snd_azf3328_capture_pointer
  1046. };
  1047. static void snd_azf3328_pcm_free(snd_pcm_t *pcm)
  1048. {
  1049. azf3328_t *chip = pcm->private_data;
  1050. chip->pcm = NULL;
  1051. snd_pcm_lib_preallocate_free_for_all(pcm);
  1052. }
  1053. static int __devinit snd_azf3328_pcm(azf3328_t *chip, int device)
  1054. {
  1055. snd_pcm_t *pcm;
  1056. int err;
  1057. snd_azf3328_dbgcallenter();
  1058. if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0)
  1059. return err;
  1060. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops);
  1061. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops);
  1062. pcm->private_data = chip;
  1063. pcm->private_free = snd_azf3328_pcm_free;
  1064. pcm->info_flags = 0;
  1065. strcpy(pcm->name, chip->card->shortname);
  1066. chip->pcm = pcm;
  1067. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1068. snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
  1069. snd_azf3328_dbgcallleave();
  1070. return 0;
  1071. }
  1072. /******************************************************************/
  1073. #ifdef SUPPORT_JOYSTICK
  1074. static int __devinit snd_azf3328_config_joystick(azf3328_t *chip, int dev)
  1075. {
  1076. struct gameport *gp;
  1077. struct resource *r;
  1078. if (!joystick[dev])
  1079. return -ENODEV;
  1080. if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) {
  1081. printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n");
  1082. return -EBUSY;
  1083. }
  1084. chip->gameport = gp = gameport_allocate_port();
  1085. if (!gp) {
  1086. printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n");
  1087. release_resource(r);
  1088. kfree_nocheck(r);
  1089. return -ENOMEM;
  1090. }
  1091. gameport_set_name(gp, "AZF3328 Gameport");
  1092. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1093. gameport_set_dev_parent(gp, &chip->pci->dev);
  1094. gp->io = 0x200;
  1095. gameport_set_port_data(gp, r);
  1096. snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
  1097. snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY);
  1098. gameport_register_port(chip->gameport);
  1099. return 0;
  1100. }
  1101. static void snd_azf3328_free_joystick(azf3328_t *chip)
  1102. {
  1103. if (chip->gameport) {
  1104. struct resource *r = gameport_get_port_data(chip->gameport);
  1105. gameport_unregister_port(chip->gameport);
  1106. chip->gameport = NULL;
  1107. /* disable gameport */
  1108. snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
  1109. snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
  1110. release_resource(r);
  1111. kfree_nocheck(r);
  1112. }
  1113. }
  1114. #else
  1115. static inline int snd_azf3328_config_joystick(azf3328_t *chip, int dev) { return -ENOSYS; }
  1116. static inline void snd_azf3328_free_joystick(azf3328_t *chip) { }
  1117. #endif
  1118. /******************************************************************/
  1119. static int snd_azf3328_free(azf3328_t *chip)
  1120. {
  1121. if (chip->irq < 0)
  1122. goto __end_hw;
  1123. /* reset (close) mixer */
  1124. snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */
  1125. snd_azf3328_mixer_write(chip, IDX_MIXER_RESET, 0x0, WORD_VALUE);
  1126. /* interrupt setup - mask everything */
  1127. /* FIXME */
  1128. synchronize_irq(chip->irq);
  1129. __end_hw:
  1130. snd_azf3328_free_joystick(chip);
  1131. if (chip->irq >= 0)
  1132. free_irq(chip->irq, (void *)chip);
  1133. pci_release_regions(chip->pci);
  1134. pci_disable_device(chip->pci);
  1135. kfree(chip);
  1136. return 0;
  1137. }
  1138. static int snd_azf3328_dev_free(snd_device_t *device)
  1139. {
  1140. azf3328_t *chip = device->device_data;
  1141. return snd_azf3328_free(chip);
  1142. }
  1143. #if 0
  1144. /* check whether a bit can be modified */
  1145. static void snd_azf3328_test_bit(unsigned int reg, int bit)
  1146. {
  1147. unsigned char val, valoff, valon;
  1148. val = inb(reg);
  1149. outb(val & ~(1 << bit), reg);
  1150. valoff = inb(reg);
  1151. outb(val|(1 << bit), reg);
  1152. valon = inb(reg);
  1153. outb(val, reg);
  1154. printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon);
  1155. }
  1156. #endif
  1157. static int __devinit snd_azf3328_create(snd_card_t * card,
  1158. struct pci_dev *pci,
  1159. unsigned long device_type,
  1160. azf3328_t ** rchip)
  1161. {
  1162. azf3328_t *chip;
  1163. int err;
  1164. static snd_device_ops_t ops = {
  1165. .dev_free = snd_azf3328_dev_free,
  1166. };
  1167. u16 tmp;
  1168. *rchip = NULL;
  1169. if ((err = pci_enable_device(pci)) < 0)
  1170. return err;
  1171. chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
  1172. if (chip == NULL) {
  1173. pci_disable_device(pci);
  1174. return -ENOMEM;
  1175. }
  1176. spin_lock_init(&chip->reg_lock);
  1177. chip->card = card;
  1178. chip->pci = pci;
  1179. chip->irq = -1;
  1180. /* check if we can restrict PCI DMA transfers to 24 bits */
  1181. if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
  1182. pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
  1183. snd_printk("architecture does not support 24bit PCI busmaster DMA\n");
  1184. pci_disable_device(pci);
  1185. return -ENXIO;
  1186. }
  1187. if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) {
  1188. kfree(chip);
  1189. pci_disable_device(pci);
  1190. return err;
  1191. }
  1192. chip->codec_port = pci_resource_start(pci, 0);
  1193. chip->io2_port = pci_resource_start(pci, 1);
  1194. chip->mpu_port = pci_resource_start(pci, 2);
  1195. chip->synth_port = pci_resource_start(pci, 3);
  1196. chip->mixer_port = pci_resource_start(pci, 4);
  1197. if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
  1198. snd_printk("unable to grab IRQ %d\n", pci->irq);
  1199. snd_azf3328_free(chip);
  1200. return -EBUSY;
  1201. }
  1202. chip->irq = pci->irq;
  1203. pci_set_master(pci);
  1204. synchronize_irq(chip->irq);
  1205. snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq);
  1206. snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_read(chip, 0), snd_azf3328_io2_read(chip, 1), snd_azf3328_io2_read(chip, 2), snd_azf3328_io2_read(chip, 3), snd_azf3328_io2_read(chip, 4), snd_azf3328_io2_read(chip, 5));
  1207. for (tmp=0; tmp <= 0x01; tmp += 1)
  1208. snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp));
  1209. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1210. snd_azf3328_free(chip);
  1211. return err;
  1212. }
  1213. /* create mixer interface & switches */
  1214. if ((err = snd_azf3328_mixer_new(chip)) < 0)
  1215. return err;
  1216. #if 0
  1217. /* set very low bitrate to reduce noise and power consumption? */
  1218. snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1);
  1219. #endif
  1220. /* standard chip init stuff */
  1221. spin_lock_irq(&chip->reg_lock);
  1222. outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_PLAY_FLAGS);
  1223. outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_SOMETHING_FLAGS);
  1224. outb(DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE, chip->codec_port + IDX_IO_REC_FLAGS);
  1225. outb(0x0, chip->codec_port + IDX_IO_IRQ63H);
  1226. spin_unlock_irq(&chip->reg_lock);
  1227. snd_card_set_dev(card, &pci->dev);
  1228. *rchip = chip;
  1229. return 0;
  1230. }
  1231. static int __devinit snd_azf3328_probe(struct pci_dev *pci,
  1232. const struct pci_device_id *pci_id)
  1233. {
  1234. static int dev;
  1235. snd_card_t *card;
  1236. azf3328_t *chip;
  1237. opl3_t *opl3;
  1238. int err;
  1239. snd_azf3328_dbgcallenter();
  1240. if (dev >= SNDRV_CARDS)
  1241. return -ENODEV;
  1242. if (!enable[dev]) {
  1243. dev++;
  1244. return -ENOENT;
  1245. }
  1246. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 );
  1247. if (card == NULL)
  1248. return -ENOMEM;
  1249. strcpy(card->driver, "AZF3328");
  1250. strcpy(card->shortname, "Aztech AZF3328 (PCI168)");
  1251. if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) {
  1252. snd_card_free(card);
  1253. return err;
  1254. }
  1255. if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401,
  1256. chip->mpu_port, 1, pci->irq, 0,
  1257. &chip->rmidi)) < 0) {
  1258. snd_printk("azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port);
  1259. snd_card_free(card);
  1260. return err;
  1261. }
  1262. if ((err = snd_azf3328_pcm(chip, 0)) < 0) {
  1263. snd_card_free(card);
  1264. return err;
  1265. }
  1266. if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2,
  1267. OPL3_HW_AUTO, 1, &opl3) < 0) {
  1268. snd_printk("azf3328: no OPL3 device at 0x%lx-0x%lx?\n",
  1269. chip->synth_port, chip->synth_port+2 );
  1270. } else {
  1271. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1272. snd_card_free(card);
  1273. return err;
  1274. }
  1275. }
  1276. snd_azf3328_dbgio(chip, "create");
  1277. sprintf(card->longname, "%s at 0x%lx, irq %i",
  1278. card->shortname, chip->codec_port, chip->irq);
  1279. if ((err = snd_card_register(card)) < 0) {
  1280. snd_card_free(card);
  1281. return err;
  1282. }
  1283. #ifdef MODULE
  1284. printk(
  1285. "azt3328: Experimental driver for Aztech AZF3328-based soundcards such as PCI168.\n"
  1286. "azt3328: ZERO support from Aztech: you might think hard about future purchase.\n"
  1287. "azt3328: Feel free to contact hw7oshyuv3001@sneakemail.com for bug reports etc.!\n");
  1288. #endif
  1289. if (snd_azf3328_config_joystick(chip, dev) < 0)
  1290. snd_azf3328_io2_write(chip, IDX_IO2_LEGACY_ADDR,
  1291. snd_azf3328_io2_read(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY);
  1292. pci_set_drvdata(pci, card);
  1293. dev++;
  1294. snd_azf3328_dbgcallleave();
  1295. return 0;
  1296. }
  1297. static void __devexit snd_azf3328_remove(struct pci_dev *pci)
  1298. {
  1299. snd_azf3328_dbgcallenter();
  1300. snd_card_free(pci_get_drvdata(pci));
  1301. pci_set_drvdata(pci, NULL);
  1302. snd_azf3328_dbgcallleave();
  1303. }
  1304. static struct pci_driver driver = {
  1305. .name = "AZF3328",
  1306. .id_table = snd_azf3328_ids,
  1307. .probe = snd_azf3328_probe,
  1308. .remove = __devexit_p(snd_azf3328_remove),
  1309. };
  1310. static int __init alsa_card_azf3328_init(void)
  1311. {
  1312. int err;
  1313. snd_azf3328_dbgcallenter();
  1314. err = pci_register_driver(&driver);
  1315. snd_azf3328_dbgcallleave();
  1316. return err;
  1317. }
  1318. static void __exit alsa_card_azf3328_exit(void)
  1319. {
  1320. snd_azf3328_dbgcallenter();
  1321. pci_unregister_driver(&driver);
  1322. snd_azf3328_dbgcallleave();
  1323. }
  1324. module_init(alsa_card_azf3328_init)
  1325. module_exit(alsa_card_azf3328_exit)