cs8427.c 17 KB

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  1. /*
  2. * Routines for control of the CS8427 via i2c bus
  3. * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
  4. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <sound/driver.h>
  23. #include <linux/slab.h>
  24. #include <linux/delay.h>
  25. #include <linux/init.h>
  26. #include <sound/core.h>
  27. #include <sound/control.h>
  28. #include <sound/pcm.h>
  29. #include <sound/cs8427.h>
  30. #include <sound/asoundef.h>
  31. static void snd_cs8427_reset(snd_i2c_device_t *cs8427);
  32. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  33. MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
  34. MODULE_LICENSE("GPL");
  35. #define CS8427_ADDR (0x20>>1) /* fixed address */
  36. typedef struct {
  37. snd_pcm_substream_t *substream;
  38. char hw_status[24]; /* hardware status */
  39. char def_status[24]; /* default status */
  40. char pcm_status[24]; /* PCM private status */
  41. char hw_udata[32];
  42. snd_kcontrol_t *pcm_ctl;
  43. } cs8427_stream_t;
  44. typedef struct {
  45. unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
  46. unsigned int rate;
  47. unsigned int reset_timeout;
  48. cs8427_stream_t playback;
  49. cs8427_stream_t capture;
  50. } cs8427_t;
  51. static unsigned char swapbits(unsigned char val)
  52. {
  53. int bit;
  54. unsigned char res = 0;
  55. for (bit = 0; bit < 8; bit++) {
  56. res <<= 1;
  57. res |= val & 1;
  58. val >>= 1;
  59. }
  60. return res;
  61. }
  62. int snd_cs8427_reg_write(snd_i2c_device_t *device, unsigned char reg, unsigned char val)
  63. {
  64. int err;
  65. unsigned char buf[2];
  66. buf[0] = reg & 0x7f;
  67. buf[1] = val;
  68. if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
  69. snd_printk("unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n", buf[0], buf[1], err);
  70. return err < 0 ? err : -EIO;
  71. }
  72. return 0;
  73. }
  74. static int snd_cs8427_reg_read(snd_i2c_device_t *device, unsigned char reg)
  75. {
  76. int err;
  77. unsigned char buf;
  78. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  79. snd_printk("unable to send register 0x%x byte to CS8427\n", reg);
  80. return err < 0 ? err : -EIO;
  81. }
  82. if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
  83. snd_printk("unable to read register 0x%x byte from CS8427\n", reg);
  84. return err < 0 ? err : -EIO;
  85. }
  86. return buf;
  87. }
  88. static int snd_cs8427_select_corudata(snd_i2c_device_t *device, int udata)
  89. {
  90. cs8427_t *chip = device->private_data;
  91. int err;
  92. udata = udata ? CS8427_BSEL : 0;
  93. if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
  94. chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
  95. chip->regmap[CS8427_REG_CSDATABUF] |= udata;
  96. err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF, chip->regmap[CS8427_REG_CSDATABUF]);
  97. if (err < 0)
  98. return err;
  99. }
  100. return 0;
  101. }
  102. static int snd_cs8427_send_corudata(snd_i2c_device_t *device,
  103. int udata,
  104. unsigned char *ndata,
  105. int count)
  106. {
  107. cs8427_t *chip = device->private_data;
  108. char *hw_data = udata ? chip->playback.hw_udata : chip->playback.hw_status;
  109. char data[32];
  110. int err, idx;
  111. if (!memcmp(hw_data, ndata, count))
  112. return 0;
  113. if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
  114. return err;
  115. memcpy(hw_data, ndata, count);
  116. if (udata) {
  117. memset(data, 0, sizeof(data));
  118. if (memcmp(hw_data, data, count) == 0) {
  119. chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
  120. chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | CS8427_EFTUI;
  121. if ((err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF, chip->regmap[CS8427_REG_UDATABUF])) < 0)
  122. return err;
  123. return 0;
  124. }
  125. }
  126. data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
  127. for (idx = 0; idx < count; idx++)
  128. data[idx + 1] = swapbits(ndata[idx]);
  129. if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
  130. return -EIO;
  131. return 1;
  132. }
  133. static void snd_cs8427_free(snd_i2c_device_t *device)
  134. {
  135. kfree(device->private_data);
  136. }
  137. int snd_cs8427_create(snd_i2c_bus_t *bus,
  138. unsigned char addr,
  139. unsigned int reset_timeout,
  140. snd_i2c_device_t **r_cs8427)
  141. {
  142. static unsigned char initvals1[] = {
  143. CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
  144. /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, TCBL=output */
  145. CS8427_SWCLK | CS8427_TCBLDIR,
  146. /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, normal stereo operation */
  147. 0x00,
  148. /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, Rx=>serial */
  149. CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
  150. /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, output time base = OMCK, input time base =
  151. recovered input clock, recovered input clock source is ILRCK changed to AES3INPUT (workaround, see snd_cs8427_reset) */
  152. CS8427_RXDILRCK,
  153. /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, 24-bit, 64*Fsi */
  154. CS8427_SIDEL | CS8427_SILRPOL,
  155. /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format = I2S, 24-bit, 64*Fsi */
  156. CS8427_SODEL | CS8427_SOLRPOL,
  157. };
  158. static unsigned char initvals2[] = {
  159. CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
  160. /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, biphase, parity status bits */
  161. /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR, */
  162. 0xff, /* set everything */
  163. /* CS8427_REG_CSDATABUF:
  164. Registers 32-55 window to CS buffer
  165. Inhibit D->E transfers from overwriting first 5 bytes of CS data.
  166. Inhibit D->E transfers (all) of CS data.
  167. Allow E->F transfer of CS data.
  168. One byte mode; both A/B channels get same written CB data.
  169. A channel info is output to chip's EMPH* pin. */
  170. CS8427_CBMR | CS8427_DETCI,
  171. /* CS8427_REG_UDATABUF:
  172. Use internal buffer to transmit User (U) data.
  173. Chip's U pin is an output.
  174. Transmit all O's for user data.
  175. Inhibit D->E transfers.
  176. Inhibit E->F transfers. */
  177. CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
  178. };
  179. int err;
  180. cs8427_t *chip;
  181. snd_i2c_device_t *device;
  182. unsigned char buf[24];
  183. if ((err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7), &device)) < 0)
  184. return err;
  185. chip = device->private_data = kcalloc(1, sizeof(*chip), GFP_KERNEL);
  186. if (chip == NULL) {
  187. snd_i2c_device_free(device);
  188. return -ENOMEM;
  189. }
  190. device->private_free = snd_cs8427_free;
  191. snd_i2c_lock(bus);
  192. if ((err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER)) != CS8427_VER8427A) {
  193. snd_i2c_unlock(bus);
  194. snd_printk("unable to find CS8427 signature (expected 0x%x, read 0x%x), initialization is not completed\n", CS8427_VER8427A, err);
  195. return -EFAULT;
  196. }
  197. /* turn off run bit while making changes to configuration */
  198. if ((err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00)) < 0)
  199. goto __fail;
  200. /* send initial values */
  201. memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
  202. if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
  203. err = err < 0 ? err : -EIO;
  204. goto __fail;
  205. }
  206. /* Turn off CS8427 interrupt stuff that is not used in hardware */
  207. memset(buf, 0, 7);
  208. /* from address 9 to 15 */
  209. buf[0] = 9; /* register */
  210. if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
  211. goto __fail;
  212. /* send transfer initialization sequence */
  213. memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
  214. if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
  215. err = err < 0 ? err : -EIO;
  216. goto __fail;
  217. }
  218. /* write default channel status bytes */
  219. buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0));
  220. buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8));
  221. buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16));
  222. buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24));
  223. memset(buf + 4, 0, 24 - 4);
  224. if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
  225. goto __fail;
  226. memcpy(chip->playback.def_status, buf, 24);
  227. memcpy(chip->playback.pcm_status, buf, 24);
  228. snd_i2c_unlock(bus);
  229. /* turn on run bit and rock'n'roll */
  230. if (reset_timeout < 1)
  231. reset_timeout = 1;
  232. chip->reset_timeout = reset_timeout;
  233. snd_cs8427_reset(device);
  234. #if 0 // it's nice for read tests
  235. {
  236. char buf[128];
  237. int xx;
  238. buf[0] = 0x81;
  239. snd_i2c_sendbytes(device, buf, 1);
  240. snd_i2c_readbytes(device, buf, 127);
  241. for (xx = 0; xx < 127; xx++)
  242. printk("reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
  243. }
  244. #endif
  245. if (r_cs8427)
  246. *r_cs8427 = device;
  247. return 0;
  248. __fail:
  249. snd_i2c_unlock(bus);
  250. snd_i2c_device_free(device);
  251. return err < 0 ? err : -EIO;
  252. }
  253. /*
  254. * Reset the chip using run bit, also lock PLL using ILRCK and
  255. * put back AES3INPUT. This workaround is described in latest
  256. * CS8427 datasheet, otherwise TXDSERIAL will not work.
  257. */
  258. static void snd_cs8427_reset(snd_i2c_device_t *cs8427)
  259. {
  260. cs8427_t *chip;
  261. unsigned long end_time;
  262. int data;
  263. snd_assert(cs8427, return);
  264. chip = cs8427->private_data;
  265. snd_i2c_lock(cs8427->bus);
  266. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
  267. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]);
  268. udelay(200);
  269. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
  270. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]);
  271. udelay(200);
  272. snd_i2c_unlock(cs8427->bus);
  273. end_time = jiffies + chip->reset_timeout;
  274. while (time_after_eq(end_time, jiffies)) {
  275. snd_i2c_lock(cs8427->bus);
  276. data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
  277. snd_i2c_unlock(cs8427->bus);
  278. if (!(data & CS8427_UNLOCK))
  279. break;
  280. set_current_state(TASK_UNINTERRUPTIBLE);
  281. schedule_timeout(1);
  282. }
  283. snd_i2c_lock(cs8427->bus);
  284. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
  285. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
  286. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]);
  287. snd_i2c_unlock(cs8427->bus);
  288. }
  289. static int snd_cs8427_in_status_info(snd_kcontrol_t *kcontrol,
  290. snd_ctl_elem_info_t *uinfo)
  291. {
  292. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  293. uinfo->count = 1;
  294. uinfo->value.integer.min = 0;
  295. uinfo->value.integer.max = 255;
  296. return 0;
  297. }
  298. static int snd_cs8427_in_status_get(snd_kcontrol_t *kcontrol,
  299. snd_ctl_elem_value_t *ucontrol)
  300. {
  301. snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
  302. int data;
  303. snd_i2c_lock(device->bus);
  304. data = snd_cs8427_reg_read(device, kcontrol->private_value);
  305. snd_i2c_unlock(device->bus);
  306. if (data < 0)
  307. return data;
  308. ucontrol->value.integer.value[0] = data;
  309. return 0;
  310. }
  311. static int snd_cs8427_qsubcode_info(snd_kcontrol_t *kcontrol,
  312. snd_ctl_elem_info_t *uinfo)
  313. {
  314. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  315. uinfo->count = 10;
  316. return 0;
  317. }
  318. static int snd_cs8427_qsubcode_get(snd_kcontrol_t *kcontrol,
  319. snd_ctl_elem_value_t *ucontrol)
  320. {
  321. snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
  322. unsigned char reg = CS8427_REG_QSUBCODE;
  323. int err;
  324. snd_i2c_lock(device->bus);
  325. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  326. snd_printk("unable to send register 0x%x byte to CS8427\n", reg);
  327. snd_i2c_unlock(device->bus);
  328. return err < 0 ? err : -EIO;
  329. }
  330. if ((err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10)) != 10) {
  331. snd_printk("unable to read Q-subcode bytes from CS8427\n");
  332. snd_i2c_unlock(device->bus);
  333. return err < 0 ? err : -EIO;
  334. }
  335. snd_i2c_unlock(device->bus);
  336. return 0;
  337. }
  338. static int snd_cs8427_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  339. {
  340. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  341. uinfo->count = 1;
  342. return 0;
  343. }
  344. static int snd_cs8427_spdif_get(snd_kcontrol_t * kcontrol,
  345. snd_ctl_elem_value_t * ucontrol)
  346. {
  347. snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
  348. cs8427_t *chip = device->private_data;
  349. snd_i2c_lock(device->bus);
  350. memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
  351. snd_i2c_unlock(device->bus);
  352. return 0;
  353. }
  354. static int snd_cs8427_spdif_put(snd_kcontrol_t * kcontrol,
  355. snd_ctl_elem_value_t * ucontrol)
  356. {
  357. snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
  358. cs8427_t *chip = device->private_data;
  359. unsigned char *status = kcontrol->private_value ? chip->playback.pcm_status : chip->playback.def_status;
  360. snd_pcm_runtime_t *runtime = chip->playback.substream ? chip->playback.substream->runtime : NULL;
  361. int err, change;
  362. snd_i2c_lock(device->bus);
  363. change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
  364. memcpy(status, ucontrol->value.iec958.status, 24);
  365. if (change && (kcontrol->private_value ? runtime != NULL : runtime == NULL)) {
  366. err = snd_cs8427_send_corudata(device, 0, status, 24);
  367. if (err < 0)
  368. change = err;
  369. }
  370. snd_i2c_unlock(device->bus);
  371. return change;
  372. }
  373. static int snd_cs8427_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  374. {
  375. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  376. uinfo->count = 1;
  377. return 0;
  378. }
  379. static int snd_cs8427_spdif_mask_get(snd_kcontrol_t * kcontrol,
  380. snd_ctl_elem_value_t * ucontrol)
  381. {
  382. memset(ucontrol->value.iec958.status, 0xff, 24);
  383. return 0;
  384. }
  385. static snd_kcontrol_new_t snd_cs8427_iec958_controls[] = {
  386. {
  387. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  388. .info = snd_cs8427_in_status_info,
  389. .name = "IEC958 CS8427 Input Status",
  390. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  391. .get = snd_cs8427_in_status_get,
  392. .private_value = 15,
  393. },
  394. {
  395. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  396. .info = snd_cs8427_in_status_info,
  397. .name = "IEC958 CS8427 Error Status",
  398. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  399. .get = snd_cs8427_in_status_get,
  400. .private_value = 16,
  401. },
  402. {
  403. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  404. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  405. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  406. .info = snd_cs8427_spdif_mask_info,
  407. .get = snd_cs8427_spdif_mask_get,
  408. },
  409. {
  410. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  411. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  412. .info = snd_cs8427_spdif_info,
  413. .get = snd_cs8427_spdif_get,
  414. .put = snd_cs8427_spdif_put,
  415. .private_value = 0
  416. },
  417. {
  418. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  419. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  420. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  421. .info = snd_cs8427_spdif_info,
  422. .get = snd_cs8427_spdif_get,
  423. .put = snd_cs8427_spdif_put,
  424. .private_value = 1
  425. },
  426. {
  427. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  428. .info = snd_cs8427_qsubcode_info,
  429. .name = "IEC958 Q-subcode Capture Default",
  430. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  431. .get = snd_cs8427_qsubcode_get
  432. }};
  433. int snd_cs8427_iec958_build(snd_i2c_device_t *cs8427,
  434. snd_pcm_substream_t *play_substream,
  435. snd_pcm_substream_t *cap_substream)
  436. {
  437. cs8427_t *chip = cs8427->private_data;
  438. snd_kcontrol_t *kctl;
  439. unsigned int idx;
  440. int err;
  441. snd_assert(play_substream && cap_substream, return -EINVAL);
  442. for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
  443. kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
  444. if (kctl == NULL)
  445. return -ENOMEM;
  446. kctl->id.device = play_substream->pcm->device;
  447. kctl->id.subdevice = play_substream->number;
  448. err = snd_ctl_add(cs8427->bus->card, kctl);
  449. if (err < 0)
  450. return err;
  451. if (!strcmp(kctl->id.name, SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
  452. chip->playback.pcm_ctl = kctl;
  453. }
  454. chip->playback.substream = play_substream;
  455. chip->capture.substream = cap_substream;
  456. snd_assert(chip->playback.pcm_ctl, return -EIO);
  457. return 0;
  458. }
  459. int snd_cs8427_iec958_active(snd_i2c_device_t *cs8427, int active)
  460. {
  461. cs8427_t *chip;
  462. snd_assert(cs8427, return -ENXIO);
  463. chip = cs8427->private_data;
  464. if (active)
  465. memcpy(chip->playback.pcm_status, chip->playback.def_status, 24);
  466. chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  467. snd_ctl_notify(cs8427->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
  468. SNDRV_CTL_EVENT_MASK_INFO, &chip->playback.pcm_ctl->id);
  469. return 0;
  470. }
  471. int snd_cs8427_iec958_pcm(snd_i2c_device_t *cs8427, unsigned int rate)
  472. {
  473. cs8427_t *chip;
  474. char *status;
  475. int err, reset;
  476. snd_assert(cs8427, return -ENXIO);
  477. chip = cs8427->private_data;
  478. status = chip->playback.pcm_status;
  479. snd_i2c_lock(cs8427->bus);
  480. if (status[0] & IEC958_AES0_PROFESSIONAL) {
  481. status[0] &= ~IEC958_AES0_PRO_FS;
  482. switch (rate) {
  483. case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
  484. case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
  485. case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
  486. default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
  487. }
  488. } else {
  489. status[3] &= ~IEC958_AES3_CON_FS;
  490. switch (rate) {
  491. case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
  492. case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
  493. case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
  494. }
  495. }
  496. err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
  497. if (err > 0)
  498. snd_ctl_notify(cs8427->bus->card,
  499. SNDRV_CTL_EVENT_MASK_VALUE,
  500. &chip->playback.pcm_ctl->id);
  501. reset = chip->rate != rate;
  502. chip->rate = rate;
  503. snd_i2c_unlock(cs8427->bus);
  504. if (reset)
  505. snd_cs8427_reset(cs8427);
  506. return err < 0 ? err : 0;
  507. }
  508. static int __init alsa_cs8427_module_init(void)
  509. {
  510. return 0;
  511. }
  512. static void __exit alsa_cs8427_module_exit(void)
  513. {
  514. }
  515. module_init(alsa_cs8427_module_init)
  516. module_exit(alsa_cs8427_module_exit)
  517. EXPORT_SYMBOL(snd_cs8427_create);
  518. EXPORT_SYMBOL(snd_cs8427_reset);
  519. EXPORT_SYMBOL(snd_cs8427_reg_write);
  520. EXPORT_SYMBOL(snd_cs8427_iec958_build);
  521. EXPORT_SYMBOL(snd_cs8427_iec958_active);
  522. EXPORT_SYMBOL(snd_cs8427_iec958_pcm);