tlb.h 7.0 KB

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  1. #ifndef _ASM_IA64_TLB_H
  2. #define _ASM_IA64_TLB_H
  3. /*
  4. * Based on <asm-generic/tlb.h>.
  5. *
  6. * Copyright (C) 2002-2003 Hewlett-Packard Co
  7. * David Mosberger-Tang <davidm@hpl.hp.com>
  8. */
  9. /*
  10. * Removing a translation from a page table (including TLB-shootdown) is a four-step
  11. * procedure:
  12. *
  13. * (1) Flush (virtual) caches --- ensures virtual memory is coherent with kernel memory
  14. * (this is a no-op on ia64).
  15. * (2) Clear the relevant portions of the page-table
  16. * (3) Flush the TLBs --- ensures that stale content is gone from CPU TLBs
  17. * (4) Release the pages that were freed up in step (2).
  18. *
  19. * Note that the ordering of these steps is crucial to avoid races on MP machines.
  20. *
  21. * The Linux kernel defines several platform-specific hooks for TLB-shootdown. When
  22. * unmapping a portion of the virtual address space, these hooks are called according to
  23. * the following template:
  24. *
  25. * tlb <- tlb_gather_mmu(mm, full_mm_flush); // start unmap for address space MM
  26. * {
  27. * for each vma that needs a shootdown do {
  28. * tlb_start_vma(tlb, vma);
  29. * for each page-table-entry PTE that needs to be removed do {
  30. * tlb_remove_tlb_entry(tlb, pte, address);
  31. * if (pte refers to a normal page) {
  32. * tlb_remove_page(tlb, page);
  33. * }
  34. * }
  35. * tlb_end_vma(tlb, vma);
  36. * }
  37. * }
  38. * tlb_finish_mmu(tlb, start, end); // finish unmap for address space MM
  39. */
  40. #include <linux/config.h>
  41. #include <linux/mm.h>
  42. #include <linux/pagemap.h>
  43. #include <linux/swap.h>
  44. #include <asm/pgalloc.h>
  45. #include <asm/processor.h>
  46. #include <asm/tlbflush.h>
  47. #include <asm/machvec.h>
  48. #ifdef CONFIG_SMP
  49. # define FREE_PTE_NR 2048
  50. # define tlb_fast_mode(tlb) ((tlb)->nr == ~0U)
  51. #else
  52. # define FREE_PTE_NR 0
  53. # define tlb_fast_mode(tlb) (1)
  54. #endif
  55. struct mmu_gather {
  56. struct mm_struct *mm;
  57. unsigned int nr; /* == ~0U => fast mode */
  58. unsigned char fullmm; /* non-zero means full mm flush */
  59. unsigned char need_flush; /* really unmapped some PTEs? */
  60. unsigned long freed; /* number of pages freed */
  61. unsigned long start_addr;
  62. unsigned long end_addr;
  63. struct page *pages[FREE_PTE_NR];
  64. };
  65. /* Users of the generic TLB shootdown code must declare this storage space. */
  66. DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
  67. /*
  68. * Flush the TLB for address range START to END and, if not in fast mode, release the
  69. * freed pages that where gathered up to this point.
  70. */
  71. static inline void
  72. ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
  73. {
  74. unsigned int nr;
  75. if (!tlb->need_flush)
  76. return;
  77. tlb->need_flush = 0;
  78. if (tlb->fullmm) {
  79. /*
  80. * Tearing down the entire address space. This happens both as a result
  81. * of exit() and execve(). The latter case necessitates the call to
  82. * flush_tlb_mm() here.
  83. */
  84. flush_tlb_mm(tlb->mm);
  85. } else if (unlikely (end - start >= 1024*1024*1024*1024UL
  86. || REGION_NUMBER(start) != REGION_NUMBER(end - 1)))
  87. {
  88. /*
  89. * If we flush more than a tera-byte or across regions, we're probably
  90. * better off just flushing the entire TLB(s). This should be very rare
  91. * and is not worth optimizing for.
  92. */
  93. flush_tlb_all();
  94. } else {
  95. /*
  96. * XXX fix me: flush_tlb_range() should take an mm pointer instead of a
  97. * vma pointer.
  98. */
  99. struct vm_area_struct vma;
  100. vma.vm_mm = tlb->mm;
  101. /* flush the address range from the tlb: */
  102. flush_tlb_range(&vma, start, end);
  103. /* now flush the virt. page-table area mapping the address range: */
  104. flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
  105. }
  106. /* lastly, release the freed pages */
  107. nr = tlb->nr;
  108. if (!tlb_fast_mode(tlb)) {
  109. unsigned long i;
  110. tlb->nr = 0;
  111. tlb->start_addr = ~0UL;
  112. for (i = 0; i < nr; ++i)
  113. free_page_and_swap_cache(tlb->pages[i]);
  114. }
  115. }
  116. /*
  117. * Return a pointer to an initialized struct mmu_gather.
  118. */
  119. static inline struct mmu_gather *
  120. tlb_gather_mmu (struct mm_struct *mm, unsigned int full_mm_flush)
  121. {
  122. struct mmu_gather *tlb = &__get_cpu_var(mmu_gathers);
  123. tlb->mm = mm;
  124. /*
  125. * Use fast mode if only 1 CPU is online.
  126. *
  127. * It would be tempting to turn on fast-mode for full_mm_flush as well. But this
  128. * doesn't work because of speculative accesses and software prefetching: the page
  129. * table of "mm" may (and usually is) the currently active page table and even
  130. * though the kernel won't do any user-space accesses during the TLB shoot down, a
  131. * compiler might use speculation or lfetch.fault on what happens to be a valid
  132. * user-space address. This in turn could trigger a TLB miss fault (or a VHPT
  133. * walk) and re-insert a TLB entry we just removed. Slow mode avoids such
  134. * problems. (We could make fast-mode work by switching the current task to a
  135. * different "mm" during the shootdown.) --davidm 08/02/2002
  136. */
  137. tlb->nr = (num_online_cpus() == 1) ? ~0U : 0;
  138. tlb->fullmm = full_mm_flush;
  139. tlb->freed = 0;
  140. tlb->start_addr = ~0UL;
  141. return tlb;
  142. }
  143. /*
  144. * Called at the end of the shootdown operation to free up any resources that were
  145. * collected. The page table lock is still held at this point.
  146. */
  147. static inline void
  148. tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
  149. {
  150. unsigned long freed = tlb->freed;
  151. struct mm_struct *mm = tlb->mm;
  152. unsigned long rss = get_mm_counter(mm, rss);
  153. if (rss < freed)
  154. freed = rss;
  155. add_mm_counter(mm, rss, -freed);
  156. /*
  157. * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and
  158. * tlb->end_addr.
  159. */
  160. ia64_tlb_flush_mmu(tlb, start, end);
  161. /* keep the page table cache within bounds */
  162. check_pgt_cache();
  163. }
  164. static inline unsigned int
  165. tlb_is_full_mm(struct mmu_gather *tlb)
  166. {
  167. return tlb->fullmm;
  168. }
  169. /*
  170. * Logically, this routine frees PAGE. On MP machines, the actual freeing of the page
  171. * must be delayed until after the TLB has been flushed (see comments at the beginning of
  172. * this file).
  173. */
  174. static inline void
  175. tlb_remove_page (struct mmu_gather *tlb, struct page *page)
  176. {
  177. tlb->need_flush = 1;
  178. if (tlb_fast_mode(tlb)) {
  179. free_page_and_swap_cache(page);
  180. return;
  181. }
  182. tlb->pages[tlb->nr++] = page;
  183. if (tlb->nr >= FREE_PTE_NR)
  184. ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
  185. }
  186. /*
  187. * Remove TLB entry for PTE mapped at virtual address ADDRESS. This is called for any
  188. * PTE, not just those pointing to (normal) physical memory.
  189. */
  190. static inline void
  191. __tlb_remove_tlb_entry (struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
  192. {
  193. if (tlb->start_addr == ~0UL)
  194. tlb->start_addr = address;
  195. tlb->end_addr = address + PAGE_SIZE;
  196. }
  197. #define tlb_migrate_finish(mm) platform_tlb_migrate_finish(mm)
  198. #define tlb_start_vma(tlb, vma) do { } while (0)
  199. #define tlb_end_vma(tlb, vma) do { } while (0)
  200. #define tlb_remove_tlb_entry(tlb, ptep, addr) \
  201. do { \
  202. tlb->need_flush = 1; \
  203. __tlb_remove_tlb_entry(tlb, ptep, addr); \
  204. } while (0)
  205. #define pte_free_tlb(tlb, ptep) \
  206. do { \
  207. tlb->need_flush = 1; \
  208. __pte_free_tlb(tlb, ptep); \
  209. } while (0)
  210. #define pmd_free_tlb(tlb, ptep) \
  211. do { \
  212. tlb->need_flush = 1; \
  213. __pmd_free_tlb(tlb, ptep); \
  214. } while (0)
  215. #define pud_free_tlb(tlb, pudp) \
  216. do { \
  217. tlb->need_flush = 1; \
  218. __pud_free_tlb(tlb, pudp); \
  219. } while (0)
  220. #endif /* _ASM_IA64_TLB_H */