mca.h 5.0 KB

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  1. /*
  2. * File: mca.h
  3. * Purpose: Machine check handling specific defines
  4. *
  5. * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
  6. * Copyright (C) Vijay Chander (vijay@engr.sgi.com)
  7. * Copyright (C) Srinivasa Thirumalachar (sprasad@engr.sgi.com)
  8. * Copyright (C) Russ Anderson (rja@sgi.com)
  9. */
  10. #ifndef _ASM_IA64_MCA_H
  11. #define _ASM_IA64_MCA_H
  12. #if !defined(__ASSEMBLY__)
  13. #include <linux/interrupt.h>
  14. #include <linux/types.h>
  15. #include <asm/param.h>
  16. #include <asm/sal.h>
  17. #include <asm/processor.h>
  18. #include <asm/mca_asm.h>
  19. #define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
  20. typedef struct ia64_fptr {
  21. unsigned long fp;
  22. unsigned long gp;
  23. } ia64_fptr_t;
  24. typedef union cmcv_reg_u {
  25. u64 cmcv_regval;
  26. struct {
  27. u64 cmcr_vector : 8;
  28. u64 cmcr_reserved1 : 4;
  29. u64 cmcr_ignored1 : 1;
  30. u64 cmcr_reserved2 : 3;
  31. u64 cmcr_mask : 1;
  32. u64 cmcr_ignored2 : 47;
  33. } cmcv_reg_s;
  34. } cmcv_reg_t;
  35. #define cmcv_mask cmcv_reg_s.cmcr_mask
  36. #define cmcv_vector cmcv_reg_s.cmcr_vector
  37. enum {
  38. IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
  39. IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
  40. IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
  41. };
  42. /* Information maintained by the MC infrastructure */
  43. typedef struct ia64_mc_info_s {
  44. u64 imi_mca_handler;
  45. size_t imi_mca_handler_size;
  46. u64 imi_monarch_init_handler;
  47. size_t imi_monarch_init_handler_size;
  48. u64 imi_slave_init_handler;
  49. size_t imi_slave_init_handler_size;
  50. u8 imi_rendez_checkin[NR_CPUS];
  51. } ia64_mc_info_t;
  52. /* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
  53. * Besides the handover state, it also contains some saved registers from the
  54. * time of the event.
  55. * Note: mca_asm.S depends on the precise layout of this structure.
  56. */
  57. struct ia64_sal_os_state {
  58. /* SAL to OS, must be at offset 0 */
  59. u64 os_gp; /* GP of the os registered with the SAL, physical */
  60. u64 pal_proc; /* PAL_PROC entry point, physical */
  61. u64 sal_proc; /* SAL_PROC entry point, physical */
  62. u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */
  63. u64 proc_state_param; /* from R18 */
  64. u64 monarch; /* 1 for a monarch event, 0 for a slave */
  65. /* common, must follow SAL to OS */
  66. u64 sal_ra; /* Return address in SAL, physical */
  67. u64 sal_gp; /* GP of the SAL - physical */
  68. pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
  69. u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
  70. struct task_struct *prev_task; /* previous task, NULL if it is not useful */
  71. /* Some interrupt registers are not saved in minstate, pt_regs or
  72. * switch_stack. Because MCA/INIT can occur when interrupts are
  73. * disabled, we need to save the additional interrupt registers over
  74. * MCA/INIT and resume.
  75. */
  76. u64 isr;
  77. u64 ifa;
  78. u64 itir;
  79. u64 iipa;
  80. u64 iim;
  81. u64 iha;
  82. /* OS to SAL, must follow common */
  83. u64 os_status; /* OS status to SAL, enum below */
  84. u64 context; /* 0 if return to same context
  85. 1 if return to new context */
  86. };
  87. enum {
  88. IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
  89. IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
  90. IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
  91. IA64_MCA_HALT = -3 /* System to be halted by SAL */
  92. };
  93. enum {
  94. IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
  95. IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
  96. };
  97. enum {
  98. IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
  99. IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
  100. };
  101. /* Per-CPU MCA state that is too big for normal per-CPU variables. */
  102. struct ia64_mca_cpu {
  103. u64 mca_stack[KERNEL_STACK_SIZE/8];
  104. u64 init_stack[KERNEL_STACK_SIZE/8];
  105. };
  106. /* Array of physical addresses of each CPU's MCA area. */
  107. extern unsigned long __per_cpu_mca[NR_CPUS];
  108. extern void ia64_mca_init(void);
  109. extern void ia64_mca_cpu_init(void *);
  110. extern void ia64_os_mca_dispatch(void);
  111. extern void ia64_os_mca_dispatch_end(void);
  112. extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
  113. extern void ia64_init_handler(struct pt_regs *,
  114. struct switch_stack *,
  115. struct ia64_sal_os_state *);
  116. extern void ia64_monarch_init_handler(void);
  117. extern void ia64_slave_init_handler(void);
  118. extern void ia64_mca_cmc_vector_setup(void);
  119. extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
  120. extern void ia64_unreg_MCA_extension(void);
  121. extern u64 ia64_get_rnat(u64 *);
  122. #else /* __ASSEMBLY__ */
  123. #define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
  124. #define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
  125. #define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
  126. #define IA64_MCA_HALT -3 /* System to be halted by SAL */
  127. #define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
  128. #define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
  129. #define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
  130. #define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
  131. #endif /* !__ASSEMBLY__ */
  132. #endif /* _ASM_IA64_MCA_H */