io.h 6.7 KB

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  1. /*
  2. * linux/include/asm-arm/arch-cl7500/io.h
  3. * from linux/include/asm-arm/arch-rpc/io.h
  4. *
  5. * Copyright (C) 1997 Russell King
  6. *
  7. * Modifications:
  8. * 06-Dec-1997 RMK Created.
  9. */
  10. #ifndef __ASM_ARM_ARCH_IO_H
  11. #define __ASM_ARM_ARCH_IO_H
  12. #define IO_SPACE_LIMIT 0xffffffff
  13. /*
  14. * GCC is totally crap at loading/storing data. We try to persuade it
  15. * to do the right thing by using these whereever possible instead of
  16. * the above.
  17. */
  18. #define __arch_base_getb(b,o) \
  19. ({ \
  20. unsigned int v, r = (b); \
  21. __asm__ __volatile__( \
  22. "ldrb %0, [%1, %2]" \
  23. : "=r" (v) \
  24. : "r" (r), "Ir" (o)); \
  25. v; \
  26. })
  27. #define __arch_base_getl(b,o) \
  28. ({ \
  29. unsigned int v, r = (b); \
  30. __asm__ __volatile__( \
  31. "ldr %0, [%1, %2]" \
  32. : "=r" (v) \
  33. : "r" (r), "Ir" (o)); \
  34. v; \
  35. })
  36. #define __arch_base_putb(v,b,o) \
  37. ({ \
  38. unsigned int r = (b); \
  39. __asm__ __volatile__( \
  40. "strb %0, [%1, %2]" \
  41. : \
  42. : "r" (v), "r" (r), "Ir" (o)); \
  43. })
  44. #define __arch_base_putl(v,b,o) \
  45. ({ \
  46. unsigned int r = (b); \
  47. __asm__ __volatile__( \
  48. "str %0, [%1, %2]" \
  49. : \
  50. : "r" (v), "r" (r), "Ir" (o)); \
  51. })
  52. /*
  53. * We use two different types of addressing - PC style addresses, and ARM
  54. * addresses. PC style accesses the PC hardware with the normal PC IO
  55. * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
  56. * and are translated to the start of IO. Note that all addresses are
  57. * shifted left!
  58. */
  59. #define __PORT_PCIO(x) (!((x) & 0x80000000))
  60. /*
  61. * Dynamic IO functions - let the compiler
  62. * optimize the expressions
  63. */
  64. static inline void __outb (unsigned int value, unsigned int port)
  65. {
  66. unsigned long temp;
  67. __asm__ __volatile__(
  68. "tst %2, #0x80000000\n\t"
  69. "mov %0, %4\n\t"
  70. "addeq %0, %0, %3\n\t"
  71. "strb %1, [%0, %2, lsl #2] @ outb"
  72. : "=&r" (temp)
  73. : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
  74. : "cc");
  75. }
  76. static inline void __outw (unsigned int value, unsigned int port)
  77. {
  78. unsigned long temp;
  79. __asm__ __volatile__(
  80. "tst %2, #0x80000000\n\t"
  81. "mov %0, %4\n\t"
  82. "addeq %0, %0, %3\n\t"
  83. "str %1, [%0, %2, lsl #2] @ outw"
  84. : "=&r" (temp)
  85. : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
  86. : "cc");
  87. }
  88. static inline void __outl (unsigned int value, unsigned int port)
  89. {
  90. unsigned long temp;
  91. __asm__ __volatile__(
  92. "tst %2, #0x80000000\n\t"
  93. "mov %0, %4\n\t"
  94. "addeq %0, %0, %3\n\t"
  95. "str %1, [%0, %2, lsl #2] @ outl"
  96. : "=&r" (temp)
  97. : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
  98. : "cc");
  99. }
  100. #define DECLARE_DYN_IN(sz,fnsuffix,instr) \
  101. static inline unsigned sz __in##fnsuffix (unsigned int port) \
  102. { \
  103. unsigned long temp, value; \
  104. __asm__ __volatile__( \
  105. "tst %2, #0x80000000\n\t" \
  106. "mov %0, %4\n\t" \
  107. "addeq %0, %0, %3\n\t" \
  108. "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
  109. : "=&r" (temp), "=r" (value) \
  110. : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
  111. : "cc"); \
  112. return (unsigned sz)value; \
  113. }
  114. static inline unsigned int __ioaddr (unsigned int port) \
  115. { \
  116. if (__PORT_PCIO(port)) \
  117. return (unsigned int)(PCIO_BASE + (port << 2)); \
  118. else \
  119. return (unsigned int)(IO_BASE + (port << 2)); \
  120. }
  121. #define DECLARE_IO(sz,fnsuffix,instr) \
  122. DECLARE_DYN_IN(sz,fnsuffix,instr)
  123. DECLARE_IO(char,b,"b")
  124. DECLARE_IO(short,w,"")
  125. DECLARE_IO(int,l,"")
  126. #undef DECLARE_IO
  127. #undef DECLARE_DYN_IN
  128. /*
  129. * Constant address IO functions
  130. *
  131. * These have to be macros for the 'J' constraint to work -
  132. * +/-4096 immediate operand.
  133. */
  134. #define __outbc(value,port) \
  135. ({ \
  136. if (__PORT_PCIO((port))) \
  137. __asm__ __volatile__( \
  138. "strb %0, [%1, %2] @ outbc" \
  139. : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  140. else \
  141. __asm__ __volatile__( \
  142. "strb %0, [%1, %2] @ outbc" \
  143. : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
  144. })
  145. #define __inbc(port) \
  146. ({ \
  147. unsigned char result; \
  148. if (__PORT_PCIO((port))) \
  149. __asm__ __volatile__( \
  150. "ldrb %0, [%1, %2] @ inbc" \
  151. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  152. else \
  153. __asm__ __volatile__( \
  154. "ldrb %0, [%1, %2] @ inbc" \
  155. : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
  156. result; \
  157. })
  158. #define __outwc(value,port) \
  159. ({ \
  160. unsigned long v = value; \
  161. if (__PORT_PCIO((port))) \
  162. __asm__ __volatile__( \
  163. "str %0, [%1, %2] @ outwc" \
  164. : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  165. else \
  166. __asm__ __volatile__( \
  167. "str %0, [%1, %2] @ outwc" \
  168. : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
  169. })
  170. #define __inwc(port) \
  171. ({ \
  172. unsigned short result; \
  173. if (__PORT_PCIO((port))) \
  174. __asm__ __volatile__( \
  175. "ldr %0, [%1, %2] @ inwc" \
  176. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  177. else \
  178. __asm__ __volatile__( \
  179. "ldr %0, [%1, %2] @ inwc" \
  180. : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
  181. result & 0xffff; \
  182. })
  183. #define __outlc(value,port) \
  184. ({ \
  185. unsigned long v = value; \
  186. if (__PORT_PCIO((port))) \
  187. __asm__ __volatile__( \
  188. "str %0, [%1, %2] @ outlc" \
  189. : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  190. else \
  191. __asm__ __volatile__( \
  192. "str %0, [%1, %2] @ outlc" \
  193. : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \
  194. })
  195. #define __inlc(port) \
  196. ({ \
  197. unsigned long result; \
  198. if (__PORT_PCIO((port))) \
  199. __asm__ __volatile__( \
  200. "ldr %0, [%1, %2] @ inlc" \
  201. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
  202. else \
  203. __asm__ __volatile__( \
  204. "ldr %0, [%1, %2] @ inlc" \
  205. : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
  206. result; \
  207. })
  208. #define __ioaddrc(port) \
  209. (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
  210. #define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
  211. #define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
  212. #define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
  213. #define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
  214. #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
  215. #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
  216. #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
  217. /* the following macro is deprecated */
  218. #define ioaddr(port) __ioaddr((port))
  219. #define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
  220. #define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
  221. #define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
  222. #define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
  223. /*
  224. * 1:1 mapping for ioremapped regions.
  225. */
  226. #define __mem_pci(x) (x)
  227. #endif