controlfb.c 27 KB

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  1. /*
  2. * controlfb.c -- frame buffer device for the PowerMac 'control' display
  3. *
  4. * Created 12 July 1998 by Dan Jacobowitz <dan@debian.org>
  5. * Copyright (C) 1998 Dan Jacobowitz
  6. * Copyright (C) 2001 Takashi Oe
  7. *
  8. * Mmap code by Michel Lanners <mlan@cpu.lu>
  9. *
  10. * Frame buffer structure from:
  11. * drivers/video/chipsfb.c -- frame buffer device for
  12. * Chips & Technologies 65550 chip.
  13. *
  14. * Copyright (C) 1998 Paul Mackerras
  15. *
  16. * This file is derived from the Powermac "chips" driver:
  17. * Copyright (C) 1997 Fabio Riccardi.
  18. * And from the frame buffer device for Open Firmware-initialized devices:
  19. * Copyright (C) 1997 Geert Uytterhoeven.
  20. *
  21. * Hardware information from:
  22. * control.c: Console support for PowerMac "control" display adaptor.
  23. * Copyright (C) 1996 Paul Mackerras
  24. *
  25. * Updated to 2.5 framebuffer API by Ben Herrenschmidt
  26. * <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>,
  27. * and James Simmons <jsimmons@infradead.org>.
  28. *
  29. * This file is subject to the terms and conditions of the GNU General Public
  30. * License. See the file COPYING in the main directory of this archive for
  31. * more details.
  32. */
  33. #include <linux/config.h>
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/errno.h>
  37. #include <linux/string.h>
  38. #include <linux/mm.h>
  39. #include <linux/tty.h>
  40. #include <linux/slab.h>
  41. #include <linux/vmalloc.h>
  42. #include <linux/delay.h>
  43. #include <linux/interrupt.h>
  44. #include <linux/fb.h>
  45. #include <linux/init.h>
  46. #include <linux/pci.h>
  47. #include <linux/nvram.h>
  48. #include <linux/adb.h>
  49. #include <linux/cuda.h>
  50. #include <asm/io.h>
  51. #include <asm/prom.h>
  52. #include <asm/pgtable.h>
  53. #include <asm/btext.h>
  54. #include "macmodes.h"
  55. #include "controlfb.h"
  56. struct fb_par_control {
  57. int vmode, cmode;
  58. int xres, yres;
  59. int vxres, vyres;
  60. int xoffset, yoffset;
  61. int pitch;
  62. struct control_regvals regvals;
  63. unsigned long sync;
  64. unsigned char ctrl;
  65. };
  66. #define DIRTY(z) ((x)->z != (y)->z)
  67. #define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))
  68. static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)
  69. {
  70. int i, results;
  71. results = 1;
  72. for (i = 0; i < 3; i++)
  73. results &= !DIRTY(regvals.clock_params[i]);
  74. if (!results)
  75. return 0;
  76. for (i = 0; i < 16; i++)
  77. results &= !DIRTY(regvals.regs[i]);
  78. if (!results)
  79. return 0;
  80. return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)
  81. && !DIRTY(vxres) && !DIRTY(vyres));
  82. }
  83. static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y)
  84. {
  85. return (!DIRTY(bits_per_pixel) && !DIRTY(xres)
  86. && !DIRTY(yres) && !DIRTY(xres_virtual)
  87. && !DIRTY(yres_virtual)
  88. && !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue));
  89. }
  90. struct fb_info_control {
  91. struct fb_info info;
  92. struct fb_par_control par;
  93. u32 pseudo_palette[17];
  94. struct cmap_regs __iomem *cmap_regs;
  95. unsigned long cmap_regs_phys;
  96. struct control_regs __iomem *control_regs;
  97. unsigned long control_regs_phys;
  98. unsigned long control_regs_size;
  99. __u8 __iomem *frame_buffer;
  100. unsigned long frame_buffer_phys;
  101. unsigned long fb_orig_base;
  102. unsigned long fb_orig_size;
  103. int control_use_bank2;
  104. unsigned long total_vram;
  105. unsigned char vram_attr;
  106. };
  107. /* control register access macro */
  108. #define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))
  109. /******************** Prototypes for exported functions ********************/
  110. /*
  111. * struct fb_ops
  112. */
  113. static int controlfb_pan_display(struct fb_var_screeninfo *var,
  114. struct fb_info *info);
  115. static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  116. u_int transp, struct fb_info *info);
  117. static int controlfb_blank(int blank_mode, struct fb_info *info);
  118. static int controlfb_mmap(struct fb_info *info, struct file *file,
  119. struct vm_area_struct *vma);
  120. static int controlfb_set_par (struct fb_info *info);
  121. static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info);
  122. /*
  123. * inititialization
  124. */
  125. int control_init(void);
  126. void control_setup(char *);
  127. /******************** Prototypes for internal functions **********************/
  128. static void set_control_clock(unsigned char *params);
  129. static int init_control(struct fb_info_control *p);
  130. static void control_set_hardware(struct fb_info_control *p,
  131. struct fb_par_control *par);
  132. static int control_of_init(struct device_node *dp);
  133. static void find_vram_size(struct fb_info_control *p);
  134. static int read_control_sense(struct fb_info_control *p);
  135. static int calc_clock_params(unsigned long clk, unsigned char *param);
  136. static int control_var_to_par(struct fb_var_screeninfo *var,
  137. struct fb_par_control *par, const struct fb_info *fb_info);
  138. static inline void control_par_to_var(struct fb_par_control *par,
  139. struct fb_var_screeninfo *var);
  140. static void control_init_info(struct fb_info *info, struct fb_info_control *p);
  141. static void control_cleanup(void);
  142. /************************** Internal variables *******************************/
  143. static struct fb_info_control *control_fb;
  144. static int default_vmode __initdata = VMODE_NVRAM;
  145. static int default_cmode __initdata = CMODE_NVRAM;
  146. static struct fb_ops controlfb_ops = {
  147. .owner = THIS_MODULE,
  148. .fb_check_var = controlfb_check_var,
  149. .fb_set_par = controlfb_set_par,
  150. .fb_setcolreg = controlfb_setcolreg,
  151. .fb_pan_display = controlfb_pan_display,
  152. .fb_blank = controlfb_blank,
  153. .fb_mmap = controlfb_mmap,
  154. .fb_fillrect = cfb_fillrect,
  155. .fb_copyarea = cfb_copyarea,
  156. .fb_imageblit = cfb_imageblit,
  157. .fb_cursor = soft_cursor,
  158. };
  159. /******************** The functions for controlfb_ops ********************/
  160. #ifdef MODULE
  161. MODULE_LICENSE("GPL");
  162. int init_module(void)
  163. {
  164. struct device_node *dp;
  165. dp = find_devices("control");
  166. if (dp != 0 && !control_of_init(dp))
  167. return 0;
  168. return -ENXIO;
  169. }
  170. void cleanup_module(void)
  171. {
  172. control_cleanup();
  173. }
  174. #endif
  175. /*
  176. * Checks a var structure
  177. */
  178. static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
  179. {
  180. struct fb_par_control par;
  181. int err;
  182. err = control_var_to_par(var, &par, info);
  183. if (err)
  184. return err;
  185. control_par_to_var(&par, var);
  186. return 0;
  187. }
  188. /*
  189. * Applies current var to display
  190. */
  191. static int controlfb_set_par (struct fb_info *info)
  192. {
  193. struct fb_info_control *p = (struct fb_info_control *) info;
  194. struct fb_par_control par;
  195. int err;
  196. if((err = control_var_to_par(&info->var, &par, info))) {
  197. printk (KERN_ERR "controlfb_set_par: error calling"
  198. " control_var_to_par: %d.\n", err);
  199. return err;
  200. }
  201. control_set_hardware(p, &par);
  202. info->fix.visual = (p->par.cmode == CMODE_8) ?
  203. FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
  204. info->fix.line_length = p->par.pitch;
  205. info->fix.xpanstep = 32 >> p->par.cmode;
  206. info->fix.ypanstep = 1;
  207. return 0;
  208. }
  209. /*
  210. * Set screen start address according to var offset values
  211. */
  212. static inline void set_screen_start(int xoffset, int yoffset,
  213. struct fb_info_control *p)
  214. {
  215. struct fb_par_control *par = &p->par;
  216. par->xoffset = xoffset;
  217. par->yoffset = yoffset;
  218. out_le32(CNTRL_REG(p,start_addr),
  219. par->yoffset * par->pitch + (par->xoffset << par->cmode));
  220. }
  221. static int controlfb_pan_display(struct fb_var_screeninfo *var,
  222. struct fb_info *info)
  223. {
  224. unsigned int xoffset, hstep;
  225. struct fb_info_control *p = (struct fb_info_control *)info;
  226. struct fb_par_control *par = &p->par;
  227. /*
  228. * make sure start addr will be 32-byte aligned
  229. */
  230. hstep = 0x1f >> par->cmode;
  231. xoffset = (var->xoffset + hstep) & ~hstep;
  232. if (xoffset+par->xres > par->vxres ||
  233. var->yoffset+par->yres > par->vyres)
  234. return -EINVAL;
  235. set_screen_start(xoffset, var->yoffset, p);
  236. return 0;
  237. }
  238. /*
  239. * Private mmap since we want to have a different caching on the framebuffer
  240. * for controlfb.
  241. * Note there's no locking in here; it's done in fb_mmap() in fbmem.c.
  242. */
  243. static int controlfb_mmap(struct fb_info *info, struct file *file,
  244. struct vm_area_struct *vma)
  245. {
  246. unsigned long off, start;
  247. u32 len;
  248. off = vma->vm_pgoff << PAGE_SHIFT;
  249. /* frame buffer memory */
  250. start = info->fix.smem_start;
  251. len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.smem_len);
  252. if (off >= len) {
  253. /* memory mapped io */
  254. off -= len;
  255. if (info->var.accel_flags)
  256. return -EINVAL;
  257. start = info->fix.mmio_start;
  258. len = PAGE_ALIGN((start & ~PAGE_MASK)+info->fix.mmio_len);
  259. pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE|_PAGE_GUARDED;
  260. } else {
  261. /* framebuffer */
  262. pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
  263. }
  264. start &= PAGE_MASK;
  265. if ((vma->vm_end - vma->vm_start + off) > len)
  266. return -EINVAL;
  267. off += start;
  268. vma->vm_pgoff = off >> PAGE_SHIFT;
  269. if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
  270. vma->vm_end - vma->vm_start, vma->vm_page_prot))
  271. return -EAGAIN;
  272. return 0;
  273. }
  274. static int controlfb_blank(int blank_mode, struct fb_info *info)
  275. {
  276. struct fb_info_control *p = (struct fb_info_control *) info;
  277. unsigned ctrl;
  278. ctrl = ld_le32(CNTRL_REG(p,ctrl));
  279. if (blank_mode > 0)
  280. switch (blank_mode) {
  281. case FB_BLANK_VSYNC_SUSPEND:
  282. ctrl &= ~3;
  283. break;
  284. case FB_BLANK_HSYNC_SUSPEND:
  285. ctrl &= ~0x30;
  286. break;
  287. case FB_BLANK_POWERDOWN:
  288. ctrl &= ~0x33;
  289. /* fall through */
  290. case FB_BLANK_NORMAL:
  291. ctrl |= 0x400;
  292. break;
  293. default:
  294. break;
  295. }
  296. else {
  297. ctrl &= ~0x400;
  298. ctrl |= 0x33;
  299. }
  300. out_le32(CNTRL_REG(p,ctrl), ctrl);
  301. return 0;
  302. }
  303. static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  304. u_int transp, struct fb_info *info)
  305. {
  306. struct fb_info_control *p = (struct fb_info_control *) info;
  307. __u8 r, g, b;
  308. if (regno > 255)
  309. return 1;
  310. r = red >> 8;
  311. g = green >> 8;
  312. b = blue >> 8;
  313. out_8(&p->cmap_regs->addr, regno); /* tell clut what addr to fill */
  314. out_8(&p->cmap_regs->lut, r); /* send one color channel at */
  315. out_8(&p->cmap_regs->lut, g); /* a time... */
  316. out_8(&p->cmap_regs->lut, b);
  317. if (regno < 16) {
  318. int i;
  319. switch (p->par.cmode) {
  320. case CMODE_16:
  321. p->pseudo_palette[regno] =
  322. (regno << 10) | (regno << 5) | regno;
  323. break;
  324. case CMODE_32:
  325. i = (regno << 8) | regno;
  326. p->pseudo_palette[regno] = (i << 16) | i;
  327. break;
  328. }
  329. }
  330. return 0;
  331. }
  332. /******************** End of controlfb_ops implementation ******************/
  333. static void set_control_clock(unsigned char *params)
  334. {
  335. #ifdef CONFIG_ADB_CUDA
  336. struct adb_request req;
  337. int i;
  338. for (i = 0; i < 3; ++i) {
  339. cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,
  340. 0x50, i + 1, params[i]);
  341. while (!req.complete)
  342. cuda_poll();
  343. }
  344. #endif
  345. }
  346. /*
  347. * finish off the driver initialization and register
  348. */
  349. static int __init init_control(struct fb_info_control *p)
  350. {
  351. int full, sense, vmode, cmode, vyres;
  352. struct fb_var_screeninfo var;
  353. int rc;
  354. printk(KERN_INFO "controlfb: ");
  355. full = p->total_vram == 0x400000;
  356. /* Try to pick a video mode out of NVRAM if we have one. */
  357. if (default_cmode == CMODE_NVRAM){
  358. cmode = nvram_read_byte(NV_CMODE);
  359. if(cmode < CMODE_8 || cmode > CMODE_32)
  360. cmode = CMODE_8;
  361. } else
  362. cmode=default_cmode;
  363. if (default_vmode == VMODE_NVRAM) {
  364. vmode = nvram_read_byte(NV_VMODE);
  365. if (vmode < 1 || vmode > VMODE_MAX ||
  366. control_mac_modes[vmode - 1].m[full] < cmode) {
  367. sense = read_control_sense(p);
  368. printk("Monitor sense value = 0x%x, ", sense);
  369. vmode = mac_map_monitor_sense(sense);
  370. if (control_mac_modes[vmode - 1].m[full] < cmode)
  371. vmode = VMODE_640_480_60;
  372. }
  373. } else {
  374. vmode=default_vmode;
  375. if (control_mac_modes[vmode - 1].m[full] < cmode) {
  376. if (cmode > CMODE_8)
  377. cmode--;
  378. else
  379. vmode = VMODE_640_480_60;
  380. }
  381. }
  382. /* Initialize info structure */
  383. control_init_info(&p->info, p);
  384. /* Setup default var */
  385. if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
  386. /* This shouldn't happen! */
  387. printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);
  388. try_again:
  389. vmode = VMODE_640_480_60;
  390. cmode = CMODE_8;
  391. if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
  392. printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");
  393. return -ENXIO;
  394. }
  395. printk(KERN_INFO "controlfb: ");
  396. }
  397. printk("using video mode %d and color mode %d.\n", vmode, cmode);
  398. vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);
  399. if (vyres > var.yres)
  400. var.yres_virtual = vyres;
  401. /* Apply default var */
  402. var.activate = FB_ACTIVATE_NOW;
  403. rc = fb_set_var(&p->info, &var);
  404. if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))
  405. goto try_again;
  406. /* Register with fbdev layer */
  407. if (register_framebuffer(&p->info) < 0)
  408. return -ENXIO;
  409. printk(KERN_INFO "fb%d: control display adapter\n", p->info.node);
  410. return 0;
  411. }
  412. #define RADACAL_WRITE(a,d) \
  413. out_8(&p->cmap_regs->addr, (a)); \
  414. out_8(&p->cmap_regs->dat, (d))
  415. /* Now how about actually saying, Make it so! */
  416. /* Some things in here probably don't need to be done each time. */
  417. static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)
  418. {
  419. struct control_regvals *r;
  420. volatile struct preg __iomem *rp;
  421. int i, cmode;
  422. if (PAR_EQUAL(&p->par, par)) {
  423. /*
  424. * check if only xoffset or yoffset differs.
  425. * this prevents flickers in typical VT switch case.
  426. */
  427. if (p->par.xoffset != par->xoffset ||
  428. p->par.yoffset != par->yoffset)
  429. set_screen_start(par->xoffset, par->yoffset, p);
  430. return;
  431. }
  432. p->par = *par;
  433. cmode = p->par.cmode;
  434. r = &par->regvals;
  435. /* Turn off display */
  436. out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);
  437. set_control_clock(r->clock_params);
  438. RADACAL_WRITE(0x20, r->radacal_ctrl);
  439. RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);
  440. RADACAL_WRITE(0x10, 0);
  441. RADACAL_WRITE(0x11, 0);
  442. rp = &p->control_regs->vswin;
  443. for (i = 0; i < 16; ++i, ++rp)
  444. out_le32(&rp->r, r->regs[i]);
  445. out_le32(CNTRL_REG(p,pitch), par->pitch);
  446. out_le32(CNTRL_REG(p,mode), r->mode);
  447. out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);
  448. out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch
  449. + (par->xoffset << cmode));
  450. out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);
  451. out_le32(CNTRL_REG(p,intr_ena), 0);
  452. /* Turn on display */
  453. out_le32(CNTRL_REG(p,ctrl), par->ctrl);
  454. #ifdef CONFIG_BOOTX_TEXT
  455. btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
  456. p->par.xres, p->par.yres,
  457. (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),
  458. p->par.pitch);
  459. #endif /* CONFIG_BOOTX_TEXT */
  460. }
  461. /*
  462. * Called from fbmem.c for probing & initializing
  463. */
  464. int __init control_init(void)
  465. {
  466. struct device_node *dp;
  467. char *option = NULL;
  468. if (fb_get_options("controlfb", &option))
  469. return -ENODEV;
  470. control_setup(option);
  471. dp = find_devices("control");
  472. if (dp != 0 && !control_of_init(dp))
  473. return 0;
  474. return -ENXIO;
  475. }
  476. module_init(control_init);
  477. /* Work out which banks of VRAM we have installed. */
  478. /* danj: I guess the card just ignores writes to nonexistant VRAM... */
  479. static void __init find_vram_size(struct fb_info_control *p)
  480. {
  481. int bank1, bank2;
  482. /*
  483. * Set VRAM in 2MB (bank 1) mode
  484. * VRAM Bank 2 will be accessible through offset 0x600000 if present
  485. * and VRAM Bank 1 will not respond at that offset even if present
  486. */
  487. out_le32(CNTRL_REG(p,vram_attr), 0x31);
  488. out_8(&p->frame_buffer[0x600000], 0xb3);
  489. out_8(&p->frame_buffer[0x600001], 0x71);
  490. asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000])
  491. : "memory" );
  492. mb();
  493. asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000])
  494. : "memory" );
  495. mb();
  496. bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)
  497. && (in_8(&p->frame_buffer[0x600001]) == 0x71);
  498. /*
  499. * Set VRAM in 2MB (bank 2) mode
  500. * VRAM Bank 1 will be accessible through offset 0x000000 if present
  501. * and VRAM Bank 2 will not respond at that offset even if present
  502. */
  503. out_le32(CNTRL_REG(p,vram_attr), 0x39);
  504. out_8(&p->frame_buffer[0], 0x5a);
  505. out_8(&p->frame_buffer[1], 0xc7);
  506. asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0])
  507. : "memory" );
  508. mb();
  509. asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0])
  510. : "memory" );
  511. mb();
  512. bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)
  513. && (in_8(&p->frame_buffer[1]) == 0xc7);
  514. if (bank2) {
  515. if (!bank1) {
  516. /*
  517. * vram bank 2 only
  518. */
  519. p->control_use_bank2 = 1;
  520. p->vram_attr = 0x39;
  521. p->frame_buffer += 0x600000;
  522. p->frame_buffer_phys += 0x600000;
  523. } else {
  524. /*
  525. * 4 MB vram
  526. */
  527. p->vram_attr = 0x51;
  528. }
  529. } else {
  530. /*
  531. * vram bank 1 only
  532. */
  533. p->vram_attr = 0x31;
  534. }
  535. p->total_vram = (bank1 + bank2) * 0x200000;
  536. printk(KERN_INFO "controlfb: VRAM Total = %dMB "
  537. "(%dMB @ bank 1, %dMB @ bank 2)\n",
  538. (bank1 + bank2) << 1, bank1 << 1, bank2 << 1);
  539. }
  540. /*
  541. * find "control" and initialize
  542. */
  543. static int __init control_of_init(struct device_node *dp)
  544. {
  545. struct fb_info_control *p;
  546. unsigned long addr;
  547. int i;
  548. if (control_fb) {
  549. printk(KERN_ERR "controlfb: only one control is supported\n");
  550. return -ENXIO;
  551. }
  552. if(dp->n_addrs != 2) {
  553. printk(KERN_ERR "expecting 2 address for control (got %d)", dp->n_addrs);
  554. return -ENXIO;
  555. }
  556. p = kmalloc(sizeof(*p), GFP_KERNEL);
  557. if (p == 0)
  558. return -ENXIO;
  559. control_fb = p; /* save it for cleanups */
  560. memset(p, 0, sizeof(*p));
  561. /* Map in frame buffer and registers */
  562. for (i = 0; i < dp->n_addrs; ++i) {
  563. addr = dp->addrs[i].address;
  564. if (dp->addrs[i].size >= 0x800000) {
  565. p->fb_orig_base = addr;
  566. p->fb_orig_size = dp->addrs[i].size;
  567. /* use the big-endian aperture (??) */
  568. p->frame_buffer_phys = addr + 0x800000;
  569. } else {
  570. p->control_regs_phys = addr;
  571. p->control_regs_size = dp->addrs[i].size;
  572. }
  573. }
  574. if (!p->fb_orig_base ||
  575. !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {
  576. p->fb_orig_base = 0;
  577. goto error_out;
  578. }
  579. /* map at most 8MB for the frame buffer */
  580. p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
  581. _PAGE_WRITETHRU);
  582. if (!p->control_regs_phys ||
  583. !request_mem_region(p->control_regs_phys, p->control_regs_size,
  584. "controlfb regs")) {
  585. p->control_regs_phys = 0;
  586. goto error_out;
  587. }
  588. p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);
  589. p->cmap_regs_phys = 0xf301b000; /* XXX not in prom? */
  590. if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {
  591. p->cmap_regs_phys = 0;
  592. goto error_out;
  593. }
  594. p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
  595. if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)
  596. goto error_out;
  597. find_vram_size(p);
  598. if (!p->total_vram)
  599. goto error_out;
  600. if (init_control(p) < 0)
  601. goto error_out;
  602. return 0;
  603. error_out:
  604. control_cleanup();
  605. return -ENXIO;
  606. }
  607. /*
  608. * Get the monitor sense value.
  609. * Note that this can be called before calibrate_delay,
  610. * so we can't use udelay.
  611. */
  612. static int read_control_sense(struct fb_info_control *p)
  613. {
  614. int sense;
  615. out_le32(CNTRL_REG(p,mon_sense), 7); /* drive all lines high */
  616. __delay(200);
  617. out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
  618. __delay(2000);
  619. sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;
  620. /* drive each sense line low in turn and collect the other 2 */
  621. out_le32(CNTRL_REG(p,mon_sense), 033); /* drive A low */
  622. __delay(2000);
  623. sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;
  624. out_le32(CNTRL_REG(p,mon_sense), 055); /* drive B low */
  625. __delay(2000);
  626. sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)
  627. | ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);
  628. out_le32(CNTRL_REG(p,mon_sense), 066); /* drive C low */
  629. __delay(2000);
  630. sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;
  631. out_le32(CNTRL_REG(p,mon_sense), 077); /* turn off drivers */
  632. return sense;
  633. }
  634. /********************** Various translation functions **********************/
  635. #define CONTROL_PIXCLOCK_BASE 256016
  636. #define CONTROL_PIXCLOCK_MIN 5000 /* ~ 200 MHz dot clock */
  637. /*
  638. * calculate the clock paramaters to be sent to CUDA according to given
  639. * pixclock in pico second.
  640. */
  641. static int calc_clock_params(unsigned long clk, unsigned char *param)
  642. {
  643. unsigned long p0, p1, p2, k, l, m, n, min;
  644. if (clk > (CONTROL_PIXCLOCK_BASE << 3))
  645. return 1;
  646. p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;
  647. l = clk << p2;
  648. p0 = 0;
  649. p1 = 0;
  650. for (k = 1, min = l; k < 32; k++) {
  651. unsigned long rem;
  652. m = CONTROL_PIXCLOCK_BASE * k;
  653. n = m / l;
  654. rem = m % l;
  655. if (n && (n < 128) && rem < min) {
  656. p0 = k;
  657. p1 = n;
  658. min = rem;
  659. }
  660. }
  661. if (!p0 || !p1)
  662. return 1;
  663. param[0] = p0;
  664. param[1] = p1;
  665. param[2] = p2;
  666. return 0;
  667. }
  668. /*
  669. * This routine takes a user-supplied var, and picks the best vmode/cmode
  670. * from it.
  671. */
  672. static int control_var_to_par(struct fb_var_screeninfo *var,
  673. struct fb_par_control *par, const struct fb_info *fb_info)
  674. {
  675. int cmode, piped_diff, hstep;
  676. unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,
  677. hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;
  678. unsigned long pixclock;
  679. struct fb_info_control *p = (struct fb_info_control *) fb_info;
  680. struct control_regvals *r = &par->regvals;
  681. switch (var->bits_per_pixel) {
  682. case 8:
  683. par->cmode = CMODE_8;
  684. if (p->total_vram > 0x200000) {
  685. r->mode = 3;
  686. r->radacal_ctrl = 0x20;
  687. piped_diff = 13;
  688. } else {
  689. r->mode = 2;
  690. r->radacal_ctrl = 0x10;
  691. piped_diff = 9;
  692. }
  693. break;
  694. case 15:
  695. case 16:
  696. par->cmode = CMODE_16;
  697. if (p->total_vram > 0x200000) {
  698. r->mode = 2;
  699. r->radacal_ctrl = 0x24;
  700. piped_diff = 5;
  701. } else {
  702. r->mode = 1;
  703. r->radacal_ctrl = 0x14;
  704. piped_diff = 3;
  705. }
  706. break;
  707. case 32:
  708. par->cmode = CMODE_32;
  709. if (p->total_vram > 0x200000) {
  710. r->mode = 1;
  711. r->radacal_ctrl = 0x28;
  712. } else {
  713. r->mode = 0;
  714. r->radacal_ctrl = 0x18;
  715. }
  716. piped_diff = 1;
  717. break;
  718. default:
  719. return -EINVAL;
  720. }
  721. /*
  722. * adjust xres and vxres so that the corresponding memory widths are
  723. * 32-byte aligned
  724. */
  725. hstep = 31 >> par->cmode;
  726. par->xres = (var->xres + hstep) & ~hstep;
  727. par->vxres = (var->xres_virtual + hstep) & ~hstep;
  728. par->xoffset = (var->xoffset + hstep) & ~hstep;
  729. if (par->vxres < par->xres)
  730. par->vxres = par->xres;
  731. par->pitch = par->vxres << par->cmode;
  732. par->yres = var->yres;
  733. par->vyres = var->yres_virtual;
  734. par->yoffset = var->yoffset;
  735. if (par->vyres < par->yres)
  736. par->vyres = par->yres;
  737. par->sync = var->sync;
  738. if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)
  739. return -EINVAL;
  740. if (par->xoffset + par->xres > par->vxres)
  741. par->xoffset = par->vxres - par->xres;
  742. if (par->yoffset + par->yres > par->vyres)
  743. par->yoffset = par->vyres - par->yres;
  744. pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:
  745. var->pixclock;
  746. if (calc_clock_params(pixclock, r->clock_params))
  747. return -EINVAL;
  748. hperiod = ((var->left_margin + par->xres + var->right_margin
  749. + var->hsync_len) >> 1) - 2;
  750. hssync = hperiod + 1;
  751. hsblank = hssync - (var->right_margin >> 1);
  752. hesync = (var->hsync_len >> 1) - 1;
  753. heblank = (var->left_margin >> 1) + hesync;
  754. piped = heblank - piped_diff;
  755. heq = var->hsync_len >> 2;
  756. hlfln = (hperiod+2) >> 1;
  757. hserr = hssync-hesync;
  758. vperiod = (var->vsync_len + var->lower_margin + par->yres
  759. + var->upper_margin) << 1;
  760. vssync = vperiod - 2;
  761. vesync = (var->vsync_len << 1) - vperiod + vssync;
  762. veblank = (var->upper_margin << 1) + vesync;
  763. vsblank = vssync - (var->lower_margin << 1);
  764. vswin = (vsblank+vssync) >> 1;
  765. vewin = (vesync+veblank) >> 1;
  766. r->regs[0] = vswin;
  767. r->regs[1] = vsblank;
  768. r->regs[2] = veblank;
  769. r->regs[3] = vewin;
  770. r->regs[4] = vesync;
  771. r->regs[5] = vssync;
  772. r->regs[6] = vperiod;
  773. r->regs[7] = piped;
  774. r->regs[8] = hperiod;
  775. r->regs[9] = hsblank;
  776. r->regs[10] = heblank;
  777. r->regs[11] = hesync;
  778. r->regs[12] = hssync;
  779. r->regs[13] = heq;
  780. r->regs[14] = hlfln;
  781. r->regs[15] = hserr;
  782. if (par->xres >= 1280 && par->cmode >= CMODE_16)
  783. par->ctrl = 0x7f;
  784. else
  785. par->ctrl = 0x3b;
  786. if (mac_var_to_vmode(var, &par->vmode, &cmode))
  787. par->vmode = 0;
  788. return 0;
  789. }
  790. /*
  791. * Convert hardware data in par to an fb_var_screeninfo
  792. */
  793. static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)
  794. {
  795. struct control_regints *rv;
  796. rv = (struct control_regints *) par->regvals.regs;
  797. memset(var, 0, sizeof(*var));
  798. var->xres = par->xres;
  799. var->yres = par->yres;
  800. var->xres_virtual = par->vxres;
  801. var->yres_virtual = par->vyres;
  802. var->xoffset = par->xoffset;
  803. var->yoffset = par->yoffset;
  804. switch(par->cmode) {
  805. default:
  806. case CMODE_8:
  807. var->bits_per_pixel = 8;
  808. var->red.length = 8;
  809. var->green.length = 8;
  810. var->blue.length = 8;
  811. break;
  812. case CMODE_16: /* RGB 555 */
  813. var->bits_per_pixel = 16;
  814. var->red.offset = 10;
  815. var->red.length = 5;
  816. var->green.offset = 5;
  817. var->green.length = 5;
  818. var->blue.length = 5;
  819. break;
  820. case CMODE_32: /* RGB 888 */
  821. var->bits_per_pixel = 32;
  822. var->red.offset = 16;
  823. var->red.length = 8;
  824. var->green.offset = 8;
  825. var->green.length = 8;
  826. var->blue.length = 8;
  827. var->transp.offset = 24;
  828. var->transp.length = 8;
  829. break;
  830. }
  831. var->height = -1;
  832. var->width = -1;
  833. var->vmode = FB_VMODE_NONINTERLACED;
  834. var->left_margin = (rv->heblank - rv->hesync) << 1;
  835. var->right_margin = (rv->hssync - rv->hsblank) << 1;
  836. var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;
  837. var->upper_margin = (rv->veblank - rv->vesync) >> 1;
  838. var->lower_margin = (rv->vssync - rv->vsblank) >> 1;
  839. var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;
  840. var->sync = par->sync;
  841. /*
  842. * 10^12 * clock_params[0] / (3906400 * clock_params[1]
  843. * * 2^clock_params[2])
  844. * (10^12 * clock_params[0] / (3906400 * clock_params[1]))
  845. * >> clock_params[2]
  846. */
  847. /* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */
  848. var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];
  849. var->pixclock /= par->regvals.clock_params[1];
  850. var->pixclock >>= par->regvals.clock_params[2];
  851. }
  852. /*
  853. * Set misc info vars for this driver
  854. */
  855. static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)
  856. {
  857. /* Fill fb_info */
  858. info->par = &p->par;
  859. info->fbops = &controlfb_ops;
  860. info->pseudo_palette = p->pseudo_palette;
  861. info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
  862. info->screen_base = p->frame_buffer + CTRLFB_OFF;
  863. fb_alloc_cmap(&info->cmap, 256, 0);
  864. /* Fill fix common fields */
  865. strcpy(info->fix.id, "control");
  866. info->fix.mmio_start = p->control_regs_phys;
  867. info->fix.mmio_len = sizeof(struct control_regs);
  868. info->fix.type = FB_TYPE_PACKED_PIXELS;
  869. info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;
  870. info->fix.smem_len = p->total_vram - CTRLFB_OFF;
  871. info->fix.ywrapstep = 0;
  872. info->fix.type_aux = 0;
  873. info->fix.accel = FB_ACCEL_NONE;
  874. }
  875. static void control_cleanup(void)
  876. {
  877. struct fb_info_control *p = control_fb;
  878. if (!p)
  879. return;
  880. if (p->cmap_regs)
  881. iounmap(p->cmap_regs);
  882. if (p->control_regs)
  883. iounmap(p->control_regs);
  884. if (p->frame_buffer) {
  885. if (p->control_use_bank2)
  886. p->frame_buffer -= 0x600000;
  887. iounmap(p->frame_buffer);
  888. }
  889. if (p->cmap_regs_phys)
  890. release_mem_region(p->cmap_regs_phys, 0x1000);
  891. if (p->control_regs_phys)
  892. release_mem_region(p->control_regs_phys, p->control_regs_size);
  893. if (p->fb_orig_base)
  894. release_mem_region(p->fb_orig_base, p->fb_orig_size);
  895. kfree(p);
  896. }
  897. /*
  898. * Parse user speficied options (`video=controlfb:')
  899. */
  900. void __init control_setup(char *options)
  901. {
  902. char *this_opt;
  903. if (!options || !*options)
  904. return;
  905. while ((this_opt = strsep(&options, ",")) != NULL) {
  906. if (!strncmp(this_opt, "vmode:", 6)) {
  907. int vmode = simple_strtoul(this_opt+6, NULL, 0);
  908. if (vmode > 0 && vmode <= VMODE_MAX &&
  909. control_mac_modes[vmode - 1].m[1] >= 0)
  910. default_vmode = vmode;
  911. } else if (!strncmp(this_opt, "cmode:", 6)) {
  912. int depth = simple_strtoul(this_opt+6, NULL, 0);
  913. switch (depth) {
  914. case CMODE_8:
  915. case CMODE_16:
  916. case CMODE_32:
  917. default_cmode = depth;
  918. break;
  919. case 8:
  920. default_cmode = CMODE_8;
  921. break;
  922. case 15:
  923. case 16:
  924. default_cmode = CMODE_16;
  925. break;
  926. case 24:
  927. case 32:
  928. default_cmode = CMODE_32;
  929. break;
  930. }
  931. }
  932. }
  933. }