bw2.c 9.9 KB

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  1. /* bw2.c: BWTWO frame buffer driver
  2. *
  3. * Copyright (C) 2003 David S. Miller (davem@redhat.com)
  4. * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
  5. * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
  6. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  7. *
  8. * Driver layout based loosely on tgafb.c, see that file for credits.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/errno.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/init.h>
  17. #include <linux/fb.h>
  18. #include <linux/mm.h>
  19. #include <asm/io.h>
  20. #include <asm/sbus.h>
  21. #include <asm/oplib.h>
  22. #include <asm/fbio.h>
  23. #ifdef CONFIG_SPARC32
  24. #include <asm/sun4paddr.h>
  25. #endif
  26. #include "sbuslib.h"
  27. /*
  28. * Local functions.
  29. */
  30. static int bw2_blank(int, struct fb_info *);
  31. static int bw2_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
  32. static int bw2_ioctl(struct inode *, struct file *, unsigned int,
  33. unsigned long, struct fb_info *);
  34. /*
  35. * Frame buffer operations
  36. */
  37. static struct fb_ops bw2_ops = {
  38. .owner = THIS_MODULE,
  39. .fb_blank = bw2_blank,
  40. .fb_fillrect = cfb_fillrect,
  41. .fb_copyarea = cfb_copyarea,
  42. .fb_imageblit = cfb_imageblit,
  43. .fb_mmap = bw2_mmap,
  44. .fb_ioctl = bw2_ioctl,
  45. .fb_cursor = soft_cursor,
  46. };
  47. /* OBio addresses for the bwtwo registers */
  48. #define BWTWO_REGISTER_OFFSET 0x400000
  49. struct bt_regs {
  50. volatile u32 addr;
  51. volatile u32 color_map;
  52. volatile u32 control;
  53. volatile u32 cursor;
  54. };
  55. struct bw2_regs {
  56. struct bt_regs cmap;
  57. volatile u8 control;
  58. volatile u8 status;
  59. volatile u8 cursor_start;
  60. volatile u8 cursor_end;
  61. volatile u8 h_blank_start;
  62. volatile u8 h_blank_end;
  63. volatile u8 h_sync_start;
  64. volatile u8 h_sync_end;
  65. volatile u8 comp_sync_end;
  66. volatile u8 v_blank_start_high;
  67. volatile u8 v_blank_start_low;
  68. volatile u8 v_blank_end;
  69. volatile u8 v_sync_start;
  70. volatile u8 v_sync_end;
  71. volatile u8 xfer_holdoff_start;
  72. volatile u8 xfer_holdoff_end;
  73. };
  74. /* Status Register Constants */
  75. #define BWTWO_SR_RES_MASK 0x70
  76. #define BWTWO_SR_1600_1280 0x50
  77. #define BWTWO_SR_1152_900_76_A 0x40
  78. #define BWTWO_SR_1152_900_76_B 0x60
  79. #define BWTWO_SR_ID_MASK 0x0f
  80. #define BWTWO_SR_ID_MONO 0x02
  81. #define BWTWO_SR_ID_MONO_ECL 0x03
  82. #define BWTWO_SR_ID_MSYNC 0x04
  83. #define BWTWO_SR_ID_NOCONN 0x0a
  84. /* Control Register Constants */
  85. #define BWTWO_CTL_ENABLE_INTS 0x80
  86. #define BWTWO_CTL_ENABLE_VIDEO 0x40
  87. #define BWTWO_CTL_ENABLE_TIMING 0x20
  88. #define BWTWO_CTL_ENABLE_CURCMP 0x10
  89. #define BWTWO_CTL_XTAL_MASK 0x0C
  90. #define BWTWO_CTL_DIVISOR_MASK 0x03
  91. /* Status Register Constants */
  92. #define BWTWO_STAT_PENDING_INT 0x80
  93. #define BWTWO_STAT_MSENSE_MASK 0x70
  94. #define BWTWO_STAT_ID_MASK 0x0f
  95. struct bw2_par {
  96. spinlock_t lock;
  97. struct bw2_regs __iomem *regs;
  98. u32 flags;
  99. #define BW2_FLAG_BLANKED 0x00000001
  100. unsigned long physbase;
  101. unsigned long fbsize;
  102. struct sbus_dev *sdev;
  103. struct list_head list;
  104. };
  105. /**
  106. * bw2_blank - Optional function. Blanks the display.
  107. * @blank_mode: the blank mode we want.
  108. * @info: frame buffer structure that represents a single frame buffer
  109. */
  110. static int
  111. bw2_blank(int blank, struct fb_info *info)
  112. {
  113. struct bw2_par *par = (struct bw2_par *) info->par;
  114. struct bw2_regs __iomem *regs = par->regs;
  115. unsigned long flags;
  116. u8 val;
  117. spin_lock_irqsave(&par->lock, flags);
  118. switch (blank) {
  119. case FB_BLANK_UNBLANK: /* Unblanking */
  120. val = sbus_readb(&regs->control);
  121. val |= BWTWO_CTL_ENABLE_VIDEO;
  122. sbus_writeb(val, &regs->control);
  123. par->flags &= ~BW2_FLAG_BLANKED;
  124. break;
  125. case FB_BLANK_NORMAL: /* Normal blanking */
  126. case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
  127. case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
  128. case FB_BLANK_POWERDOWN: /* Poweroff */
  129. val = sbus_readb(&regs->control);
  130. val &= ~BWTWO_CTL_ENABLE_VIDEO;
  131. sbus_writeb(val, &regs->control);
  132. par->flags |= BW2_FLAG_BLANKED;
  133. break;
  134. }
  135. spin_unlock_irqrestore(&par->lock, flags);
  136. return 0;
  137. }
  138. static struct sbus_mmap_map bw2_mmap_map[] = {
  139. {
  140. .size = SBUS_MMAP_FBSIZE(1)
  141. },
  142. { .size = 0 }
  143. };
  144. static int bw2_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
  145. {
  146. struct bw2_par *par = (struct bw2_par *)info->par;
  147. return sbusfb_mmap_helper(bw2_mmap_map,
  148. par->physbase, par->fbsize,
  149. (par->sdev ?
  150. par->sdev->reg_addrs[0].which_io :
  151. 0),
  152. vma);
  153. }
  154. static int bw2_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
  155. unsigned long arg, struct fb_info *info)
  156. {
  157. struct bw2_par *par = (struct bw2_par *) info->par;
  158. return sbusfb_ioctl_helper(cmd, arg, info,
  159. FBTYPE_SUN2BW, 1, par->fbsize);
  160. }
  161. /*
  162. * Initialisation
  163. */
  164. static void
  165. bw2_init_fix(struct fb_info *info, int linebytes)
  166. {
  167. strlcpy(info->fix.id, "bwtwo", sizeof(info->fix.id));
  168. info->fix.type = FB_TYPE_PACKED_PIXELS;
  169. info->fix.visual = FB_VISUAL_MONO01;
  170. info->fix.line_length = linebytes;
  171. info->fix.accel = FB_ACCEL_SUN_BWTWO;
  172. }
  173. static u8 bw2regs_1600[] __initdata = {
  174. 0x14, 0x8b, 0x15, 0x28, 0x16, 0x03, 0x17, 0x13,
  175. 0x18, 0x7b, 0x19, 0x05, 0x1a, 0x34, 0x1b, 0x2e,
  176. 0x1c, 0x00, 0x1d, 0x0a, 0x1e, 0xff, 0x1f, 0x01,
  177. 0x10, 0x21, 0
  178. };
  179. static u8 bw2regs_ecl[] __initdata = {
  180. 0x14, 0x65, 0x15, 0x1e, 0x16, 0x04, 0x17, 0x0c,
  181. 0x18, 0x5e, 0x19, 0x03, 0x1a, 0xa7, 0x1b, 0x23,
  182. 0x1c, 0x00, 0x1d, 0x08, 0x1e, 0xff, 0x1f, 0x01,
  183. 0x10, 0x20, 0
  184. };
  185. static u8 bw2regs_analog[] __initdata = {
  186. 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x03, 0x17, 0x13,
  187. 0x18, 0xb0, 0x19, 0x03, 0x1a, 0xa6, 0x1b, 0x22,
  188. 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
  189. 0x10, 0x20, 0
  190. };
  191. static u8 bw2regs_76hz[] __initdata = {
  192. 0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f,
  193. 0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a,
  194. 0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01,
  195. 0x10, 0x24, 0
  196. };
  197. static u8 bw2regs_66hz[] __initdata = {
  198. 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14,
  199. 0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24,
  200. 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01,
  201. 0x10, 0x20, 0
  202. };
  203. static void bw2_do_default_mode(struct bw2_par *par, struct fb_info *info,
  204. int *linebytes)
  205. {
  206. u8 status, mon;
  207. u8 *p;
  208. status = sbus_readb(&par->regs->status);
  209. mon = status & BWTWO_SR_RES_MASK;
  210. switch (status & BWTWO_SR_ID_MASK) {
  211. case BWTWO_SR_ID_MONO_ECL:
  212. if (mon == BWTWO_SR_1600_1280) {
  213. p = bw2regs_1600;
  214. info->var.xres = info->var.xres_virtual = 1600;
  215. info->var.yres = info->var.yres_virtual = 1280;
  216. *linebytes = 1600 / 8;
  217. } else
  218. p = bw2regs_ecl;
  219. break;
  220. case BWTWO_SR_ID_MONO:
  221. p = bw2regs_analog;
  222. break;
  223. case BWTWO_SR_ID_MSYNC:
  224. if (mon == BWTWO_SR_1152_900_76_A ||
  225. mon == BWTWO_SR_1152_900_76_B)
  226. p = bw2regs_76hz;
  227. else
  228. p = bw2regs_66hz;
  229. break;
  230. case BWTWO_SR_ID_NOCONN:
  231. return;
  232. default:
  233. prom_printf("bw2: can't handle SR %02x\n",
  234. status);
  235. prom_halt();
  236. }
  237. for ( ; *p; p += 2) {
  238. u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]];
  239. sbus_writeb(p[1], regp);
  240. }
  241. }
  242. struct all_info {
  243. struct fb_info info;
  244. struct bw2_par par;
  245. struct list_head list;
  246. };
  247. static LIST_HEAD(bw2_list);
  248. static void bw2_init_one(struct sbus_dev *sdev)
  249. {
  250. struct all_info *all;
  251. struct resource *resp;
  252. #ifdef CONFIG_SUN4
  253. struct resource res;
  254. #endif
  255. int linebytes;
  256. all = kmalloc(sizeof(*all), GFP_KERNEL);
  257. if (!all) {
  258. printk(KERN_ERR "bw2: Cannot allocate memory.\n");
  259. return;
  260. }
  261. memset(all, 0, sizeof(*all));
  262. INIT_LIST_HEAD(&all->list);
  263. spin_lock_init(&all->par.lock);
  264. all->par.sdev = sdev;
  265. #ifdef CONFIG_SUN4
  266. if (!sdev) {
  267. all->par.physbase = sun4_bwtwo_physaddr;
  268. res.start = sun4_bwtwo_physaddr;
  269. res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1;
  270. res.flags = IORESOURCE_IO;
  271. resp = &res;
  272. all->info.var.xres = all->info.var.xres_virtual = 1152;
  273. all->info.var.yres = all->info.var.yres_virtual = 900;
  274. all->info.var.bits_per_pixel = 1;
  275. linebytes = 1152 / 8;
  276. } else
  277. #else
  278. {
  279. if (!sdev)
  280. BUG();
  281. all->par.physbase = sdev->reg_addrs[0].phys_addr;
  282. resp = &sdev->resource[0];
  283. sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
  284. linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
  285. all->info.var.xres);
  286. }
  287. #endif
  288. all->info.var.red.length = all->info.var.green.length =
  289. all->info.var.blue.length = all->info.var.bits_per_pixel;
  290. all->info.var.red.offset = all->info.var.green.offset =
  291. all->info.var.blue.offset = 0;
  292. all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET,
  293. sizeof(struct bw2_regs), "bw2 regs");
  294. if (sdev && !prom_getbool(sdev->prom_node, "width"))
  295. bw2_do_default_mode(&all->par, &all->info, &linebytes);
  296. all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
  297. all->info.flags = FBINFO_DEFAULT;
  298. all->info.fbops = &bw2_ops;
  299. #if defined(CONFIG_SPARC32)
  300. if (sdev)
  301. all->info.screen_base = (char __iomem *)
  302. prom_getintdefault(sdev->prom_node, "address", 0);
  303. #endif
  304. if (!all->info.screen_base)
  305. all->info.screen_base =
  306. sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
  307. all->info.par = &all->par;
  308. bw2_blank(0, &all->info);
  309. bw2_init_fix(&all->info, linebytes);
  310. if (register_framebuffer(&all->info) < 0) {
  311. printk(KERN_ERR "bw2: Could not register framebuffer.\n");
  312. kfree(all);
  313. return;
  314. }
  315. list_add(&all->list, &bw2_list);
  316. printk("bw2: bwtwo at %lx:%lx\n",
  317. (long) (sdev ? sdev->reg_addrs[0].which_io : 0),
  318. (long) all->par.physbase);
  319. }
  320. int __init bw2_init(void)
  321. {
  322. struct sbus_bus *sbus;
  323. struct sbus_dev *sdev;
  324. if (fb_get_options("bw2fb", NULL))
  325. return -ENODEV;
  326. #ifdef CONFIG_SUN4
  327. bw2_init_one(NULL);
  328. #endif
  329. for_all_sbusdev(sdev, sbus) {
  330. if (!strcmp(sdev->prom_name, "bwtwo"))
  331. bw2_init_one(sdev);
  332. }
  333. return 0;
  334. }
  335. void __exit bw2_exit(void)
  336. {
  337. struct list_head *pos, *tmp;
  338. list_for_each_safe(pos, tmp, &bw2_list) {
  339. struct all_info *all = list_entry(pos, typeof(*all), list);
  340. unregister_framebuffer(&all->info);
  341. kfree(all);
  342. }
  343. }
  344. int __init
  345. bw2_setup(char *arg)
  346. {
  347. /* No cmdline options yet... */
  348. return 0;
  349. }
  350. module_init(bw2_init);
  351. #ifdef MODULE
  352. module_exit(bw2_exit);
  353. #endif
  354. MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
  355. MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
  356. MODULE_LICENSE("GPL");