asix.c 24 KB

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  1. /*
  2. * ASIX AX8817X based USB 2.0 Ethernet Devices
  3. * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
  4. * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
  5. * Copyright (c) 2002-2003 TiVo Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. // #define DEBUG // error path messages, extra info
  22. // #define VERBOSE // more; success messages
  23. #include <linux/config.h>
  24. #ifdef CONFIG_USB_DEBUG
  25. # define DEBUG
  26. #endif
  27. #include <linux/module.h>
  28. #include <linux/kmod.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/netdevice.h>
  32. #include <linux/etherdevice.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/workqueue.h>
  35. #include <linux/mii.h>
  36. #include <linux/usb.h>
  37. #include <linux/crc32.h>
  38. #include "usbnet.h"
  39. /* ASIX AX8817X based USB 2.0 Ethernet Devices */
  40. #define AX_CMD_SET_SW_MII 0x06
  41. #define AX_CMD_READ_MII_REG 0x07
  42. #define AX_CMD_WRITE_MII_REG 0x08
  43. #define AX_CMD_SET_HW_MII 0x0a
  44. #define AX_CMD_READ_EEPROM 0x0b
  45. #define AX_CMD_WRITE_EEPROM 0x0c
  46. #define AX_CMD_WRITE_ENABLE 0x0d
  47. #define AX_CMD_WRITE_DISABLE 0x0e
  48. #define AX_CMD_WRITE_RX_CTL 0x10
  49. #define AX_CMD_READ_IPG012 0x11
  50. #define AX_CMD_WRITE_IPG0 0x12
  51. #define AX_CMD_WRITE_IPG1 0x13
  52. #define AX_CMD_WRITE_IPG2 0x14
  53. #define AX_CMD_WRITE_MULTI_FILTER 0x16
  54. #define AX_CMD_READ_NODE_ID 0x17
  55. #define AX_CMD_READ_PHY_ID 0x19
  56. #define AX_CMD_READ_MEDIUM_STATUS 0x1a
  57. #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
  58. #define AX_CMD_READ_MONITOR_MODE 0x1c
  59. #define AX_CMD_WRITE_MONITOR_MODE 0x1d
  60. #define AX_CMD_WRITE_GPIOS 0x1f
  61. #define AX_CMD_SW_RESET 0x20
  62. #define AX_CMD_SW_PHY_STATUS 0x21
  63. #define AX_CMD_SW_PHY_SELECT 0x22
  64. #define AX88772_CMD_READ_NODE_ID 0x13
  65. #define AX_MONITOR_MODE 0x01
  66. #define AX_MONITOR_LINK 0x02
  67. #define AX_MONITOR_MAGIC 0x04
  68. #define AX_MONITOR_HSFS 0x10
  69. /* AX88172 Medium Status Register values */
  70. #define AX_MEDIUM_FULL_DUPLEX 0x02
  71. #define AX_MEDIUM_TX_ABORT_ALLOW 0x04
  72. #define AX_MEDIUM_FLOW_CONTROL_EN 0x10
  73. #define AX_MCAST_FILTER_SIZE 8
  74. #define AX_MAX_MCAST 64
  75. #define AX_EEPROM_LEN 0x40
  76. #define AX_SWRESET_CLEAR 0x00
  77. #define AX_SWRESET_RR 0x01
  78. #define AX_SWRESET_RT 0x02
  79. #define AX_SWRESET_PRTE 0x04
  80. #define AX_SWRESET_PRL 0x08
  81. #define AX_SWRESET_BZ 0x10
  82. #define AX_SWRESET_IPRL 0x20
  83. #define AX_SWRESET_IPPD 0x40
  84. #define AX88772_IPG0_DEFAULT 0x15
  85. #define AX88772_IPG1_DEFAULT 0x0c
  86. #define AX88772_IPG2_DEFAULT 0x12
  87. #define AX88772_MEDIUM_FULL_DUPLEX 0x0002
  88. #define AX88772_MEDIUM_RESERVED 0x0004
  89. #define AX88772_MEDIUM_RX_FC_ENABLE 0x0010
  90. #define AX88772_MEDIUM_TX_FC_ENABLE 0x0020
  91. #define AX88772_MEDIUM_PAUSE_FORMAT 0x0080
  92. #define AX88772_MEDIUM_RX_ENABLE 0x0100
  93. #define AX88772_MEDIUM_100MB 0x0200
  94. #define AX88772_MEDIUM_DEFAULT \
  95. (AX88772_MEDIUM_FULL_DUPLEX | AX88772_MEDIUM_RX_FC_ENABLE | \
  96. AX88772_MEDIUM_TX_FC_ENABLE | AX88772_MEDIUM_100MB | \
  97. AX88772_MEDIUM_RESERVED | AX88772_MEDIUM_RX_ENABLE )
  98. #define AX_EEPROM_MAGIC 0xdeadbeef
  99. /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
  100. struct ax8817x_data {
  101. u8 multi_filter[AX_MCAST_FILTER_SIZE];
  102. };
  103. struct ax88172_int_data {
  104. u16 res1;
  105. u8 link;
  106. u16 res2;
  107. u8 status;
  108. u16 res3;
  109. } __attribute__ ((packed));
  110. static int ax8817x_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  111. u16 size, void *data)
  112. {
  113. return usb_control_msg(
  114. dev->udev,
  115. usb_rcvctrlpipe(dev->udev, 0),
  116. cmd,
  117. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  118. value,
  119. index,
  120. data,
  121. size,
  122. USB_CTRL_GET_TIMEOUT);
  123. }
  124. static int ax8817x_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  125. u16 size, void *data)
  126. {
  127. return usb_control_msg(
  128. dev->udev,
  129. usb_sndctrlpipe(dev->udev, 0),
  130. cmd,
  131. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  132. value,
  133. index,
  134. data,
  135. size,
  136. USB_CTRL_SET_TIMEOUT);
  137. }
  138. static void ax8817x_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
  139. {
  140. struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
  141. if (urb->status < 0)
  142. printk(KERN_DEBUG "ax8817x_async_cmd_callback() failed with %d",
  143. urb->status);
  144. kfree(req);
  145. usb_free_urb(urb);
  146. }
  147. static void ax8817x_status(struct usbnet *dev, struct urb *urb)
  148. {
  149. struct ax88172_int_data *event;
  150. int link;
  151. if (urb->actual_length < 8)
  152. return;
  153. event = urb->transfer_buffer;
  154. link = event->link & 0x01;
  155. if (netif_carrier_ok(dev->net) != link) {
  156. if (link) {
  157. netif_carrier_on(dev->net);
  158. usbnet_defer_kevent (dev, EVENT_LINK_RESET );
  159. } else
  160. netif_carrier_off(dev->net);
  161. devdbg(dev, "ax8817x - Link Status is: %d", link);
  162. }
  163. }
  164. static void
  165. ax8817x_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  166. u16 size, void *data)
  167. {
  168. struct usb_ctrlrequest *req;
  169. int status;
  170. struct urb *urb;
  171. if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
  172. devdbg(dev, "Error allocating URB in write_cmd_async!");
  173. return;
  174. }
  175. if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
  176. deverr(dev, "Failed to allocate memory for control request");
  177. usb_free_urb(urb);
  178. return;
  179. }
  180. req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
  181. req->bRequest = cmd;
  182. req->wValue = cpu_to_le16(value);
  183. req->wIndex = cpu_to_le16(index);
  184. req->wLength = cpu_to_le16(size);
  185. usb_fill_control_urb(urb, dev->udev,
  186. usb_sndctrlpipe(dev->udev, 0),
  187. (void *)req, data, size,
  188. ax8817x_async_cmd_callback, req);
  189. if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
  190. deverr(dev, "Error submitting the control message: status=%d",
  191. status);
  192. kfree(req);
  193. usb_free_urb(urb);
  194. }
  195. }
  196. static void ax8817x_set_multicast(struct net_device *net)
  197. {
  198. struct usbnet *dev = netdev_priv(net);
  199. struct ax8817x_data *data = (struct ax8817x_data *)&dev->data;
  200. u8 rx_ctl = 0x8c;
  201. if (net->flags & IFF_PROMISC) {
  202. rx_ctl |= 0x01;
  203. } else if (net->flags & IFF_ALLMULTI
  204. || net->mc_count > AX_MAX_MCAST) {
  205. rx_ctl |= 0x02;
  206. } else if (net->mc_count == 0) {
  207. /* just broadcast and directed */
  208. } else {
  209. /* We use the 20 byte dev->data
  210. * for our 8 byte filter buffer
  211. * to avoid allocating memory that
  212. * is tricky to free later */
  213. struct dev_mc_list *mc_list = net->mc_list;
  214. u32 crc_bits;
  215. int i;
  216. memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
  217. /* Build the multicast hash filter. */
  218. for (i = 0; i < net->mc_count; i++) {
  219. crc_bits =
  220. ether_crc(ETH_ALEN,
  221. mc_list->dmi_addr) >> 26;
  222. data->multi_filter[crc_bits >> 3] |=
  223. 1 << (crc_bits & 7);
  224. mc_list = mc_list->next;
  225. }
  226. ax8817x_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
  227. AX_MCAST_FILTER_SIZE, data->multi_filter);
  228. rx_ctl |= 0x10;
  229. }
  230. ax8817x_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
  231. }
  232. static int ax8817x_mdio_read(struct net_device *netdev, int phy_id, int loc)
  233. {
  234. struct usbnet *dev = netdev_priv(netdev);
  235. u16 res;
  236. u8 buf[1];
  237. ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, 0, 0, 0, &buf);
  238. ax8817x_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
  239. (__u16)loc, 2, (u16 *)&res);
  240. ax8817x_write_cmd(dev, AX_CMD_SET_HW_MII, 0, 0, 0, &buf);
  241. return res & 0xffff;
  242. }
  243. /* same as above, but converts resulting value to cpu byte order */
  244. static int ax8817x_mdio_read_le(struct net_device *netdev, int phy_id, int loc)
  245. {
  246. return le16_to_cpu(ax8817x_mdio_read(netdev,phy_id, loc));
  247. }
  248. static void
  249. ax8817x_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
  250. {
  251. struct usbnet *dev = netdev_priv(netdev);
  252. u16 res = val;
  253. u8 buf[1];
  254. ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII, 0, 0, 0, &buf);
  255. ax8817x_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id,
  256. (__u16)loc, 2, (u16 *)&res);
  257. ax8817x_write_cmd(dev, AX_CMD_SET_HW_MII, 0, 0, 0, &buf);
  258. }
  259. /* same as above, but converts new value to le16 byte order before writing */
  260. static void
  261. ax8817x_mdio_write_le(struct net_device *netdev, int phy_id, int loc, int val)
  262. {
  263. ax8817x_mdio_write( netdev, phy_id, loc, cpu_to_le16(val) );
  264. }
  265. static int ax88172_link_reset(struct usbnet *dev)
  266. {
  267. u16 lpa;
  268. u16 adv;
  269. u16 res;
  270. u8 mode;
  271. mode = AX_MEDIUM_TX_ABORT_ALLOW | AX_MEDIUM_FLOW_CONTROL_EN;
  272. lpa = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA);
  273. adv = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE);
  274. res = mii_nway_result(lpa|adv);
  275. if (res & LPA_DUPLEX)
  276. mode |= AX_MEDIUM_FULL_DUPLEX;
  277. ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
  278. return 0;
  279. }
  280. static void
  281. ax8817x_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  282. {
  283. struct usbnet *dev = netdev_priv(net);
  284. u8 opt;
  285. if (ax8817x_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
  286. wolinfo->supported = 0;
  287. wolinfo->wolopts = 0;
  288. return;
  289. }
  290. wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
  291. wolinfo->wolopts = 0;
  292. if (opt & AX_MONITOR_MODE) {
  293. if (opt & AX_MONITOR_LINK)
  294. wolinfo->wolopts |= WAKE_PHY;
  295. if (opt & AX_MONITOR_MAGIC)
  296. wolinfo->wolopts |= WAKE_MAGIC;
  297. }
  298. }
  299. static int
  300. ax8817x_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  301. {
  302. struct usbnet *dev = netdev_priv(net);
  303. u8 opt = 0;
  304. u8 buf[1];
  305. if (wolinfo->wolopts & WAKE_PHY)
  306. opt |= AX_MONITOR_LINK;
  307. if (wolinfo->wolopts & WAKE_MAGIC)
  308. opt |= AX_MONITOR_MAGIC;
  309. if (opt != 0)
  310. opt |= AX_MONITOR_MODE;
  311. if (ax8817x_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
  312. opt, 0, 0, &buf) < 0)
  313. return -EINVAL;
  314. return 0;
  315. }
  316. static int ax8817x_get_eeprom_len(struct net_device *net)
  317. {
  318. return AX_EEPROM_LEN;
  319. }
  320. static int ax8817x_get_eeprom(struct net_device *net,
  321. struct ethtool_eeprom *eeprom, u8 *data)
  322. {
  323. struct usbnet *dev = netdev_priv(net);
  324. u16 *ebuf = (u16 *)data;
  325. int i;
  326. /* Crude hack to ensure that we don't overwrite memory
  327. * if an odd length is supplied
  328. */
  329. if (eeprom->len % 2)
  330. return -EINVAL;
  331. eeprom->magic = AX_EEPROM_MAGIC;
  332. /* ax8817x returns 2 bytes from eeprom on read */
  333. for (i=0; i < eeprom->len / 2; i++) {
  334. if (ax8817x_read_cmd(dev, AX_CMD_READ_EEPROM,
  335. eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
  336. return -EINVAL;
  337. }
  338. return 0;
  339. }
  340. static void ax8817x_get_drvinfo (struct net_device *net,
  341. struct ethtool_drvinfo *info)
  342. {
  343. /* Inherit standard device info */
  344. usbnet_get_drvinfo(net, info);
  345. info->eedump_len = 0x3e;
  346. }
  347. static int ax8817x_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
  348. {
  349. struct usbnet *dev = netdev_priv(net);
  350. return mii_ethtool_gset(&dev->mii,cmd);
  351. }
  352. static int ax8817x_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
  353. {
  354. struct usbnet *dev = netdev_priv(net);
  355. return mii_ethtool_sset(&dev->mii,cmd);
  356. }
  357. /* We need to override some ethtool_ops so we require our
  358. own structure so we don't interfere with other usbnet
  359. devices that may be connected at the same time. */
  360. static struct ethtool_ops ax8817x_ethtool_ops = {
  361. .get_drvinfo = ax8817x_get_drvinfo,
  362. .get_link = ethtool_op_get_link,
  363. .get_msglevel = usbnet_get_msglevel,
  364. .set_msglevel = usbnet_set_msglevel,
  365. .get_wol = ax8817x_get_wol,
  366. .set_wol = ax8817x_set_wol,
  367. .get_eeprom_len = ax8817x_get_eeprom_len,
  368. .get_eeprom = ax8817x_get_eeprom,
  369. .get_settings = ax8817x_get_settings,
  370. .set_settings = ax8817x_set_settings,
  371. };
  372. static int ax8817x_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
  373. {
  374. struct usbnet *dev = netdev_priv(net);
  375. return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
  376. }
  377. static int ax8817x_bind(struct usbnet *dev, struct usb_interface *intf)
  378. {
  379. int ret = 0;
  380. void *buf;
  381. int i;
  382. unsigned long gpio_bits = dev->driver_info->data;
  383. usbnet_get_endpoints(dev,intf);
  384. buf = kmalloc(ETH_ALEN, GFP_KERNEL);
  385. if(!buf) {
  386. ret = -ENOMEM;
  387. goto out1;
  388. }
  389. /* Toggle the GPIOs in a manufacturer/model specific way */
  390. for (i = 2; i >= 0; i--) {
  391. if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_GPIOS,
  392. (gpio_bits >> (i * 8)) & 0xff, 0, 0,
  393. buf)) < 0)
  394. goto out2;
  395. msleep(5);
  396. }
  397. if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL,
  398. 0x80, 0, 0, buf)) < 0) {
  399. dbg("send AX_CMD_WRITE_RX_CTL failed: %d", ret);
  400. goto out2;
  401. }
  402. /* Get the MAC address */
  403. memset(buf, 0, ETH_ALEN);
  404. if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_NODE_ID,
  405. 0, 0, 6, buf)) < 0) {
  406. dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
  407. goto out2;
  408. }
  409. memcpy(dev->net->dev_addr, buf, ETH_ALEN);
  410. /* Get the PHY id */
  411. if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_PHY_ID,
  412. 0, 0, 2, buf)) < 0) {
  413. dbg("error on read AX_CMD_READ_PHY_ID: %02x", ret);
  414. goto out2;
  415. } else if (ret < 2) {
  416. /* this should always return 2 bytes */
  417. dbg("AX_CMD_READ_PHY_ID returned less than 2 bytes: ret=%02x",
  418. ret);
  419. ret = -EIO;
  420. goto out2;
  421. }
  422. /* Initialize MII structure */
  423. dev->mii.dev = dev->net;
  424. dev->mii.mdio_read = ax8817x_mdio_read;
  425. dev->mii.mdio_write = ax8817x_mdio_write;
  426. dev->mii.phy_id_mask = 0x3f;
  427. dev->mii.reg_num_mask = 0x1f;
  428. dev->mii.phy_id = *((u8 *)buf + 1);
  429. dev->net->do_ioctl = ax8817x_ioctl;
  430. dev->net->set_multicast_list = ax8817x_set_multicast;
  431. dev->net->ethtool_ops = &ax8817x_ethtool_ops;
  432. ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
  433. ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE,
  434. ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
  435. mii_nway_restart(&dev->mii);
  436. return 0;
  437. out2:
  438. kfree(buf);
  439. out1:
  440. return ret;
  441. }
  442. static struct ethtool_ops ax88772_ethtool_ops = {
  443. .get_drvinfo = ax8817x_get_drvinfo,
  444. .get_link = ethtool_op_get_link,
  445. .get_msglevel = usbnet_get_msglevel,
  446. .set_msglevel = usbnet_set_msglevel,
  447. .get_wol = ax8817x_get_wol,
  448. .set_wol = ax8817x_set_wol,
  449. .get_eeprom_len = ax8817x_get_eeprom_len,
  450. .get_eeprom = ax8817x_get_eeprom,
  451. .get_settings = ax8817x_get_settings,
  452. .set_settings = ax8817x_set_settings,
  453. };
  454. static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
  455. {
  456. int ret;
  457. void *buf;
  458. usbnet_get_endpoints(dev,intf);
  459. buf = kmalloc(6, GFP_KERNEL);
  460. if(!buf) {
  461. dbg ("Cannot allocate memory for buffer");
  462. ret = -ENOMEM;
  463. goto out1;
  464. }
  465. if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_GPIOS,
  466. 0x00B0, 0, 0, buf)) < 0)
  467. goto out2;
  468. msleep(5);
  469. if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
  470. 0x0001, 0, 0, buf)) < 0) {
  471. dbg("Select PHY #1 failed: %d", ret);
  472. goto out2;
  473. }
  474. if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, AX_SWRESET_IPPD,
  475. 0, 0, buf)) < 0) {
  476. dbg("Failed to power down internal PHY: %d", ret);
  477. goto out2;
  478. }
  479. msleep(150);
  480. if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, AX_SWRESET_CLEAR,
  481. 0, 0, buf)) < 0) {
  482. dbg("Failed to perform software reset: %d", ret);
  483. goto out2;
  484. }
  485. msleep(150);
  486. if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET,
  487. AX_SWRESET_IPRL | AX_SWRESET_PRL,
  488. 0, 0, buf)) < 0) {
  489. dbg("Failed to set Internal/External PHY reset control: %d",
  490. ret);
  491. goto out2;
  492. }
  493. msleep(150);
  494. if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL,
  495. 0x0000, 0, 0, buf)) < 0) {
  496. dbg("Failed to reset RX_CTL: %d", ret);
  497. goto out2;
  498. }
  499. /* Get the MAC address */
  500. memset(buf, 0, ETH_ALEN);
  501. if ((ret = ax8817x_read_cmd(dev, AX88772_CMD_READ_NODE_ID,
  502. 0, 0, ETH_ALEN, buf)) < 0) {
  503. dbg("Failed to read MAC address: %d", ret);
  504. goto out2;
  505. }
  506. memcpy(dev->net->dev_addr, buf, ETH_ALEN);
  507. if ((ret = ax8817x_write_cmd(dev, AX_CMD_SET_SW_MII,
  508. 0, 0, 0, buf)) < 0) {
  509. dbg("Enabling software MII failed: %d", ret);
  510. goto out2;
  511. }
  512. if (((ret = ax8817x_read_cmd(dev, AX_CMD_READ_MII_REG,
  513. 0x0010, 2, 2, buf)) < 0)
  514. || (*((u16 *)buf) != 0x003b)) {
  515. dbg("Read PHY register 2 must be 0x3b00: %d", ret);
  516. goto out2;
  517. }
  518. /* Initialize MII structure */
  519. dev->mii.dev = dev->net;
  520. dev->mii.mdio_read = ax8817x_mdio_read;
  521. dev->mii.mdio_write = ax8817x_mdio_write;
  522. dev->mii.phy_id_mask = 0xff;
  523. dev->mii.reg_num_mask = 0xff;
  524. dev->net->do_ioctl = ax8817x_ioctl;
  525. /* Get the PHY id */
  526. if ((ret = ax8817x_read_cmd(dev, AX_CMD_READ_PHY_ID,
  527. 0, 0, 2, buf)) < 0) {
  528. dbg("Error reading PHY ID: %02x", ret);
  529. goto out2;
  530. } else if (ret < 2) {
  531. /* this should always return 2 bytes */
  532. dbg("AX_CMD_READ_PHY_ID returned less than 2 bytes: ret=%02x",
  533. ret);
  534. ret = -EIO;
  535. goto out2;
  536. }
  537. dev->mii.phy_id = *((u8 *)buf + 1);
  538. if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET, AX_SWRESET_PRL,
  539. 0, 0, buf)) < 0) {
  540. dbg("Set external PHY reset pin level: %d", ret);
  541. goto out2;
  542. }
  543. msleep(150);
  544. if ((ret = ax8817x_write_cmd(dev, AX_CMD_SW_RESET,
  545. AX_SWRESET_IPRL | AX_SWRESET_PRL,
  546. 0, 0, buf)) < 0) {
  547. dbg("Set Internal/External PHY reset control: %d", ret);
  548. goto out2;
  549. }
  550. msleep(150);
  551. dev->net->set_multicast_list = ax8817x_set_multicast;
  552. dev->net->ethtool_ops = &ax88772_ethtool_ops;
  553. ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
  554. ax8817x_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE,
  555. ADVERTISE_ALL | ADVERTISE_CSMA);
  556. mii_nway_restart(&dev->mii);
  557. if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE,
  558. AX88772_MEDIUM_DEFAULT, 0, 0, buf)) < 0) {
  559. dbg("Write medium mode register: %d", ret);
  560. goto out2;
  561. }
  562. if ((ret = ax8817x_write_cmd(dev, AX_CMD_WRITE_IPG0,
  563. AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
  564. AX88772_IPG2_DEFAULT, 0, buf)) < 0) {
  565. dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
  566. goto out2;
  567. }
  568. if ((ret =
  569. ax8817x_write_cmd(dev, AX_CMD_SET_HW_MII, 0, 0, 0, &buf)) < 0) {
  570. dbg("Failed to set hardware MII: %02x", ret);
  571. goto out2;
  572. }
  573. /* Set RX_CTL to default values with 2k buffer, and enable cactus */
  574. if ((ret =
  575. ax8817x_write_cmd(dev, AX_CMD_WRITE_RX_CTL, 0x0088, 0, 0,
  576. buf)) < 0) {
  577. dbg("Reset RX_CTL failed: %d", ret);
  578. goto out2;
  579. }
  580. kfree(buf);
  581. /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
  582. if (dev->driver_info->flags & FLAG_FRAMING_AX) {
  583. /* hard_mtu is still the default - the device does not support
  584. jumbo eth frames */
  585. dev->rx_urb_size = 2048;
  586. }
  587. return 0;
  588. out2:
  589. kfree(buf);
  590. out1:
  591. return ret;
  592. }
  593. static int ax88772_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  594. {
  595. u8 *head;
  596. u32 header;
  597. char *packet;
  598. struct sk_buff *ax_skb;
  599. u16 size;
  600. head = (u8 *) skb->data;
  601. memcpy(&header, head, sizeof(header));
  602. le32_to_cpus(&header);
  603. packet = head + sizeof(header);
  604. skb_pull(skb, 4);
  605. while (skb->len > 0) {
  606. if ((short)(header & 0x0000ffff) !=
  607. ~((short)((header & 0xffff0000) >> 16))) {
  608. devdbg(dev,"header length data is error");
  609. }
  610. /* get the packet length */
  611. size = (u16) (header & 0x0000ffff);
  612. if ((skb->len) - ((size + 1) & 0xfffe) == 0)
  613. return 2;
  614. if (size > ETH_FRAME_LEN) {
  615. devdbg(dev,"invalid rx length %d", size);
  616. return 0;
  617. }
  618. ax_skb = skb_clone(skb, GFP_ATOMIC);
  619. if (ax_skb) {
  620. ax_skb->len = size;
  621. ax_skb->data = packet;
  622. ax_skb->tail = packet + size;
  623. usbnet_skb_return(dev, ax_skb);
  624. } else {
  625. return 0;
  626. }
  627. skb_pull(skb, (size + 1) & 0xfffe);
  628. if (skb->len == 0)
  629. break;
  630. head = (u8 *) skb->data;
  631. memcpy(&header, head, sizeof(header));
  632. le32_to_cpus(&header);
  633. packet = head + sizeof(header);
  634. skb_pull(skb, 4);
  635. }
  636. if (skb->len < 0) {
  637. devdbg(dev,"invalid rx length %d", skb->len);
  638. return 0;
  639. }
  640. return 1;
  641. }
  642. static struct sk_buff *ax88772_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
  643. unsigned flags)
  644. {
  645. int padlen;
  646. int headroom = skb_headroom(skb);
  647. int tailroom = skb_tailroom(skb);
  648. u32 packet_len;
  649. u32 padbytes = 0xffff0000;
  650. padlen = ((skb->len + 4) % 512) ? 0 : 4;
  651. if ((!skb_cloned(skb))
  652. && ((headroom + tailroom) >= (4 + padlen))) {
  653. if ((headroom < 4) || (tailroom < padlen)) {
  654. skb->data = memmove(skb->head + 4, skb->data, skb->len);
  655. skb->tail = skb->data + skb->len;
  656. }
  657. } else {
  658. struct sk_buff *skb2;
  659. skb2 = skb_copy_expand(skb, 4, padlen, flags);
  660. dev_kfree_skb_any(skb);
  661. skb = skb2;
  662. if (!skb)
  663. return NULL;
  664. }
  665. skb_push(skb, 4);
  666. packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
  667. memcpy(skb->data, &packet_len, sizeof(packet_len));
  668. if ((skb->len % 512) == 0) {
  669. memcpy( skb->tail, &padbytes, sizeof(padbytes));
  670. skb_put(skb, sizeof(padbytes));
  671. }
  672. return skb;
  673. }
  674. static int ax88772_link_reset(struct usbnet *dev)
  675. {
  676. u16 lpa;
  677. u16 adv;
  678. u16 res;
  679. u16 mode;
  680. mode = AX88772_MEDIUM_DEFAULT;
  681. lpa = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA);
  682. adv = ax8817x_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE);
  683. res = mii_nway_result(lpa|adv);
  684. if ((res & LPA_DUPLEX) == 0)
  685. mode &= ~AX88772_MEDIUM_FULL_DUPLEX;
  686. if ((res & LPA_100) == 0)
  687. mode &= ~AX88772_MEDIUM_100MB;
  688. ax8817x_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
  689. return 0;
  690. }
  691. static const struct driver_info ax8817x_info = {
  692. .description = "ASIX AX8817x USB 2.0 Ethernet",
  693. .bind = ax8817x_bind,
  694. .status = ax8817x_status,
  695. .link_reset = ax88172_link_reset,
  696. .reset = ax88172_link_reset,
  697. .flags = FLAG_ETHER,
  698. .data = 0x00130103,
  699. };
  700. static const struct driver_info dlink_dub_e100_info = {
  701. .description = "DLink DUB-E100 USB Ethernet",
  702. .bind = ax8817x_bind,
  703. .status = ax8817x_status,
  704. .link_reset = ax88172_link_reset,
  705. .reset = ax88172_link_reset,
  706. .flags = FLAG_ETHER,
  707. .data = 0x009f9d9f,
  708. };
  709. static const struct driver_info netgear_fa120_info = {
  710. .description = "Netgear FA-120 USB Ethernet",
  711. .bind = ax8817x_bind,
  712. .status = ax8817x_status,
  713. .link_reset = ax88172_link_reset,
  714. .reset = ax88172_link_reset,
  715. .flags = FLAG_ETHER,
  716. .data = 0x00130103,
  717. };
  718. static const struct driver_info hawking_uf200_info = {
  719. .description = "Hawking UF200 USB Ethernet",
  720. .bind = ax8817x_bind,
  721. .status = ax8817x_status,
  722. .link_reset = ax88172_link_reset,
  723. .reset = ax88172_link_reset,
  724. .flags = FLAG_ETHER,
  725. .data = 0x001f1d1f,
  726. };
  727. static const struct driver_info ax88772_info = {
  728. .description = "ASIX AX88772 USB 2.0 Ethernet",
  729. .bind = ax88772_bind,
  730. .status = ax8817x_status,
  731. .link_reset = ax88772_link_reset,
  732. .reset = ax88772_link_reset,
  733. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  734. .rx_fixup = ax88772_rx_fixup,
  735. .tx_fixup = ax88772_tx_fixup,
  736. .data = 0x00130103,
  737. };
  738. static const struct usb_device_id products [] = {
  739. {
  740. // Linksys USB200M
  741. USB_DEVICE (0x077b, 0x2226),
  742. .driver_info = (unsigned long) &ax8817x_info,
  743. }, {
  744. // Netgear FA120
  745. USB_DEVICE (0x0846, 0x1040),
  746. .driver_info = (unsigned long) &netgear_fa120_info,
  747. }, {
  748. // DLink DUB-E100
  749. USB_DEVICE (0x2001, 0x1a00),
  750. .driver_info = (unsigned long) &dlink_dub_e100_info,
  751. }, {
  752. // Intellinet, ST Lab USB Ethernet
  753. USB_DEVICE (0x0b95, 0x1720),
  754. .driver_info = (unsigned long) &ax8817x_info,
  755. }, {
  756. // Hawking UF200, TrendNet TU2-ET100
  757. USB_DEVICE (0x07b8, 0x420a),
  758. .driver_info = (unsigned long) &hawking_uf200_info,
  759. }, {
  760. // Billionton Systems, USB2AR
  761. USB_DEVICE (0x08dd, 0x90ff),
  762. .driver_info = (unsigned long) &ax8817x_info,
  763. }, {
  764. // ATEN UC210T
  765. USB_DEVICE (0x0557, 0x2009),
  766. .driver_info = (unsigned long) &ax8817x_info,
  767. }, {
  768. // Buffalo LUA-U2-KTX
  769. USB_DEVICE (0x0411, 0x003d),
  770. .driver_info = (unsigned long) &ax8817x_info,
  771. }, {
  772. // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
  773. USB_DEVICE (0x6189, 0x182d),
  774. .driver_info = (unsigned long) &ax8817x_info,
  775. }, {
  776. // corega FEther USB2-TX
  777. USB_DEVICE (0x07aa, 0x0017),
  778. .driver_info = (unsigned long) &ax8817x_info,
  779. }, {
  780. // Surecom EP-1427X-2
  781. USB_DEVICE (0x1189, 0x0893),
  782. .driver_info = (unsigned long) &ax8817x_info,
  783. }, {
  784. // goodway corp usb gwusb2e
  785. USB_DEVICE (0x1631, 0x6200),
  786. .driver_info = (unsigned long) &ax8817x_info,
  787. }, {
  788. // ASIX AX88772 10/100
  789. USB_DEVICE (0x0b95, 0x7720),
  790. .driver_info = (unsigned long) &ax88772_info,
  791. },
  792. { }, // END
  793. };
  794. MODULE_DEVICE_TABLE(usb, products);
  795. static struct usb_driver asix_driver = {
  796. .owner = THIS_MODULE,
  797. .name = "asix",
  798. .id_table = products,
  799. .probe = usbnet_probe,
  800. .suspend = usbnet_suspend,
  801. .resume = usbnet_resume,
  802. .disconnect = usbnet_disconnect,
  803. };
  804. static int __init asix_init(void)
  805. {
  806. return usb_register(&asix_driver);
  807. }
  808. module_init(asix_init);
  809. static void __exit asix_exit(void)
  810. {
  811. usb_deregister(&asix_driver);
  812. }
  813. module_exit(asix_exit);
  814. MODULE_AUTHOR("David Hollis");
  815. MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
  816. MODULE_LICENSE("GPL");