ohci-dbg.c 18 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * This file is licenced under the GPL.
  8. */
  9. /*-------------------------------------------------------------------------*/
  10. #ifdef DEBUG
  11. #define edstring(ed_type) ({ char *temp; \
  12. switch (ed_type) { \
  13. case PIPE_CONTROL: temp = "ctrl"; break; \
  14. case PIPE_BULK: temp = "bulk"; break; \
  15. case PIPE_INTERRUPT: temp = "intr"; break; \
  16. default: temp = "isoc"; break; \
  17. }; temp;})
  18. #define pipestring(pipe) edstring(usb_pipetype(pipe))
  19. /* debug| print the main components of an URB
  20. * small: 0) header + data packets 1) just header
  21. */
  22. static void __attribute__((unused))
  23. urb_print (struct urb * urb, char * str, int small)
  24. {
  25. unsigned int pipe= urb->pipe;
  26. if (!urb->dev || !urb->dev->bus) {
  27. dbg("%s URB: no dev", str);
  28. return;
  29. }
  30. #ifndef OHCI_VERBOSE_DEBUG
  31. if (urb->status != 0)
  32. #endif
  33. dbg("%s %p dev=%d ep=%d%s-%s flags=%x len=%d/%d stat=%d",
  34. str,
  35. urb,
  36. usb_pipedevice (pipe),
  37. usb_pipeendpoint (pipe),
  38. usb_pipeout (pipe)? "out" : "in",
  39. pipestring (pipe),
  40. urb->transfer_flags,
  41. urb->actual_length,
  42. urb->transfer_buffer_length,
  43. urb->status);
  44. #ifdef OHCI_VERBOSE_DEBUG
  45. if (!small) {
  46. int i, len;
  47. if (usb_pipecontrol (pipe)) {
  48. printk (KERN_DEBUG __FILE__ ": setup(8):");
  49. for (i = 0; i < 8 ; i++)
  50. printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
  51. printk ("\n");
  52. }
  53. if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
  54. printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
  55. urb->actual_length,
  56. urb->transfer_buffer_length);
  57. len = usb_pipeout (pipe)?
  58. urb->transfer_buffer_length: urb->actual_length;
  59. for (i = 0; i < 16 && i < len; i++)
  60. printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
  61. printk ("%s stat:%d\n", i < len? "...": "", urb->status);
  62. }
  63. }
  64. #endif
  65. }
  66. #define ohci_dbg_sw(ohci, next, size, format, arg...) \
  67. do { \
  68. if (next) { \
  69. unsigned s_len; \
  70. s_len = scnprintf (*next, *size, format, ## arg ); \
  71. *size -= s_len; *next += s_len; \
  72. } else \
  73. ohci_dbg(ohci,format, ## arg ); \
  74. } while (0);
  75. static void ohci_dump_intr_mask (
  76. struct ohci_hcd *ohci,
  77. char *label,
  78. u32 mask,
  79. char **next,
  80. unsigned *size)
  81. {
  82. ohci_dbg_sw (ohci, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s\n",
  83. label,
  84. mask,
  85. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  86. (mask & OHCI_INTR_OC) ? " OC" : "",
  87. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  88. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  89. (mask & OHCI_INTR_UE) ? " UE" : "",
  90. (mask & OHCI_INTR_RD) ? " RD" : "",
  91. (mask & OHCI_INTR_SF) ? " SF" : "",
  92. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  93. (mask & OHCI_INTR_SO) ? " SO" : ""
  94. );
  95. }
  96. static void maybe_print_eds (
  97. struct ohci_hcd *ohci,
  98. char *label,
  99. u32 value,
  100. char **next,
  101. unsigned *size)
  102. {
  103. if (value)
  104. ohci_dbg_sw (ohci, next, size, "%s %08x\n", label, value);
  105. }
  106. static char *hcfs2string (int state)
  107. {
  108. switch (state) {
  109. case OHCI_USB_RESET: return "reset";
  110. case OHCI_USB_RESUME: return "resume";
  111. case OHCI_USB_OPER: return "operational";
  112. case OHCI_USB_SUSPEND: return "suspend";
  113. }
  114. return "?";
  115. }
  116. // dump control and status registers
  117. static void
  118. ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
  119. {
  120. struct ohci_regs __iomem *regs = controller->regs;
  121. u32 temp;
  122. temp = ohci_readl (controller, &regs->revision) & 0xff;
  123. ohci_dbg_sw (controller, next, size,
  124. "OHCI %d.%d, %s legacy support registers\n",
  125. 0x03 & (temp >> 4), (temp & 0x0f),
  126. (temp & 0x0100) ? "with" : "NO");
  127. temp = ohci_readl (controller, &regs->control);
  128. ohci_dbg_sw (controller, next, size,
  129. "control 0x%03x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\n",
  130. temp,
  131. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  132. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  133. (temp & OHCI_CTRL_IR) ? " IR" : "",
  134. hcfs2string (temp & OHCI_CTRL_HCFS),
  135. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  136. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  137. (temp & OHCI_CTRL_IE) ? " IE" : "",
  138. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  139. temp & OHCI_CTRL_CBSR
  140. );
  141. temp = ohci_readl (controller, &regs->cmdstatus);
  142. ohci_dbg_sw (controller, next, size,
  143. "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp,
  144. (temp & OHCI_SOC) >> 16,
  145. (temp & OHCI_OCR) ? " OCR" : "",
  146. (temp & OHCI_BLF) ? " BLF" : "",
  147. (temp & OHCI_CLF) ? " CLF" : "",
  148. (temp & OHCI_HCR) ? " HCR" : ""
  149. );
  150. ohci_dump_intr_mask (controller, "intrstatus",
  151. ohci_readl (controller, &regs->intrstatus),
  152. next, size);
  153. ohci_dump_intr_mask (controller, "intrenable",
  154. ohci_readl (controller, &regs->intrenable),
  155. next, size);
  156. // intrdisable always same as intrenable
  157. maybe_print_eds (controller, "ed_periodcurrent",
  158. ohci_readl (controller, &regs->ed_periodcurrent),
  159. next, size);
  160. maybe_print_eds (controller, "ed_controlhead",
  161. ohci_readl (controller, &regs->ed_controlhead),
  162. next, size);
  163. maybe_print_eds (controller, "ed_controlcurrent",
  164. ohci_readl (controller, &regs->ed_controlcurrent),
  165. next, size);
  166. maybe_print_eds (controller, "ed_bulkhead",
  167. ohci_readl (controller, &regs->ed_bulkhead),
  168. next, size);
  169. maybe_print_eds (controller, "ed_bulkcurrent",
  170. ohci_readl (controller, &regs->ed_bulkcurrent),
  171. next, size);
  172. maybe_print_eds (controller, "donehead",
  173. ohci_readl (controller, &regs->donehead), next, size);
  174. /* broken fminterval means traffic won't flow! */
  175. ohci_dbg (controller, "fminterval %08x\n",
  176. ohci_readl (controller, &regs->fminterval));
  177. }
  178. #define dbg_port_sw(hc,num,value,next,size) \
  179. ohci_dbg_sw (hc, next, size, \
  180. "roothub.portstatus [%d] " \
  181. "0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
  182. num, temp, \
  183. (temp & RH_PS_PRSC) ? " PRSC" : "", \
  184. (temp & RH_PS_OCIC) ? " OCIC" : "", \
  185. (temp & RH_PS_PSSC) ? " PSSC" : "", \
  186. (temp & RH_PS_PESC) ? " PESC" : "", \
  187. (temp & RH_PS_CSC) ? " CSC" : "", \
  188. \
  189. (temp & RH_PS_LSDA) ? " LSDA" : "", \
  190. (temp & RH_PS_PPS) ? " PPS" : "", \
  191. (temp & RH_PS_PRS) ? " PRS" : "", \
  192. (temp & RH_PS_POCI) ? " POCI" : "", \
  193. (temp & RH_PS_PSS) ? " PSS" : "", \
  194. \
  195. (temp & RH_PS_PES) ? " PES" : "", \
  196. (temp & RH_PS_CCS) ? " CCS" : "" \
  197. );
  198. static void
  199. ohci_dump_roothub (
  200. struct ohci_hcd *controller,
  201. int verbose,
  202. char **next,
  203. unsigned *size)
  204. {
  205. u32 temp, i;
  206. temp = roothub_a (controller);
  207. if (temp == ~(u32)0)
  208. return;
  209. if (verbose) {
  210. ohci_dbg_sw (controller, next, size,
  211. "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d(%d)\n", temp,
  212. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  213. (temp & RH_A_NOCP) ? " NOCP" : "",
  214. (temp & RH_A_OCPM) ? " OCPM" : "",
  215. (temp & RH_A_DT) ? " DT" : "",
  216. (temp & RH_A_NPS) ? " NPS" : "",
  217. (temp & RH_A_PSM) ? " PSM" : "",
  218. (temp & RH_A_NDP), controller->num_ports
  219. );
  220. temp = roothub_b (controller);
  221. ohci_dbg_sw (controller, next, size,
  222. "roothub.b %08x PPCM=%04x DR=%04x\n",
  223. temp,
  224. (temp & RH_B_PPCM) >> 16,
  225. (temp & RH_B_DR)
  226. );
  227. temp = roothub_status (controller);
  228. ohci_dbg_sw (controller, next, size,
  229. "roothub.status %08x%s%s%s%s%s%s\n",
  230. temp,
  231. (temp & RH_HS_CRWE) ? " CRWE" : "",
  232. (temp & RH_HS_OCIC) ? " OCIC" : "",
  233. (temp & RH_HS_LPSC) ? " LPSC" : "",
  234. (temp & RH_HS_DRWE) ? " DRWE" : "",
  235. (temp & RH_HS_OCI) ? " OCI" : "",
  236. (temp & RH_HS_LPS) ? " LPS" : ""
  237. );
  238. }
  239. for (i = 0; i < controller->num_ports; i++) {
  240. temp = roothub_portstatus (controller, i);
  241. dbg_port_sw (controller, i, temp, next, size);
  242. }
  243. }
  244. static void ohci_dump (struct ohci_hcd *controller, int verbose)
  245. {
  246. ohci_dbg (controller, "OHCI controller state\n");
  247. // dumps some of the state we know about
  248. ohci_dump_status (controller, NULL, NULL);
  249. if (controller->hcca)
  250. ohci_dbg (controller,
  251. "hcca frame #%04x\n", ohci_frame_no(controller));
  252. ohci_dump_roothub (controller, 1, NULL, NULL);
  253. }
  254. static const char data0 [] = "DATA0";
  255. static const char data1 [] = "DATA1";
  256. static void ohci_dump_td (const struct ohci_hcd *ohci, const char *label,
  257. const struct td *td)
  258. {
  259. u32 tmp = hc32_to_cpup (ohci, &td->hwINFO);
  260. ohci_dbg (ohci, "%s td %p%s; urb %p index %d; hw next td %08x\n",
  261. label, td,
  262. (tmp & TD_DONE) ? " (DONE)" : "",
  263. td->urb, td->index,
  264. hc32_to_cpup (ohci, &td->hwNextTD));
  265. if ((tmp & TD_ISO) == 0) {
  266. const char *toggle, *pid;
  267. u32 cbp, be;
  268. switch (tmp & TD_T) {
  269. case TD_T_DATA0: toggle = data0; break;
  270. case TD_T_DATA1: toggle = data1; break;
  271. case TD_T_TOGGLE: toggle = "(CARRY)"; break;
  272. default: toggle = "(?)"; break;
  273. }
  274. switch (tmp & TD_DP) {
  275. case TD_DP_SETUP: pid = "SETUP"; break;
  276. case TD_DP_IN: pid = "IN"; break;
  277. case TD_DP_OUT: pid = "OUT"; break;
  278. default: pid = "(bad pid)"; break;
  279. }
  280. ohci_dbg (ohci, " info %08x CC=%x %s DI=%d %s %s\n", tmp,
  281. TD_CC_GET(tmp), /* EC, */ toggle,
  282. (tmp & TD_DI) >> 21, pid,
  283. (tmp & TD_R) ? "R" : "");
  284. cbp = hc32_to_cpup (ohci, &td->hwCBP);
  285. be = hc32_to_cpup (ohci, &td->hwBE);
  286. ohci_dbg (ohci, " cbp %08x be %08x (len %d)\n", cbp, be,
  287. cbp ? (be + 1 - cbp) : 0);
  288. } else {
  289. unsigned i;
  290. ohci_dbg (ohci, " info %08x CC=%x FC=%d DI=%d SF=%04x\n", tmp,
  291. TD_CC_GET(tmp),
  292. (tmp >> 24) & 0x07,
  293. (tmp & TD_DI) >> 21,
  294. tmp & 0x0000ffff);
  295. ohci_dbg (ohci, " bp0 %08x be %08x\n",
  296. hc32_to_cpup (ohci, &td->hwCBP) & ~0x0fff,
  297. hc32_to_cpup (ohci, &td->hwBE));
  298. for (i = 0; i < MAXPSW; i++) {
  299. u16 psw = ohci_hwPSW (ohci, td, i);
  300. int cc = (psw >> 12) & 0x0f;
  301. ohci_dbg (ohci, " psw [%d] = %2x, CC=%x %s=%d\n", i,
  302. psw, cc,
  303. (cc >= 0x0e) ? "OFFSET" : "SIZE",
  304. psw & 0x0fff);
  305. }
  306. }
  307. }
  308. /* caller MUST own hcd spinlock if verbose is set! */
  309. static void __attribute__((unused))
  310. ohci_dump_ed (const struct ohci_hcd *ohci, const char *label,
  311. const struct ed *ed, int verbose)
  312. {
  313. u32 tmp = hc32_to_cpu (ohci, ed->hwINFO);
  314. char *type = "";
  315. ohci_dbg (ohci, "%s, ed %p state 0x%x type %s; next ed %08x\n",
  316. label,
  317. ed, ed->state, edstring (ed->type),
  318. hc32_to_cpup (ohci, &ed->hwNextED));
  319. switch (tmp & (ED_IN|ED_OUT)) {
  320. case ED_OUT: type = "-OUT"; break;
  321. case ED_IN: type = "-IN"; break;
  322. /* else from TDs ... control */
  323. }
  324. ohci_dbg (ohci,
  325. " info %08x MAX=%d%s%s%s%s EP=%d%s DEV=%d\n", tmp,
  326. 0x03ff & (tmp >> 16),
  327. (tmp & ED_DEQUEUE) ? " DQ" : "",
  328. (tmp & ED_ISO) ? " ISO" : "",
  329. (tmp & ED_SKIP) ? " SKIP" : "",
  330. (tmp & ED_LOWSPEED) ? " LOW" : "",
  331. 0x000f & (tmp >> 7),
  332. type,
  333. 0x007f & tmp);
  334. tmp = hc32_to_cpup (ohci, &ed->hwHeadP);
  335. ohci_dbg (ohci, " tds: head %08x %s%s tail %08x%s\n",
  336. tmp,
  337. (tmp & ED_C) ? data1 : data0,
  338. (tmp & ED_H) ? " HALT" : "",
  339. hc32_to_cpup (ohci, &ed->hwTailP),
  340. verbose ? "" : " (not listing)");
  341. if (verbose) {
  342. struct list_head *tmp;
  343. /* use ed->td_list because HC concurrently modifies
  344. * hwNextTD as it accumulates ed_donelist.
  345. */
  346. list_for_each (tmp, &ed->td_list) {
  347. struct td *td;
  348. td = list_entry (tmp, struct td, td_list);
  349. ohci_dump_td (ohci, " ->", td);
  350. }
  351. }
  352. }
  353. #else
  354. static inline void ohci_dump (struct ohci_hcd *controller, int verbose) {}
  355. #undef OHCI_VERBOSE_DEBUG
  356. #endif /* DEBUG */
  357. /*-------------------------------------------------------------------------*/
  358. #ifdef STUB_DEBUG_FILES
  359. static inline void create_debug_files (struct ohci_hcd *bus) { }
  360. static inline void remove_debug_files (struct ohci_hcd *bus) { }
  361. #else
  362. static ssize_t
  363. show_list (struct ohci_hcd *ohci, char *buf, size_t count, struct ed *ed)
  364. {
  365. unsigned temp, size = count;
  366. if (!ed)
  367. return 0;
  368. /* print first --> last */
  369. while (ed->ed_prev)
  370. ed = ed->ed_prev;
  371. /* dump a snapshot of the bulk or control schedule */
  372. while (ed) {
  373. u32 info = hc32_to_cpu (ohci, ed->hwINFO);
  374. u32 headp = hc32_to_cpu (ohci, ed->hwHeadP);
  375. struct list_head *entry;
  376. struct td *td;
  377. temp = scnprintf (buf, size,
  378. "ed/%p %cs dev%d ep%d%s max %d %08x%s%s %s",
  379. ed,
  380. (info & ED_LOWSPEED) ? 'l' : 'f',
  381. info & 0x7f,
  382. (info >> 7) & 0xf,
  383. (info & ED_IN) ? "in" : "out",
  384. 0x03ff & (info >> 16),
  385. info,
  386. (info & ED_SKIP) ? " s" : "",
  387. (headp & ED_H) ? " H" : "",
  388. (headp & ED_C) ? data1 : data0);
  389. size -= temp;
  390. buf += temp;
  391. list_for_each (entry, &ed->td_list) {
  392. u32 cbp, be;
  393. td = list_entry (entry, struct td, td_list);
  394. info = hc32_to_cpup (ohci, &td->hwINFO);
  395. cbp = hc32_to_cpup (ohci, &td->hwCBP);
  396. be = hc32_to_cpup (ohci, &td->hwBE);
  397. temp = scnprintf (buf, size,
  398. "\n\ttd %p %s %d cc=%x urb %p (%08x)",
  399. td,
  400. ({ char *pid;
  401. switch (info & TD_DP) {
  402. case TD_DP_SETUP: pid = "setup"; break;
  403. case TD_DP_IN: pid = "in"; break;
  404. case TD_DP_OUT: pid = "out"; break;
  405. default: pid = "(?)"; break;
  406. } pid;}),
  407. cbp ? (be + 1 - cbp) : 0,
  408. TD_CC_GET (info), td->urb, info);
  409. size -= temp;
  410. buf += temp;
  411. }
  412. temp = scnprintf (buf, size, "\n");
  413. size -= temp;
  414. buf += temp;
  415. ed = ed->ed_next;
  416. }
  417. return count - size;
  418. }
  419. static ssize_t
  420. show_async (struct class_device *class_dev, char *buf)
  421. {
  422. struct usb_bus *bus;
  423. struct usb_hcd *hcd;
  424. struct ohci_hcd *ohci;
  425. size_t temp;
  426. unsigned long flags;
  427. bus = class_get_devdata(class_dev);
  428. hcd = bus->hcpriv;
  429. ohci = hcd_to_ohci(hcd);
  430. /* display control and bulk lists together, for simplicity */
  431. spin_lock_irqsave (&ohci->lock, flags);
  432. temp = show_list (ohci, buf, PAGE_SIZE, ohci->ed_controltail);
  433. temp += show_list (ohci, buf + temp, PAGE_SIZE - temp, ohci->ed_bulktail);
  434. spin_unlock_irqrestore (&ohci->lock, flags);
  435. return temp;
  436. }
  437. static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
  438. #define DBG_SCHED_LIMIT 64
  439. static ssize_t
  440. show_periodic (struct class_device *class_dev, char *buf)
  441. {
  442. struct usb_bus *bus;
  443. struct usb_hcd *hcd;
  444. struct ohci_hcd *ohci;
  445. struct ed **seen, *ed;
  446. unsigned long flags;
  447. unsigned temp, size, seen_count;
  448. char *next;
  449. unsigned i;
  450. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC)))
  451. return 0;
  452. seen_count = 0;
  453. bus = class_get_devdata(class_dev);
  454. hcd = bus->hcpriv;
  455. ohci = hcd_to_ohci(hcd);
  456. next = buf;
  457. size = PAGE_SIZE;
  458. temp = scnprintf (next, size, "size = %d\n", NUM_INTS);
  459. size -= temp;
  460. next += temp;
  461. /* dump a snapshot of the periodic schedule (and load) */
  462. spin_lock_irqsave (&ohci->lock, flags);
  463. for (i = 0; i < NUM_INTS; i++) {
  464. if (!(ed = ohci->periodic [i]))
  465. continue;
  466. temp = scnprintf (next, size, "%2d [%3d]:", i, ohci->load [i]);
  467. size -= temp;
  468. next += temp;
  469. do {
  470. temp = scnprintf (next, size, " ed%d/%p",
  471. ed->interval, ed);
  472. size -= temp;
  473. next += temp;
  474. for (temp = 0; temp < seen_count; temp++) {
  475. if (seen [temp] == ed)
  476. break;
  477. }
  478. /* show more info the first time around */
  479. if (temp == seen_count) {
  480. u32 info = hc32_to_cpu (ohci, ed->hwINFO);
  481. struct list_head *entry;
  482. unsigned qlen = 0;
  483. /* qlen measured here in TDs, not urbs */
  484. list_for_each (entry, &ed->td_list)
  485. qlen++;
  486. temp = scnprintf (next, size,
  487. " (%cs dev%d ep%d%s-%s qlen %u"
  488. " max %d %08x%s%s)",
  489. (info & ED_LOWSPEED) ? 'l' : 'f',
  490. info & 0x7f,
  491. (info >> 7) & 0xf,
  492. (info & ED_IN) ? "in" : "out",
  493. (info & ED_ISO) ? "iso" : "int",
  494. qlen,
  495. 0x03ff & (info >> 16),
  496. info,
  497. (info & ED_SKIP) ? " K" : "",
  498. (ed->hwHeadP &
  499. cpu_to_hc32(ohci, ED_H)) ?
  500. " H" : "");
  501. size -= temp;
  502. next += temp;
  503. if (seen_count < DBG_SCHED_LIMIT)
  504. seen [seen_count++] = ed;
  505. ed = ed->ed_next;
  506. } else {
  507. /* we've seen it and what's after */
  508. temp = 0;
  509. ed = NULL;
  510. }
  511. } while (ed);
  512. temp = scnprintf (next, size, "\n");
  513. size -= temp;
  514. next += temp;
  515. }
  516. spin_unlock_irqrestore (&ohci->lock, flags);
  517. kfree (seen);
  518. return PAGE_SIZE - size;
  519. }
  520. static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
  521. #undef DBG_SCHED_LIMIT
  522. static ssize_t
  523. show_registers (struct class_device *class_dev, char *buf)
  524. {
  525. struct usb_bus *bus;
  526. struct usb_hcd *hcd;
  527. struct ohci_hcd *ohci;
  528. struct ohci_regs __iomem *regs;
  529. unsigned long flags;
  530. unsigned temp, size;
  531. char *next;
  532. u32 rdata;
  533. bus = class_get_devdata(class_dev);
  534. hcd = bus->hcpriv;
  535. ohci = hcd_to_ohci(hcd);
  536. regs = ohci->regs;
  537. next = buf;
  538. size = PAGE_SIZE;
  539. spin_lock_irqsave (&ohci->lock, flags);
  540. /* dump driver info, then registers in spec order */
  541. ohci_dbg_sw (ohci, &next, &size,
  542. "bus %s, device %s\n"
  543. "%s\n"
  544. "%s version " DRIVER_VERSION "\n",
  545. hcd->self.controller->bus->name,
  546. hcd->self.controller->bus_id,
  547. hcd->product_desc,
  548. hcd_name);
  549. if (bus->controller->power.power_state.event) {
  550. size -= scnprintf (next, size,
  551. "SUSPENDED (no register access)\n");
  552. goto done;
  553. }
  554. ohci_dump_status(ohci, &next, &size);
  555. /* hcca */
  556. if (ohci->hcca)
  557. ohci_dbg_sw (ohci, &next, &size,
  558. "hcca frame 0x%04x\n", ohci_frame_no(ohci));
  559. /* other registers mostly affect frame timings */
  560. rdata = ohci_readl (ohci, &regs->fminterval);
  561. temp = scnprintf (next, size,
  562. "fmintvl 0x%08x %sFSMPS=0x%04x FI=0x%04x\n",
  563. rdata, (rdata >> 31) ? "FIT " : "",
  564. (rdata >> 16) & 0xefff, rdata & 0xffff);
  565. size -= temp;
  566. next += temp;
  567. rdata = ohci_readl (ohci, &regs->fmremaining);
  568. temp = scnprintf (next, size, "fmremaining 0x%08x %sFR=0x%04x\n",
  569. rdata, (rdata >> 31) ? "FRT " : "",
  570. rdata & 0x3fff);
  571. size -= temp;
  572. next += temp;
  573. rdata = ohci_readl (ohci, &regs->periodicstart);
  574. temp = scnprintf (next, size, "periodicstart 0x%04x\n",
  575. rdata & 0x3fff);
  576. size -= temp;
  577. next += temp;
  578. rdata = ohci_readl (ohci, &regs->lsthresh);
  579. temp = scnprintf (next, size, "lsthresh 0x%04x\n",
  580. rdata & 0x3fff);
  581. size -= temp;
  582. next += temp;
  583. /* roothub */
  584. ohci_dump_roothub (ohci, 1, &next, &size);
  585. done:
  586. spin_unlock_irqrestore (&ohci->lock, flags);
  587. return PAGE_SIZE - size;
  588. }
  589. static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
  590. static inline void create_debug_files (struct ohci_hcd *ohci)
  591. {
  592. struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
  593. class_device_create_file(cldev, &class_device_attr_async);
  594. class_device_create_file(cldev, &class_device_attr_periodic);
  595. class_device_create_file(cldev, &class_device_attr_registers);
  596. ohci_dbg (ohci, "created debug files\n");
  597. }
  598. static inline void remove_debug_files (struct ohci_hcd *ohci)
  599. {
  600. struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
  601. class_device_remove_file(cldev, &class_device_attr_async);
  602. class_device_remove_file(cldev, &class_device_attr_periodic);
  603. class_device_remove_file(cldev, &class_device_attr_registers);
  604. }
  605. #endif
  606. /*-------------------------------------------------------------------------*/