pxa2xx_udc.h 8.3 KB

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  1. /*
  2. * linux/drivers/usb/gadget/pxa2xx_udc.h
  3. * Intel PXA2xx on-chip full speed USB device controller
  4. *
  5. * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  6. * Copyright (C) 2003 David Brownell
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #ifndef __LINUX_USB_GADGET_PXA2XX_H
  24. #define __LINUX_USB_GADGET_PXA2XX_H
  25. #include <linux/types.h>
  26. /*-------------------------------------------------------------------------*/
  27. /* pxa2xx has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
  28. #define UFNRH_SIR (1 << 7) /* SOF interrupt request */
  29. #define UFNRH_SIM (1 << 6) /* SOF interrupt mask */
  30. #define UFNRH_IPE14 (1 << 5) /* ISO packet error, ep14 */
  31. #define UFNRH_IPE9 (1 << 4) /* ISO packet error, ep9 */
  32. #define UFNRH_IPE4 (1 << 3) /* ISO packet error, ep4 */
  33. /* pxa255 has this (move to include/asm-arm/arch-pxa/pxa-regs.h) */
  34. #define UDCCFR UDC_RES2 /* UDC Control Function Register */
  35. #define UDCCFR_AREN (1 << 7) /* ACK response enable (now) */
  36. #define UDCCFR_ACM (1 << 2) /* ACK control mode (wait for AREN) */
  37. /* latest pxa255 errata define new "must be one" bits in UDCCFR */
  38. #define UDCCFR_MB1 (0xff & ~(UDCCFR_AREN|UDCCFR_ACM))
  39. /*-------------------------------------------------------------------------*/
  40. struct pxa2xx_udc;
  41. struct pxa2xx_ep {
  42. struct usb_ep ep;
  43. struct pxa2xx_udc *dev;
  44. const struct usb_endpoint_descriptor *desc;
  45. struct list_head queue;
  46. unsigned long pio_irqs;
  47. unsigned long dma_irqs;
  48. short dma;
  49. unsigned short fifo_size;
  50. u8 bEndpointAddress;
  51. u8 bmAttributes;
  52. unsigned stopped : 1;
  53. unsigned dma_fixup : 1;
  54. /* UDCCS = UDC Control/Status for this EP
  55. * UBCR = UDC Byte Count Remaining (contents of OUT fifo)
  56. * UDDR = UDC Endpoint Data Register (the fifo)
  57. * DRCM = DMA Request Channel Map
  58. */
  59. volatile u32 *reg_udccs;
  60. volatile u32 *reg_ubcr;
  61. volatile u32 *reg_uddr;
  62. #ifdef USE_DMA
  63. volatile u32 *reg_drcmr;
  64. #define drcmr(n) .reg_drcmr = & DRCMR ## n ,
  65. #else
  66. #define drcmr(n)
  67. #endif
  68. };
  69. struct pxa2xx_request {
  70. struct usb_request req;
  71. struct list_head queue;
  72. };
  73. enum ep0_state {
  74. EP0_IDLE,
  75. EP0_IN_DATA_PHASE,
  76. EP0_OUT_DATA_PHASE,
  77. EP0_END_XFER,
  78. EP0_STALL,
  79. };
  80. #define EP0_FIFO_SIZE ((unsigned)16)
  81. #define BULK_FIFO_SIZE ((unsigned)64)
  82. #define ISO_FIFO_SIZE ((unsigned)256)
  83. #define INT_FIFO_SIZE ((unsigned)8)
  84. struct udc_stats {
  85. struct ep0stats {
  86. unsigned long ops;
  87. unsigned long bytes;
  88. } read, write;
  89. unsigned long irqs;
  90. };
  91. #ifdef CONFIG_USB_PXA2XX_SMALL
  92. /* when memory's tight, SMALL config saves code+data. */
  93. #undef USE_DMA
  94. #define PXA_UDC_NUM_ENDPOINTS 3
  95. #endif
  96. #ifndef PXA_UDC_NUM_ENDPOINTS
  97. #define PXA_UDC_NUM_ENDPOINTS 16
  98. #endif
  99. struct pxa2xx_udc {
  100. struct usb_gadget gadget;
  101. struct usb_gadget_driver *driver;
  102. enum ep0_state ep0state;
  103. struct udc_stats stats;
  104. unsigned got_irq : 1,
  105. vbus : 1,
  106. pullup : 1,
  107. has_cfr : 1,
  108. req_pending : 1,
  109. req_std : 1,
  110. req_config : 1;
  111. #define start_watchdog(dev) mod_timer(&dev->timer, jiffies + (HZ/200))
  112. struct timer_list timer;
  113. struct device *dev;
  114. struct pxa2xx_udc_mach_info *mach;
  115. u64 dma_mask;
  116. struct pxa2xx_ep ep [PXA_UDC_NUM_ENDPOINTS];
  117. };
  118. /*-------------------------------------------------------------------------*/
  119. #ifdef CONFIG_ARCH_LUBBOCK
  120. #include <asm/arch/lubbock.h>
  121. /* lubbock can also report usb connect/disconnect irqs */
  122. #ifdef DEBUG
  123. #define HEX_DISPLAY(n) if (machine_is_lubbock()) { LUB_HEXLED = (n); }
  124. #endif
  125. #endif
  126. /*-------------------------------------------------------------------------*/
  127. /* LEDs are only for debug */
  128. #ifndef HEX_DISPLAY
  129. #define HEX_DISPLAY(n) do {} while(0)
  130. #endif
  131. #ifdef DEBUG
  132. #include <asm/leds.h>
  133. #define LED_CONNECTED_ON leds_event(led_green_on)
  134. #define LED_CONNECTED_OFF do { \
  135. leds_event(led_green_off); \
  136. HEX_DISPLAY(0); \
  137. } while(0)
  138. #endif
  139. #ifndef LED_CONNECTED_ON
  140. #define LED_CONNECTED_ON do {} while(0)
  141. #define LED_CONNECTED_OFF do {} while(0)
  142. #endif
  143. /*-------------------------------------------------------------------------*/
  144. static struct pxa2xx_udc *the_controller;
  145. /* one GPIO should be used to detect VBUS from the host */
  146. static inline int is_vbus_present(void)
  147. {
  148. if (!the_controller->mach->udc_is_connected)
  149. return 1;
  150. return the_controller->mach->udc_is_connected();
  151. }
  152. /* one GPIO should control a D+ pullup, so host sees this device (or not) */
  153. static inline void pullup_off(void)
  154. {
  155. if (!the_controller->mach->udc_command)
  156. return;
  157. the_controller->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
  158. }
  159. static inline void pullup_on(void)
  160. {
  161. if (!the_controller->mach->udc_command)
  162. return;
  163. the_controller->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
  164. }
  165. /*-------------------------------------------------------------------------*/
  166. /*
  167. * Debugging support vanishes in non-debug builds. DBG_NORMAL should be
  168. * mostly silent during normal use/testing, with no timing side-effects.
  169. */
  170. #define DBG_NORMAL 1 /* error paths, device state transitions */
  171. #define DBG_VERBOSE 2 /* add some success path trace info */
  172. #define DBG_NOISY 3 /* ... even more: request level */
  173. #define DBG_VERY_NOISY 4 /* ... even more: packet level */
  174. #ifdef DEBUG
  175. static const char *state_name[] = {
  176. "EP0_IDLE",
  177. "EP0_IN_DATA_PHASE", "EP0_OUT_DATA_PHASE",
  178. "EP0_END_XFER", "EP0_STALL"
  179. };
  180. #define DMSG(stuff...) printk(KERN_DEBUG "udc: " stuff)
  181. #ifdef VERBOSE
  182. # define UDC_DEBUG DBG_VERBOSE
  183. #else
  184. # define UDC_DEBUG DBG_NORMAL
  185. #endif
  186. static void __attribute__ ((__unused__))
  187. dump_udccr(const char *label)
  188. {
  189. u32 udccr = UDCCR;
  190. DMSG("%s %02X =%s%s%s%s%s%s%s%s\n",
  191. label, udccr,
  192. (udccr & UDCCR_REM) ? " rem" : "",
  193. (udccr & UDCCR_RSTIR) ? " rstir" : "",
  194. (udccr & UDCCR_SRM) ? " srm" : "",
  195. (udccr & UDCCR_SUSIR) ? " susir" : "",
  196. (udccr & UDCCR_RESIR) ? " resir" : "",
  197. (udccr & UDCCR_RSM) ? " rsm" : "",
  198. (udccr & UDCCR_UDA) ? " uda" : "",
  199. (udccr & UDCCR_UDE) ? " ude" : "");
  200. }
  201. static void __attribute__ ((__unused__))
  202. dump_udccs0(const char *label)
  203. {
  204. u32 udccs0 = UDCCS0;
  205. DMSG("%s %s %02X =%s%s%s%s%s%s%s%s\n",
  206. label, state_name[the_controller->ep0state], udccs0,
  207. (udccs0 & UDCCS0_SA) ? " sa" : "",
  208. (udccs0 & UDCCS0_RNE) ? " rne" : "",
  209. (udccs0 & UDCCS0_FST) ? " fst" : "",
  210. (udccs0 & UDCCS0_SST) ? " sst" : "",
  211. (udccs0 & UDCCS0_DRWF) ? " dwrf" : "",
  212. (udccs0 & UDCCS0_FTF) ? " ftf" : "",
  213. (udccs0 & UDCCS0_IPR) ? " ipr" : "",
  214. (udccs0 & UDCCS0_OPR) ? " opr" : "");
  215. }
  216. static void __attribute__ ((__unused__))
  217. dump_state(struct pxa2xx_udc *dev)
  218. {
  219. u32 tmp;
  220. unsigned i;
  221. DMSG("%s %s, uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
  222. is_usb_connected() ? "host " : "disconnected",
  223. state_name[dev->ep0state],
  224. UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
  225. dump_udccr("udccr");
  226. if (dev->has_cfr) {
  227. tmp = UDCCFR;
  228. DMSG("udccfr %02X =%s%s\n", tmp,
  229. (tmp & UDCCFR_AREN) ? " aren" : "",
  230. (tmp & UDCCFR_ACM) ? " acm" : "");
  231. }
  232. if (!dev->driver) {
  233. DMSG("no gadget driver bound\n");
  234. return;
  235. } else
  236. DMSG("ep0 driver '%s'\n", dev->driver->driver.name);
  237. if (!is_usb_connected())
  238. return;
  239. dump_udccs0 ("udccs0");
  240. DMSG("ep0 IN %lu/%lu, OUT %lu/%lu\n",
  241. dev->stats.write.bytes, dev->stats.write.ops,
  242. dev->stats.read.bytes, dev->stats.read.ops);
  243. for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) {
  244. if (dev->ep [i].desc == 0)
  245. continue;
  246. DMSG ("udccs%d = %02x\n", i, *dev->ep->reg_udccs);
  247. }
  248. }
  249. #else
  250. #define DMSG(stuff...) do{}while(0)
  251. #define dump_udccr(x) do{}while(0)
  252. #define dump_udccs0(x) do{}while(0)
  253. #define dump_state(x) do{}while(0)
  254. #define UDC_DEBUG ((unsigned)0)
  255. #endif
  256. #define DBG(lvl, stuff...) do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)
  257. #define WARN(stuff...) printk(KERN_WARNING "udc: " stuff)
  258. #define INFO(stuff...) printk(KERN_INFO "udc: " stuff)
  259. #endif /* __LINUX_USB_GADGET_PXA2XX_H */