pxa.c 20 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #include <linux/config.h>
  27. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  28. #define SUPPORT_SYSRQ
  29. #endif
  30. #include <linux/module.h>
  31. #include <linux/ioport.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <linux/serial_reg.h>
  36. #include <linux/circ_buf.h>
  37. #include <linux/delay.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/device.h>
  40. #include <linux/tty.h>
  41. #include <linux/tty_flip.h>
  42. #include <linux/serial_core.h>
  43. #include <asm/io.h>
  44. #include <asm/hardware.h>
  45. #include <asm/irq.h>
  46. #include <asm/arch/pxa-regs.h>
  47. struct uart_pxa_port {
  48. struct uart_port port;
  49. unsigned char ier;
  50. unsigned char lcr;
  51. unsigned char mcr;
  52. unsigned int lsr_break_flag;
  53. unsigned int cken;
  54. char *name;
  55. };
  56. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  57. {
  58. offset <<= 2;
  59. return readl(up->port.membase + offset);
  60. }
  61. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  62. {
  63. offset <<= 2;
  64. writel(value, up->port.membase + offset);
  65. }
  66. static void serial_pxa_enable_ms(struct uart_port *port)
  67. {
  68. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  69. up->ier |= UART_IER_MSI;
  70. serial_out(up, UART_IER, up->ier);
  71. }
  72. static void serial_pxa_stop_tx(struct uart_port *port)
  73. {
  74. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  75. if (up->ier & UART_IER_THRI) {
  76. up->ier &= ~UART_IER_THRI;
  77. serial_out(up, UART_IER, up->ier);
  78. }
  79. }
  80. static void serial_pxa_stop_rx(struct uart_port *port)
  81. {
  82. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  83. up->ier &= ~UART_IER_RLSI;
  84. up->port.read_status_mask &= ~UART_LSR_DR;
  85. serial_out(up, UART_IER, up->ier);
  86. }
  87. static inline void
  88. receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
  89. {
  90. struct tty_struct *tty = up->port.info->tty;
  91. unsigned int ch, flag;
  92. int max_count = 256;
  93. do {
  94. if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
  95. if (tty->low_latency)
  96. tty_flip_buffer_push(tty);
  97. /*
  98. * If this failed then we will throw away the
  99. * bytes but must do so to clear interrupts
  100. */
  101. }
  102. ch = serial_in(up, UART_RX);
  103. flag = TTY_NORMAL;
  104. up->port.icount.rx++;
  105. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  106. UART_LSR_FE | UART_LSR_OE))) {
  107. /*
  108. * For statistics only
  109. */
  110. if (*status & UART_LSR_BI) {
  111. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  112. up->port.icount.brk++;
  113. /*
  114. * We do the SysRQ and SAK checking
  115. * here because otherwise the break
  116. * may get masked by ignore_status_mask
  117. * or read_status_mask.
  118. */
  119. if (uart_handle_break(&up->port))
  120. goto ignore_char;
  121. } else if (*status & UART_LSR_PE)
  122. up->port.icount.parity++;
  123. else if (*status & UART_LSR_FE)
  124. up->port.icount.frame++;
  125. if (*status & UART_LSR_OE)
  126. up->port.icount.overrun++;
  127. /*
  128. * Mask off conditions which should be ignored.
  129. */
  130. *status &= up->port.read_status_mask;
  131. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  132. if (up->port.line == up->port.cons->index) {
  133. /* Recover the break flag from console xmit */
  134. *status |= up->lsr_break_flag;
  135. up->lsr_break_flag = 0;
  136. }
  137. #endif
  138. if (*status & UART_LSR_BI) {
  139. flag = TTY_BREAK;
  140. } else if (*status & UART_LSR_PE)
  141. flag = TTY_PARITY;
  142. else if (*status & UART_LSR_FE)
  143. flag = TTY_FRAME;
  144. }
  145. if (uart_handle_sysrq_char(&up->port, ch, regs))
  146. goto ignore_char;
  147. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  148. ignore_char:
  149. *status = serial_in(up, UART_LSR);
  150. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  151. tty_flip_buffer_push(tty);
  152. }
  153. static void transmit_chars(struct uart_pxa_port *up)
  154. {
  155. struct circ_buf *xmit = &up->port.info->xmit;
  156. int count;
  157. if (up->port.x_char) {
  158. serial_out(up, UART_TX, up->port.x_char);
  159. up->port.icount.tx++;
  160. up->port.x_char = 0;
  161. return;
  162. }
  163. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  164. serial_pxa_stop_tx(&up->port);
  165. return;
  166. }
  167. count = up->port.fifosize / 2;
  168. do {
  169. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  170. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  171. up->port.icount.tx++;
  172. if (uart_circ_empty(xmit))
  173. break;
  174. } while (--count > 0);
  175. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  176. uart_write_wakeup(&up->port);
  177. if (uart_circ_empty(xmit))
  178. serial_pxa_stop_tx(&up->port);
  179. }
  180. static void serial_pxa_start_tx(struct uart_port *port)
  181. {
  182. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  183. if (!(up->ier & UART_IER_THRI)) {
  184. up->ier |= UART_IER_THRI;
  185. serial_out(up, UART_IER, up->ier);
  186. }
  187. }
  188. static inline void check_modem_status(struct uart_pxa_port *up)
  189. {
  190. int status;
  191. status = serial_in(up, UART_MSR);
  192. if ((status & UART_MSR_ANY_DELTA) == 0)
  193. return;
  194. if (status & UART_MSR_TERI)
  195. up->port.icount.rng++;
  196. if (status & UART_MSR_DDSR)
  197. up->port.icount.dsr++;
  198. if (status & UART_MSR_DDCD)
  199. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  200. if (status & UART_MSR_DCTS)
  201. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  202. wake_up_interruptible(&up->port.info->delta_msr_wait);
  203. }
  204. /*
  205. * This handles the interrupt from one port.
  206. */
  207. static inline irqreturn_t
  208. serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
  209. {
  210. struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
  211. unsigned int iir, lsr;
  212. iir = serial_in(up, UART_IIR);
  213. if (iir & UART_IIR_NO_INT)
  214. return IRQ_NONE;
  215. lsr = serial_in(up, UART_LSR);
  216. if (lsr & UART_LSR_DR)
  217. receive_chars(up, &lsr, regs);
  218. check_modem_status(up);
  219. if (lsr & UART_LSR_THRE)
  220. transmit_chars(up);
  221. return IRQ_HANDLED;
  222. }
  223. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  224. {
  225. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  226. unsigned long flags;
  227. unsigned int ret;
  228. spin_lock_irqsave(&up->port.lock, flags);
  229. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  230. spin_unlock_irqrestore(&up->port.lock, flags);
  231. return ret;
  232. }
  233. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  234. {
  235. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  236. unsigned char status;
  237. unsigned int ret;
  238. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  239. status = serial_in(up, UART_MSR);
  240. ret = 0;
  241. if (status & UART_MSR_DCD)
  242. ret |= TIOCM_CAR;
  243. if (status & UART_MSR_RI)
  244. ret |= TIOCM_RNG;
  245. if (status & UART_MSR_DSR)
  246. ret |= TIOCM_DSR;
  247. if (status & UART_MSR_CTS)
  248. ret |= TIOCM_CTS;
  249. return ret;
  250. }
  251. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  252. {
  253. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  254. unsigned char mcr = 0;
  255. if (mctrl & TIOCM_RTS)
  256. mcr |= UART_MCR_RTS;
  257. if (mctrl & TIOCM_DTR)
  258. mcr |= UART_MCR_DTR;
  259. if (mctrl & TIOCM_OUT1)
  260. mcr |= UART_MCR_OUT1;
  261. if (mctrl & TIOCM_OUT2)
  262. mcr |= UART_MCR_OUT2;
  263. if (mctrl & TIOCM_LOOP)
  264. mcr |= UART_MCR_LOOP;
  265. mcr |= up->mcr;
  266. serial_out(up, UART_MCR, mcr);
  267. }
  268. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  269. {
  270. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  271. unsigned long flags;
  272. spin_lock_irqsave(&up->port.lock, flags);
  273. if (break_state == -1)
  274. up->lcr |= UART_LCR_SBC;
  275. else
  276. up->lcr &= ~UART_LCR_SBC;
  277. serial_out(up, UART_LCR, up->lcr);
  278. spin_unlock_irqrestore(&up->port.lock, flags);
  279. }
  280. #if 0
  281. static void serial_pxa_dma_init(struct pxa_uart *up)
  282. {
  283. up->rxdma =
  284. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  285. if (up->rxdma < 0)
  286. goto out;
  287. up->txdma =
  288. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  289. if (up->txdma < 0)
  290. goto err_txdma;
  291. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  292. if (!up->dmadesc)
  293. goto err_alloc;
  294. /* ... */
  295. err_alloc:
  296. pxa_free_dma(up->txdma);
  297. err_rxdma:
  298. pxa_free_dma(up->rxdma);
  299. out:
  300. return;
  301. }
  302. #endif
  303. static int serial_pxa_startup(struct uart_port *port)
  304. {
  305. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  306. unsigned long flags;
  307. int retval;
  308. up->mcr = 0;
  309. /*
  310. * Allocate the IRQ
  311. */
  312. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  313. if (retval)
  314. return retval;
  315. /*
  316. * Clear the FIFO buffers and disable them.
  317. * (they will be reenabled in set_termios())
  318. */
  319. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  320. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  321. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  322. serial_out(up, UART_FCR, 0);
  323. /*
  324. * Clear the interrupt registers.
  325. */
  326. (void) serial_in(up, UART_LSR);
  327. (void) serial_in(up, UART_RX);
  328. (void) serial_in(up, UART_IIR);
  329. (void) serial_in(up, UART_MSR);
  330. /*
  331. * Now, initialize the UART
  332. */
  333. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  334. spin_lock_irqsave(&up->port.lock, flags);
  335. up->port.mctrl |= TIOCM_OUT2;
  336. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  337. spin_unlock_irqrestore(&up->port.lock, flags);
  338. /*
  339. * Finally, enable interrupts. Note: Modem status interrupts
  340. * are set via set_termios(), which will be occuring imminently
  341. * anyway, so we don't enable them here.
  342. */
  343. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  344. serial_out(up, UART_IER, up->ier);
  345. /*
  346. * And clear the interrupt registers again for luck.
  347. */
  348. (void) serial_in(up, UART_LSR);
  349. (void) serial_in(up, UART_RX);
  350. (void) serial_in(up, UART_IIR);
  351. (void) serial_in(up, UART_MSR);
  352. return 0;
  353. }
  354. static void serial_pxa_shutdown(struct uart_port *port)
  355. {
  356. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  357. unsigned long flags;
  358. free_irq(up->port.irq, up);
  359. /*
  360. * Disable interrupts from this port
  361. */
  362. up->ier = 0;
  363. serial_out(up, UART_IER, 0);
  364. spin_lock_irqsave(&up->port.lock, flags);
  365. up->port.mctrl &= ~TIOCM_OUT2;
  366. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  367. spin_unlock_irqrestore(&up->port.lock, flags);
  368. /*
  369. * Disable break condition and FIFOs
  370. */
  371. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  372. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  373. UART_FCR_CLEAR_RCVR |
  374. UART_FCR_CLEAR_XMIT);
  375. serial_out(up, UART_FCR, 0);
  376. }
  377. static void
  378. serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
  379. struct termios *old)
  380. {
  381. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  382. unsigned char cval, fcr = 0;
  383. unsigned long flags;
  384. unsigned int baud, quot;
  385. switch (termios->c_cflag & CSIZE) {
  386. case CS5:
  387. cval = UART_LCR_WLEN5;
  388. break;
  389. case CS6:
  390. cval = UART_LCR_WLEN6;
  391. break;
  392. case CS7:
  393. cval = UART_LCR_WLEN7;
  394. break;
  395. default:
  396. case CS8:
  397. cval = UART_LCR_WLEN8;
  398. break;
  399. }
  400. if (termios->c_cflag & CSTOPB)
  401. cval |= UART_LCR_STOP;
  402. if (termios->c_cflag & PARENB)
  403. cval |= UART_LCR_PARITY;
  404. if (!(termios->c_cflag & PARODD))
  405. cval |= UART_LCR_EPAR;
  406. /*
  407. * Ask the core to calculate the divisor for us.
  408. */
  409. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  410. quot = uart_get_divisor(port, baud);
  411. if ((up->port.uartclk / quot) < (2400 * 16))
  412. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  413. else
  414. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  415. /*
  416. * Ok, we're now changing the port state. Do it with
  417. * interrupts disabled.
  418. */
  419. spin_lock_irqsave(&up->port.lock, flags);
  420. /*
  421. * Ensure the port will be enabled.
  422. * This is required especially for serial console.
  423. */
  424. up->ier |= IER_UUE;
  425. /*
  426. * Update the per-port timeout.
  427. */
  428. uart_update_timeout(port, termios->c_cflag, quot);
  429. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  430. if (termios->c_iflag & INPCK)
  431. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  432. if (termios->c_iflag & (BRKINT | PARMRK))
  433. up->port.read_status_mask |= UART_LSR_BI;
  434. /*
  435. * Characters to ignore
  436. */
  437. up->port.ignore_status_mask = 0;
  438. if (termios->c_iflag & IGNPAR)
  439. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  440. if (termios->c_iflag & IGNBRK) {
  441. up->port.ignore_status_mask |= UART_LSR_BI;
  442. /*
  443. * If we're ignoring parity and break indicators,
  444. * ignore overruns too (for real raw support).
  445. */
  446. if (termios->c_iflag & IGNPAR)
  447. up->port.ignore_status_mask |= UART_LSR_OE;
  448. }
  449. /*
  450. * ignore all characters if CREAD is not set
  451. */
  452. if ((termios->c_cflag & CREAD) == 0)
  453. up->port.ignore_status_mask |= UART_LSR_DR;
  454. /*
  455. * CTS flow control flag and modem status interrupts
  456. */
  457. up->ier &= ~UART_IER_MSI;
  458. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  459. up->ier |= UART_IER_MSI;
  460. serial_out(up, UART_IER, up->ier);
  461. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  462. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  463. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  464. serial_out(up, UART_LCR, cval); /* reset DLAB */
  465. up->lcr = cval; /* Save LCR */
  466. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  467. serial_out(up, UART_FCR, fcr);
  468. spin_unlock_irqrestore(&up->port.lock, flags);
  469. }
  470. static void
  471. serial_pxa_pm(struct uart_port *port, unsigned int state,
  472. unsigned int oldstate)
  473. {
  474. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  475. pxa_set_cken(up->cken, !state);
  476. if (!state)
  477. udelay(1);
  478. }
  479. static void serial_pxa_release_port(struct uart_port *port)
  480. {
  481. }
  482. static int serial_pxa_request_port(struct uart_port *port)
  483. {
  484. return 0;
  485. }
  486. static void serial_pxa_config_port(struct uart_port *port, int flags)
  487. {
  488. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  489. up->port.type = PORT_PXA;
  490. }
  491. static int
  492. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  493. {
  494. /* we don't want the core code to modify any port params */
  495. return -EINVAL;
  496. }
  497. static const char *
  498. serial_pxa_type(struct uart_port *port)
  499. {
  500. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  501. return up->name;
  502. }
  503. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  504. extern struct uart_pxa_port serial_pxa_ports[];
  505. extern struct uart_driver serial_pxa_reg;
  506. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  507. /*
  508. * Wait for transmitter & holding register to empty
  509. */
  510. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  511. {
  512. unsigned int status, tmout = 10000;
  513. /* Wait up to 10ms for the character(s) to be sent. */
  514. do {
  515. status = serial_in(up, UART_LSR);
  516. if (status & UART_LSR_BI)
  517. up->lsr_break_flag = UART_LSR_BI;
  518. if (--tmout == 0)
  519. break;
  520. udelay(1);
  521. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  522. /* Wait up to 1s for flow control if necessary */
  523. if (up->port.flags & UPF_CONS_FLOW) {
  524. tmout = 1000000;
  525. while (--tmout &&
  526. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  527. udelay(1);
  528. }
  529. }
  530. /*
  531. * Print a string to the serial port trying not to disturb
  532. * any possible real use of the port...
  533. *
  534. * The console_lock must be held when we get here.
  535. */
  536. static void
  537. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  538. {
  539. struct uart_pxa_port *up = &serial_pxa_ports[co->index];
  540. unsigned int ier;
  541. int i;
  542. /*
  543. * First save the UER then disable the interrupts
  544. */
  545. ier = serial_in(up, UART_IER);
  546. serial_out(up, UART_IER, UART_IER_UUE);
  547. /*
  548. * Now, do each character
  549. */
  550. for (i = 0; i < count; i++, s++) {
  551. wait_for_xmitr(up);
  552. /*
  553. * Send the character out.
  554. * If a LF, also do CR...
  555. */
  556. serial_out(up, UART_TX, *s);
  557. if (*s == 10) {
  558. wait_for_xmitr(up);
  559. serial_out(up, UART_TX, 13);
  560. }
  561. }
  562. /*
  563. * Finally, wait for transmitter to become empty
  564. * and restore the IER
  565. */
  566. wait_for_xmitr(up);
  567. serial_out(up, UART_IER, ier);
  568. }
  569. static int __init
  570. serial_pxa_console_setup(struct console *co, char *options)
  571. {
  572. struct uart_pxa_port *up;
  573. int baud = 9600;
  574. int bits = 8;
  575. int parity = 'n';
  576. int flow = 'n';
  577. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  578. co->index = 0;
  579. up = &serial_pxa_ports[co->index];
  580. if (options)
  581. uart_parse_options(options, &baud, &parity, &bits, &flow);
  582. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  583. }
  584. static struct console serial_pxa_console = {
  585. .name = "ttyS",
  586. .write = serial_pxa_console_write,
  587. .device = uart_console_device,
  588. .setup = serial_pxa_console_setup,
  589. .flags = CON_PRINTBUFFER,
  590. .index = -1,
  591. .data = &serial_pxa_reg,
  592. };
  593. static int __init
  594. serial_pxa_console_init(void)
  595. {
  596. register_console(&serial_pxa_console);
  597. return 0;
  598. }
  599. console_initcall(serial_pxa_console_init);
  600. #define PXA_CONSOLE &serial_pxa_console
  601. #else
  602. #define PXA_CONSOLE NULL
  603. #endif
  604. struct uart_ops serial_pxa_pops = {
  605. .tx_empty = serial_pxa_tx_empty,
  606. .set_mctrl = serial_pxa_set_mctrl,
  607. .get_mctrl = serial_pxa_get_mctrl,
  608. .stop_tx = serial_pxa_stop_tx,
  609. .start_tx = serial_pxa_start_tx,
  610. .stop_rx = serial_pxa_stop_rx,
  611. .enable_ms = serial_pxa_enable_ms,
  612. .break_ctl = serial_pxa_break_ctl,
  613. .startup = serial_pxa_startup,
  614. .shutdown = serial_pxa_shutdown,
  615. .set_termios = serial_pxa_set_termios,
  616. .pm = serial_pxa_pm,
  617. .type = serial_pxa_type,
  618. .release_port = serial_pxa_release_port,
  619. .request_port = serial_pxa_request_port,
  620. .config_port = serial_pxa_config_port,
  621. .verify_port = serial_pxa_verify_port,
  622. };
  623. static struct uart_pxa_port serial_pxa_ports[] = {
  624. { /* FFUART */
  625. .name = "FFUART",
  626. .cken = CKEN6_FFUART,
  627. .port = {
  628. .type = PORT_PXA,
  629. .iotype = UPIO_MEM,
  630. .membase = (void *)&FFUART,
  631. .mapbase = __PREG(FFUART),
  632. .irq = IRQ_FFUART,
  633. .uartclk = 921600 * 16,
  634. .fifosize = 64,
  635. .ops = &serial_pxa_pops,
  636. .line = 0,
  637. },
  638. }, { /* BTUART */
  639. .name = "BTUART",
  640. .cken = CKEN7_BTUART,
  641. .port = {
  642. .type = PORT_PXA,
  643. .iotype = UPIO_MEM,
  644. .membase = (void *)&BTUART,
  645. .mapbase = __PREG(BTUART),
  646. .irq = IRQ_BTUART,
  647. .uartclk = 921600 * 16,
  648. .fifosize = 64,
  649. .ops = &serial_pxa_pops,
  650. .line = 1,
  651. },
  652. }, { /* STUART */
  653. .name = "STUART",
  654. .cken = CKEN5_STUART,
  655. .port = {
  656. .type = PORT_PXA,
  657. .iotype = UPIO_MEM,
  658. .membase = (void *)&STUART,
  659. .mapbase = __PREG(STUART),
  660. .irq = IRQ_STUART,
  661. .uartclk = 921600 * 16,
  662. .fifosize = 64,
  663. .ops = &serial_pxa_pops,
  664. .line = 2,
  665. },
  666. }
  667. };
  668. static struct uart_driver serial_pxa_reg = {
  669. .owner = THIS_MODULE,
  670. .driver_name = "PXA serial",
  671. .devfs_name = "tts/",
  672. .dev_name = "ttyS",
  673. .major = TTY_MAJOR,
  674. .minor = 64,
  675. .nr = ARRAY_SIZE(serial_pxa_ports),
  676. .cons = PXA_CONSOLE,
  677. };
  678. static int serial_pxa_suspend(struct device *_dev, pm_message_t state, u32 level)
  679. {
  680. struct uart_pxa_port *sport = dev_get_drvdata(_dev);
  681. if (sport && level == SUSPEND_DISABLE)
  682. uart_suspend_port(&serial_pxa_reg, &sport->port);
  683. return 0;
  684. }
  685. static int serial_pxa_resume(struct device *_dev, u32 level)
  686. {
  687. struct uart_pxa_port *sport = dev_get_drvdata(_dev);
  688. if (sport && level == RESUME_ENABLE)
  689. uart_resume_port(&serial_pxa_reg, &sport->port);
  690. return 0;
  691. }
  692. static int serial_pxa_probe(struct device *_dev)
  693. {
  694. struct platform_device *dev = to_platform_device(_dev);
  695. serial_pxa_ports[dev->id].port.dev = _dev;
  696. uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
  697. dev_set_drvdata(_dev, &serial_pxa_ports[dev->id]);
  698. return 0;
  699. }
  700. static int serial_pxa_remove(struct device *_dev)
  701. {
  702. struct uart_pxa_port *sport = dev_get_drvdata(_dev);
  703. dev_set_drvdata(_dev, NULL);
  704. if (sport)
  705. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  706. return 0;
  707. }
  708. static struct device_driver serial_pxa_driver = {
  709. .name = "pxa2xx-uart",
  710. .bus = &platform_bus_type,
  711. .probe = serial_pxa_probe,
  712. .remove = serial_pxa_remove,
  713. .suspend = serial_pxa_suspend,
  714. .resume = serial_pxa_resume,
  715. };
  716. int __init serial_pxa_init(void)
  717. {
  718. int ret;
  719. ret = uart_register_driver(&serial_pxa_reg);
  720. if (ret != 0)
  721. return ret;
  722. ret = driver_register(&serial_pxa_driver);
  723. if (ret != 0)
  724. uart_unregister_driver(&serial_pxa_reg);
  725. return ret;
  726. }
  727. void __exit serial_pxa_exit(void)
  728. {
  729. driver_unregister(&serial_pxa_driver);
  730. uart_unregister_driver(&serial_pxa_reg);
  731. }
  732. module_init(serial_pxa_init);
  733. module_exit(serial_pxa_exit);
  734. MODULE_LICENSE("GPL");