qlogicpti.c 43 KB

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  1. /* qlogicpti.c: Performance Technologies QlogicISP sbus card driver.
  2. *
  3. * Copyright (C) 1996 David S. Miller (davem@caipfs.rutgers.edu)
  4. *
  5. * A lot of this driver was directly stolen from Erik H. Moe's PCI
  6. * Qlogic ISP driver. Mucho kudos to him for this code.
  7. *
  8. * An even bigger kudos to John Grana at Performance Technologies
  9. * for providing me with the hardware to write this driver, you rule
  10. * John you really do.
  11. *
  12. * May, 2, 1997: Added support for QLGC,isp --jj
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/delay.h>
  16. #include <linux/types.h>
  17. #include <linux/string.h>
  18. #include <linux/slab.h>
  19. #include <linux/blkdev.h>
  20. #include <linux/proc_fs.h>
  21. #include <linux/stat.h>
  22. #include <linux/init.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/module.h>
  26. #include <asm/byteorder.h>
  27. #include "qlogicpti.h"
  28. #include <asm/sbus.h>
  29. #include <asm/dma.h>
  30. #include <asm/system.h>
  31. #include <asm/ptrace.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/oplib.h>
  34. #include <asm/io.h>
  35. #include <asm/irq.h>
  36. #include <scsi/scsi.h>
  37. #include <scsi/scsi_cmnd.h>
  38. #include <scsi/scsi_device.h>
  39. #include <scsi/scsi_eh.h>
  40. #include <scsi/scsi_request.h>
  41. #include <scsi/scsi_tcq.h>
  42. #include <scsi/scsi_host.h>
  43. #define MAX_TARGETS 16
  44. #define MAX_LUNS 8 /* 32 for 1.31 F/W */
  45. #define DEFAULT_LOOP_COUNT 10000
  46. #include "qlogicpti_asm.c"
  47. static struct qlogicpti *qptichain = NULL;
  48. static DEFINE_SPINLOCK(qptichain_lock);
  49. static int qptis_running = 0;
  50. #define PACKB(a, b) (((a)<<4)|(b))
  51. static const u_char mbox_param[] = {
  52. PACKB(1, 1), /* MBOX_NO_OP */
  53. PACKB(5, 5), /* MBOX_LOAD_RAM */
  54. PACKB(2, 0), /* MBOX_EXEC_FIRMWARE */
  55. PACKB(5, 5), /* MBOX_DUMP_RAM */
  56. PACKB(3, 3), /* MBOX_WRITE_RAM_WORD */
  57. PACKB(2, 3), /* MBOX_READ_RAM_WORD */
  58. PACKB(6, 6), /* MBOX_MAILBOX_REG_TEST */
  59. PACKB(2, 3), /* MBOX_VERIFY_CHECKSUM */
  60. PACKB(1, 3), /* MBOX_ABOUT_FIRMWARE */
  61. PACKB(0, 0), /* 0x0009 */
  62. PACKB(0, 0), /* 0x000a */
  63. PACKB(0, 0), /* 0x000b */
  64. PACKB(0, 0), /* 0x000c */
  65. PACKB(0, 0), /* 0x000d */
  66. PACKB(1, 2), /* MBOX_CHECK_FIRMWARE */
  67. PACKB(0, 0), /* 0x000f */
  68. PACKB(5, 5), /* MBOX_INIT_REQ_QUEUE */
  69. PACKB(6, 6), /* MBOX_INIT_RES_QUEUE */
  70. PACKB(4, 4), /* MBOX_EXECUTE_IOCB */
  71. PACKB(2, 2), /* MBOX_WAKE_UP */
  72. PACKB(1, 6), /* MBOX_STOP_FIRMWARE */
  73. PACKB(4, 4), /* MBOX_ABORT */
  74. PACKB(2, 2), /* MBOX_ABORT_DEVICE */
  75. PACKB(3, 3), /* MBOX_ABORT_TARGET */
  76. PACKB(2, 2), /* MBOX_BUS_RESET */
  77. PACKB(2, 3), /* MBOX_STOP_QUEUE */
  78. PACKB(2, 3), /* MBOX_START_QUEUE */
  79. PACKB(2, 3), /* MBOX_SINGLE_STEP_QUEUE */
  80. PACKB(2, 3), /* MBOX_ABORT_QUEUE */
  81. PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_STATUS */
  82. PACKB(0, 0), /* 0x001e */
  83. PACKB(1, 3), /* MBOX_GET_FIRMWARE_STATUS */
  84. PACKB(1, 2), /* MBOX_GET_INIT_SCSI_ID */
  85. PACKB(1, 2), /* MBOX_GET_SELECT_TIMEOUT */
  86. PACKB(1, 3), /* MBOX_GET_RETRY_COUNT */
  87. PACKB(1, 2), /* MBOX_GET_TAG_AGE_LIMIT */
  88. PACKB(1, 2), /* MBOX_GET_CLOCK_RATE */
  89. PACKB(1, 2), /* MBOX_GET_ACT_NEG_STATE */
  90. PACKB(1, 2), /* MBOX_GET_ASYNC_DATA_SETUP_TIME */
  91. PACKB(1, 3), /* MBOX_GET_SBUS_PARAMS */
  92. PACKB(2, 4), /* MBOX_GET_TARGET_PARAMS */
  93. PACKB(2, 4), /* MBOX_GET_DEV_QUEUE_PARAMS */
  94. PACKB(0, 0), /* 0x002a */
  95. PACKB(0, 0), /* 0x002b */
  96. PACKB(0, 0), /* 0x002c */
  97. PACKB(0, 0), /* 0x002d */
  98. PACKB(0, 0), /* 0x002e */
  99. PACKB(0, 0), /* 0x002f */
  100. PACKB(2, 2), /* MBOX_SET_INIT_SCSI_ID */
  101. PACKB(2, 2), /* MBOX_SET_SELECT_TIMEOUT */
  102. PACKB(3, 3), /* MBOX_SET_RETRY_COUNT */
  103. PACKB(2, 2), /* MBOX_SET_TAG_AGE_LIMIT */
  104. PACKB(2, 2), /* MBOX_SET_CLOCK_RATE */
  105. PACKB(2, 2), /* MBOX_SET_ACTIVE_NEG_STATE */
  106. PACKB(2, 2), /* MBOX_SET_ASYNC_DATA_SETUP_TIME */
  107. PACKB(3, 3), /* MBOX_SET_SBUS_CONTROL_PARAMS */
  108. PACKB(4, 4), /* MBOX_SET_TARGET_PARAMS */
  109. PACKB(4, 4), /* MBOX_SET_DEV_QUEUE_PARAMS */
  110. PACKB(0, 0), /* 0x003a */
  111. PACKB(0, 0), /* 0x003b */
  112. PACKB(0, 0), /* 0x003c */
  113. PACKB(0, 0), /* 0x003d */
  114. PACKB(0, 0), /* 0x003e */
  115. PACKB(0, 0), /* 0x003f */
  116. PACKB(0, 0), /* 0x0040 */
  117. PACKB(0, 0), /* 0x0041 */
  118. PACKB(0, 0) /* 0x0042 */
  119. };
  120. #define MAX_MBOX_COMMAND (sizeof(mbox_param)/sizeof(u_short))
  121. /* queue length's _must_ be power of two: */
  122. #define QUEUE_DEPTH(in, out, ql) ((in - out) & (ql))
  123. #define REQ_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, \
  124. QLOGICPTI_REQ_QUEUE_LEN)
  125. #define RES_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, RES_QUEUE_LEN)
  126. static inline void qlogicpti_enable_irqs(struct qlogicpti *qpti)
  127. {
  128. sbus_writew(SBUS_CTRL_ERIRQ | SBUS_CTRL_GENAB,
  129. qpti->qregs + SBUS_CTRL);
  130. }
  131. static inline void qlogicpti_disable_irqs(struct qlogicpti *qpti)
  132. {
  133. sbus_writew(0, qpti->qregs + SBUS_CTRL);
  134. }
  135. static inline void set_sbus_cfg1(struct qlogicpti *qpti)
  136. {
  137. u16 val;
  138. u8 bursts = qpti->bursts;
  139. #if 0 /* It appears that at least PTI cards do not support
  140. * 64-byte bursts and that setting the B64 bit actually
  141. * is a nop and the chip ends up using the smallest burst
  142. * size. -DaveM
  143. */
  144. if (sbus_can_burst64(qpti->sdev) && (bursts & DMA_BURST64)) {
  145. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B64);
  146. } else
  147. #endif
  148. if (bursts & DMA_BURST32) {
  149. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B32);
  150. } else if (bursts & DMA_BURST16) {
  151. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B16);
  152. } else if (bursts & DMA_BURST8) {
  153. val = (SBUS_CFG1_BENAB | SBUS_CFG1_B8);
  154. } else {
  155. val = 0; /* No sbus bursts for you... */
  156. }
  157. sbus_writew(val, qpti->qregs + SBUS_CFG1);
  158. }
  159. static int qlogicpti_mbox_command(struct qlogicpti *qpti, u_short param[], int force)
  160. {
  161. int loop_count;
  162. u16 tmp;
  163. if (mbox_param[param[0]] == 0)
  164. return 1;
  165. /* Set SBUS semaphore. */
  166. tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
  167. tmp |= SBUS_SEMAPHORE_LCK;
  168. sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
  169. /* Wait for host IRQ bit to clear. */
  170. loop_count = DEFAULT_LOOP_COUNT;
  171. while (--loop_count && (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_HIRQ)) {
  172. barrier();
  173. cpu_relax();
  174. }
  175. if (!loop_count)
  176. printk(KERN_EMERG "qlogicpti: mbox_command loop timeout #1\n");
  177. /* Write mailbox command registers. */
  178. switch (mbox_param[param[0]] >> 4) {
  179. case 6: sbus_writew(param[5], qpti->qregs + MBOX5);
  180. case 5: sbus_writew(param[4], qpti->qregs + MBOX4);
  181. case 4: sbus_writew(param[3], qpti->qregs + MBOX3);
  182. case 3: sbus_writew(param[2], qpti->qregs + MBOX2);
  183. case 2: sbus_writew(param[1], qpti->qregs + MBOX1);
  184. case 1: sbus_writew(param[0], qpti->qregs + MBOX0);
  185. }
  186. /* Clear RISC interrupt. */
  187. tmp = sbus_readw(qpti->qregs + HCCTRL);
  188. tmp |= HCCTRL_CRIRQ;
  189. sbus_writew(tmp, qpti->qregs + HCCTRL);
  190. /* Clear SBUS semaphore. */
  191. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  192. /* Set HOST interrupt. */
  193. tmp = sbus_readw(qpti->qregs + HCCTRL);
  194. tmp |= HCCTRL_SHIRQ;
  195. sbus_writew(tmp, qpti->qregs + HCCTRL);
  196. /* Wait for HOST interrupt clears. */
  197. loop_count = DEFAULT_LOOP_COUNT;
  198. while (--loop_count &&
  199. (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_CRIRQ))
  200. udelay(20);
  201. if (!loop_count)
  202. printk(KERN_EMERG "qlogicpti: mbox_command[%04x] loop timeout #2\n",
  203. param[0]);
  204. /* Wait for SBUS semaphore to get set. */
  205. loop_count = DEFAULT_LOOP_COUNT;
  206. while (--loop_count &&
  207. !(sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK)) {
  208. udelay(20);
  209. /* Workaround for some buggy chips. */
  210. if (sbus_readw(qpti->qregs + MBOX0) & 0x4000)
  211. break;
  212. }
  213. if (!loop_count)
  214. printk(KERN_EMERG "qlogicpti: mbox_command[%04x] loop timeout #3\n",
  215. param[0]);
  216. /* Wait for MBOX busy condition to go away. */
  217. loop_count = DEFAULT_LOOP_COUNT;
  218. while (--loop_count && (sbus_readw(qpti->qregs + MBOX0) == 0x04))
  219. udelay(20);
  220. if (!loop_count)
  221. printk(KERN_EMERG "qlogicpti: mbox_command[%04x] loop timeout #4\n",
  222. param[0]);
  223. /* Read back output parameters. */
  224. switch (mbox_param[param[0]] & 0xf) {
  225. case 6: param[5] = sbus_readw(qpti->qregs + MBOX5);
  226. case 5: param[4] = sbus_readw(qpti->qregs + MBOX4);
  227. case 4: param[3] = sbus_readw(qpti->qregs + MBOX3);
  228. case 3: param[2] = sbus_readw(qpti->qregs + MBOX2);
  229. case 2: param[1] = sbus_readw(qpti->qregs + MBOX1);
  230. case 1: param[0] = sbus_readw(qpti->qregs + MBOX0);
  231. }
  232. /* Clear RISC interrupt. */
  233. tmp = sbus_readw(qpti->qregs + HCCTRL);
  234. tmp |= HCCTRL_CRIRQ;
  235. sbus_writew(tmp, qpti->qregs + HCCTRL);
  236. /* Release SBUS semaphore. */
  237. tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
  238. tmp &= ~(SBUS_SEMAPHORE_LCK);
  239. sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
  240. /* We're done. */
  241. return 0;
  242. }
  243. static inline void qlogicpti_set_hostdev_defaults(struct qlogicpti *qpti)
  244. {
  245. int i;
  246. qpti->host_param.initiator_scsi_id = qpti->scsi_id;
  247. qpti->host_param.bus_reset_delay = 3;
  248. qpti->host_param.retry_count = 0;
  249. qpti->host_param.retry_delay = 5;
  250. qpti->host_param.async_data_setup_time = 3;
  251. qpti->host_param.req_ack_active_negation = 1;
  252. qpti->host_param.data_line_active_negation = 1;
  253. qpti->host_param.data_dma_burst_enable = 1;
  254. qpti->host_param.command_dma_burst_enable = 1;
  255. qpti->host_param.tag_aging = 8;
  256. qpti->host_param.selection_timeout = 250;
  257. qpti->host_param.max_queue_depth = 256;
  258. for(i = 0; i < MAX_TARGETS; i++) {
  259. /*
  260. * disconnect, parity, arq, reneg on reset, and, oddly enough
  261. * tags...the midlayer's notion of tagged support has to match
  262. * our device settings, and since we base whether we enable a
  263. * tag on a per-cmnd basis upon what the midlayer sez, we
  264. * actually enable the capability here.
  265. */
  266. qpti->dev_param[i].device_flags = 0xcd;
  267. qpti->dev_param[i].execution_throttle = 16;
  268. if (qpti->ultra) {
  269. qpti->dev_param[i].synchronous_period = 12;
  270. qpti->dev_param[i].synchronous_offset = 8;
  271. } else {
  272. qpti->dev_param[i].synchronous_period = 25;
  273. qpti->dev_param[i].synchronous_offset = 12;
  274. }
  275. qpti->dev_param[i].device_enable = 1;
  276. }
  277. /* this is very important to set! */
  278. qpti->sbits = 1 << qpti->scsi_id;
  279. }
  280. static int qlogicpti_reset_hardware(struct Scsi_Host *host)
  281. {
  282. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  283. u_short param[6];
  284. unsigned short risc_code_addr;
  285. int loop_count, i;
  286. unsigned long flags;
  287. risc_code_addr = 0x1000; /* all load addresses are at 0x1000 */
  288. spin_lock_irqsave(host->host_lock, flags);
  289. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  290. /* Only reset the scsi bus if it is not free. */
  291. if (sbus_readw(qpti->qregs + CPU_PCTRL) & CPU_PCTRL_BSY) {
  292. sbus_writew(CPU_ORIDE_RMOD, qpti->qregs + CPU_ORIDE);
  293. sbus_writew(CPU_CMD_BRESET, qpti->qregs + CPU_CMD);
  294. udelay(400);
  295. }
  296. sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
  297. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
  298. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
  299. loop_count = DEFAULT_LOOP_COUNT;
  300. while (--loop_count && ((sbus_readw(qpti->qregs + MBOX0) & 0xff) == 0x04))
  301. udelay(20);
  302. if (!loop_count)
  303. printk(KERN_EMERG "qlogicpti: reset_hardware loop timeout\n");
  304. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  305. set_sbus_cfg1(qpti);
  306. qlogicpti_enable_irqs(qpti);
  307. if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
  308. qpti->ultra = 1;
  309. sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
  310. qpti->qregs + RISC_MTREG);
  311. } else {
  312. qpti->ultra = 0;
  313. sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
  314. qpti->qregs + RISC_MTREG);
  315. }
  316. /* reset adapter and per-device default values. */
  317. /* do it after finding out whether we're ultra mode capable */
  318. qlogicpti_set_hostdev_defaults(qpti);
  319. /* Release the RISC processor. */
  320. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  321. /* Get RISC to start executing the firmware code. */
  322. param[0] = MBOX_EXEC_FIRMWARE;
  323. param[1] = risc_code_addr;
  324. if (qlogicpti_mbox_command(qpti, param, 1)) {
  325. printk(KERN_EMERG "qlogicpti%d: Cannot execute ISP firmware.\n",
  326. qpti->qpti_id);
  327. spin_unlock_irqrestore(host->host_lock, flags);
  328. return 1;
  329. }
  330. /* Set initiator scsi ID. */
  331. param[0] = MBOX_SET_INIT_SCSI_ID;
  332. param[1] = qpti->host_param.initiator_scsi_id;
  333. if (qlogicpti_mbox_command(qpti, param, 1) ||
  334. (param[0] != MBOX_COMMAND_COMPLETE)) {
  335. printk(KERN_EMERG "qlogicpti%d: Cannot set initiator SCSI ID.\n",
  336. qpti->qpti_id);
  337. spin_unlock_irqrestore(host->host_lock, flags);
  338. return 1;
  339. }
  340. /* Initialize state of the queues, both hw and sw. */
  341. qpti->req_in_ptr = qpti->res_out_ptr = 0;
  342. param[0] = MBOX_INIT_RES_QUEUE;
  343. param[1] = RES_QUEUE_LEN + 1;
  344. param[2] = (u_short) (qpti->res_dvma >> 16);
  345. param[3] = (u_short) (qpti->res_dvma & 0xffff);
  346. param[4] = param[5] = 0;
  347. if (qlogicpti_mbox_command(qpti, param, 1)) {
  348. printk(KERN_EMERG "qlogicpti%d: Cannot init response queue.\n",
  349. qpti->qpti_id);
  350. spin_unlock_irqrestore(host->host_lock, flags);
  351. return 1;
  352. }
  353. param[0] = MBOX_INIT_REQ_QUEUE;
  354. param[1] = QLOGICPTI_REQ_QUEUE_LEN + 1;
  355. param[2] = (u_short) (qpti->req_dvma >> 16);
  356. param[3] = (u_short) (qpti->req_dvma & 0xffff);
  357. param[4] = param[5] = 0;
  358. if (qlogicpti_mbox_command(qpti, param, 1)) {
  359. printk(KERN_EMERG "qlogicpti%d: Cannot init request queue.\n",
  360. qpti->qpti_id);
  361. spin_unlock_irqrestore(host->host_lock, flags);
  362. return 1;
  363. }
  364. param[0] = MBOX_SET_RETRY_COUNT;
  365. param[1] = qpti->host_param.retry_count;
  366. param[2] = qpti->host_param.retry_delay;
  367. qlogicpti_mbox_command(qpti, param, 0);
  368. param[0] = MBOX_SET_TAG_AGE_LIMIT;
  369. param[1] = qpti->host_param.tag_aging;
  370. qlogicpti_mbox_command(qpti, param, 0);
  371. for (i = 0; i < MAX_TARGETS; i++) {
  372. param[0] = MBOX_GET_DEV_QUEUE_PARAMS;
  373. param[1] = (i << 8);
  374. qlogicpti_mbox_command(qpti, param, 0);
  375. }
  376. param[0] = MBOX_GET_FIRMWARE_STATUS;
  377. qlogicpti_mbox_command(qpti, param, 0);
  378. param[0] = MBOX_SET_SELECT_TIMEOUT;
  379. param[1] = qpti->host_param.selection_timeout;
  380. qlogicpti_mbox_command(qpti, param, 0);
  381. for (i = 0; i < MAX_TARGETS; i++) {
  382. param[0] = MBOX_SET_TARGET_PARAMS;
  383. param[1] = (i << 8);
  384. param[2] = (qpti->dev_param[i].device_flags << 8);
  385. /*
  386. * Since we're now loading 1.31 f/w, force narrow/async.
  387. */
  388. param[2] |= 0xc0;
  389. param[3] = 0; /* no offset, we do not have sync mode yet */
  390. qlogicpti_mbox_command(qpti, param, 0);
  391. }
  392. /*
  393. * Always (sigh) do an initial bus reset (kicks f/w).
  394. */
  395. param[0] = MBOX_BUS_RESET;
  396. param[1] = qpti->host_param.bus_reset_delay;
  397. qlogicpti_mbox_command(qpti, param, 0);
  398. qpti->send_marker = 1;
  399. spin_unlock_irqrestore(host->host_lock, flags);
  400. return 0;
  401. }
  402. #define PTI_RESET_LIMIT 400
  403. static int __init qlogicpti_load_firmware(struct qlogicpti *qpti)
  404. {
  405. struct Scsi_Host *host = qpti->qhost;
  406. unsigned short csum = 0;
  407. unsigned short param[6];
  408. unsigned short *risc_code, risc_code_addr, risc_code_length;
  409. unsigned long flags;
  410. int i, timeout;
  411. risc_code = &sbus_risc_code01[0];
  412. risc_code_addr = 0x1000; /* all f/w modules load at 0x1000 */
  413. risc_code_length = sbus_risc_code_length01;
  414. spin_lock_irqsave(host->host_lock, flags);
  415. /* Verify the checksum twice, one before loading it, and once
  416. * afterwards via the mailbox commands.
  417. */
  418. for (i = 0; i < risc_code_length; i++)
  419. csum += risc_code[i];
  420. if (csum) {
  421. spin_unlock_irqrestore(host->host_lock, flags);
  422. printk(KERN_EMERG "qlogicpti%d: Aieee, firmware checksum failed!",
  423. qpti->qpti_id);
  424. return 1;
  425. }
  426. sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
  427. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
  428. sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
  429. timeout = PTI_RESET_LIMIT;
  430. while (--timeout && (sbus_readw(qpti->qregs + SBUS_CTRL) & SBUS_CTRL_RESET))
  431. udelay(20);
  432. if (!timeout) {
  433. spin_unlock_irqrestore(host->host_lock, flags);
  434. printk(KERN_EMERG "qlogicpti%d: Cannot reset the ISP.", qpti->qpti_id);
  435. return 1;
  436. }
  437. sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
  438. mdelay(1);
  439. sbus_writew((SBUS_CTRL_GENAB | SBUS_CTRL_ERIRQ), qpti->qregs + SBUS_CTRL);
  440. set_sbus_cfg1(qpti);
  441. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  442. if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
  443. qpti->ultra = 1;
  444. sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
  445. qpti->qregs + RISC_MTREG);
  446. } else {
  447. qpti->ultra = 0;
  448. sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
  449. qpti->qregs + RISC_MTREG);
  450. }
  451. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  452. /* Pin lines are only stable while RISC is paused. */
  453. sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
  454. if (sbus_readw(qpti->qregs + CPU_PDIFF) & CPU_PDIFF_MODE)
  455. qpti->differential = 1;
  456. else
  457. qpti->differential = 0;
  458. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  459. /* This shouldn't be necessary- we've reset things so we should be
  460. running from the ROM now.. */
  461. param[0] = MBOX_STOP_FIRMWARE;
  462. param[1] = param[2] = param[3] = param[4] = param[5] = 0;
  463. if (qlogicpti_mbox_command(qpti, param, 1)) {
  464. printk(KERN_EMERG "qlogicpti%d: Cannot stop firmware for reload.\n",
  465. qpti->qpti_id);
  466. spin_unlock_irqrestore(host->host_lock, flags);
  467. return 1;
  468. }
  469. /* Load it up.. */
  470. for (i = 0; i < risc_code_length; i++) {
  471. param[0] = MBOX_WRITE_RAM_WORD;
  472. param[1] = risc_code_addr + i;
  473. param[2] = risc_code[i];
  474. if (qlogicpti_mbox_command(qpti, param, 1) ||
  475. param[0] != MBOX_COMMAND_COMPLETE) {
  476. printk("qlogicpti%d: Firmware dload failed, I'm bolixed!\n",
  477. qpti->qpti_id);
  478. spin_unlock_irqrestore(host->host_lock, flags);
  479. return 1;
  480. }
  481. }
  482. /* Reset the ISP again. */
  483. sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
  484. mdelay(1);
  485. qlogicpti_enable_irqs(qpti);
  486. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  487. sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
  488. /* Ask ISP to verify the checksum of the new code. */
  489. param[0] = MBOX_VERIFY_CHECKSUM;
  490. param[1] = risc_code_addr;
  491. if (qlogicpti_mbox_command(qpti, param, 1) ||
  492. (param[0] != MBOX_COMMAND_COMPLETE)) {
  493. printk(KERN_EMERG "qlogicpti%d: New firmware csum failure!\n",
  494. qpti->qpti_id);
  495. spin_unlock_irqrestore(host->host_lock, flags);
  496. return 1;
  497. }
  498. /* Start using newly downloaded firmware. */
  499. param[0] = MBOX_EXEC_FIRMWARE;
  500. param[1] = risc_code_addr;
  501. qlogicpti_mbox_command(qpti, param, 1);
  502. param[0] = MBOX_ABOUT_FIRMWARE;
  503. if (qlogicpti_mbox_command(qpti, param, 1) ||
  504. (param[0] != MBOX_COMMAND_COMPLETE)) {
  505. printk(KERN_EMERG "qlogicpti%d: AboutFirmware cmd fails.\n",
  506. qpti->qpti_id);
  507. spin_unlock_irqrestore(host->host_lock, flags);
  508. return 1;
  509. }
  510. /* Snag the major and minor revisions from the result. */
  511. qpti->fware_majrev = param[1];
  512. qpti->fware_minrev = param[2];
  513. qpti->fware_micrev = param[3];
  514. /* Set the clock rate */
  515. param[0] = MBOX_SET_CLOCK_RATE;
  516. param[1] = qpti->clock;
  517. if (qlogicpti_mbox_command(qpti, param, 1) ||
  518. (param[0] != MBOX_COMMAND_COMPLETE)) {
  519. printk(KERN_EMERG "qlogicpti%d: could not set clock rate.\n",
  520. qpti->qpti_id);
  521. spin_unlock_irqrestore(host->host_lock, flags);
  522. return 1;
  523. }
  524. if (qpti->is_pti != 0) {
  525. /* Load scsi initiator ID and interrupt level into sbus static ram. */
  526. param[0] = MBOX_WRITE_RAM_WORD;
  527. param[1] = 0xff80;
  528. param[2] = (unsigned short) qpti->scsi_id;
  529. qlogicpti_mbox_command(qpti, param, 1);
  530. param[0] = MBOX_WRITE_RAM_WORD;
  531. param[1] = 0xff00;
  532. param[2] = (unsigned short) 3;
  533. qlogicpti_mbox_command(qpti, param, 1);
  534. }
  535. spin_unlock_irqrestore(host->host_lock, flags);
  536. return 0;
  537. }
  538. static int qlogicpti_verify_tmon(struct qlogicpti *qpti)
  539. {
  540. int curstat = sbus_readb(qpti->sreg);
  541. curstat &= 0xf0;
  542. if (!(curstat & SREG_FUSE) && (qpti->swsreg & SREG_FUSE))
  543. printk("qlogicpti%d: Fuse returned to normal state.\n", qpti->qpti_id);
  544. if (!(curstat & SREG_TPOWER) && (qpti->swsreg & SREG_TPOWER))
  545. printk("qlogicpti%d: termpwr back to normal state.\n", qpti->qpti_id);
  546. if (curstat != qpti->swsreg) {
  547. int error = 0;
  548. if (curstat & SREG_FUSE) {
  549. error++;
  550. printk("qlogicpti%d: Fuse is open!\n", qpti->qpti_id);
  551. }
  552. if (curstat & SREG_TPOWER) {
  553. error++;
  554. printk("qlogicpti%d: termpwr failure\n", qpti->qpti_id);
  555. }
  556. if (qpti->differential &&
  557. (curstat & SREG_DSENSE) != SREG_DSENSE) {
  558. error++;
  559. printk("qlogicpti%d: You have a single ended device on a "
  560. "differential bus! Please fix!\n", qpti->qpti_id);
  561. }
  562. qpti->swsreg = curstat;
  563. return error;
  564. }
  565. return 0;
  566. }
  567. static irqreturn_t qpti_intr(int irq, void *dev_id, struct pt_regs *regs);
  568. static void __init qpti_chain_add(struct qlogicpti *qpti)
  569. {
  570. spin_lock_irq(&qptichain_lock);
  571. if (qptichain != NULL) {
  572. struct qlogicpti *qlink = qptichain;
  573. while(qlink->next)
  574. qlink = qlink->next;
  575. qlink->next = qpti;
  576. } else {
  577. qptichain = qpti;
  578. }
  579. qpti->next = NULL;
  580. spin_unlock_irq(&qptichain_lock);
  581. }
  582. static void __init qpti_chain_del(struct qlogicpti *qpti)
  583. {
  584. spin_lock_irq(&qptichain_lock);
  585. if (qptichain == qpti) {
  586. qptichain = qpti->next;
  587. } else {
  588. struct qlogicpti *qlink = qptichain;
  589. while(qlink->next != qpti)
  590. qlink = qlink->next;
  591. qlink->next = qpti->next;
  592. }
  593. qpti->next = NULL;
  594. spin_unlock_irq(&qptichain_lock);
  595. }
  596. static int __init qpti_map_regs(struct qlogicpti *qpti)
  597. {
  598. struct sbus_dev *sdev = qpti->sdev;
  599. qpti->qregs = sbus_ioremap(&sdev->resource[0], 0,
  600. sdev->reg_addrs[0].reg_size,
  601. "PTI Qlogic/ISP");
  602. if (!qpti->qregs) {
  603. printk("PTI: Qlogic/ISP registers are unmappable\n");
  604. return -1;
  605. }
  606. if (qpti->is_pti) {
  607. qpti->sreg = sbus_ioremap(&sdev->resource[0], (16 * 4096),
  608. sizeof(unsigned char),
  609. "PTI Qlogic/ISP statreg");
  610. if (!qpti->sreg) {
  611. printk("PTI: Qlogic/ISP status register is unmappable\n");
  612. return -1;
  613. }
  614. }
  615. return 0;
  616. }
  617. static int __init qpti_register_irq(struct qlogicpti *qpti)
  618. {
  619. struct sbus_dev *sdev = qpti->sdev;
  620. qpti->qhost->irq = qpti->irq = sdev->irqs[0];
  621. /* We used to try various overly-clever things to
  622. * reduce the interrupt processing overhead on
  623. * sun4c/sun4m when multiple PTI's shared the
  624. * same IRQ. It was too complex and messy to
  625. * sanely maintain.
  626. */
  627. if (request_irq(qpti->irq, qpti_intr,
  628. SA_SHIRQ, "Qlogic/PTI", qpti))
  629. goto fail;
  630. printk("qpti%d: IRQ %s ", qpti->qpti_id, __irq_itoa(qpti->irq));
  631. return 0;
  632. fail:
  633. printk("qpti%d: Cannot acquire irq line\n", qpti->qpti_id);
  634. return -1;
  635. }
  636. static void __init qpti_get_scsi_id(struct qlogicpti *qpti)
  637. {
  638. qpti->scsi_id = prom_getintdefault(qpti->prom_node,
  639. "initiator-id",
  640. -1);
  641. if (qpti->scsi_id == -1)
  642. qpti->scsi_id = prom_getintdefault(qpti->prom_node,
  643. "scsi-initiator-id",
  644. -1);
  645. if (qpti->scsi_id == -1)
  646. qpti->scsi_id =
  647. prom_getintdefault(qpti->sdev->bus->prom_node,
  648. "scsi-initiator-id", 7);
  649. qpti->qhost->this_id = qpti->scsi_id;
  650. qpti->qhost->max_sectors = 64;
  651. printk("SCSI ID %d ", qpti->scsi_id);
  652. }
  653. static void qpti_get_bursts(struct qlogicpti *qpti)
  654. {
  655. struct sbus_dev *sdev = qpti->sdev;
  656. u8 bursts, bmask;
  657. bursts = prom_getintdefault(qpti->prom_node, "burst-sizes", 0xff);
  658. bmask = prom_getintdefault(sdev->bus->prom_node,
  659. "burst-sizes", 0xff);
  660. if (bmask != 0xff)
  661. bursts &= bmask;
  662. if (bursts == 0xff ||
  663. (bursts & DMA_BURST16) == 0 ||
  664. (bursts & DMA_BURST32) == 0)
  665. bursts = (DMA_BURST32 - 1);
  666. qpti->bursts = bursts;
  667. }
  668. static void qpti_get_clock(struct qlogicpti *qpti)
  669. {
  670. unsigned int cfreq;
  671. /* Check for what the clock input to this card is.
  672. * Default to 40Mhz.
  673. */
  674. cfreq = prom_getintdefault(qpti->prom_node,"clock-frequency",40000000);
  675. qpti->clock = (cfreq + 500000)/1000000;
  676. if (qpti->clock == 0) /* bullshit */
  677. qpti->clock = 40;
  678. }
  679. /* The request and response queues must each be aligned
  680. * on a page boundary.
  681. */
  682. static int __init qpti_map_queues(struct qlogicpti *qpti)
  683. {
  684. struct sbus_dev *sdev = qpti->sdev;
  685. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  686. qpti->res_cpu = sbus_alloc_consistent(sdev,
  687. QSIZE(RES_QUEUE_LEN),
  688. &qpti->res_dvma);
  689. if (qpti->res_cpu == NULL ||
  690. qpti->res_dvma == 0) {
  691. printk("QPTI: Cannot map response queue.\n");
  692. return -1;
  693. }
  694. qpti->req_cpu = sbus_alloc_consistent(sdev,
  695. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  696. &qpti->req_dvma);
  697. if (qpti->req_cpu == NULL ||
  698. qpti->req_dvma == 0) {
  699. sbus_free_consistent(sdev, QSIZE(RES_QUEUE_LEN),
  700. qpti->res_cpu, qpti->res_dvma);
  701. printk("QPTI: Cannot map request queue.\n");
  702. return -1;
  703. }
  704. memset(qpti->res_cpu, 0, QSIZE(RES_QUEUE_LEN));
  705. memset(qpti->req_cpu, 0, QSIZE(QLOGICPTI_REQ_QUEUE_LEN));
  706. return 0;
  707. }
  708. /* Detect all PTI Qlogic ISP's in the machine. */
  709. static int __init qlogicpti_detect(struct scsi_host_template *tpnt)
  710. {
  711. struct qlogicpti *qpti;
  712. struct Scsi_Host *qpti_host;
  713. struct sbus_bus *sbus;
  714. struct sbus_dev *sdev;
  715. int nqptis = 0, nqptis_in_use = 0;
  716. tpnt->proc_name = "qlogicpti";
  717. for_each_sbus(sbus) {
  718. for_each_sbusdev(sdev, sbus) {
  719. /* Is this a red snapper? */
  720. if (strcmp(sdev->prom_name, "ptisp") &&
  721. strcmp(sdev->prom_name, "PTI,ptisp") &&
  722. strcmp(sdev->prom_name, "QLGC,isp") &&
  723. strcmp(sdev->prom_name, "SUNW,isp"))
  724. continue;
  725. /* Sometimes Antares cards come up not completely
  726. * setup, and we get a report of a zero IRQ.
  727. * Skip over them in such cases so we survive.
  728. */
  729. if (sdev->irqs[0] == 0) {
  730. printk("qpti%d: Adapter reports no interrupt, "
  731. "skipping over this card.", nqptis);
  732. continue;
  733. }
  734. /* Yep, register and allocate software state. */
  735. qpti_host = scsi_register(tpnt, sizeof(struct qlogicpti));
  736. if (!qpti_host) {
  737. printk("QPTI: Cannot register PTI Qlogic ISP SCSI host");
  738. continue;
  739. }
  740. qpti = (struct qlogicpti *) qpti_host->hostdata;
  741. /* We are wide capable, 16 targets. */
  742. qpti_host->max_id = MAX_TARGETS;
  743. /* Setup back pointers and misc. state. */
  744. qpti->qhost = qpti_host;
  745. qpti->sdev = sdev;
  746. qpti->qpti_id = nqptis++;
  747. qpti->prom_node = sdev->prom_node;
  748. prom_getstring(qpti->prom_node, "name",
  749. qpti->prom_name,
  750. sizeof(qpti->prom_name));
  751. /* This is not correct, actually. There's a switch
  752. * on the PTI cards that put them into "emulation"
  753. * mode- i.e., report themselves as QLGC,isp
  754. * instead of PTI,ptisp. The only real substantive
  755. * difference between non-pti and pti cards is
  756. * the tmon register. Which is possibly even
  757. * there for Qlogic cards, but non-functional.
  758. */
  759. qpti->is_pti = (strcmp (qpti->prom_name, "QLGC,isp") != 0);
  760. qpti_chain_add(qpti);
  761. if (qpti_map_regs(qpti) < 0)
  762. goto fail_unlink;
  763. if (qpti_register_irq(qpti) < 0)
  764. goto fail_unmap_regs;
  765. qpti_get_scsi_id(qpti);
  766. qpti_get_bursts(qpti);
  767. qpti_get_clock(qpti);
  768. /* Clear out scsi_cmnd array. */
  769. memset(qpti->cmd_slots, 0, sizeof(qpti->cmd_slots));
  770. if (qpti_map_queues(qpti) < 0)
  771. goto fail_free_irq;
  772. /* Load the firmware. */
  773. if (qlogicpti_load_firmware(qpti))
  774. goto fail_unmap_queues;
  775. if (qpti->is_pti) {
  776. /* Check the PTI status reg. */
  777. if (qlogicpti_verify_tmon(qpti))
  778. goto fail_unmap_queues;
  779. }
  780. /* Reset the ISP and init res/req queues. */
  781. if (qlogicpti_reset_hardware(qpti_host))
  782. goto fail_unmap_queues;
  783. printk("(Firmware v%d.%d.%d)", qpti->fware_majrev,
  784. qpti->fware_minrev, qpti->fware_micrev);
  785. {
  786. char buffer[60];
  787. prom_getstring (qpti->prom_node,
  788. "isp-fcode", buffer, 60);
  789. if (buffer[0])
  790. printk("(Firmware %s)", buffer);
  791. if (prom_getbool(qpti->prom_node, "differential"))
  792. qpti->differential = 1;
  793. }
  794. printk (" [%s Wide, using %s interface]\n",
  795. (qpti->ultra ? "Ultra" : "Fast"),
  796. (qpti->differential ? "differential" : "single ended"));
  797. nqptis_in_use++;
  798. continue;
  799. fail_unmap_queues:
  800. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  801. sbus_free_consistent(qpti->sdev,
  802. QSIZE(RES_QUEUE_LEN),
  803. qpti->res_cpu, qpti->res_dvma);
  804. sbus_free_consistent(qpti->sdev,
  805. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  806. qpti->req_cpu, qpti->req_dvma);
  807. #undef QSIZE
  808. fail_free_irq:
  809. free_irq(qpti->irq, qpti);
  810. fail_unmap_regs:
  811. sbus_iounmap(qpti->qregs,
  812. qpti->sdev->reg_addrs[0].reg_size);
  813. if (qpti->is_pti)
  814. sbus_iounmap(qpti->sreg, sizeof(unsigned char));
  815. fail_unlink:
  816. qpti_chain_del(qpti);
  817. scsi_unregister(qpti->qhost);
  818. }
  819. }
  820. if (nqptis)
  821. printk("QPTI: Total of %d PTI Qlogic/ISP hosts found, %d actually in use.\n",
  822. nqptis, nqptis_in_use);
  823. qptis_running = nqptis_in_use;
  824. return nqptis;
  825. }
  826. static int qlogicpti_release(struct Scsi_Host *host)
  827. {
  828. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  829. /* Remove visibility from IRQ handlers. */
  830. qpti_chain_del(qpti);
  831. /* Shut up the card. */
  832. sbus_writew(0, qpti->qregs + SBUS_CTRL);
  833. /* Free IRQ handler and unmap Qlogic,ISP and PTI status regs. */
  834. free_irq(qpti->irq, qpti);
  835. #define QSIZE(entries) (((entries) + 1) * QUEUE_ENTRY_LEN)
  836. sbus_free_consistent(qpti->sdev,
  837. QSIZE(RES_QUEUE_LEN),
  838. qpti->res_cpu, qpti->res_dvma);
  839. sbus_free_consistent(qpti->sdev,
  840. QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
  841. qpti->req_cpu, qpti->req_dvma);
  842. #undef QSIZE
  843. sbus_iounmap(qpti->qregs, qpti->sdev->reg_addrs[0].reg_size);
  844. if (qpti->is_pti)
  845. sbus_iounmap(qpti->sreg, sizeof(unsigned char));
  846. return 0;
  847. }
  848. const char *qlogicpti_info(struct Scsi_Host *host)
  849. {
  850. static char buf[80];
  851. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  852. sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %s regs at %p",
  853. __irq_itoa(qpti->qhost->irq), qpti->qregs);
  854. return buf;
  855. }
  856. /* I am a certified frobtronicist. */
  857. static inline void marker_frob(struct Command_Entry *cmd)
  858. {
  859. struct Marker_Entry *marker = (struct Marker_Entry *) cmd;
  860. memset(marker, 0, sizeof(struct Marker_Entry));
  861. marker->hdr.entry_cnt = 1;
  862. marker->hdr.entry_type = ENTRY_MARKER;
  863. marker->modifier = SYNC_ALL;
  864. marker->rsvd = 0;
  865. }
  866. static inline void cmd_frob(struct Command_Entry *cmd, struct scsi_cmnd *Cmnd,
  867. struct qlogicpti *qpti)
  868. {
  869. memset(cmd, 0, sizeof(struct Command_Entry));
  870. cmd->hdr.entry_cnt = 1;
  871. cmd->hdr.entry_type = ENTRY_COMMAND;
  872. cmd->target_id = Cmnd->device->id;
  873. cmd->target_lun = Cmnd->device->lun;
  874. cmd->cdb_length = Cmnd->cmd_len;
  875. cmd->control_flags = 0;
  876. if (Cmnd->device->tagged_supported) {
  877. if (qpti->cmd_count[Cmnd->device->id] == 0)
  878. qpti->tag_ages[Cmnd->device->id] = jiffies;
  879. if ((jiffies - qpti->tag_ages[Cmnd->device->id]) > (5*HZ)) {
  880. cmd->control_flags = CFLAG_ORDERED_TAG;
  881. qpti->tag_ages[Cmnd->device->id] = jiffies;
  882. } else
  883. cmd->control_flags = CFLAG_SIMPLE_TAG;
  884. }
  885. if ((Cmnd->cmnd[0] == WRITE_6) ||
  886. (Cmnd->cmnd[0] == WRITE_10) ||
  887. (Cmnd->cmnd[0] == WRITE_12))
  888. cmd->control_flags |= CFLAG_WRITE;
  889. else
  890. cmd->control_flags |= CFLAG_READ;
  891. cmd->time_out = 30;
  892. memcpy(cmd->cdb, Cmnd->cmnd, Cmnd->cmd_len);
  893. }
  894. /* Do it to it baby. */
  895. static inline int load_cmd(struct scsi_cmnd *Cmnd, struct Command_Entry *cmd,
  896. struct qlogicpti *qpti, u_int in_ptr, u_int out_ptr)
  897. {
  898. struct dataseg *ds;
  899. struct scatterlist *sg;
  900. int i, n;
  901. if (Cmnd->use_sg) {
  902. int sg_count;
  903. sg = (struct scatterlist *) Cmnd->buffer;
  904. sg_count = sbus_map_sg(qpti->sdev, sg, Cmnd->use_sg, Cmnd->sc_data_direction);
  905. ds = cmd->dataseg;
  906. cmd->segment_cnt = sg_count;
  907. /* Fill in first four sg entries: */
  908. n = sg_count;
  909. if (n > 4)
  910. n = 4;
  911. for (i = 0; i < n; i++, sg++) {
  912. ds[i].d_base = sg_dma_address(sg);
  913. ds[i].d_count = sg_dma_len(sg);
  914. }
  915. sg_count -= 4;
  916. while (sg_count > 0) {
  917. struct Continuation_Entry *cont;
  918. ++cmd->hdr.entry_cnt;
  919. cont = (struct Continuation_Entry *) &qpti->req_cpu[in_ptr];
  920. in_ptr = NEXT_REQ_PTR(in_ptr);
  921. if (in_ptr == out_ptr)
  922. return -1;
  923. cont->hdr.entry_type = ENTRY_CONTINUATION;
  924. cont->hdr.entry_cnt = 0;
  925. cont->hdr.sys_def_1 = 0;
  926. cont->hdr.flags = 0;
  927. cont->reserved = 0;
  928. ds = cont->dataseg;
  929. n = sg_count;
  930. if (n > 7)
  931. n = 7;
  932. for (i = 0; i < n; i++, sg++) {
  933. ds[i].d_base = sg_dma_address(sg);
  934. ds[i].d_count = sg_dma_len(sg);
  935. }
  936. sg_count -= n;
  937. }
  938. } else if (Cmnd->request_bufflen) {
  939. Cmnd->SCp.ptr = (char *)(unsigned long)
  940. sbus_map_single(qpti->sdev,
  941. Cmnd->request_buffer,
  942. Cmnd->request_bufflen,
  943. Cmnd->sc_data_direction);
  944. cmd->dataseg[0].d_base = (u32) ((unsigned long)Cmnd->SCp.ptr);
  945. cmd->dataseg[0].d_count = Cmnd->request_bufflen;
  946. cmd->segment_cnt = 1;
  947. } else {
  948. cmd->dataseg[0].d_base = 0;
  949. cmd->dataseg[0].d_count = 0;
  950. cmd->segment_cnt = 1; /* Shouldn't this be 0? */
  951. }
  952. /* Committed, record Scsi_Cmd so we can find it later. */
  953. cmd->handle = in_ptr;
  954. qpti->cmd_slots[in_ptr] = Cmnd;
  955. qpti->cmd_count[Cmnd->device->id]++;
  956. sbus_writew(in_ptr, qpti->qregs + MBOX4);
  957. qpti->req_in_ptr = in_ptr;
  958. return in_ptr;
  959. }
  960. static inline void update_can_queue(struct Scsi_Host *host, u_int in_ptr, u_int out_ptr)
  961. {
  962. /* Temporary workaround until bug is found and fixed (one bug has been found
  963. already, but fixing it makes things even worse) -jj */
  964. int num_free = QLOGICPTI_REQ_QUEUE_LEN - REQ_QUEUE_DEPTH(in_ptr, out_ptr) - 64;
  965. host->can_queue = host->host_busy + num_free;
  966. host->sg_tablesize = QLOGICPTI_MAX_SG(num_free);
  967. }
  968. /*
  969. * Until we scan the entire bus with inquiries, go throught this fella...
  970. */
  971. static void ourdone(struct scsi_cmnd *Cmnd)
  972. {
  973. struct qlogicpti *qpti = (struct qlogicpti *) Cmnd->device->host->hostdata;
  974. int tgt = Cmnd->device->id;
  975. void (*done) (struct scsi_cmnd *);
  976. /* This grot added by DaveM, blame him for ugliness.
  977. * The issue is that in the 2.3.x driver we use the
  978. * host_scribble portion of the scsi command as a
  979. * completion linked list at interrupt service time,
  980. * so we have to store the done function pointer elsewhere.
  981. */
  982. done = (void (*)(struct scsi_cmnd *))
  983. (((unsigned long) Cmnd->SCp.Message)
  984. #ifdef __sparc_v9__
  985. | ((unsigned long) Cmnd->SCp.Status << 32UL)
  986. #endif
  987. );
  988. if ((qpti->sbits & (1 << tgt)) == 0) {
  989. int ok = host_byte(Cmnd->result) == DID_OK;
  990. if (Cmnd->cmnd[0] == 0x12 && ok) {
  991. unsigned char *iqd;
  992. if (Cmnd->use_sg != 0)
  993. BUG();
  994. iqd = ((unsigned char *)Cmnd->buffer);
  995. /* tags handled in midlayer */
  996. /* enable sync mode? */
  997. if (iqd[7] & 0x10) {
  998. qpti->dev_param[tgt].device_flags |= 0x10;
  999. } else {
  1000. qpti->dev_param[tgt].synchronous_offset = 0;
  1001. qpti->dev_param[tgt].synchronous_period = 0;
  1002. }
  1003. /* are we wide capable? */
  1004. if (iqd[7] & 0x20) {
  1005. qpti->dev_param[tgt].device_flags |= 0x20;
  1006. }
  1007. qpti->sbits |= (1 << tgt);
  1008. } else if (!ok) {
  1009. qpti->sbits |= (1 << tgt);
  1010. }
  1011. }
  1012. done(Cmnd);
  1013. }
  1014. static int qlogicpti_queuecommand(struct scsi_cmnd *Cmnd, void (*done)(struct scsi_cmnd *));
  1015. static int qlogicpti_queuecommand_slow(struct scsi_cmnd *Cmnd,
  1016. void (*done)(struct scsi_cmnd *))
  1017. {
  1018. struct qlogicpti *qpti = (struct qlogicpti *) Cmnd->device->host->hostdata;
  1019. /*
  1020. * done checking this host adapter?
  1021. * If not, then rewrite the command
  1022. * to finish through ourdone so we
  1023. * can peek at Inquiry data results.
  1024. */
  1025. if (qpti->sbits && qpti->sbits != 0xffff) {
  1026. /* See above about in ourdone this ugliness... */
  1027. Cmnd->SCp.Message = ((unsigned long)done) & 0xffffffff;
  1028. #ifdef CONFIG_SPARC64
  1029. Cmnd->SCp.Status = ((unsigned long)done >> 32UL) & 0xffffffff;
  1030. #endif
  1031. return qlogicpti_queuecommand(Cmnd, ourdone);
  1032. }
  1033. /*
  1034. * We've peeked at all targets for this bus- time
  1035. * to set parameters for devices for real now.
  1036. */
  1037. if (qpti->sbits == 0xffff) {
  1038. int i;
  1039. for(i = 0; i < MAX_TARGETS; i++) {
  1040. u_short param[6];
  1041. param[0] = MBOX_SET_TARGET_PARAMS;
  1042. param[1] = (i << 8);
  1043. param[2] = (qpti->dev_param[i].device_flags << 8);
  1044. if (qpti->dev_param[i].device_flags & 0x10) {
  1045. param[3] = (qpti->dev_param[i].synchronous_offset << 8) |
  1046. qpti->dev_param[i].synchronous_period;
  1047. } else {
  1048. param[3] = 0;
  1049. }
  1050. (void) qlogicpti_mbox_command(qpti, param, 0);
  1051. }
  1052. /*
  1053. * set to zero so any traverse through ourdone
  1054. * doesn't start the whole process again,
  1055. */
  1056. qpti->sbits = 0;
  1057. }
  1058. /* check to see if we're done with all adapters... */
  1059. for (qpti = qptichain; qpti != NULL; qpti = qpti->next) {
  1060. if (qpti->sbits) {
  1061. break;
  1062. }
  1063. }
  1064. /*
  1065. * if we hit the end of the chain w/o finding adapters still
  1066. * capability-configuring, then we're done with all adapters
  1067. * and can rock on..
  1068. */
  1069. if (qpti == NULL)
  1070. Cmnd->device->host->hostt->queuecommand = qlogicpti_queuecommand;
  1071. return qlogicpti_queuecommand(Cmnd, done);
  1072. }
  1073. /*
  1074. * The middle SCSI layer ensures that queuecommand never gets invoked
  1075. * concurrently with itself or the interrupt handler (though the
  1076. * interrupt handler may call this routine as part of
  1077. * request-completion handling).
  1078. *
  1079. * "This code must fly." -davem
  1080. */
  1081. static int qlogicpti_queuecommand(struct scsi_cmnd *Cmnd, void (*done)(struct scsi_cmnd *))
  1082. {
  1083. struct Scsi_Host *host = Cmnd->device->host;
  1084. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  1085. struct Command_Entry *cmd;
  1086. u_int out_ptr;
  1087. int in_ptr;
  1088. Cmnd->scsi_done = done;
  1089. in_ptr = qpti->req_in_ptr;
  1090. cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
  1091. out_ptr = sbus_readw(qpti->qregs + MBOX4);
  1092. in_ptr = NEXT_REQ_PTR(in_ptr);
  1093. if (in_ptr == out_ptr)
  1094. goto toss_command;
  1095. if (qpti->send_marker) {
  1096. marker_frob(cmd);
  1097. qpti->send_marker = 0;
  1098. if (NEXT_REQ_PTR(in_ptr) == out_ptr) {
  1099. sbus_writew(in_ptr, qpti->qregs + MBOX4);
  1100. qpti->req_in_ptr = in_ptr;
  1101. goto toss_command;
  1102. }
  1103. cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
  1104. in_ptr = NEXT_REQ_PTR(in_ptr);
  1105. }
  1106. cmd_frob(cmd, Cmnd, qpti);
  1107. if ((in_ptr = load_cmd(Cmnd, cmd, qpti, in_ptr, out_ptr)) == -1)
  1108. goto toss_command;
  1109. update_can_queue(host, in_ptr, out_ptr);
  1110. return 0;
  1111. toss_command:
  1112. printk(KERN_EMERG "qlogicpti%d: request queue overflow\n",
  1113. qpti->qpti_id);
  1114. /* Unfortunately, unless you use the new EH code, which
  1115. * we don't, the midlayer will ignore the return value,
  1116. * which is insane. We pick up the pieces like this.
  1117. */
  1118. Cmnd->result = DID_BUS_BUSY;
  1119. done(Cmnd);
  1120. return 1;
  1121. }
  1122. static int qlogicpti_return_status(struct Status_Entry *sts, int id)
  1123. {
  1124. int host_status = DID_ERROR;
  1125. switch (sts->completion_status) {
  1126. case CS_COMPLETE:
  1127. host_status = DID_OK;
  1128. break;
  1129. case CS_INCOMPLETE:
  1130. if (!(sts->state_flags & SF_GOT_BUS))
  1131. host_status = DID_NO_CONNECT;
  1132. else if (!(sts->state_flags & SF_GOT_TARGET))
  1133. host_status = DID_BAD_TARGET;
  1134. else if (!(sts->state_flags & SF_SENT_CDB))
  1135. host_status = DID_ERROR;
  1136. else if (!(sts->state_flags & SF_TRANSFERRED_DATA))
  1137. host_status = DID_ERROR;
  1138. else if (!(sts->state_flags & SF_GOT_STATUS))
  1139. host_status = DID_ERROR;
  1140. else if (!(sts->state_flags & SF_GOT_SENSE))
  1141. host_status = DID_ERROR;
  1142. break;
  1143. case CS_DMA_ERROR:
  1144. case CS_TRANSPORT_ERROR:
  1145. host_status = DID_ERROR;
  1146. break;
  1147. case CS_RESET_OCCURRED:
  1148. case CS_BUS_RESET:
  1149. host_status = DID_RESET;
  1150. break;
  1151. case CS_ABORTED:
  1152. host_status = DID_ABORT;
  1153. break;
  1154. case CS_TIMEOUT:
  1155. host_status = DID_TIME_OUT;
  1156. break;
  1157. case CS_DATA_OVERRUN:
  1158. case CS_COMMAND_OVERRUN:
  1159. case CS_STATUS_OVERRUN:
  1160. case CS_BAD_MESSAGE:
  1161. case CS_NO_MESSAGE_OUT:
  1162. case CS_EXT_ID_FAILED:
  1163. case CS_IDE_MSG_FAILED:
  1164. case CS_ABORT_MSG_FAILED:
  1165. case CS_NOP_MSG_FAILED:
  1166. case CS_PARITY_ERROR_MSG_FAILED:
  1167. case CS_DEVICE_RESET_MSG_FAILED:
  1168. case CS_ID_MSG_FAILED:
  1169. case CS_UNEXP_BUS_FREE:
  1170. host_status = DID_ERROR;
  1171. break;
  1172. case CS_DATA_UNDERRUN:
  1173. host_status = DID_OK;
  1174. break;
  1175. default:
  1176. printk(KERN_EMERG "qpti%d: unknown completion status 0x%04x\n",
  1177. id, sts->completion_status);
  1178. host_status = DID_ERROR;
  1179. break;
  1180. }
  1181. return (sts->scsi_status & STATUS_MASK) | (host_status << 16);
  1182. }
  1183. static struct scsi_cmnd *qlogicpti_intr_handler(struct qlogicpti *qpti)
  1184. {
  1185. struct scsi_cmnd *Cmnd, *done_queue = NULL;
  1186. struct Status_Entry *sts;
  1187. u_int in_ptr, out_ptr;
  1188. if (!(sbus_readw(qpti->qregs + SBUS_STAT) & SBUS_STAT_RINT))
  1189. return NULL;
  1190. in_ptr = sbus_readw(qpti->qregs + MBOX5);
  1191. sbus_writew(HCCTRL_CRIRQ, qpti->qregs + HCCTRL);
  1192. if (sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK) {
  1193. switch (sbus_readw(qpti->qregs + MBOX0)) {
  1194. case ASYNC_SCSI_BUS_RESET:
  1195. case EXECUTION_TIMEOUT_RESET:
  1196. qpti->send_marker = 1;
  1197. break;
  1198. case INVALID_COMMAND:
  1199. case HOST_INTERFACE_ERROR:
  1200. case COMMAND_ERROR:
  1201. case COMMAND_PARAM_ERROR:
  1202. break;
  1203. };
  1204. sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
  1205. }
  1206. /* This looks like a network driver! */
  1207. out_ptr = qpti->res_out_ptr;
  1208. while (out_ptr != in_ptr) {
  1209. u_int cmd_slot;
  1210. sts = (struct Status_Entry *) &qpti->res_cpu[out_ptr];
  1211. out_ptr = NEXT_RES_PTR(out_ptr);
  1212. /* We store an index in the handle, not the pointer in
  1213. * some form. This avoids problems due to the fact
  1214. * that the handle provided is only 32-bits. -DaveM
  1215. */
  1216. cmd_slot = sts->handle;
  1217. Cmnd = qpti->cmd_slots[cmd_slot];
  1218. qpti->cmd_slots[cmd_slot] = NULL;
  1219. if (sts->completion_status == CS_RESET_OCCURRED ||
  1220. sts->completion_status == CS_ABORTED ||
  1221. (sts->status_flags & STF_BUS_RESET))
  1222. qpti->send_marker = 1;
  1223. if (sts->state_flags & SF_GOT_SENSE)
  1224. memcpy(Cmnd->sense_buffer, sts->req_sense_data,
  1225. sizeof(Cmnd->sense_buffer));
  1226. if (sts->hdr.entry_type == ENTRY_STATUS)
  1227. Cmnd->result =
  1228. qlogicpti_return_status(sts, qpti->qpti_id);
  1229. else
  1230. Cmnd->result = DID_ERROR << 16;
  1231. if (Cmnd->use_sg) {
  1232. sbus_unmap_sg(qpti->sdev,
  1233. (struct scatterlist *)Cmnd->buffer,
  1234. Cmnd->use_sg,
  1235. Cmnd->sc_data_direction);
  1236. } else {
  1237. sbus_unmap_single(qpti->sdev,
  1238. (__u32)((unsigned long)Cmnd->SCp.ptr),
  1239. Cmnd->request_bufflen,
  1240. Cmnd->sc_data_direction);
  1241. }
  1242. qpti->cmd_count[Cmnd->device->id]--;
  1243. sbus_writew(out_ptr, qpti->qregs + MBOX5);
  1244. Cmnd->host_scribble = (unsigned char *) done_queue;
  1245. done_queue = Cmnd;
  1246. }
  1247. qpti->res_out_ptr = out_ptr;
  1248. return done_queue;
  1249. }
  1250. static irqreturn_t qpti_intr(int irq, void *dev_id, struct pt_regs *regs)
  1251. {
  1252. struct qlogicpti *qpti = dev_id;
  1253. unsigned long flags;
  1254. struct scsi_cmnd *dq;
  1255. spin_lock_irqsave(qpti->qhost->host_lock, flags);
  1256. dq = qlogicpti_intr_handler(qpti);
  1257. if (dq != NULL) {
  1258. do {
  1259. struct scsi_cmnd *next;
  1260. next = (struct scsi_cmnd *) dq->host_scribble;
  1261. dq->scsi_done(dq);
  1262. dq = next;
  1263. } while (dq != NULL);
  1264. }
  1265. spin_unlock_irqrestore(qpti->qhost->host_lock, flags);
  1266. return IRQ_HANDLED;
  1267. }
  1268. static int qlogicpti_abort(struct scsi_cmnd *Cmnd)
  1269. {
  1270. u_short param[6];
  1271. struct Scsi_Host *host = Cmnd->device->host;
  1272. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  1273. int return_status = SUCCESS;
  1274. u32 cmd_cookie;
  1275. int i;
  1276. printk(KERN_WARNING "qlogicpti : Aborting cmd for tgt[%d] lun[%d]\n",
  1277. (int)Cmnd->device->id, (int)Cmnd->device->lun);
  1278. qlogicpti_disable_irqs(qpti);
  1279. /* Find the 32-bit cookie we gave to the firmware for
  1280. * this command.
  1281. */
  1282. for (i = 0; i < QLOGICPTI_REQ_QUEUE_LEN + 1; i++)
  1283. if (qpti->cmd_slots[i] == Cmnd)
  1284. break;
  1285. cmd_cookie = i;
  1286. param[0] = MBOX_ABORT;
  1287. param[1] = (((u_short) Cmnd->device->id) << 8) | Cmnd->device->lun;
  1288. param[2] = cmd_cookie >> 16;
  1289. param[3] = cmd_cookie & 0xffff;
  1290. if (qlogicpti_mbox_command(qpti, param, 0) ||
  1291. (param[0] != MBOX_COMMAND_COMPLETE)) {
  1292. printk(KERN_EMERG "qlogicpti : scsi abort failure: %x\n", param[0]);
  1293. return_status = FAILED;
  1294. }
  1295. qlogicpti_enable_irqs(qpti);
  1296. return return_status;
  1297. }
  1298. static int qlogicpti_reset(struct scsi_cmnd *Cmnd)
  1299. {
  1300. u_short param[6];
  1301. struct Scsi_Host *host = Cmnd->device->host;
  1302. struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
  1303. int return_status = SUCCESS;
  1304. printk(KERN_WARNING "qlogicpti : Resetting SCSI bus!\n");
  1305. qlogicpti_disable_irqs(qpti);
  1306. param[0] = MBOX_BUS_RESET;
  1307. param[1] = qpti->host_param.bus_reset_delay;
  1308. if (qlogicpti_mbox_command(qpti, param, 0) ||
  1309. (param[0] != MBOX_COMMAND_COMPLETE)) {
  1310. printk(KERN_EMERG "qlogicisp : scsi bus reset failure: %x\n", param[0]);
  1311. return_status = FAILED;
  1312. }
  1313. qlogicpti_enable_irqs(qpti);
  1314. return return_status;
  1315. }
  1316. static struct scsi_host_template driver_template = {
  1317. .detect = qlogicpti_detect,
  1318. .release = qlogicpti_release,
  1319. .info = qlogicpti_info,
  1320. .queuecommand = qlogicpti_queuecommand_slow,
  1321. .eh_abort_handler = qlogicpti_abort,
  1322. .eh_bus_reset_handler = qlogicpti_reset,
  1323. .can_queue = QLOGICPTI_REQ_QUEUE_LEN,
  1324. .this_id = 7,
  1325. .sg_tablesize = QLOGICPTI_MAX_SG(QLOGICPTI_REQ_QUEUE_LEN),
  1326. .cmd_per_lun = 1,
  1327. .use_clustering = ENABLE_CLUSTERING,
  1328. };
  1329. #include "scsi_module.c"
  1330. MODULE_LICENSE("GPL");