qlogicfc.c 66 KB

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  1. /*
  2. * QLogic ISP2x00 SCSI-FCP
  3. * Written by Erik H. Moe, ehm@cris.com
  4. * Copyright 1995, Erik H. Moe
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2, or (at your option) any
  9. * later version.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. */
  16. /* Renamed and updated to 1.3.x by Michael Griffith <grif@cs.ucr.edu> */
  17. /* This is a version of the isp1020 driver which was modified by
  18. * Chris Loveland <cwl@iol.unh.edu> to support the isp2100 and isp2200
  19. *
  20. * Big endian support and dynamic DMA mapping added
  21. * by Jakub Jelinek <jakub@redhat.com>.
  22. *
  23. * Conversion to final pci64 DMA interfaces
  24. * by David S. Miller <davem@redhat.com>.
  25. */
  26. /*
  27. * $Date: 1995/09/22 02:23:15 $
  28. * $Revision: 0.5 $
  29. *
  30. * $Log: isp1020.c,v $
  31. * Revision 0.5 1995/09/22 02:23:15 root
  32. * do auto request sense
  33. *
  34. * Revision 0.4 1995/08/07 04:44:33 root
  35. * supply firmware with driver.
  36. * numerous bug fixes/general cleanup of code.
  37. *
  38. * Revision 0.3 1995/07/16 16:15:39 root
  39. * added reset/abort code.
  40. *
  41. * Revision 0.2 1995/06/29 03:14:19 root
  42. * fixed biosparam.
  43. * added queue protocol.
  44. *
  45. * Revision 0.1 1995/06/25 01:55:45 root
  46. * Initial release.
  47. *
  48. */
  49. #include <linux/blkdev.h>
  50. #include <linux/kernel.h>
  51. #include <linux/string.h>
  52. #include <linux/ioport.h>
  53. #include <linux/sched.h>
  54. #include <linux/types.h>
  55. #include <linux/pci.h>
  56. #include <linux/delay.h>
  57. #include <linux/unistd.h>
  58. #include <linux/spinlock.h>
  59. #include <linux/interrupt.h>
  60. #include <asm/io.h>
  61. #include <asm/irq.h>
  62. #include "scsi.h"
  63. #include <scsi/scsi_host.h>
  64. #define pci64_dma_hi32(a) ((u32) (0xffffffff & (((u64)(a))>>32)))
  65. #define pci64_dma_lo32(a) ((u32) (0xffffffff & (((u64)(a)))))
  66. #define pci64_dma_build(hi,lo) \
  67. ((dma_addr_t)(((u64)(lo))|(((u64)(hi))<<32)))
  68. /*
  69. * With the qlogic interface, every queue slot can hold a SCSI
  70. * command with up to 2 scatter/gather entries. If we need more
  71. * than 2 entries, continuation entries can be used that hold
  72. * another 5 entries each. Unlike for other drivers, this means
  73. * that the maximum number of scatter/gather entries we can
  74. * support at any given time is a function of the number of queue
  75. * slots available. That is, host->can_queue and host->sg_tablesize
  76. * are dynamic and _not_ independent. This all works fine because
  77. * requests are queued serially and the scatter/gather limit is
  78. * determined for each queue request anew.
  79. */
  80. #define DATASEGS_PER_COMMAND 2
  81. #define DATASEGS_PER_CONT 5
  82. #define QLOGICFC_REQ_QUEUE_LEN 255 /* must be power of two - 1 */
  83. #define QLOGICFC_MAX_SG(ql) (DATASEGS_PER_COMMAND + (((ql) > 0) ? DATASEGS_PER_CONT*((ql) - 1) : 0))
  84. #define QLOGICFC_CMD_PER_LUN 8
  85. /* Configuration section **************************************************** */
  86. /* Set the following macro to 1 to reload the ISP2x00's firmware. This is
  87. version 1.17.30 of the isp2100's firmware and version 2.00.40 of the
  88. isp2200's firmware.
  89. */
  90. #define USE_NVRAM_DEFAULTS 1
  91. #define ISP2x00_PORTDB 1
  92. /* Set the following to 1 to include fabric support, fabric support is
  93. * currently not as well tested as the other aspects of the driver */
  94. #define ISP2x00_FABRIC 1
  95. /* Macros used for debugging */
  96. #define DEBUG_ISP2x00 0
  97. #define DEBUG_ISP2x00_INT 0
  98. #define DEBUG_ISP2x00_INTR 0
  99. #define DEBUG_ISP2x00_SETUP 0
  100. #define DEBUG_ISP2x00_FABRIC 0
  101. #define TRACE_ISP 0
  102. #define DEFAULT_LOOP_COUNT 1000000000
  103. #define ISP_TIMEOUT (2*HZ)
  104. /* End Configuration section ************************************************ */
  105. #include <linux/module.h>
  106. #if TRACE_ISP
  107. #define TRACE_BUF_LEN (32*1024)
  108. struct {
  109. u_long next;
  110. struct {
  111. u_long time;
  112. u_int index;
  113. u_int addr;
  114. u_char *name;
  115. } buf[TRACE_BUF_LEN];
  116. } trace;
  117. #define TRACE(w, i, a) \
  118. { \
  119. unsigned long flags; \
  120. \
  121. save_flags(flags); \
  122. cli(); \
  123. trace.buf[trace.next].name = (w); \
  124. trace.buf[trace.next].time = jiffies; \
  125. trace.buf[trace.next].index = (i); \
  126. trace.buf[trace.next].addr = (long) (a); \
  127. trace.next = (trace.next + 1) & (TRACE_BUF_LEN - 1); \
  128. restore_flags(flags); \
  129. }
  130. #else
  131. #define TRACE(w, i, a)
  132. #endif
  133. #if DEBUG_ISP2x00_FABRIC
  134. #define DEBUG_FABRIC(x) x
  135. #else
  136. #define DEBUG_FABRIC(x)
  137. #endif /* DEBUG_ISP2x00_FABRIC */
  138. #if DEBUG_ISP2x00
  139. #define ENTER(x) printk("isp2x00 : entering %s()\n", x);
  140. #define LEAVE(x) printk("isp2x00 : leaving %s()\n", x);
  141. #define DEBUG(x) x
  142. #else
  143. #define ENTER(x)
  144. #define LEAVE(x)
  145. #define DEBUG(x)
  146. #endif /* DEBUG_ISP2x00 */
  147. #if DEBUG_ISP2x00_INTR
  148. #define ENTER_INTR(x) printk("isp2x00 : entering %s()\n", x);
  149. #define LEAVE_INTR(x) printk("isp2x00 : leaving %s()\n", x);
  150. #define DEBUG_INTR(x) x
  151. #else
  152. #define ENTER_INTR(x)
  153. #define LEAVE_INTR(x)
  154. #define DEBUG_INTR(x)
  155. #endif /* DEBUG ISP2x00_INTR */
  156. #define ISP2100_REV_ID1 1
  157. #define ISP2100_REV_ID3 3
  158. #define ISP2200_REV_ID5 5
  159. /* host configuration and control registers */
  160. #define HOST_HCCR 0xc0 /* host command and control */
  161. /* pci bus interface registers */
  162. #define FLASH_BIOS_ADDR 0x00
  163. #define FLASH_BIOS_DATA 0x02
  164. #define ISP_CTRL_STATUS 0x06 /* configuration register #1 */
  165. #define PCI_INTER_CTL 0x08 /* pci interrupt control */
  166. #define PCI_INTER_STS 0x0a /* pci interrupt status */
  167. #define PCI_SEMAPHORE 0x0c /* pci semaphore */
  168. #define PCI_NVRAM 0x0e /* pci nvram interface */
  169. /* mailbox registers */
  170. #define MBOX0 0x10 /* mailbox 0 */
  171. #define MBOX1 0x12 /* mailbox 1 */
  172. #define MBOX2 0x14 /* mailbox 2 */
  173. #define MBOX3 0x16 /* mailbox 3 */
  174. #define MBOX4 0x18 /* mailbox 4 */
  175. #define MBOX5 0x1a /* mailbox 5 */
  176. #define MBOX6 0x1c /* mailbox 6 */
  177. #define MBOX7 0x1e /* mailbox 7 */
  178. /* mailbox command complete status codes */
  179. #define MBOX_COMMAND_COMPLETE 0x4000
  180. #define INVALID_COMMAND 0x4001
  181. #define HOST_INTERFACE_ERROR 0x4002
  182. #define TEST_FAILED 0x4003
  183. #define COMMAND_ERROR 0x4005
  184. #define COMMAND_PARAM_ERROR 0x4006
  185. #define PORT_ID_USED 0x4007
  186. #define LOOP_ID_USED 0x4008
  187. #define ALL_IDS_USED 0x4009
  188. /* async event status codes */
  189. #define RESET_DETECTED 0x8001
  190. #define SYSTEM_ERROR 0x8002
  191. #define REQUEST_TRANSFER_ERROR 0x8003
  192. #define RESPONSE_TRANSFER_ERROR 0x8004
  193. #define REQUEST_QUEUE_WAKEUP 0x8005
  194. #define LIP_OCCURRED 0x8010
  195. #define LOOP_UP 0x8011
  196. #define LOOP_DOWN 0x8012
  197. #define LIP_RECEIVED 0x8013
  198. #define PORT_DB_CHANGED 0x8014
  199. #define CHANGE_NOTIFICATION 0x8015
  200. #define SCSI_COMMAND_COMPLETE 0x8020
  201. #define POINT_TO_POINT_UP 0x8030
  202. #define CONNECTION_MODE 0x8036
  203. struct Entry_header {
  204. u_char entry_type;
  205. u_char entry_cnt;
  206. u_char sys_def_1;
  207. u_char flags;
  208. };
  209. /* entry header type commands */
  210. #define ENTRY_COMMAND 0x19
  211. #define ENTRY_CONTINUATION 0x0a
  212. #define ENTRY_STATUS 0x03
  213. #define ENTRY_MARKER 0x04
  214. /* entry header flag definitions */
  215. #define EFLAG_BUSY 2
  216. #define EFLAG_BAD_HEADER 4
  217. #define EFLAG_BAD_PAYLOAD 8
  218. struct dataseg {
  219. u_int d_base;
  220. u_int d_base_hi;
  221. u_int d_count;
  222. };
  223. struct Command_Entry {
  224. struct Entry_header hdr;
  225. u_int handle;
  226. u_char target_lun;
  227. u_char target_id;
  228. u_short expanded_lun;
  229. u_short control_flags;
  230. u_short rsvd2;
  231. u_short time_out;
  232. u_short segment_cnt;
  233. u_char cdb[16];
  234. u_int total_byte_cnt;
  235. struct dataseg dataseg[DATASEGS_PER_COMMAND];
  236. };
  237. /* command entry control flag definitions */
  238. #define CFLAG_NODISC 0x01
  239. #define CFLAG_HEAD_TAG 0x02
  240. #define CFLAG_ORDERED_TAG 0x04
  241. #define CFLAG_SIMPLE_TAG 0x08
  242. #define CFLAG_TAR_RTN 0x10
  243. #define CFLAG_READ 0x20
  244. #define CFLAG_WRITE 0x40
  245. struct Continuation_Entry {
  246. struct Entry_header hdr;
  247. struct dataseg dataseg[DATASEGS_PER_CONT];
  248. };
  249. struct Marker_Entry {
  250. struct Entry_header hdr;
  251. u_int reserved;
  252. u_char target_lun;
  253. u_char target_id;
  254. u_char modifier;
  255. u_char expanded_lun;
  256. u_char rsvds[52];
  257. };
  258. /* marker entry modifier definitions */
  259. #define SYNC_DEVICE 0
  260. #define SYNC_TARGET 1
  261. #define SYNC_ALL 2
  262. struct Status_Entry {
  263. struct Entry_header hdr;
  264. u_int handle;
  265. u_short scsi_status;
  266. u_short completion_status;
  267. u_short state_flags;
  268. u_short status_flags;
  269. u_short res_info_len;
  270. u_short req_sense_len;
  271. u_int residual;
  272. u_char res_info[8];
  273. u_char req_sense_data[32];
  274. };
  275. /* status entry completion status definitions */
  276. #define CS_COMPLETE 0x0000
  277. #define CS_DMA_ERROR 0x0002
  278. #define CS_RESET_OCCURRED 0x0004
  279. #define CS_ABORTED 0x0005
  280. #define CS_TIMEOUT 0x0006
  281. #define CS_DATA_OVERRUN 0x0007
  282. #define CS_DATA_UNDERRUN 0x0015
  283. #define CS_QUEUE_FULL 0x001c
  284. #define CS_PORT_UNAVAILABLE 0x0028
  285. #define CS_PORT_LOGGED_OUT 0x0029
  286. #define CS_PORT_CONFIG_CHANGED 0x002a
  287. /* status entry state flag definitions */
  288. #define SF_SENT_CDB 0x0400
  289. #define SF_TRANSFERRED_DATA 0x0800
  290. #define SF_GOT_STATUS 0x1000
  291. /* status entry status flag definitions */
  292. #define STF_BUS_RESET 0x0008
  293. #define STF_DEVICE_RESET 0x0010
  294. #define STF_ABORTED 0x0020
  295. #define STF_TIMEOUT 0x0040
  296. /* interrupt control commands */
  297. #define ISP_EN_INT 0x8000
  298. #define ISP_EN_RISC 0x0008
  299. /* host control commands */
  300. #define HCCR_NOP 0x0000
  301. #define HCCR_RESET 0x1000
  302. #define HCCR_PAUSE 0x2000
  303. #define HCCR_RELEASE 0x3000
  304. #define HCCR_SINGLE_STEP 0x4000
  305. #define HCCR_SET_HOST_INTR 0x5000
  306. #define HCCR_CLEAR_HOST_INTR 0x6000
  307. #define HCCR_CLEAR_RISC_INTR 0x7000
  308. #define HCCR_BP_ENABLE 0x8000
  309. #define HCCR_BIOS_DISABLE 0x9000
  310. #define HCCR_TEST_MODE 0xf000
  311. #define RISC_BUSY 0x0004
  312. /* mailbox commands */
  313. #define MBOX_NO_OP 0x0000
  314. #define MBOX_LOAD_RAM 0x0001
  315. #define MBOX_EXEC_FIRMWARE 0x0002
  316. #define MBOX_DUMP_RAM 0x0003
  317. #define MBOX_WRITE_RAM_WORD 0x0004
  318. #define MBOX_READ_RAM_WORD 0x0005
  319. #define MBOX_MAILBOX_REG_TEST 0x0006
  320. #define MBOX_VERIFY_CHECKSUM 0x0007
  321. #define MBOX_ABOUT_FIRMWARE 0x0008
  322. #define MBOX_LOAD_RISC_RAM 0x0009
  323. #define MBOX_DUMP_RISC_RAM 0x000a
  324. #define MBOX_CHECK_FIRMWARE 0x000e
  325. #define MBOX_INIT_REQ_QUEUE 0x0010
  326. #define MBOX_INIT_RES_QUEUE 0x0011
  327. #define MBOX_EXECUTE_IOCB 0x0012
  328. #define MBOX_WAKE_UP 0x0013
  329. #define MBOX_STOP_FIRMWARE 0x0014
  330. #define MBOX_ABORT_IOCB 0x0015
  331. #define MBOX_ABORT_DEVICE 0x0016
  332. #define MBOX_ABORT_TARGET 0x0017
  333. #define MBOX_BUS_RESET 0x0018
  334. #define MBOX_STOP_QUEUE 0x0019
  335. #define MBOX_START_QUEUE 0x001a
  336. #define MBOX_SINGLE_STEP_QUEUE 0x001b
  337. #define MBOX_ABORT_QUEUE 0x001c
  338. #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
  339. #define MBOX_GET_FIRMWARE_STATUS 0x001f
  340. #define MBOX_GET_INIT_SCSI_ID 0x0020
  341. #define MBOX_GET_RETRY_COUNT 0x0022
  342. #define MBOX_GET_TARGET_PARAMS 0x0028
  343. #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
  344. #define MBOX_SET_RETRY_COUNT 0x0032
  345. #define MBOX_SET_TARGET_PARAMS 0x0038
  346. #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
  347. #define MBOX_EXECUTE_IOCB64 0x0054
  348. #define MBOX_INIT_FIRMWARE 0x0060
  349. #define MBOX_GET_INIT_CB 0x0061
  350. #define MBOX_INIT_LIP 0x0062
  351. #define MBOX_GET_POS_MAP 0x0063
  352. #define MBOX_GET_PORT_DB 0x0064
  353. #define MBOX_CLEAR_ACA 0x0065
  354. #define MBOX_TARGET_RESET 0x0066
  355. #define MBOX_CLEAR_TASK_SET 0x0067
  356. #define MBOX_ABORT_TASK_SET 0x0068
  357. #define MBOX_GET_FIRMWARE_STATE 0x0069
  358. #define MBOX_GET_PORT_NAME 0x006a
  359. #define MBOX_SEND_SNS 0x006e
  360. #define MBOX_PORT_LOGIN 0x006f
  361. #define MBOX_SEND_CHANGE_REQUEST 0x0070
  362. #define MBOX_PORT_LOGOUT 0x0071
  363. /*
  364. * Firmware if needed (note this is a hack, it belongs in a separate
  365. * module.
  366. */
  367. #ifdef CONFIG_SCSI_QLOGIC_FC_FIRMWARE
  368. #include "qlogicfc_asm.c"
  369. #else
  370. static unsigned short risc_code_addr01 = 0x1000 ;
  371. #endif
  372. /* Each element in mbox_param is an 8 bit bitmap where each bit indicates
  373. if that mbox should be copied as input. For example 0x2 would mean
  374. only copy mbox1. */
  375. static const u_char mbox_param[] =
  376. {
  377. 0x01, /* MBOX_NO_OP */
  378. 0x1f, /* MBOX_LOAD_RAM */
  379. 0x03, /* MBOX_EXEC_FIRMWARE */
  380. 0x1f, /* MBOX_DUMP_RAM */
  381. 0x07, /* MBOX_WRITE_RAM_WORD */
  382. 0x03, /* MBOX_READ_RAM_WORD */
  383. 0xff, /* MBOX_MAILBOX_REG_TEST */
  384. 0x03, /* MBOX_VERIFY_CHECKSUM */
  385. 0x01, /* MBOX_ABOUT_FIRMWARE */
  386. 0xff, /* MBOX_LOAD_RISC_RAM */
  387. 0xff, /* MBOX_DUMP_RISC_RAM */
  388. 0x00, /* 0x000b */
  389. 0x00, /* 0x000c */
  390. 0x00, /* 0x000d */
  391. 0x01, /* MBOX_CHECK_FIRMWARE */
  392. 0x00, /* 0x000f */
  393. 0x1f, /* MBOX_INIT_REQ_QUEUE */
  394. 0x2f, /* MBOX_INIT_RES_QUEUE */
  395. 0x0f, /* MBOX_EXECUTE_IOCB */
  396. 0x03, /* MBOX_WAKE_UP */
  397. 0x01, /* MBOX_STOP_FIRMWARE */
  398. 0x0f, /* MBOX_ABORT_IOCB */
  399. 0x03, /* MBOX_ABORT_DEVICE */
  400. 0x07, /* MBOX_ABORT_TARGET */
  401. 0x03, /* MBOX_BUS_RESET */
  402. 0x03, /* MBOX_STOP_QUEUE */
  403. 0x03, /* MBOX_START_QUEUE */
  404. 0x03, /* MBOX_SINGLE_STEP_QUEUE */
  405. 0x03, /* MBOX_ABORT_QUEUE */
  406. 0x03, /* MBOX_GET_DEV_QUEUE_STATUS */
  407. 0x00, /* 0x001e */
  408. 0x01, /* MBOX_GET_FIRMWARE_STATUS */
  409. 0x01, /* MBOX_GET_INIT_SCSI_ID */
  410. 0x00, /* 0x0021 */
  411. 0x01, /* MBOX_GET_RETRY_COUNT */
  412. 0x00, /* 0x0023 */
  413. 0x00, /* 0x0024 */
  414. 0x00, /* 0x0025 */
  415. 0x00, /* 0x0026 */
  416. 0x00, /* 0x0027 */
  417. 0x03, /* MBOX_GET_TARGET_PARAMS */
  418. 0x03, /* MBOX_GET_DEV_QUEUE_PARAMS */
  419. 0x00, /* 0x002a */
  420. 0x00, /* 0x002b */
  421. 0x00, /* 0x002c */
  422. 0x00, /* 0x002d */
  423. 0x00, /* 0x002e */
  424. 0x00, /* 0x002f */
  425. 0x00, /* 0x0030 */
  426. 0x00, /* 0x0031 */
  427. 0x07, /* MBOX_SET_RETRY_COUNT */
  428. 0x00, /* 0x0033 */
  429. 0x00, /* 0x0034 */
  430. 0x00, /* 0x0035 */
  431. 0x00, /* 0x0036 */
  432. 0x00, /* 0x0037 */
  433. 0x0f, /* MBOX_SET_TARGET_PARAMS */
  434. 0x0f, /* MBOX_SET_DEV_QUEUE_PARAMS */
  435. 0x00, /* 0x003a */
  436. 0x00, /* 0x003b */
  437. 0x00, /* 0x003c */
  438. 0x00, /* 0x003d */
  439. 0x00, /* 0x003e */
  440. 0x00, /* 0x003f */
  441. 0x00, /* 0x0040 */
  442. 0x00, /* 0x0041 */
  443. 0x00, /* 0x0042 */
  444. 0x00, /* 0x0043 */
  445. 0x00, /* 0x0044 */
  446. 0x00, /* 0x0045 */
  447. 0x00, /* 0x0046 */
  448. 0x00, /* 0x0047 */
  449. 0x00, /* 0x0048 */
  450. 0x00, /* 0x0049 */
  451. 0x00, /* 0x004a */
  452. 0x00, /* 0x004b */
  453. 0x00, /* 0x004c */
  454. 0x00, /* 0x004d */
  455. 0x00, /* 0x004e */
  456. 0x00, /* 0x004f */
  457. 0x00, /* 0x0050 */
  458. 0x00, /* 0x0051 */
  459. 0x00, /* 0x0052 */
  460. 0x00, /* 0x0053 */
  461. 0xcf, /* MBOX_EXECUTE_IOCB64 */
  462. 0x00, /* 0x0055 */
  463. 0x00, /* 0x0056 */
  464. 0x00, /* 0x0057 */
  465. 0x00, /* 0x0058 */
  466. 0x00, /* 0x0059 */
  467. 0x00, /* 0x005a */
  468. 0x00, /* 0x005b */
  469. 0x00, /* 0x005c */
  470. 0x00, /* 0x005d */
  471. 0x00, /* 0x005e */
  472. 0x00, /* 0x005f */
  473. 0xff, /* MBOX_INIT_FIRMWARE */
  474. 0xcd, /* MBOX_GET_INIT_CB */
  475. 0x01, /* MBOX_INIT_LIP */
  476. 0xcd, /* MBOX_GET_POS_MAP */
  477. 0xcf, /* MBOX_GET_PORT_DB */
  478. 0x03, /* MBOX_CLEAR_ACA */
  479. 0x03, /* MBOX_TARGET_RESET */
  480. 0x03, /* MBOX_CLEAR_TASK_SET */
  481. 0x03, /* MBOX_ABORT_TASK_SET */
  482. 0x01, /* MBOX_GET_FIRMWARE_STATE */
  483. 0x03, /* MBOX_GET_PORT_NAME */
  484. 0x00, /* 0x006b */
  485. 0x00, /* 0x006c */
  486. 0x00, /* 0x006d */
  487. 0xcf, /* MBOX_SEND_SNS */
  488. 0x0f, /* MBOX_PORT_LOGIN */
  489. 0x03, /* MBOX_SEND_CHANGE_REQUEST */
  490. 0x03, /* MBOX_PORT_LOGOUT */
  491. };
  492. #define MAX_MBOX_COMMAND (sizeof(mbox_param)/sizeof(u_short))
  493. struct id_name_map {
  494. u64 wwn;
  495. u_char loop_id;
  496. };
  497. struct sns_cb {
  498. u_short len;
  499. u_short res1;
  500. u_int response_low;
  501. u_int response_high;
  502. u_short sub_len;
  503. u_short res2;
  504. u_char data[44];
  505. };
  506. /* address of instance of this struct is passed to adapter to initialize things
  507. */
  508. struct init_cb {
  509. u_char version;
  510. u_char reseverd1[1];
  511. u_short firm_opts;
  512. u_short max_frame_len;
  513. u_short max_iocb;
  514. u_short exec_throttle;
  515. u_char retry_cnt;
  516. u_char retry_delay;
  517. u_short node_name[4];
  518. u_short hard_addr;
  519. u_char reserved2[10];
  520. u_short req_queue_out;
  521. u_short res_queue_in;
  522. u_short req_queue_len;
  523. u_short res_queue_len;
  524. u_int req_queue_addr_lo;
  525. u_int req_queue_addr_high;
  526. u_int res_queue_addr_lo;
  527. u_int res_queue_addr_high;
  528. /* the rest of this structure only applies to the isp2200 */
  529. u_short lun_enables;
  530. u_char cmd_resource_cnt;
  531. u_char notify_resource_cnt;
  532. u_short timeout;
  533. u_short reserved3;
  534. u_short add_firm_opts;
  535. u_char res_accum_timer;
  536. u_char irq_delay_timer;
  537. u_short special_options;
  538. u_short reserved4[13];
  539. };
  540. /*
  541. * The result queue can be quite a bit smaller since continuation entries
  542. * do not show up there:
  543. */
  544. #define RES_QUEUE_LEN ((QLOGICFC_REQ_QUEUE_LEN + 1) / 8 - 1)
  545. #define QUEUE_ENTRY_LEN 64
  546. #if ISP2x00_FABRIC
  547. #define QLOGICFC_MAX_ID 0xff
  548. #else
  549. #define QLOGICFC_MAX_ID 0x7d
  550. #endif
  551. #define QLOGICFC_MAX_LUN 128
  552. #define QLOGICFC_MAX_LOOP_ID 0x7d
  553. /* the following connection options only apply to the 2200. i have only
  554. * had success with LOOP_ONLY and P2P_ONLY.
  555. */
  556. #define LOOP_ONLY 0
  557. #define P2P_ONLY 1
  558. #define LOOP_PREFERED 2
  559. #define P2P_PREFERED 3
  560. #define CONNECTION_PREFERENCE LOOP_ONLY
  561. /* adapter_state values */
  562. #define AS_FIRMWARE_DEAD -1
  563. #define AS_LOOP_DOWN 0
  564. #define AS_LOOP_GOOD 1
  565. #define AS_REDO_FABRIC_PORTDB 2
  566. #define AS_REDO_LOOP_PORTDB 4
  567. #define RES_SIZE ((RES_QUEUE_LEN + 1)*QUEUE_ENTRY_LEN)
  568. #define REQ_SIZE ((QLOGICFC_REQ_QUEUE_LEN + 1)*QUEUE_ENTRY_LEN)
  569. struct isp2x00_hostdata {
  570. u_char revision;
  571. struct pci_dev *pci_dev;
  572. /* result and request queues (shared with isp2x00): */
  573. u_int req_in_ptr; /* index of next request slot */
  574. u_int res_out_ptr; /* index of next result slot */
  575. /* this is here so the queues are nicely aligned */
  576. long send_marker; /* do we need to send a marker? */
  577. char * res;
  578. char * req;
  579. struct init_cb control_block;
  580. int adapter_state;
  581. unsigned long int tag_ages[QLOGICFC_MAX_ID + 1];
  582. Scsi_Cmnd *handle_ptrs[QLOGICFC_REQ_QUEUE_LEN + 1];
  583. unsigned long handle_serials[QLOGICFC_REQ_QUEUE_LEN + 1];
  584. struct id_name_map port_db[QLOGICFC_MAX_ID + 1];
  585. u_char mbox_done;
  586. u64 wwn;
  587. u_int port_id;
  588. u_char queued;
  589. u_char host_id;
  590. struct timer_list explore_timer;
  591. struct id_name_map tempmap[QLOGICFC_MAX_ID + 1];
  592. };
  593. /* queue length's _must_ be power of two: */
  594. #define QUEUE_DEPTH(in, out, ql) ((in - out) & (ql))
  595. #define REQ_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, \
  596. QLOGICFC_REQ_QUEUE_LEN)
  597. #define RES_QUEUE_DEPTH(in, out) QUEUE_DEPTH(in, out, RES_QUEUE_LEN)
  598. static void isp2x00_enable_irqs(struct Scsi_Host *);
  599. static void isp2x00_disable_irqs(struct Scsi_Host *);
  600. static int isp2x00_init(struct Scsi_Host *);
  601. static int isp2x00_reset_hardware(struct Scsi_Host *);
  602. static int isp2x00_mbox_command(struct Scsi_Host *, u_short[]);
  603. static int isp2x00_return_status(Scsi_Cmnd *, struct Status_Entry *);
  604. static void isp2x00_intr_handler(int, void *, struct pt_regs *);
  605. static irqreturn_t do_isp2x00_intr_handler(int, void *, struct pt_regs *);
  606. static int isp2x00_make_portdb(struct Scsi_Host *);
  607. #if ISP2x00_FABRIC
  608. static int isp2x00_init_fabric(struct Scsi_Host *, struct id_name_map *, int);
  609. #endif
  610. #if USE_NVRAM_DEFAULTS
  611. static int isp2x00_get_nvram_defaults(struct Scsi_Host *, struct init_cb *);
  612. static u_short isp2x00_read_nvram_word(struct Scsi_Host *, u_short);
  613. #endif
  614. #if DEBUG_ISP2x00
  615. static void isp2x00_print_scsi_cmd(Scsi_Cmnd *);
  616. #endif
  617. #if DEBUG_ISP2x00_INTR
  618. static void isp2x00_print_status_entry(struct Status_Entry *);
  619. #endif
  620. static inline void isp2x00_enable_irqs(struct Scsi_Host *host)
  621. {
  622. outw(ISP_EN_INT | ISP_EN_RISC, host->io_port + PCI_INTER_CTL);
  623. }
  624. static inline void isp2x00_disable_irqs(struct Scsi_Host *host)
  625. {
  626. outw(0x0, host->io_port + PCI_INTER_CTL);
  627. }
  628. static int isp2x00_detect(Scsi_Host_Template * tmpt)
  629. {
  630. int hosts = 0;
  631. unsigned long wait_time;
  632. struct Scsi_Host *host = NULL;
  633. struct isp2x00_hostdata *hostdata;
  634. struct pci_dev *pdev;
  635. unsigned short device_ids[2];
  636. dma_addr_t busaddr;
  637. int i;
  638. ENTER("isp2x00_detect");
  639. device_ids[0] = PCI_DEVICE_ID_QLOGIC_ISP2100;
  640. device_ids[1] = PCI_DEVICE_ID_QLOGIC_ISP2200;
  641. tmpt->proc_name = "isp2x00";
  642. for (i=0; i<2; i++){
  643. pdev = NULL;
  644. while ((pdev = pci_find_device(PCI_VENDOR_ID_QLOGIC, device_ids[i], pdev))) {
  645. if (pci_enable_device(pdev))
  646. continue;
  647. /* Try to configure DMA attributes. */
  648. if (pci_set_dma_mask(pdev, 0xffffffffffffffffULL) &&
  649. pci_set_dma_mask(pdev, 0xffffffffULL))
  650. continue;
  651. host = scsi_register(tmpt, sizeof(struct isp2x00_hostdata));
  652. if (!host) {
  653. printk("qlogicfc%d : could not register host.\n", hosts);
  654. continue;
  655. }
  656. host->max_id = QLOGICFC_MAX_ID + 1;
  657. host->max_lun = QLOGICFC_MAX_LUN;
  658. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  659. memset(hostdata, 0, sizeof(struct isp2x00_hostdata));
  660. hostdata->pci_dev = pdev;
  661. hostdata->res = pci_alloc_consistent(pdev, RES_SIZE + REQ_SIZE, &busaddr);
  662. if (!hostdata->res){
  663. printk("qlogicfc%d : could not allocate memory for request and response queue.\n", hosts);
  664. scsi_unregister(host);
  665. continue;
  666. }
  667. hostdata->req = hostdata->res + (RES_QUEUE_LEN + 1)*QUEUE_ENTRY_LEN;
  668. hostdata->queued = 0;
  669. /* set up the control block */
  670. hostdata->control_block.version = 0x1;
  671. hostdata->control_block.firm_opts = cpu_to_le16(0x800e);
  672. hostdata->control_block.max_frame_len = cpu_to_le16(2048);
  673. hostdata->control_block.max_iocb = cpu_to_le16(QLOGICFC_REQ_QUEUE_LEN);
  674. hostdata->control_block.exec_throttle = cpu_to_le16(QLOGICFC_CMD_PER_LUN);
  675. hostdata->control_block.retry_delay = 5;
  676. hostdata->control_block.retry_cnt = 1;
  677. hostdata->control_block.node_name[0] = cpu_to_le16(0x0020);
  678. hostdata->control_block.node_name[1] = cpu_to_le16(0xE000);
  679. hostdata->control_block.node_name[2] = cpu_to_le16(0x008B);
  680. hostdata->control_block.node_name[3] = cpu_to_le16(0x0000);
  681. hostdata->control_block.hard_addr = cpu_to_le16(0x0003);
  682. hostdata->control_block.req_queue_len = cpu_to_le16(QLOGICFC_REQ_QUEUE_LEN + 1);
  683. hostdata->control_block.res_queue_len = cpu_to_le16(RES_QUEUE_LEN + 1);
  684. hostdata->control_block.res_queue_addr_lo = cpu_to_le32(pci64_dma_lo32(busaddr));
  685. hostdata->control_block.res_queue_addr_high = cpu_to_le32(pci64_dma_hi32(busaddr));
  686. hostdata->control_block.req_queue_addr_lo = cpu_to_le32(pci64_dma_lo32(busaddr + RES_SIZE));
  687. hostdata->control_block.req_queue_addr_high = cpu_to_le32(pci64_dma_hi32(busaddr + RES_SIZE));
  688. hostdata->control_block.add_firm_opts |= cpu_to_le16(CONNECTION_PREFERENCE<<4);
  689. hostdata->adapter_state = AS_LOOP_DOWN;
  690. hostdata->explore_timer.data = 1;
  691. hostdata->host_id = hosts;
  692. if (isp2x00_init(host) || isp2x00_reset_hardware(host)) {
  693. pci_free_consistent (pdev, RES_SIZE + REQ_SIZE, hostdata->res, busaddr);
  694. scsi_unregister(host);
  695. continue;
  696. }
  697. host->this_id = 0;
  698. if (request_irq(host->irq, do_isp2x00_intr_handler, SA_INTERRUPT | SA_SHIRQ, "qlogicfc", host)) {
  699. printk("qlogicfc%d : interrupt %d already in use\n",
  700. hostdata->host_id, host->irq);
  701. pci_free_consistent (pdev, RES_SIZE + REQ_SIZE, hostdata->res, busaddr);
  702. scsi_unregister(host);
  703. continue;
  704. }
  705. if (!request_region(host->io_port, 0xff, "qlogicfc")) {
  706. printk("qlogicfc%d : i/o region 0x%lx-0x%lx already "
  707. "in use\n",
  708. hostdata->host_id, host->io_port, host->io_port + 0xff);
  709. free_irq(host->irq, host);
  710. pci_free_consistent (pdev, RES_SIZE + REQ_SIZE, hostdata->res, busaddr);
  711. scsi_unregister(host);
  712. continue;
  713. }
  714. outw(0x0, host->io_port + PCI_SEMAPHORE);
  715. outw(HCCR_CLEAR_RISC_INTR, host->io_port + HOST_HCCR);
  716. isp2x00_enable_irqs(host);
  717. /* wait for the loop to come up */
  718. for (wait_time = jiffies + 10 * HZ; time_before(jiffies, wait_time) && hostdata->adapter_state == AS_LOOP_DOWN;) {
  719. barrier();
  720. cpu_relax();
  721. }
  722. if (hostdata->adapter_state == AS_LOOP_DOWN) {
  723. printk("qlogicfc%d : link is not up\n", hostdata->host_id);
  724. }
  725. hosts++;
  726. hostdata->explore_timer.data = 0;
  727. }
  728. }
  729. /* this busy loop should not be needed but the isp2x00 seems to need
  730. some time before recognizing it is attached to a fabric */
  731. #if ISP2x00_FABRIC
  732. if (hosts) {
  733. for (wait_time = jiffies + 5 * HZ; time_before(jiffies, wait_time);) {
  734. barrier();
  735. cpu_relax();
  736. }
  737. }
  738. #endif
  739. LEAVE("isp2x00_detect");
  740. return hosts;
  741. }
  742. static int isp2x00_make_portdb(struct Scsi_Host *host)
  743. {
  744. short param[8];
  745. int i, j;
  746. struct isp2x00_hostdata *hostdata;
  747. isp2x00_disable_irqs(host);
  748. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  749. memset(hostdata->tempmap, 0, sizeof(hostdata->tempmap));
  750. #if ISP2x00_FABRIC
  751. for (i = 0x81; i < QLOGICFC_MAX_ID; i++) {
  752. param[0] = MBOX_PORT_LOGOUT;
  753. param[1] = i << 8;
  754. param[2] = 0;
  755. param[3] = 0;
  756. isp2x00_mbox_command(host, param);
  757. if (param[0] != MBOX_COMMAND_COMPLETE) {
  758. DEBUG_FABRIC(printk("qlogicfc%d : logout failed %x %x\n", hostdata->host_id, i, param[0]));
  759. }
  760. }
  761. #endif
  762. param[0] = MBOX_GET_INIT_SCSI_ID;
  763. isp2x00_mbox_command(host, param);
  764. if (param[0] == MBOX_COMMAND_COMPLETE) {
  765. hostdata->port_id = ((u_int) param[3]) << 16;
  766. hostdata->port_id |= param[2];
  767. hostdata->tempmap[0].loop_id = param[1];
  768. hostdata->tempmap[0].wwn = hostdata->wwn;
  769. }
  770. else {
  771. printk("qlogicfc%d : error getting scsi id.\n", hostdata->host_id);
  772. }
  773. for (i = 0; i <=QLOGICFC_MAX_ID; i++)
  774. hostdata->tempmap[i].loop_id = hostdata->tempmap[0].loop_id;
  775. for (i = 0, j = 1; i <= QLOGICFC_MAX_LOOP_ID; i++) {
  776. param[0] = MBOX_GET_PORT_NAME;
  777. param[1] = (i << 8) & 0xff00;
  778. isp2x00_mbox_command(host, param);
  779. if (param[0] == MBOX_COMMAND_COMPLETE) {
  780. hostdata->tempmap[j].loop_id = i;
  781. hostdata->tempmap[j].wwn = ((u64) (param[2] & 0xff)) << 56;
  782. hostdata->tempmap[j].wwn |= ((u64) ((param[2] >> 8) & 0xff)) << 48;
  783. hostdata->tempmap[j].wwn |= ((u64) (param[3] & 0xff)) << 40;
  784. hostdata->tempmap[j].wwn |= ((u64) ((param[3] >> 8) & 0xff)) << 32;
  785. hostdata->tempmap[j].wwn |= ((u64) (param[6] & 0xff)) << 24;
  786. hostdata->tempmap[j].wwn |= ((u64) ((param[6] >> 8) & 0xff)) << 16;
  787. hostdata->tempmap[j].wwn |= ((u64) (param[7] & 0xff)) << 8;
  788. hostdata->tempmap[j].wwn |= ((u64) ((param[7] >> 8) & 0xff));
  789. j++;
  790. }
  791. }
  792. #if ISP2x00_FABRIC
  793. isp2x00_init_fabric(host, hostdata->tempmap, j);
  794. #endif
  795. for (i = 0; i <= QLOGICFC_MAX_ID; i++) {
  796. if (hostdata->tempmap[i].wwn != hostdata->port_db[i].wwn) {
  797. for (j = 0; j <= QLOGICFC_MAX_ID; j++) {
  798. if (hostdata->tempmap[j].wwn == hostdata->port_db[i].wwn) {
  799. hostdata->port_db[i].loop_id = hostdata->tempmap[j].loop_id;
  800. break;
  801. }
  802. }
  803. if (j == QLOGICFC_MAX_ID + 1)
  804. hostdata->port_db[i].loop_id = hostdata->tempmap[0].loop_id;
  805. for (j = 0; j <= QLOGICFC_MAX_ID; j++) {
  806. if (hostdata->port_db[j].wwn == hostdata->tempmap[i].wwn || !hostdata->port_db[j].wwn) {
  807. break;
  808. }
  809. }
  810. if (j == QLOGICFC_MAX_ID + 1)
  811. printk("qlogicfc%d : Too many scsi devices, no more room in port map.\n", hostdata->host_id);
  812. if (!hostdata->port_db[j].wwn) {
  813. hostdata->port_db[j].loop_id = hostdata->tempmap[i].loop_id;
  814. hostdata->port_db[j].wwn = hostdata->tempmap[i].wwn;
  815. }
  816. } else
  817. hostdata->port_db[i].loop_id = hostdata->tempmap[i].loop_id;
  818. }
  819. isp2x00_enable_irqs(host);
  820. return 0;
  821. }
  822. #if ISP2x00_FABRIC
  823. #define FABRIC_PORT 0x7e
  824. #define FABRIC_CONTROLLER 0x7f
  825. #define FABRIC_SNS 0x80
  826. int isp2x00_init_fabric(struct Scsi_Host *host, struct id_name_map *port_db, int cur_scsi_id)
  827. {
  828. u_short param[8];
  829. u64 wwn;
  830. int done = 0;
  831. u_short loop_id = 0x81;
  832. u_short scsi_id = cur_scsi_id;
  833. u_int port_id;
  834. struct sns_cb *req;
  835. u_char *sns_response;
  836. dma_addr_t busaddr;
  837. struct isp2x00_hostdata *hostdata;
  838. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  839. DEBUG_FABRIC(printk("qlogicfc%d : Checking for a fabric.\n", hostdata->host_id));
  840. param[0] = MBOX_GET_PORT_NAME;
  841. param[1] = (u16)FABRIC_PORT << 8;
  842. isp2x00_mbox_command(host, param);
  843. if (param[0] != MBOX_COMMAND_COMPLETE) {
  844. DEBUG_FABRIC(printk("qlogicfc%d : fabric check result %x\n", hostdata->host_id, param[0]));
  845. return 0;
  846. }
  847. printk("qlogicfc%d : Fabric found.\n", hostdata->host_id);
  848. req = (struct sns_cb *)pci_alloc_consistent(hostdata->pci_dev, sizeof(*req) + 608, &busaddr);
  849. if (!req){
  850. printk("qlogicfc%d : Could not allocate DMA resources for fabric initialization\n", hostdata->host_id);
  851. return 0;
  852. }
  853. sns_response = (u_char *)(req + 1);
  854. if (hostdata->adapter_state & AS_REDO_LOOP_PORTDB){
  855. memset(req, 0, sizeof(*req));
  856. req->len = cpu_to_le16(8);
  857. req->response_low = cpu_to_le32(pci64_dma_lo32(busaddr + sizeof(*req)));
  858. req->response_high = cpu_to_le32(pci64_dma_hi32(busaddr + sizeof(*req)));
  859. req->sub_len = cpu_to_le16(22);
  860. req->data[0] = 0x17;
  861. req->data[1] = 0x02;
  862. req->data[8] = (u_char) (hostdata->port_id & 0xff);
  863. req->data[9] = (u_char) (hostdata->port_id >> 8 & 0xff);
  864. req->data[10] = (u_char) (hostdata->port_id >> 16 & 0xff);
  865. req->data[13] = 0x01;
  866. param[0] = MBOX_SEND_SNS;
  867. param[1] = 30;
  868. param[2] = pci64_dma_lo32(busaddr) >> 16;
  869. param[3] = pci64_dma_lo32(busaddr);
  870. param[6] = pci64_dma_hi32(busaddr) >> 16;
  871. param[7] = pci64_dma_hi32(busaddr);
  872. isp2x00_mbox_command(host, param);
  873. if (param[0] != MBOX_COMMAND_COMPLETE)
  874. printk("qlogicfc%d : error sending RFC-4\n", hostdata->host_id);
  875. }
  876. port_id = hostdata->port_id;
  877. while (!done) {
  878. memset(req, 0, sizeof(*req));
  879. req->len = cpu_to_le16(304);
  880. req->response_low = cpu_to_le32(pci64_dma_lo32(busaddr + sizeof(*req)));
  881. req->response_high = cpu_to_le32(pci64_dma_hi32(busaddr + sizeof(*req)));
  882. req->sub_len = cpu_to_le16(6);
  883. req->data[0] = 0x00;
  884. req->data[1] = 0x01;
  885. req->data[8] = (u_char) (port_id & 0xff);
  886. req->data[9] = (u_char) (port_id >> 8 & 0xff);
  887. req->data[10] = (u_char) (port_id >> 16 & 0xff);
  888. param[0] = MBOX_SEND_SNS;
  889. param[1] = 14;
  890. param[2] = pci64_dma_lo32(busaddr) >> 16;
  891. param[3] = pci64_dma_lo32(busaddr);
  892. param[6] = pci64_dma_hi32(busaddr) >> 16;
  893. param[7] = pci64_dma_hi32(busaddr);
  894. isp2x00_mbox_command(host, param);
  895. if (param[0] == MBOX_COMMAND_COMPLETE) {
  896. DEBUG_FABRIC(printk("qlogicfc%d : found node %02x%02x%02x%02x%02x%02x%02x%02x ", hostdata->host_id, sns_response[20], sns_response[21], sns_response[22], sns_response[23], sns_response[24], sns_response[25], sns_response[26], sns_response[27]));
  897. DEBUG_FABRIC(printk(" port id: %02x%02x%02x\n", sns_response[17], sns_response[18], sns_response[19]));
  898. port_id = ((u_int) sns_response[17]) << 16;
  899. port_id |= ((u_int) sns_response[18]) << 8;
  900. port_id |= ((u_int) sns_response[19]);
  901. wwn = ((u64) sns_response[20]) << 56;
  902. wwn |= ((u64) sns_response[21]) << 48;
  903. wwn |= ((u64) sns_response[22]) << 40;
  904. wwn |= ((u64) sns_response[23]) << 32;
  905. wwn |= ((u64) sns_response[24]) << 24;
  906. wwn |= ((u64) sns_response[25]) << 16;
  907. wwn |= ((u64) sns_response[26]) << 8;
  908. wwn |= ((u64) sns_response[27]);
  909. if (hostdata->port_id >> 8 != port_id >> 8) {
  910. DEBUG_FABRIC(printk("qlogicfc%d : adding a fabric port: %x\n", hostdata->host_id, port_id));
  911. param[0] = MBOX_PORT_LOGIN;
  912. param[1] = loop_id << 8;
  913. param[2] = (u_short) (port_id >> 16);
  914. param[3] = (u_short) (port_id);
  915. isp2x00_mbox_command(host, param);
  916. if (param[0] == MBOX_COMMAND_COMPLETE) {
  917. port_db[scsi_id].wwn = wwn;
  918. port_db[scsi_id].loop_id = loop_id;
  919. loop_id++;
  920. scsi_id++;
  921. } else {
  922. printk("qlogicfc%d : Error performing port login %x\n", hostdata->host_id, param[0]);
  923. DEBUG_FABRIC(printk("qlogicfc%d : loop_id: %x\n", hostdata->host_id, loop_id));
  924. param[0] = MBOX_PORT_LOGOUT;
  925. param[1] = loop_id << 8;
  926. param[2] = 0;
  927. param[3] = 0;
  928. isp2x00_mbox_command(host, param);
  929. }
  930. }
  931. if (hostdata->port_id == port_id)
  932. done = 1;
  933. } else {
  934. printk("qlogicfc%d : Get All Next failed %x.\n", hostdata->host_id, param[0]);
  935. pci_free_consistent(hostdata->pci_dev, sizeof(*req) + 608, req, busaddr);
  936. return 0;
  937. }
  938. }
  939. pci_free_consistent(hostdata->pci_dev, sizeof(*req) + 608, req, busaddr);
  940. return 1;
  941. }
  942. #endif /* ISP2x00_FABRIC */
  943. static int isp2x00_release(struct Scsi_Host *host)
  944. {
  945. struct isp2x00_hostdata *hostdata;
  946. dma_addr_t busaddr;
  947. ENTER("isp2x00_release");
  948. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  949. outw(0x0, host->io_port + PCI_INTER_CTL);
  950. free_irq(host->irq, host);
  951. release_region(host->io_port, 0xff);
  952. busaddr = pci64_dma_build(le32_to_cpu(hostdata->control_block.res_queue_addr_high),
  953. le32_to_cpu(hostdata->control_block.res_queue_addr_lo));
  954. pci_free_consistent(hostdata->pci_dev, RES_SIZE + REQ_SIZE, hostdata->res, busaddr);
  955. LEAVE("isp2x00_release");
  956. return 0;
  957. }
  958. static const char *isp2x00_info(struct Scsi_Host *host)
  959. {
  960. static char buf[80];
  961. struct isp2x00_hostdata *hostdata;
  962. ENTER("isp2x00_info");
  963. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  964. sprintf(buf,
  965. "QLogic ISP%04x SCSI on PCI bus %02x device %02x irq %d base 0x%lx",
  966. hostdata->pci_dev->device, hostdata->pci_dev->bus->number, hostdata->pci_dev->devfn, host->irq,
  967. host->io_port);
  968. LEAVE("isp2x00_info");
  969. return buf;
  970. }
  971. /*
  972. * The middle SCSI layer ensures that queuecommand never gets invoked
  973. * concurrently with itself or the interrupt handler (though the
  974. * interrupt handler may call this routine as part of
  975. * request-completion handling).
  976. */
  977. static int isp2x00_queuecommand(Scsi_Cmnd * Cmnd, void (*done) (Scsi_Cmnd *))
  978. {
  979. int i, sg_count, n, num_free;
  980. u_int in_ptr, out_ptr;
  981. struct dataseg *ds;
  982. struct scatterlist *sg;
  983. struct Command_Entry *cmd;
  984. struct Continuation_Entry *cont;
  985. struct Scsi_Host *host;
  986. struct isp2x00_hostdata *hostdata;
  987. ENTER("isp2x00_queuecommand");
  988. host = Cmnd->device->host;
  989. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  990. Cmnd->scsi_done = done;
  991. DEBUG(isp2x00_print_scsi_cmd(Cmnd));
  992. if (hostdata->adapter_state & AS_REDO_FABRIC_PORTDB || hostdata->adapter_state & AS_REDO_LOOP_PORTDB) {
  993. isp2x00_make_portdb(host);
  994. hostdata->adapter_state = AS_LOOP_GOOD;
  995. printk("qlogicfc%d : Port Database\n", hostdata->host_id);
  996. for (i = 0; hostdata->port_db[i].wwn != 0; i++) {
  997. printk("wwn: %08x%08x scsi_id: %x loop_id: ", (u_int) (hostdata->port_db[i].wwn >> 32), (u_int) hostdata->port_db[i].wwn, i);
  998. if (hostdata->port_db[i].loop_id != hostdata->port_db[0].loop_id || i == 0)
  999. printk("%x", hostdata->port_db[i].loop_id);
  1000. else
  1001. printk("Not Available");
  1002. printk("\n");
  1003. }
  1004. }
  1005. if (hostdata->adapter_state == AS_FIRMWARE_DEAD) {
  1006. printk("qlogicfc%d : The firmware is dead, just return.\n", hostdata->host_id);
  1007. host->max_id = 0;
  1008. return 0;
  1009. }
  1010. out_ptr = inw(host->io_port + MBOX4);
  1011. in_ptr = hostdata->req_in_ptr;
  1012. DEBUG(printk("qlogicfc%d : request queue depth %d\n", hostdata->host_id,
  1013. REQ_QUEUE_DEPTH(in_ptr, out_ptr)));
  1014. cmd = (struct Command_Entry *) &hostdata->req[in_ptr*QUEUE_ENTRY_LEN];
  1015. in_ptr = (in_ptr + 1) & QLOGICFC_REQ_QUEUE_LEN;
  1016. if (in_ptr == out_ptr) {
  1017. DEBUG(printk("qlogicfc%d : request queue overflow\n", hostdata->host_id));
  1018. return 1;
  1019. }
  1020. if (hostdata->send_marker) {
  1021. struct Marker_Entry *marker;
  1022. TRACE("queue marker", in_ptr, 0);
  1023. DEBUG(printk("qlogicfc%d : adding marker entry\n", hostdata->host_id));
  1024. marker = (struct Marker_Entry *) cmd;
  1025. memset(marker, 0, sizeof(struct Marker_Entry));
  1026. marker->hdr.entry_type = ENTRY_MARKER;
  1027. marker->hdr.entry_cnt = 1;
  1028. marker->modifier = SYNC_ALL;
  1029. hostdata->send_marker = 0;
  1030. if (((in_ptr + 1) & QLOGICFC_REQ_QUEUE_LEN) == out_ptr) {
  1031. outw(in_ptr, host->io_port + MBOX4);
  1032. hostdata->req_in_ptr = in_ptr;
  1033. DEBUG(printk("qlogicfc%d : request queue overflow\n", hostdata->host_id));
  1034. return 1;
  1035. }
  1036. cmd = (struct Command_Entry *) &hostdata->req[in_ptr*QUEUE_ENTRY_LEN];
  1037. in_ptr = (in_ptr + 1) & QLOGICFC_REQ_QUEUE_LEN;
  1038. }
  1039. TRACE("queue command", in_ptr, Cmnd);
  1040. memset(cmd, 0, sizeof(struct Command_Entry));
  1041. /* find a free handle mapping slot */
  1042. for (i = in_ptr; i != (in_ptr - 1) && hostdata->handle_ptrs[i]; i = ((i + 1) % (QLOGICFC_REQ_QUEUE_LEN + 1)));
  1043. if (!hostdata->handle_ptrs[i]) {
  1044. cmd->handle = cpu_to_le32(i);
  1045. hostdata->handle_ptrs[i] = Cmnd;
  1046. hostdata->handle_serials[i] = Cmnd->serial_number;
  1047. } else {
  1048. printk("qlogicfc%d : no handle slots, this should not happen.\n", hostdata->host_id);
  1049. printk("hostdata->queued is %x, in_ptr: %x\n", hostdata->queued, in_ptr);
  1050. for (i = 0; i <= QLOGICFC_REQ_QUEUE_LEN; i++){
  1051. if (!hostdata->handle_ptrs[i]){
  1052. printk("slot %d has %p\n", i, hostdata->handle_ptrs[i]);
  1053. }
  1054. }
  1055. return 1;
  1056. }
  1057. cmd->hdr.entry_type = ENTRY_COMMAND;
  1058. cmd->hdr.entry_cnt = 1;
  1059. cmd->target_lun = Cmnd->device->lun;
  1060. cmd->expanded_lun = cpu_to_le16(Cmnd->device->lun);
  1061. #if ISP2x00_PORTDB
  1062. cmd->target_id = hostdata->port_db[Cmnd->device->id].loop_id;
  1063. #else
  1064. cmd->target_id = Cmnd->target;
  1065. #endif
  1066. cmd->total_byte_cnt = cpu_to_le32(Cmnd->request_bufflen);
  1067. cmd->time_out = 0;
  1068. memcpy(cmd->cdb, Cmnd->cmnd, Cmnd->cmd_len);
  1069. if (Cmnd->use_sg) {
  1070. sg = (struct scatterlist *) Cmnd->request_buffer;
  1071. sg_count = pci_map_sg(hostdata->pci_dev, sg, Cmnd->use_sg, Cmnd->sc_data_direction);
  1072. cmd->segment_cnt = cpu_to_le16(sg_count);
  1073. ds = cmd->dataseg;
  1074. /* fill in first two sg entries: */
  1075. n = sg_count;
  1076. if (n > DATASEGS_PER_COMMAND)
  1077. n = DATASEGS_PER_COMMAND;
  1078. for (i = 0; i < n; i++) {
  1079. ds[i].d_base = cpu_to_le32(pci64_dma_lo32(sg_dma_address(sg)));
  1080. ds[i].d_base_hi = cpu_to_le32(pci64_dma_hi32(sg_dma_address(sg)));
  1081. ds[i].d_count = cpu_to_le32(sg_dma_len(sg));
  1082. ++sg;
  1083. }
  1084. sg_count -= DATASEGS_PER_COMMAND;
  1085. while (sg_count > 0) {
  1086. ++cmd->hdr.entry_cnt;
  1087. cont = (struct Continuation_Entry *)
  1088. &hostdata->req[in_ptr*QUEUE_ENTRY_LEN];
  1089. memset(cont, 0, sizeof(struct Continuation_Entry));
  1090. in_ptr = (in_ptr + 1) & QLOGICFC_REQ_QUEUE_LEN;
  1091. if (in_ptr == out_ptr) {
  1092. DEBUG(printk("qlogicfc%d : unexpected request queue overflow\n", hostdata->host_id));
  1093. return 1;
  1094. }
  1095. TRACE("queue continuation", in_ptr, 0);
  1096. cont->hdr.entry_type = ENTRY_CONTINUATION;
  1097. ds = cont->dataseg;
  1098. n = sg_count;
  1099. if (n > DATASEGS_PER_CONT)
  1100. n = DATASEGS_PER_CONT;
  1101. for (i = 0; i < n; ++i) {
  1102. ds[i].d_base = cpu_to_le32(pci64_dma_lo32(sg_dma_address(sg)));
  1103. ds[i].d_base_hi = cpu_to_le32(pci64_dma_hi32(sg_dma_address(sg)));
  1104. ds[i].d_count = cpu_to_le32(sg_dma_len(sg));
  1105. ++sg;
  1106. }
  1107. sg_count -= n;
  1108. }
  1109. } else if (Cmnd->request_bufflen && Cmnd->sc_data_direction != PCI_DMA_NONE) {
  1110. struct page *page = virt_to_page(Cmnd->request_buffer);
  1111. unsigned long offset = offset_in_page(Cmnd->request_buffer);
  1112. dma_addr_t busaddr = pci_map_page(hostdata->pci_dev,
  1113. page, offset,
  1114. Cmnd->request_bufflen,
  1115. Cmnd->sc_data_direction);
  1116. Cmnd->SCp.dma_handle = busaddr;
  1117. cmd->dataseg[0].d_base = cpu_to_le32(pci64_dma_lo32(busaddr));
  1118. cmd->dataseg[0].d_base_hi = cpu_to_le32(pci64_dma_hi32(busaddr));
  1119. cmd->dataseg[0].d_count = cpu_to_le32(Cmnd->request_bufflen);
  1120. cmd->segment_cnt = cpu_to_le16(1);
  1121. } else {
  1122. cmd->dataseg[0].d_base = 0;
  1123. cmd->dataseg[0].d_base_hi = 0;
  1124. cmd->segment_cnt = cpu_to_le16(1); /* Shouldn't this be 0? */
  1125. }
  1126. if (Cmnd->sc_data_direction == DMA_TO_DEVICE)
  1127. cmd->control_flags = cpu_to_le16(CFLAG_WRITE);
  1128. else
  1129. cmd->control_flags = cpu_to_le16(CFLAG_READ);
  1130. if (Cmnd->device->tagged_supported) {
  1131. if ((jiffies - hostdata->tag_ages[Cmnd->device->id]) > (2 * ISP_TIMEOUT)) {
  1132. cmd->control_flags |= cpu_to_le16(CFLAG_ORDERED_TAG);
  1133. hostdata->tag_ages[Cmnd->device->id] = jiffies;
  1134. } else
  1135. switch (Cmnd->tag) {
  1136. case HEAD_OF_QUEUE_TAG:
  1137. cmd->control_flags |= cpu_to_le16(CFLAG_HEAD_TAG);
  1138. break;
  1139. case ORDERED_QUEUE_TAG:
  1140. cmd->control_flags |= cpu_to_le16(CFLAG_ORDERED_TAG);
  1141. break;
  1142. default:
  1143. cmd->control_flags |= cpu_to_le16(CFLAG_SIMPLE_TAG);
  1144. break;
  1145. }
  1146. }
  1147. /*
  1148. * TEST_UNIT_READY commands from scsi_scan will fail due to "overlapped
  1149. * commands attempted" unless we setup at least a simple queue (midlayer
  1150. * will embelish this once it can do an INQUIRY command to the device)
  1151. */
  1152. else
  1153. cmd->control_flags |= cpu_to_le16(CFLAG_SIMPLE_TAG);
  1154. outw(in_ptr, host->io_port + MBOX4);
  1155. hostdata->req_in_ptr = in_ptr;
  1156. hostdata->queued++;
  1157. num_free = QLOGICFC_REQ_QUEUE_LEN - REQ_QUEUE_DEPTH(in_ptr, out_ptr);
  1158. num_free = (num_free > 2) ? num_free - 2 : 0;
  1159. host->can_queue = host->host_busy + num_free;
  1160. if (host->can_queue > QLOGICFC_REQ_QUEUE_LEN)
  1161. host->can_queue = QLOGICFC_REQ_QUEUE_LEN;
  1162. host->sg_tablesize = QLOGICFC_MAX_SG(num_free);
  1163. LEAVE("isp2x00_queuecommand");
  1164. return 0;
  1165. }
  1166. /* we have received an event, such as a lip or an RSCN, which may mean that
  1167. * our port database is incorrect so the port database must be recreated.
  1168. */
  1169. static void redo_port_db(unsigned long arg)
  1170. {
  1171. struct Scsi_Host * host = (struct Scsi_Host *) arg;
  1172. struct isp2x00_hostdata * hostdata;
  1173. unsigned long flags;
  1174. int i;
  1175. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  1176. hostdata->explore_timer.data = 0;
  1177. del_timer(&hostdata->explore_timer);
  1178. spin_lock_irqsave(host->host_lock, flags);
  1179. if (hostdata->adapter_state & AS_REDO_FABRIC_PORTDB || hostdata->adapter_state & AS_REDO_LOOP_PORTDB) {
  1180. isp2x00_make_portdb(host);
  1181. printk("qlogicfc%d : Port Database\n", hostdata->host_id);
  1182. for (i = 0; hostdata->port_db[i].wwn != 0; i++) {
  1183. printk("wwn: %08x%08x scsi_id: %x loop_id: ", (u_int) (hostdata->port_db[i].wwn >> 32), (u_int) hostdata->port_db[i].wwn, i);
  1184. if (hostdata->port_db[i].loop_id != hostdata->port_db[0].loop_id || i == 0)
  1185. printk("%x", hostdata->port_db[i].loop_id);
  1186. else
  1187. printk("Not Available");
  1188. printk("\n");
  1189. }
  1190. for (i = 0; i < QLOGICFC_REQ_QUEUE_LEN; i++){
  1191. if (hostdata->handle_ptrs[i] && (hostdata->port_db[hostdata->handle_ptrs[i]->device->id].loop_id > QLOGICFC_MAX_LOOP_ID || hostdata->adapter_state & AS_REDO_LOOP_PORTDB)){
  1192. if (hostdata->port_db[hostdata->handle_ptrs[i]->device->id].loop_id != hostdata->port_db[0].loop_id){
  1193. Scsi_Cmnd *Cmnd = hostdata->handle_ptrs[i];
  1194. if (Cmnd->use_sg)
  1195. pci_unmap_sg(hostdata->pci_dev,
  1196. (struct scatterlist *)Cmnd->buffer,
  1197. Cmnd->use_sg,
  1198. Cmnd->sc_data_direction);
  1199. else if (Cmnd->request_bufflen &&
  1200. Cmnd->sc_data_direction != PCI_DMA_NONE) {
  1201. pci_unmap_page(hostdata->pci_dev,
  1202. Cmnd->SCp.dma_handle,
  1203. Cmnd->request_bufflen,
  1204. Cmnd->sc_data_direction);
  1205. }
  1206. hostdata->handle_ptrs[i]->result = DID_SOFT_ERROR << 16;
  1207. if (hostdata->handle_ptrs[i]->scsi_done){
  1208. (*hostdata->handle_ptrs[i]->scsi_done) (hostdata->handle_ptrs[i]);
  1209. }
  1210. else printk("qlogicfc%d : done is null?\n", hostdata->host_id);
  1211. hostdata->handle_ptrs[i] = NULL;
  1212. hostdata->handle_serials[i] = 0;
  1213. }
  1214. }
  1215. }
  1216. hostdata->adapter_state = AS_LOOP_GOOD;
  1217. }
  1218. spin_unlock_irqrestore(host->host_lock, flags);
  1219. }
  1220. #define ASYNC_EVENT_INTERRUPT 0x01
  1221. irqreturn_t do_isp2x00_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
  1222. {
  1223. struct Scsi_Host *host = dev_id;
  1224. unsigned long flags;
  1225. spin_lock_irqsave(host->host_lock, flags);
  1226. isp2x00_intr_handler(irq, dev_id, regs);
  1227. spin_unlock_irqrestore(host->host_lock, flags);
  1228. return IRQ_HANDLED;
  1229. }
  1230. void isp2x00_intr_handler(int irq, void *dev_id, struct pt_regs *regs)
  1231. {
  1232. Scsi_Cmnd *Cmnd;
  1233. struct Status_Entry *sts;
  1234. struct Scsi_Host *host = dev_id;
  1235. struct isp2x00_hostdata *hostdata;
  1236. u_int in_ptr, out_ptr, handle, num_free;
  1237. u_short status;
  1238. ENTER_INTR("isp2x00_intr_handler");
  1239. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  1240. DEBUG_INTR(printk("qlogicfc%d : interrupt on line %d\n", hostdata->host_id, irq));
  1241. if (!(inw(host->io_port + PCI_INTER_STS) & 0x08)) {
  1242. /* spurious interrupts can happen legally */
  1243. DEBUG_INTR(printk("qlogicfc%d : got spurious interrupt\n", hostdata->host_id));
  1244. return;
  1245. }
  1246. in_ptr = inw(host->io_port + MBOX5);
  1247. out_ptr = hostdata->res_out_ptr;
  1248. if ((inw(host->io_port + PCI_SEMAPHORE) & ASYNC_EVENT_INTERRUPT)) {
  1249. status = inw(host->io_port + MBOX0);
  1250. DEBUG_INTR(printk("qlogicfc%d : mbox completion status: %x\n",
  1251. hostdata->host_id, status));
  1252. switch (status) {
  1253. case LOOP_UP:
  1254. case POINT_TO_POINT_UP:
  1255. printk("qlogicfc%d : Link is Up\n", hostdata->host_id);
  1256. hostdata->adapter_state = AS_REDO_FABRIC_PORTDB | AS_REDO_LOOP_PORTDB;
  1257. break;
  1258. case LOOP_DOWN:
  1259. printk("qlogicfc%d : Link is Down\n", hostdata->host_id);
  1260. hostdata->adapter_state = AS_LOOP_DOWN;
  1261. break;
  1262. case CONNECTION_MODE:
  1263. printk("received CONNECTION_MODE irq %x\n", inw(host->io_port + MBOX1));
  1264. break;
  1265. case CHANGE_NOTIFICATION:
  1266. printk("qlogicfc%d : RSCN Received\n", hostdata->host_id);
  1267. if (hostdata->adapter_state == AS_LOOP_GOOD)
  1268. hostdata->adapter_state = AS_REDO_FABRIC_PORTDB;
  1269. break;
  1270. case LIP_OCCURRED:
  1271. case LIP_RECEIVED:
  1272. printk("qlogicfc%d : Loop Reinitialized\n", hostdata->host_id);
  1273. if (hostdata->adapter_state == AS_LOOP_GOOD)
  1274. hostdata->adapter_state = AS_REDO_LOOP_PORTDB;
  1275. break;
  1276. case SYSTEM_ERROR:
  1277. printk("qlogicfc%d : The firmware just choked.\n", hostdata->host_id);
  1278. hostdata->adapter_state = AS_FIRMWARE_DEAD;
  1279. break;
  1280. case SCSI_COMMAND_COMPLETE:
  1281. handle = inw(host->io_port + MBOX1) | (inw(host->io_port + MBOX2) << 16);
  1282. Cmnd = hostdata->handle_ptrs[handle];
  1283. hostdata->handle_ptrs[handle] = NULL;
  1284. hostdata->handle_serials[handle] = 0;
  1285. hostdata->queued--;
  1286. if (Cmnd != NULL) {
  1287. if (Cmnd->use_sg)
  1288. pci_unmap_sg(hostdata->pci_dev,
  1289. (struct scatterlist *)Cmnd->buffer,
  1290. Cmnd->use_sg,
  1291. Cmnd->sc_data_direction);
  1292. else if (Cmnd->request_bufflen &&
  1293. Cmnd->sc_data_direction != PCI_DMA_NONE)
  1294. pci_unmap_page(hostdata->pci_dev,
  1295. Cmnd->SCp.dma_handle,
  1296. Cmnd->request_bufflen,
  1297. Cmnd->sc_data_direction);
  1298. Cmnd->result = 0x0;
  1299. (*Cmnd->scsi_done) (Cmnd);
  1300. } else
  1301. printk("qlogicfc%d.c : got a null value out of handle_ptrs, this sucks\n", hostdata->host_id);
  1302. break;
  1303. case MBOX_COMMAND_COMPLETE:
  1304. case INVALID_COMMAND:
  1305. case HOST_INTERFACE_ERROR:
  1306. case TEST_FAILED:
  1307. case COMMAND_ERROR:
  1308. case COMMAND_PARAM_ERROR:
  1309. case PORT_ID_USED:
  1310. case LOOP_ID_USED:
  1311. case ALL_IDS_USED:
  1312. hostdata->mbox_done = 1;
  1313. outw(HCCR_CLEAR_RISC_INTR, host->io_port + HOST_HCCR);
  1314. return;
  1315. default:
  1316. printk("qlogicfc%d : got an unknown status? %x\n", hostdata->host_id, status);
  1317. }
  1318. if ((hostdata->adapter_state & AS_REDO_LOOP_PORTDB || hostdata->adapter_state & AS_REDO_FABRIC_PORTDB) && hostdata->explore_timer.data == 0){
  1319. hostdata->explore_timer.function = redo_port_db;
  1320. hostdata->explore_timer.data = (unsigned long)host;
  1321. hostdata->explore_timer.expires = jiffies + (HZ/4);
  1322. init_timer(&hostdata->explore_timer);
  1323. add_timer(&hostdata->explore_timer);
  1324. }
  1325. outw(0x0, host->io_port + PCI_SEMAPHORE);
  1326. } else {
  1327. DEBUG_INTR(printk("qlogicfc%d : response queue update\n", hostdata->host_id));
  1328. DEBUG_INTR(printk("qlogicfc%d : response queue depth %d\n", hostdata->host_id, RES_QUEUE_DEPTH(in_ptr, out_ptr)));
  1329. while (out_ptr != in_ptr) {
  1330. unsigned le_hand;
  1331. sts = (struct Status_Entry *) &hostdata->res[out_ptr*QUEUE_ENTRY_LEN];
  1332. out_ptr = (out_ptr + 1) & RES_QUEUE_LEN;
  1333. TRACE("done", out_ptr, Cmnd);
  1334. DEBUG_INTR(isp2x00_print_status_entry(sts));
  1335. le_hand = le32_to_cpu(sts->handle);
  1336. if (sts->hdr.entry_type == ENTRY_STATUS && (Cmnd = hostdata->handle_ptrs[le_hand])) {
  1337. Cmnd->result = isp2x00_return_status(Cmnd, sts);
  1338. hostdata->queued--;
  1339. if (Cmnd->use_sg)
  1340. pci_unmap_sg(hostdata->pci_dev,
  1341. (struct scatterlist *)Cmnd->buffer, Cmnd->use_sg,
  1342. Cmnd->sc_data_direction);
  1343. else if (Cmnd->request_bufflen && Cmnd->sc_data_direction != PCI_DMA_NONE)
  1344. pci_unmap_page(hostdata->pci_dev,
  1345. Cmnd->SCp.dma_handle,
  1346. Cmnd->request_bufflen,
  1347. Cmnd->sc_data_direction);
  1348. /*
  1349. * if any of the following are true we do not
  1350. * call scsi_done. if the status is CS_ABORTED
  1351. * we don't have to call done because the upper
  1352. * level should already know its aborted.
  1353. */
  1354. if (hostdata->handle_serials[le_hand] != Cmnd->serial_number
  1355. || le16_to_cpu(sts->completion_status) == CS_ABORTED){
  1356. hostdata->handle_serials[le_hand] = 0;
  1357. hostdata->handle_ptrs[le_hand] = NULL;
  1358. outw(out_ptr, host->io_port + MBOX5);
  1359. continue;
  1360. }
  1361. /*
  1362. * if we get back an error indicating the port
  1363. * is not there or if the link is down and
  1364. * this is a device that used to be there
  1365. * allow the command to timeout.
  1366. * the device may well be back in a couple of
  1367. * seconds.
  1368. */
  1369. if ((hostdata->adapter_state == AS_LOOP_DOWN || sts->completion_status == cpu_to_le16(CS_PORT_UNAVAILABLE) || sts->completion_status == cpu_to_le16(CS_PORT_LOGGED_OUT) || sts->completion_status == cpu_to_le16(CS_PORT_CONFIG_CHANGED)) && hostdata->port_db[Cmnd->device->id].wwn){
  1370. outw(out_ptr, host->io_port + MBOX5);
  1371. continue;
  1372. }
  1373. } else {
  1374. outw(out_ptr, host->io_port + MBOX5);
  1375. continue;
  1376. }
  1377. hostdata->handle_ptrs[le_hand] = NULL;
  1378. if (sts->completion_status == cpu_to_le16(CS_RESET_OCCURRED)
  1379. || (sts->status_flags & cpu_to_le16(STF_BUS_RESET)))
  1380. hostdata->send_marker = 1;
  1381. if (le16_to_cpu(sts->scsi_status) & 0x0200)
  1382. memcpy(Cmnd->sense_buffer, sts->req_sense_data,
  1383. sizeof(Cmnd->sense_buffer));
  1384. outw(out_ptr, host->io_port + MBOX5);
  1385. if (Cmnd->scsi_done != NULL) {
  1386. (*Cmnd->scsi_done) (Cmnd);
  1387. } else
  1388. printk("qlogicfc%d : Ouch, scsi done is NULL\n", hostdata->host_id);
  1389. }
  1390. hostdata->res_out_ptr = out_ptr;
  1391. }
  1392. out_ptr = inw(host->io_port + MBOX4);
  1393. in_ptr = hostdata->req_in_ptr;
  1394. num_free = QLOGICFC_REQ_QUEUE_LEN - REQ_QUEUE_DEPTH(in_ptr, out_ptr);
  1395. num_free = (num_free > 2) ? num_free - 2 : 0;
  1396. host->can_queue = host->host_busy + num_free;
  1397. if (host->can_queue > QLOGICFC_REQ_QUEUE_LEN)
  1398. host->can_queue = QLOGICFC_REQ_QUEUE_LEN;
  1399. host->sg_tablesize = QLOGICFC_MAX_SG(num_free);
  1400. outw(HCCR_CLEAR_RISC_INTR, host->io_port + HOST_HCCR);
  1401. LEAVE_INTR("isp2x00_intr_handler");
  1402. }
  1403. static int isp2x00_return_status(Scsi_Cmnd *Cmnd, struct Status_Entry *sts)
  1404. {
  1405. int host_status = DID_ERROR;
  1406. #if DEBUG_ISP2x00_INTR
  1407. static char *reason[] =
  1408. {
  1409. "DID_OK",
  1410. "DID_NO_CONNECT",
  1411. "DID_BUS_BUSY",
  1412. "DID_TIME_OUT",
  1413. "DID_BAD_TARGET",
  1414. "DID_ABORT",
  1415. "DID_PARITY",
  1416. "DID_ERROR",
  1417. "DID_RESET",
  1418. "DID_BAD_INTR"
  1419. };
  1420. #endif /* DEBUG_ISP2x00_INTR */
  1421. ENTER("isp2x00_return_status");
  1422. DEBUG(printk("qlogicfc : completion status = 0x%04x\n",
  1423. le16_to_cpu(sts->completion_status)));
  1424. switch (le16_to_cpu(sts->completion_status)) {
  1425. case CS_COMPLETE:
  1426. host_status = DID_OK;
  1427. break;
  1428. case CS_DMA_ERROR:
  1429. host_status = DID_ERROR;
  1430. break;
  1431. case CS_RESET_OCCURRED:
  1432. host_status = DID_RESET;
  1433. break;
  1434. case CS_ABORTED:
  1435. host_status = DID_ABORT;
  1436. break;
  1437. case CS_TIMEOUT:
  1438. host_status = DID_TIME_OUT;
  1439. break;
  1440. case CS_DATA_OVERRUN:
  1441. host_status = DID_ERROR;
  1442. break;
  1443. case CS_DATA_UNDERRUN:
  1444. if (Cmnd->underflow <= (Cmnd->request_bufflen - le32_to_cpu(sts->residual)))
  1445. host_status = DID_OK;
  1446. else
  1447. host_status = DID_ERROR;
  1448. break;
  1449. case CS_PORT_UNAVAILABLE:
  1450. case CS_PORT_LOGGED_OUT:
  1451. case CS_PORT_CONFIG_CHANGED:
  1452. host_status = DID_BAD_TARGET;
  1453. break;
  1454. case CS_QUEUE_FULL:
  1455. host_status = DID_ERROR;
  1456. break;
  1457. default:
  1458. printk("qlogicfc : unknown completion status 0x%04x\n",
  1459. le16_to_cpu(sts->completion_status));
  1460. host_status = DID_ERROR;
  1461. break;
  1462. }
  1463. DEBUG_INTR(printk("qlogicfc : host status (%s) scsi status %x\n",
  1464. reason[host_status], le16_to_cpu(sts->scsi_status)));
  1465. LEAVE("isp2x00_return_status");
  1466. return (le16_to_cpu(sts->scsi_status) & STATUS_MASK) | (host_status << 16);
  1467. }
  1468. static int isp2x00_abort(Scsi_Cmnd * Cmnd)
  1469. {
  1470. u_short param[8];
  1471. int i;
  1472. struct Scsi_Host *host;
  1473. struct isp2x00_hostdata *hostdata;
  1474. int return_status = SUCCESS;
  1475. ENTER("isp2x00_abort");
  1476. host = Cmnd->device->host;
  1477. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  1478. for (i = 0; i < QLOGICFC_REQ_QUEUE_LEN; i++)
  1479. if (hostdata->handle_ptrs[i] == Cmnd)
  1480. break;
  1481. if (i == QLOGICFC_REQ_QUEUE_LEN){
  1482. return SUCCESS;
  1483. }
  1484. isp2x00_disable_irqs(host);
  1485. param[0] = MBOX_ABORT_IOCB;
  1486. #if ISP2x00_PORTDB
  1487. param[1] = (((u_short) hostdata->port_db[Cmnd->device->id].loop_id) << 8) | Cmnd->device->lun;
  1488. #else
  1489. param[1] = (((u_short) Cmnd->target) << 8) | Cmnd->lun;
  1490. #endif
  1491. param[2] = i & 0xffff;
  1492. param[3] = i >> 16;
  1493. isp2x00_mbox_command(host, param);
  1494. if (param[0] != MBOX_COMMAND_COMPLETE) {
  1495. printk("qlogicfc%d : scsi abort failure: %x\n", hostdata->host_id, param[0]);
  1496. if (param[0] == 0x4005)
  1497. Cmnd->result = DID_ERROR << 16;
  1498. if (param[0] == 0x4006)
  1499. Cmnd->result = DID_BAD_TARGET << 16;
  1500. return_status = FAILED;
  1501. }
  1502. if (return_status != SUCCESS){
  1503. param[0] = MBOX_GET_FIRMWARE_STATE;
  1504. isp2x00_mbox_command(host, param);
  1505. printk("qlogicfc%d : abort failed\n", hostdata->host_id);
  1506. printk("qlogicfc%d : firmware status is %x %x\n", hostdata->host_id, param[0], param[1]);
  1507. }
  1508. isp2x00_enable_irqs(host);
  1509. LEAVE("isp2x00_abort");
  1510. return return_status;
  1511. }
  1512. static int isp2x00_biosparam(struct scsi_device *sdev, struct block_device *n,
  1513. sector_t capacity, int ip[])
  1514. {
  1515. int size = capacity;
  1516. ENTER("isp2x00_biosparam");
  1517. ip[0] = 64;
  1518. ip[1] = 32;
  1519. ip[2] = size >> 11;
  1520. if (ip[2] > 1024) {
  1521. ip[0] = 255;
  1522. ip[1] = 63;
  1523. ip[2] = size / (ip[0] * ip[1]);
  1524. }
  1525. LEAVE("isp2x00_biosparam");
  1526. return 0;
  1527. }
  1528. static int isp2x00_reset_hardware(struct Scsi_Host *host)
  1529. {
  1530. u_short param[8];
  1531. struct isp2x00_hostdata *hostdata;
  1532. int loop_count;
  1533. dma_addr_t busaddr;
  1534. ENTER("isp2x00_reset_hardware");
  1535. hostdata = (struct isp2x00_hostdata *) host->hostdata;
  1536. /*
  1537. * This cannot be right - PCI writes are posted
  1538. * (apparently this is hardware design flaw not software ?)
  1539. */
  1540. outw(0x01, host->io_port + ISP_CTRL_STATUS);
  1541. udelay(100);
  1542. outw(HCCR_RESET, host->io_port + HOST_HCCR);
  1543. udelay(100);
  1544. outw(HCCR_RELEASE, host->io_port + HOST_HCCR);
  1545. outw(HCCR_BIOS_DISABLE, host->io_port + HOST_HCCR);
  1546. loop_count = DEFAULT_LOOP_COUNT;
  1547. while (--loop_count && inw(host->io_port + HOST_HCCR) == RISC_BUSY) {
  1548. barrier();
  1549. cpu_relax();
  1550. }
  1551. if (!loop_count)
  1552. printk("qlogicfc%d : reset_hardware loop timeout\n", hostdata->host_id);
  1553. #if DEBUG_ISP2x00
  1554. printk("qlogicfc%d : mbox 0 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX0));
  1555. printk("qlogicfc%d : mbox 1 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX1));
  1556. printk("qlogicfc%d : mbox 2 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX2));
  1557. printk("qlogicfc%d : mbox 3 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX3));
  1558. printk("qlogicfc%d : mbox 4 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX4));
  1559. printk("qlogicfc%d : mbox 5 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX5));
  1560. printk("qlogicfc%d : mbox 6 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX6));
  1561. printk("qlogicfc%d : mbox 7 0x%04x \n", hostdata->host_id, inw(host->io_port + MBOX7));
  1562. #endif /* DEBUG_ISP2x00 */
  1563. DEBUG(printk("qlogicfc%d : verifying checksum\n", hostdata->host_id));
  1564. #if defined(CONFIG_SCSI_QLOGIC_FC_FIRMWARE)
  1565. {
  1566. int i;
  1567. unsigned short * risc_code = NULL;
  1568. unsigned short risc_code_len = 0;
  1569. if (hostdata->pci_dev->device == PCI_DEVICE_ID_QLOGIC_ISP2100){
  1570. risc_code = risc_code2100;
  1571. risc_code_len = risc_code_length2100;
  1572. }
  1573. else if (hostdata->pci_dev->device == PCI_DEVICE_ID_QLOGIC_ISP2200){
  1574. risc_code = risc_code2200;
  1575. risc_code_len = risc_code_length2200;
  1576. }
  1577. for (i = 0; i < risc_code_len; i++) {
  1578. param[0] = MBOX_WRITE_RAM_WORD;
  1579. param[1] = risc_code_addr01 + i;
  1580. param[2] = risc_code[i];
  1581. isp2x00_mbox_command(host, param);
  1582. if (param[0] != MBOX_COMMAND_COMPLETE) {
  1583. printk("qlogicfc%d : firmware load failure\n", hostdata->host_id);
  1584. return 1;
  1585. }
  1586. }
  1587. }
  1588. #endif /* RELOAD_FIRMWARE */
  1589. param[0] = MBOX_VERIFY_CHECKSUM;
  1590. param[1] = risc_code_addr01;
  1591. isp2x00_mbox_command(host, param);
  1592. if (param[0] != MBOX_COMMAND_COMPLETE) {
  1593. printk("qlogicfc%d : ram checksum failure\n", hostdata->host_id);
  1594. return 1;
  1595. }
  1596. DEBUG(printk("qlogicfc%d : executing firmware\n", hostdata->host_id));
  1597. param[0] = MBOX_EXEC_FIRMWARE;
  1598. param[1] = risc_code_addr01;
  1599. isp2x00_mbox_command(host, param);
  1600. param[0] = MBOX_ABOUT_FIRMWARE;
  1601. isp2x00_mbox_command(host, param);
  1602. if (param[0] != MBOX_COMMAND_COMPLETE) {
  1603. printk("qlogicfc%d : about firmware failure\n", hostdata->host_id);
  1604. return 1;
  1605. }
  1606. DEBUG(printk("qlogicfc%d : firmware major revision %d\n", hostdata->host_id, param[1]));
  1607. DEBUG(printk("qlogicfc%d : firmware minor revision %d\n", hostdata->host_id, param[2]));
  1608. #ifdef USE_NVRAM_DEFAULTS
  1609. if (isp2x00_get_nvram_defaults(host, &hostdata->control_block) != 0) {
  1610. printk("qlogicfc%d : Could not read from NVRAM\n", hostdata->host_id);
  1611. }
  1612. #endif
  1613. hostdata->wwn = (u64) (cpu_to_le16(hostdata->control_block.node_name[0])) << 56;
  1614. hostdata->wwn |= (u64) (cpu_to_le16(hostdata->control_block.node_name[0]) & 0xff00) << 48;
  1615. hostdata->wwn |= (u64) (cpu_to_le16(hostdata->control_block.node_name[1]) & 0xff00) << 24;
  1616. hostdata->wwn |= (u64) (cpu_to_le16(hostdata->control_block.node_name[1]) & 0x00ff) << 48;
  1617. hostdata->wwn |= (u64) (cpu_to_le16(hostdata->control_block.node_name[2]) & 0x00ff) << 24;
  1618. hostdata->wwn |= (u64) (cpu_to_le16(hostdata->control_block.node_name[2]) & 0xff00) << 8;
  1619. hostdata->wwn |= (u64) (cpu_to_le16(hostdata->control_block.node_name[3]) & 0x00ff) << 8;
  1620. hostdata->wwn |= (u64) (cpu_to_le16(hostdata->control_block.node_name[3]) & 0xff00) >> 8;
  1621. /* FIXME: If the DMA transfer goes one way only, this should use
  1622. * PCI_DMA_TODEVICE and below as well.
  1623. */
  1624. busaddr = pci_map_page(hostdata->pci_dev,
  1625. virt_to_page(&hostdata->control_block),
  1626. offset_in_page(&hostdata->control_block),
  1627. sizeof(hostdata->control_block),
  1628. PCI_DMA_BIDIRECTIONAL);
  1629. param[0] = MBOX_INIT_FIRMWARE;
  1630. param[2] = (u_short) (pci64_dma_lo32(busaddr) >> 16);
  1631. param[3] = (u_short) (pci64_dma_lo32(busaddr) & 0xffff);
  1632. param[4] = 0;
  1633. param[5] = 0;
  1634. param[6] = (u_short) (pci64_dma_hi32(busaddr) >> 16);
  1635. param[7] = (u_short) (pci64_dma_hi32(busaddr) & 0xffff);
  1636. isp2x00_mbox_command(host, param);
  1637. if (param[0] != MBOX_COMMAND_COMPLETE) {
  1638. printk("qlogicfc%d.c: Ouch 0x%04x\n", hostdata->host_id, param[0]);
  1639. pci_unmap_page(hostdata->pci_dev, busaddr,
  1640. sizeof(hostdata->control_block),
  1641. PCI_DMA_BIDIRECTIONAL);
  1642. return 1;
  1643. }
  1644. param[0] = MBOX_GET_FIRMWARE_STATE;
  1645. isp2x00_mbox_command(host, param);
  1646. if (param[0] != MBOX_COMMAND_COMPLETE) {
  1647. printk("qlogicfc%d.c: 0x%04x\n", hostdata->host_id, param[0]);
  1648. pci_unmap_page(hostdata->pci_dev, busaddr,
  1649. sizeof(hostdata->control_block),
  1650. PCI_DMA_BIDIRECTIONAL);
  1651. return 1;
  1652. }
  1653. pci_unmap_page(hostdata->pci_dev, busaddr,
  1654. sizeof(hostdata->control_block),
  1655. PCI_DMA_BIDIRECTIONAL);
  1656. LEAVE("isp2x00_reset_hardware");
  1657. return 0;
  1658. }
  1659. #ifdef USE_NVRAM_DEFAULTS
  1660. static int isp2x00_get_nvram_defaults(struct Scsi_Host *host, struct init_cb *control_block)
  1661. {
  1662. u_short value;
  1663. if (isp2x00_read_nvram_word(host, 0) != 0x5349)
  1664. return 1;
  1665. value = isp2x00_read_nvram_word(host, 8);
  1666. control_block->node_name[0] = cpu_to_le16(isp2x00_read_nvram_word(host, 9));
  1667. control_block->node_name[1] = cpu_to_le16(isp2x00_read_nvram_word(host, 10));
  1668. control_block->node_name[2] = cpu_to_le16(isp2x00_read_nvram_word(host, 11));
  1669. control_block->node_name[3] = cpu_to_le16(isp2x00_read_nvram_word(host, 12));
  1670. control_block->hard_addr = cpu_to_le16(isp2x00_read_nvram_word(host, 13));
  1671. return 0;
  1672. }
  1673. #endif
  1674. static int isp2x00_init(struct Scsi_Host *sh)
  1675. {
  1676. u_long io_base;
  1677. struct isp2x00_hostdata *hostdata;
  1678. u_char revision;
  1679. u_int irq;
  1680. u_short command;
  1681. struct pci_dev *pdev;
  1682. ENTER("isp2x00_init");
  1683. hostdata = (struct isp2x00_hostdata *) sh->hostdata;
  1684. pdev = hostdata->pci_dev;
  1685. if (pci_read_config_word(pdev, PCI_COMMAND, &command)
  1686. || pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision)) {
  1687. printk("qlogicfc%d : error reading PCI configuration\n", hostdata->host_id);
  1688. return 1;
  1689. }
  1690. io_base = pci_resource_start(pdev, 0);
  1691. irq = pdev->irq;
  1692. if (pdev->vendor != PCI_VENDOR_ID_QLOGIC) {
  1693. printk("qlogicfc%d : 0x%04x is not QLogic vendor ID\n", hostdata->host_id,
  1694. pdev->vendor);
  1695. return 1;
  1696. }
  1697. if (pdev->device != PCI_DEVICE_ID_QLOGIC_ISP2100 && pdev->device != PCI_DEVICE_ID_QLOGIC_ISP2200) {
  1698. printk("qlogicfc%d : 0x%04x does not match ISP2100 or ISP2200 device id\n", hostdata->host_id,
  1699. pdev->device);
  1700. return 1;
  1701. }
  1702. if (!(command & PCI_COMMAND_IO) ||
  1703. !(pdev->resource[0].flags & IORESOURCE_IO)) {
  1704. printk("qlogicfc%d : i/o mapping is disabled\n", hostdata->host_id);
  1705. return 1;
  1706. }
  1707. pci_set_master(pdev);
  1708. if (revision != ISP2100_REV_ID1 && revision != ISP2100_REV_ID3 && revision != ISP2200_REV_ID5)
  1709. printk("qlogicfc%d : new isp2x00 revision ID (%d)\n", hostdata->host_id, revision);
  1710. hostdata->revision = revision;
  1711. sh->irq = irq;
  1712. sh->io_port = io_base;
  1713. LEAVE("isp2x00_init");
  1714. return 0;
  1715. }
  1716. #if USE_NVRAM_DEFAULTS
  1717. #define NVRAM_DELAY() udelay(10) /* 10 microsecond delay */
  1718. u_short isp2x00_read_nvram_word(struct Scsi_Host * host, u_short byte)
  1719. {
  1720. int i;
  1721. u_short value, output, input;
  1722. outw(0x2, host->io_port + PCI_NVRAM);
  1723. NVRAM_DELAY();
  1724. outw(0x3, host->io_port + PCI_NVRAM);
  1725. NVRAM_DELAY();
  1726. byte &= 0xff;
  1727. byte |= 0x0600;
  1728. for (i = 10; i >= 0; i--) {
  1729. output = ((byte >> i) & 0x1) ? 0x4 : 0x0;
  1730. outw(output | 0x2, host->io_port + PCI_NVRAM);
  1731. NVRAM_DELAY();
  1732. outw(output | 0x3, host->io_port + PCI_NVRAM);
  1733. NVRAM_DELAY();
  1734. outw(output | 0x2, host->io_port + PCI_NVRAM);
  1735. NVRAM_DELAY();
  1736. }
  1737. for (i = 0xf, value = 0; i >= 0; i--) {
  1738. value <<= 1;
  1739. outw(0x3, host->io_port + PCI_NVRAM);
  1740. NVRAM_DELAY();
  1741. input = inw(host->io_port + PCI_NVRAM);
  1742. NVRAM_DELAY();
  1743. outw(0x2, host->io_port + PCI_NVRAM);
  1744. NVRAM_DELAY();
  1745. if (input & 0x8)
  1746. value |= 1;
  1747. }
  1748. outw(0x0, host->io_port + PCI_NVRAM);
  1749. NVRAM_DELAY();
  1750. return value;
  1751. }
  1752. #endif /* USE_NVRAM_DEFAULTS */
  1753. /*
  1754. * currently, this is only called during initialization or abort/reset,
  1755. * at which times interrupts are disabled, so polling is OK, I guess...
  1756. */
  1757. static int isp2x00_mbox_command(struct Scsi_Host *host, u_short param[])
  1758. {
  1759. int loop_count;
  1760. struct isp2x00_hostdata *hostdata = (struct isp2x00_hostdata *) host->hostdata;
  1761. if (mbox_param[param[0]] == 0 || hostdata->adapter_state == AS_FIRMWARE_DEAD)
  1762. return 1;
  1763. loop_count = DEFAULT_LOOP_COUNT;
  1764. while (--loop_count && inw(host->io_port + HOST_HCCR) & 0x0080) {
  1765. barrier();
  1766. cpu_relax();
  1767. }
  1768. if (!loop_count) {
  1769. printk("qlogicfc%d : mbox_command loop timeout #1\n", hostdata->host_id);
  1770. param[0] = 0x4006;
  1771. hostdata->adapter_state = AS_FIRMWARE_DEAD;
  1772. return 1;
  1773. }
  1774. hostdata->mbox_done = 0;
  1775. if (mbox_param[param[0]] == 0)
  1776. printk("qlogicfc%d : invalid mbox command\n", hostdata->host_id);
  1777. if (mbox_param[param[0]] & 0x80)
  1778. outw(param[7], host->io_port + MBOX7);
  1779. if (mbox_param[param[0]] & 0x40)
  1780. outw(param[6], host->io_port + MBOX6);
  1781. if (mbox_param[param[0]] & 0x20)
  1782. outw(param[5], host->io_port + MBOX5);
  1783. if (mbox_param[param[0]] & 0x10)
  1784. outw(param[4], host->io_port + MBOX4);
  1785. if (mbox_param[param[0]] & 0x08)
  1786. outw(param[3], host->io_port + MBOX3);
  1787. if (mbox_param[param[0]] & 0x04)
  1788. outw(param[2], host->io_port + MBOX2);
  1789. if (mbox_param[param[0]] & 0x02)
  1790. outw(param[1], host->io_port + MBOX1);
  1791. if (mbox_param[param[0]] & 0x01)
  1792. outw(param[0], host->io_port + MBOX0);
  1793. outw(HCCR_SET_HOST_INTR, host->io_port + HOST_HCCR);
  1794. while (1) {
  1795. loop_count = DEFAULT_LOOP_COUNT;
  1796. while (--loop_count && !(inw(host->io_port + PCI_INTER_STS) & 0x08)) {
  1797. barrier();
  1798. cpu_relax();
  1799. }
  1800. if (!loop_count) {
  1801. hostdata->adapter_state = AS_FIRMWARE_DEAD;
  1802. printk("qlogicfc%d : mbox_command loop timeout #2\n", hostdata->host_id);
  1803. break;
  1804. }
  1805. isp2x00_intr_handler(host->irq, host, NULL);
  1806. if (hostdata->mbox_done == 1)
  1807. break;
  1808. }
  1809. loop_count = DEFAULT_LOOP_COUNT;
  1810. while (--loop_count && inw(host->io_port + MBOX0) == 0x04) {
  1811. barrier();
  1812. cpu_relax();
  1813. }
  1814. if (!loop_count)
  1815. printk("qlogicfc%d : mbox_command loop timeout #3\n", hostdata->host_id);
  1816. param[7] = inw(host->io_port + MBOX7);
  1817. param[6] = inw(host->io_port + MBOX6);
  1818. param[5] = inw(host->io_port + MBOX5);
  1819. param[4] = inw(host->io_port + MBOX4);
  1820. param[3] = inw(host->io_port + MBOX3);
  1821. param[2] = inw(host->io_port + MBOX2);
  1822. param[1] = inw(host->io_port + MBOX1);
  1823. param[0] = inw(host->io_port + MBOX0);
  1824. outw(0x0, host->io_port + PCI_SEMAPHORE);
  1825. if (inw(host->io_port + HOST_HCCR) & 0x0080) {
  1826. hostdata->adapter_state = AS_FIRMWARE_DEAD;
  1827. printk("qlogicfc%d : mbox op is still pending\n", hostdata->host_id);
  1828. }
  1829. return 0;
  1830. }
  1831. #if DEBUG_ISP2x00_INTR
  1832. void isp2x00_print_status_entry(struct Status_Entry *status)
  1833. {
  1834. printk("qlogicfc : entry count = 0x%02x, type = 0x%02x, flags = 0x%02x\n",
  1835. status->hdr.entry_cnt, status->hdr.entry_type, status->hdr.flags);
  1836. printk("qlogicfc : scsi status = 0x%04x, completion status = 0x%04x\n",
  1837. le16_to_cpu(status->scsi_status), le16_to_cpu(status->completion_status));
  1838. printk("qlogicfc : state flags = 0x%04x, status flags = 0x%04x\n",
  1839. le16_to_cpu(status->state_flags), le16_to_cpu(status->status_flags));
  1840. printk("qlogicfc : response info length = 0x%04x, request sense length = 0x%04x\n",
  1841. le16_to_cpu(status->res_info_len), le16_to_cpu(status->req_sense_len));
  1842. printk("qlogicfc : residual transfer length = 0x%08x, response = 0x%02x\n", le32_to_cpu(status->residual), status->res_info[3]);
  1843. }
  1844. #endif /* DEBUG_ISP2x00_INTR */
  1845. #if DEBUG_ISP2x00
  1846. void isp2x00_print_scsi_cmd(Scsi_Cmnd * cmd)
  1847. {
  1848. int i;
  1849. printk("qlogicfc : target = 0x%02x, lun = 0x%02x, cmd_len = 0x%02x\n",
  1850. cmd->target, cmd->lun, cmd->cmd_len);
  1851. printk("qlogicfc : command = ");
  1852. for (i = 0; i < cmd->cmd_len; i++)
  1853. printk("0x%02x ", cmd->cmnd[i]);
  1854. printk("\n");
  1855. }
  1856. #endif /* DEBUG_ISP2x00 */
  1857. MODULE_LICENSE("GPL");
  1858. static Scsi_Host_Template driver_template = {
  1859. .detect = isp2x00_detect,
  1860. .release = isp2x00_release,
  1861. .info = isp2x00_info,
  1862. .queuecommand = isp2x00_queuecommand,
  1863. .eh_abort_handler = isp2x00_abort,
  1864. .bios_param = isp2x00_biosparam,
  1865. .can_queue = QLOGICFC_REQ_QUEUE_LEN,
  1866. .this_id = -1,
  1867. .sg_tablesize = QLOGICFC_MAX_SG(QLOGICFC_REQ_QUEUE_LEN),
  1868. .cmd_per_lun = QLOGICFC_CMD_PER_LUN,
  1869. .use_clustering = ENABLE_CLUSTERING,
  1870. };
  1871. #include "scsi_module.c"