aic79xx_osm_pci.c 9.6 KB

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  1. /*
  2. * Linux driver attachment glue for PCI based U320 controllers.
  3. *
  4. * Copyright (c) 2000-2001 Adaptec Inc.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
  40. */
  41. #include "aic79xx_osm.h"
  42. #include "aic79xx_inline.h"
  43. #include "aic79xx_pci.h"
  44. static int ahd_linux_pci_dev_probe(struct pci_dev *pdev,
  45. const struct pci_device_id *ent);
  46. static int ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd,
  47. u_long *base, u_long *base2);
  48. static int ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  49. u_long *bus_addr,
  50. uint8_t __iomem **maddr);
  51. static void ahd_linux_pci_dev_remove(struct pci_dev *pdev);
  52. /* Define the macro locally since it's different for different class of chips.
  53. */
  54. #define ID(x) \
  55. ID2C(x), \
  56. ID2C(IDIROC(x))
  57. static struct pci_device_id ahd_linux_pci_id_table[] = {
  58. /* aic7901 based controllers */
  59. ID(ID_AHA_29320A),
  60. ID(ID_AHA_29320ALP),
  61. /* aic7902 based controllers */
  62. ID(ID_AHA_29320),
  63. ID(ID_AHA_29320B),
  64. ID(ID_AHA_29320LP),
  65. ID(ID_AHA_39320),
  66. ID(ID_AHA_39320_B),
  67. ID(ID_AHA_39320A),
  68. ID(ID_AHA_39320D),
  69. ID(ID_AHA_39320D_HP),
  70. ID(ID_AHA_39320D_B),
  71. ID(ID_AHA_39320D_B_HP),
  72. /* Generic chip probes for devices we don't know exactly. */
  73. ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
  74. ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
  75. ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
  76. { 0 }
  77. };
  78. MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
  79. struct pci_driver aic79xx_pci_driver = {
  80. .name = "aic79xx",
  81. .probe = ahd_linux_pci_dev_probe,
  82. .remove = ahd_linux_pci_dev_remove,
  83. .id_table = ahd_linux_pci_id_table
  84. };
  85. static void
  86. ahd_linux_pci_dev_remove(struct pci_dev *pdev)
  87. {
  88. struct ahd_softc *ahd = pci_get_drvdata(pdev);
  89. u_long s;
  90. ahd_lock(ahd, &s);
  91. ahd_intr_enable(ahd, FALSE);
  92. ahd_unlock(ahd, &s);
  93. ahd_free(ahd);
  94. }
  95. static void
  96. ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
  97. {
  98. struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
  99. unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
  100. master_pdev = pci_get_slot(pdev->bus, master_devfn);
  101. if (master_pdev) {
  102. struct ahd_softc *master = pci_get_drvdata(master_pdev);
  103. if (master) {
  104. ahd->flags &= ~AHD_BIOS_ENABLED;
  105. ahd->flags |= master->flags & AHD_BIOS_ENABLED;
  106. } else
  107. printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
  108. pci_dev_put(master_pdev);
  109. }
  110. }
  111. static int
  112. ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  113. {
  114. char buf[80];
  115. struct ahd_softc *ahd;
  116. ahd_dev_softc_t pci;
  117. struct ahd_pci_identity *entry;
  118. char *name;
  119. int error;
  120. pci = pdev;
  121. entry = ahd_find_pci_device(pci);
  122. if (entry == NULL)
  123. return (-ENODEV);
  124. /*
  125. * Allocate a softc for this card and
  126. * set it up for attachment by our
  127. * common detect routine.
  128. */
  129. sprintf(buf, "ahd_pci:%d:%d:%d",
  130. ahd_get_pci_bus(pci),
  131. ahd_get_pci_slot(pci),
  132. ahd_get_pci_function(pci));
  133. name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT);
  134. if (name == NULL)
  135. return (-ENOMEM);
  136. strcpy(name, buf);
  137. ahd = ahd_alloc(NULL, name);
  138. if (ahd == NULL)
  139. return (-ENOMEM);
  140. if (pci_enable_device(pdev)) {
  141. ahd_free(ahd);
  142. return (-ENODEV);
  143. }
  144. pci_set_master(pdev);
  145. if (sizeof(dma_addr_t) > 4) {
  146. uint64_t memsize;
  147. const uint64_t mask_39bit = 0x7FFFFFFFFFULL;
  148. memsize = ahd_linux_get_memsize();
  149. if (memsize >= 0x8000000000ULL
  150. && pci_set_dma_mask(pdev, DMA_64BIT_MASK) == 0) {
  151. ahd->flags |= AHD_64BIT_ADDRESSING;
  152. } else if (memsize > 0x80000000
  153. && pci_set_dma_mask(pdev, mask_39bit) == 0) {
  154. ahd->flags |= AHD_39BIT_ADDRESSING;
  155. }
  156. } else {
  157. pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  158. }
  159. ahd->dev_softc = pci;
  160. error = ahd_pci_config(ahd, entry);
  161. if (error != 0) {
  162. ahd_free(ahd);
  163. return (-error);
  164. }
  165. /*
  166. * Second Function PCI devices need to inherit some
  167. * * settings from function 0.
  168. */
  169. if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
  170. ahd_linux_pci_inherit_flags(ahd);
  171. pci_set_drvdata(pdev, ahd);
  172. ahd_linux_register_host(ahd, &aic79xx_driver_template);
  173. return (0);
  174. }
  175. int
  176. ahd_linux_pci_init(void)
  177. {
  178. return (pci_module_init(&aic79xx_pci_driver));
  179. }
  180. void
  181. ahd_linux_pci_exit(void)
  182. {
  183. pci_unregister_driver(&aic79xx_pci_driver);
  184. }
  185. static int
  186. ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, u_long *base,
  187. u_long *base2)
  188. {
  189. *base = pci_resource_start(ahd->dev_softc, 0);
  190. /*
  191. * This is really the 3rd bar and should be at index 2,
  192. * but the Linux PCI code doesn't know how to "count" 64bit
  193. * bars.
  194. */
  195. *base2 = pci_resource_start(ahd->dev_softc, 3);
  196. if (*base == 0 || *base2 == 0)
  197. return (ENOMEM);
  198. if (request_region(*base, 256, "aic79xx") == 0)
  199. return (ENOMEM);
  200. if (request_region(*base2, 256, "aic79xx") == 0) {
  201. release_region(*base2, 256);
  202. return (ENOMEM);
  203. }
  204. return (0);
  205. }
  206. static int
  207. ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
  208. u_long *bus_addr,
  209. uint8_t __iomem **maddr)
  210. {
  211. u_long start;
  212. u_long base_page;
  213. u_long base_offset;
  214. int error;
  215. if (aic79xx_allow_memio == 0)
  216. return (ENOMEM);
  217. if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
  218. return (ENOMEM);
  219. error = 0;
  220. start = pci_resource_start(ahd->dev_softc, 1);
  221. base_page = start & PAGE_MASK;
  222. base_offset = start - base_page;
  223. if (start != 0) {
  224. *bus_addr = start;
  225. if (request_mem_region(start, 0x1000, "aic79xx") == 0)
  226. error = ENOMEM;
  227. if (error == 0) {
  228. *maddr = ioremap_nocache(base_page, base_offset + 256);
  229. if (*maddr == NULL) {
  230. error = ENOMEM;
  231. release_mem_region(start, 0x1000);
  232. } else
  233. *maddr += base_offset;
  234. }
  235. } else
  236. error = ENOMEM;
  237. return (error);
  238. }
  239. int
  240. ahd_pci_map_registers(struct ahd_softc *ahd)
  241. {
  242. uint32_t command;
  243. u_long base;
  244. uint8_t __iomem *maddr;
  245. int error;
  246. /*
  247. * If its allowed, we prefer memory mapped access.
  248. */
  249. command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
  250. command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
  251. base = 0;
  252. maddr = NULL;
  253. error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
  254. if (error == 0) {
  255. ahd->platform_data->mem_busaddr = base;
  256. ahd->tags[0] = BUS_SPACE_MEMIO;
  257. ahd->bshs[0].maddr = maddr;
  258. ahd->tags[1] = BUS_SPACE_MEMIO;
  259. ahd->bshs[1].maddr = maddr + 0x100;
  260. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
  261. command | PCIM_CMD_MEMEN, 4);
  262. if (ahd_pci_test_register_access(ahd) != 0) {
  263. printf("aic79xx: PCI Device %d:%d:%d "
  264. "failed memory mapped test. Using PIO.\n",
  265. ahd_get_pci_bus(ahd->dev_softc),
  266. ahd_get_pci_slot(ahd->dev_softc),
  267. ahd_get_pci_function(ahd->dev_softc));
  268. iounmap(maddr);
  269. release_mem_region(ahd->platform_data->mem_busaddr,
  270. 0x1000);
  271. ahd->bshs[0].maddr = NULL;
  272. maddr = NULL;
  273. } else
  274. command |= PCIM_CMD_MEMEN;
  275. } else if (bootverbose) {
  276. printf("aic79xx: PCI%d:%d:%d MEM region 0x%lx "
  277. "unavailable. Cannot memory map device.\n",
  278. ahd_get_pci_bus(ahd->dev_softc),
  279. ahd_get_pci_slot(ahd->dev_softc),
  280. ahd_get_pci_function(ahd->dev_softc),
  281. base);
  282. }
  283. if (maddr == NULL) {
  284. u_long base2;
  285. error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
  286. if (error == 0) {
  287. ahd->tags[0] = BUS_SPACE_PIO;
  288. ahd->tags[1] = BUS_SPACE_PIO;
  289. ahd->bshs[0].ioport = base;
  290. ahd->bshs[1].ioport = base2;
  291. command |= PCIM_CMD_PORTEN;
  292. } else {
  293. printf("aic79xx: PCI%d:%d:%d IO regions 0x%lx and 0x%lx"
  294. "unavailable. Cannot map device.\n",
  295. ahd_get_pci_bus(ahd->dev_softc),
  296. ahd_get_pci_slot(ahd->dev_softc),
  297. ahd_get_pci_function(ahd->dev_softc),
  298. base, base2);
  299. }
  300. }
  301. ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
  302. return (error);
  303. }
  304. int
  305. ahd_pci_map_int(struct ahd_softc *ahd)
  306. {
  307. int error;
  308. error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
  309. SA_SHIRQ, "aic79xx", ahd);
  310. if (error == 0)
  311. ahd->platform_data->irq = ahd->dev_softc->irq;
  312. return (-error);
  313. }
  314. void
  315. ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
  316. {
  317. pci_set_power_state(ahd->dev_softc, new_state);
  318. }