omap_cf.c 9.0 KB

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  1. /*
  2. * omap_cf.c -- OMAP 16xx CompactFlash controller driver
  3. *
  4. * Copyright (c) 2005 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/device.h>
  15. #include <linux/errno.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/interrupt.h>
  19. #include <pcmcia/ss.h>
  20. #include <asm/hardware.h>
  21. #include <asm/io.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/sizes.h>
  24. #include <asm/arch/mux.h>
  25. #include <asm/arch/tc.h>
  26. /* NOTE: don't expect this to support many I/O cards. The 16xx chips have
  27. * hard-wired timings to support Compact Flash memory cards; they won't work
  28. * with various other devices (like WLAN adapters) without some external
  29. * logic to help out.
  30. *
  31. * NOTE: CF controller docs disagree with address space docs as to where
  32. * CF_BASE really lives; this is a doc erratum.
  33. */
  34. #define CF_BASE 0xfffe2800
  35. /* status; read after IRQ */
  36. #define CF_STATUS_REG __REG16(CF_BASE + 0x00)
  37. # define CF_STATUS_BAD_READ (1 << 2)
  38. # define CF_STATUS_BAD_WRITE (1 << 1)
  39. # define CF_STATUS_CARD_DETECT (1 << 0)
  40. /* which chipselect (CS0..CS3) is used for CF (active low) */
  41. #define CF_CFG_REG __REG16(CF_BASE + 0x02)
  42. /* card reset */
  43. #define CF_CONTROL_REG __REG16(CF_BASE + 0x04)
  44. # define CF_CONTROL_RESET (1 << 0)
  45. #define omap_cf_present() (!(CF_STATUS_REG & CF_STATUS_CARD_DETECT))
  46. /*--------------------------------------------------------------------------*/
  47. static const char driver_name[] = "omap_cf";
  48. struct omap_cf_socket {
  49. struct pcmcia_socket socket;
  50. struct timer_list timer;
  51. unsigned present:1;
  52. unsigned active:1;
  53. struct platform_device *pdev;
  54. unsigned long phys_cf;
  55. u_int irq;
  56. };
  57. #define POLL_INTERVAL (2 * HZ)
  58. #define SZ_2K (2 * SZ_1K)
  59. /*--------------------------------------------------------------------------*/
  60. static int omap_cf_ss_init(struct pcmcia_socket *s)
  61. {
  62. return 0;
  63. }
  64. /* the timer is primarily to kick this socket's pccardd */
  65. static void omap_cf_timer(unsigned long _cf)
  66. {
  67. struct omap_cf_socket *cf = (void *) _cf;
  68. unsigned present = omap_cf_present();
  69. if (present != cf->present) {
  70. cf->present = present;
  71. pr_debug("%s: card %s\n", driver_name,
  72. present ? "present" : "gone");
  73. pcmcia_parse_events(&cf->socket, SS_DETECT);
  74. }
  75. if (cf->active)
  76. mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
  77. }
  78. /* This irq handler prevents "irqNNN: nobody cared" messages as drivers
  79. * claim the card's IRQ. It may also detect some card insertions, but
  80. * not removals; it can't always eliminate timer irqs.
  81. */
  82. static irqreturn_t omap_cf_irq(int irq, void *_cf, struct pt_regs *r)
  83. {
  84. omap_cf_timer((unsigned long)_cf);
  85. return IRQ_HANDLED;
  86. }
  87. static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
  88. {
  89. if (!sp)
  90. return -EINVAL;
  91. /* FIXME power management should probably be board-specific:
  92. * - 3VCARD vs XVCARD (OSK only handles 3VCARD)
  93. * - POWERON (switched on/off by set_socket)
  94. */
  95. if (omap_cf_present()) {
  96. struct omap_cf_socket *cf;
  97. *sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
  98. cf = container_of(s, struct omap_cf_socket, socket);
  99. s->irq.AssignedIRQ = cf->irq;
  100. } else
  101. *sp = 0;
  102. return 0;
  103. }
  104. static int
  105. omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
  106. {
  107. u16 control;
  108. /* FIXME some non-OSK boards will support power switching */
  109. switch (s->Vcc) {
  110. case 0:
  111. case 33:
  112. break;
  113. default:
  114. return -EINVAL;
  115. }
  116. control = CF_CONTROL_REG;
  117. if (s->flags & SS_RESET)
  118. CF_CONTROL_REG = CF_CONTROL_RESET;
  119. else
  120. CF_CONTROL_REG = 0;
  121. pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
  122. driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
  123. return 0;
  124. }
  125. static int omap_cf_ss_suspend(struct pcmcia_socket *s)
  126. {
  127. pr_debug("%s: %s\n", driver_name, __FUNCTION__);
  128. return omap_cf_set_socket(s, &dead_socket);
  129. }
  130. /* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
  131. static int
  132. omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
  133. {
  134. struct omap_cf_socket *cf;
  135. cf = container_of(s, struct omap_cf_socket, socket);
  136. io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
  137. io->start = cf->phys_cf + SZ_4K;
  138. io->stop = io->start + SZ_2K - 1;
  139. return 0;
  140. }
  141. static int
  142. omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
  143. {
  144. struct omap_cf_socket *cf;
  145. if (map->card_start)
  146. return -EINVAL;
  147. cf = container_of(s, struct omap_cf_socket, socket);
  148. map->static_start = cf->phys_cf;
  149. map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
  150. if (map->flags & MAP_ATTRIB)
  151. map->static_start += SZ_2K;
  152. return 0;
  153. }
  154. static struct pccard_operations omap_cf_ops = {
  155. .init = omap_cf_ss_init,
  156. .suspend = omap_cf_ss_suspend,
  157. .get_status = omap_cf_get_status,
  158. .set_socket = omap_cf_set_socket,
  159. .set_io_map = omap_cf_set_io_map,
  160. .set_mem_map = omap_cf_set_mem_map,
  161. };
  162. /*--------------------------------------------------------------------------*/
  163. /*
  164. * NOTE: right now the only board-specific platform_data is
  165. * "what chipselect is used". Boards could want more.
  166. */
  167. static int __init omap_cf_probe(struct device *dev)
  168. {
  169. unsigned seg;
  170. struct omap_cf_socket *cf;
  171. struct platform_device *pdev = to_platform_device(dev);
  172. int irq;
  173. int status;
  174. seg = (int) dev->platform_data;
  175. if (seg == 0 || seg > 3)
  176. return -ENODEV;
  177. /* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
  178. irq = platform_get_irq(pdev, 0);
  179. if (!irq)
  180. return -EINVAL;
  181. cf = kcalloc(1, sizeof *cf, GFP_KERNEL);
  182. if (!cf)
  183. return -ENOMEM;
  184. init_timer(&cf->timer);
  185. cf->timer.function = omap_cf_timer;
  186. cf->timer.data = (unsigned long) cf;
  187. cf->pdev = pdev;
  188. dev_set_drvdata(dev, cf);
  189. /* this primarily just shuts up irq handling noise */
  190. status = request_irq(irq, omap_cf_irq, SA_SHIRQ,
  191. driver_name, cf);
  192. if (status < 0)
  193. goto fail0;
  194. cf->irq = irq;
  195. cf->socket.pci_irq = irq;
  196. switch (seg) {
  197. /* NOTE: CS0 could be configured too ... */
  198. case 1:
  199. cf->phys_cf = OMAP_CS1_PHYS;
  200. break;
  201. case 2:
  202. cf->phys_cf = OMAP_CS2_PHYS;
  203. break;
  204. case 3:
  205. cf->phys_cf = omap_cs3_phys();
  206. break;
  207. default:
  208. goto fail1;
  209. }
  210. /* pcmcia layer only remaps "real" memory */
  211. cf->socket.io_offset = (unsigned long)
  212. ioremap(cf->phys_cf + SZ_4K, SZ_2K);
  213. if (!cf->socket.io_offset)
  214. goto fail1;
  215. if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
  216. goto fail1;
  217. /* NOTE: CF conflicts with MMC1 */
  218. omap_cfg_reg(W11_1610_CF_CD1);
  219. omap_cfg_reg(P11_1610_CF_CD2);
  220. omap_cfg_reg(R11_1610_CF_IOIS16);
  221. omap_cfg_reg(V10_1610_CF_IREQ);
  222. omap_cfg_reg(W10_1610_CF_RESET);
  223. CF_CFG_REG = ~(1 << seg);
  224. pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
  225. /* NOTE: better EMIFS setup might support more cards; but the
  226. * TRM only shows how to affect regular flash signals, not their
  227. * CF/PCMCIA variants...
  228. */
  229. pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
  230. seg, EMIFS_CCS(seg), EMIFS_ACS(seg));
  231. EMIFS_CCS(seg) = 0x0004a1b3; /* synch mode 4 etc */
  232. EMIFS_ACS(seg) = 0x00000000; /* OE hold/setup */
  233. /* CF uses armxor_ck, which is "always" available */
  234. pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
  235. CF_STATUS_REG, CF_CFG_REG, CF_CONTROL_REG,
  236. omap_cf_present() ? "present" : "(not present)");
  237. cf->socket.owner = THIS_MODULE;
  238. cf->socket.dev.dev = dev;
  239. cf->socket.ops = &omap_cf_ops;
  240. cf->socket.resource_ops = &pccard_static_ops;
  241. cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
  242. | SS_CAP_MEM_ALIGN;
  243. cf->socket.map_size = SZ_2K;
  244. status = pcmcia_register_socket(&cf->socket);
  245. if (status < 0)
  246. goto fail2;
  247. cf->active = 1;
  248. mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
  249. return 0;
  250. fail2:
  251. iounmap((void __iomem *) cf->socket.io_offset);
  252. release_mem_region(cf->phys_cf, SZ_8K);
  253. fail1:
  254. free_irq(irq, cf);
  255. fail0:
  256. kfree(cf);
  257. return status;
  258. }
  259. static int __devexit omap_cf_remove(struct device *dev)
  260. {
  261. struct omap_cf_socket *cf = dev_get_drvdata(dev);
  262. cf->active = 0;
  263. pcmcia_unregister_socket(&cf->socket);
  264. del_timer_sync(&cf->timer);
  265. iounmap((void __iomem *) cf->socket.io_offset);
  266. release_mem_region(cf->phys_cf, SZ_8K);
  267. free_irq(cf->irq, cf);
  268. kfree(cf);
  269. return 0;
  270. }
  271. static int omap_cf_suspend(struct device *dev, pm_message_t mesg, u32 level)
  272. {
  273. if (level != SUSPEND_SAVE_STATE)
  274. return 0;
  275. return pcmcia_socket_dev_suspend(dev, mesg);
  276. }
  277. static int omap_cf_resume(struct device *dev, u32 level)
  278. {
  279. if (level != RESUME_RESTORE_STATE)
  280. return 0;
  281. return pcmcia_socket_dev_resume(dev);
  282. }
  283. static struct device_driver omap_cf_driver = {
  284. .name = (char *) driver_name,
  285. .bus = &platform_bus_type,
  286. .probe = omap_cf_probe,
  287. .remove = __devexit_p(omap_cf_remove),
  288. .suspend = omap_cf_suspend,
  289. .resume = omap_cf_resume,
  290. };
  291. static int __init omap_cf_init(void)
  292. {
  293. if (cpu_is_omap16xx())
  294. driver_register(&omap_cf_driver);
  295. return 0;
  296. }
  297. static void __exit omap_cf_exit(void)
  298. {
  299. if (cpu_is_omap16xx())
  300. driver_unregister(&omap_cf_driver);
  301. }
  302. module_init(omap_cf_init);
  303. module_exit(omap_cf_exit);
  304. MODULE_DESCRIPTION("OMAP CF Driver");
  305. MODULE_LICENSE("GPL");