pciehp_ctrl.c 71 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706
  1. /*
  2. * PCI Express Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
  6. * Copyright (C) 2001 IBM Corp.
  7. * Copyright (C) 2003-2004 Intel Corporation
  8. *
  9. * All rights reserved.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  19. * NON INFRINGEMENT. See the GNU General Public License for more
  20. * details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  27. *
  28. */
  29. #include <linux/config.h>
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/types.h>
  33. #include <linux/slab.h>
  34. #include <linux/workqueue.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/delay.h>
  37. #include <linux/wait.h>
  38. #include <linux/smp_lock.h>
  39. #include <linux/pci.h>
  40. #include "../pci.h"
  41. #include "pciehp.h"
  42. #include "pciehprm.h"
  43. static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
  44. u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
  45. static int configure_new_function( struct controller *ctrl, struct pci_func *func,
  46. u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
  47. static void interrupt_event_handler(struct controller *ctrl);
  48. static struct semaphore event_semaphore; /* mutex for process loop (up if something to process) */
  49. static struct semaphore event_exit; /* guard ensure thread has exited before calling it quits */
  50. static int event_finished;
  51. static unsigned long pushbutton_pending; /* = 0 */
  52. static unsigned long surprise_rm_pending; /* = 0 */
  53. u8 pciehp_handle_attention_button(u8 hp_slot, void *inst_id)
  54. {
  55. struct controller *ctrl = (struct controller *) inst_id;
  56. struct slot *p_slot;
  57. u8 rc = 0;
  58. u8 getstatus;
  59. struct pci_func *func;
  60. struct event_info *taskInfo;
  61. /* Attention Button Change */
  62. dbg("pciehp: Attention button interrupt received.\n");
  63. func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
  64. /* This is the structure that tells the worker thread what to do */
  65. taskInfo = &(ctrl->event_queue[ctrl->next_event]);
  66. p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
  67. p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
  68. p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
  69. ctrl->next_event = (ctrl->next_event + 1) % 10;
  70. taskInfo->hp_slot = hp_slot;
  71. rc++;
  72. /*
  73. * Button pressed - See if need to TAKE ACTION!!!
  74. */
  75. info("Button pressed on Slot(%d)\n", ctrl->first_slot + hp_slot);
  76. taskInfo->event_type = INT_BUTTON_PRESS;
  77. if ((p_slot->state == BLINKINGON_STATE)
  78. || (p_slot->state == BLINKINGOFF_STATE)) {
  79. /* Cancel if we are still blinking; this means that we press the
  80. * attention again before the 5 sec. limit expires to cancel hot-add
  81. * or hot-remove
  82. */
  83. taskInfo->event_type = INT_BUTTON_CANCEL;
  84. info("Button cancel on Slot(%d)\n", ctrl->first_slot + hp_slot);
  85. } else if ((p_slot->state == POWERON_STATE)
  86. || (p_slot->state == POWEROFF_STATE)) {
  87. /* Ignore if the slot is on power-on or power-off state; this
  88. * means that the previous attention button action to hot-add or
  89. * hot-remove is undergoing
  90. */
  91. taskInfo->event_type = INT_BUTTON_IGNORE;
  92. info("Button ignore on Slot(%d)\n", ctrl->first_slot + hp_slot);
  93. }
  94. if (rc)
  95. up(&event_semaphore); /* signal event thread that new event is posted */
  96. return 0;
  97. }
  98. u8 pciehp_handle_switch_change(u8 hp_slot, void *inst_id)
  99. {
  100. struct controller *ctrl = (struct controller *) inst_id;
  101. struct slot *p_slot;
  102. u8 rc = 0;
  103. u8 getstatus;
  104. struct pci_func *func;
  105. struct event_info *taskInfo;
  106. /* Switch Change */
  107. dbg("pciehp: Switch interrupt received.\n");
  108. func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
  109. /* This is the structure that tells the worker thread
  110. * what to do
  111. */
  112. taskInfo = &(ctrl->event_queue[ctrl->next_event]);
  113. ctrl->next_event = (ctrl->next_event + 1) % 10;
  114. taskInfo->hp_slot = hp_slot;
  115. rc++;
  116. p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
  117. p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
  118. p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
  119. if (getstatus) {
  120. /*
  121. * Switch opened
  122. */
  123. info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot);
  124. func->switch_save = 0;
  125. taskInfo->event_type = INT_SWITCH_OPEN;
  126. } else {
  127. /*
  128. * Switch closed
  129. */
  130. info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot);
  131. func->switch_save = 0x10;
  132. taskInfo->event_type = INT_SWITCH_CLOSE;
  133. }
  134. if (rc)
  135. up(&event_semaphore); /* signal event thread that new event is posted */
  136. return rc;
  137. }
  138. u8 pciehp_handle_presence_change(u8 hp_slot, void *inst_id)
  139. {
  140. struct controller *ctrl = (struct controller *) inst_id;
  141. struct slot *p_slot;
  142. u8 rc = 0;
  143. struct pci_func *func;
  144. struct event_info *taskInfo;
  145. /* Presence Change */
  146. dbg("pciehp: Presence/Notify input change.\n");
  147. func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
  148. /* This is the structure that tells the worker thread
  149. * what to do
  150. */
  151. taskInfo = &(ctrl->event_queue[ctrl->next_event]);
  152. ctrl->next_event = (ctrl->next_event + 1) % 10;
  153. taskInfo->hp_slot = hp_slot;
  154. rc++;
  155. p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
  156. /* Switch is open, assume a presence change
  157. * Save the presence state
  158. */
  159. p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
  160. if (func->presence_save) {
  161. /*
  162. * Card Present
  163. */
  164. info("Card present on Slot(%d)\n", ctrl->first_slot + hp_slot);
  165. taskInfo->event_type = INT_PRESENCE_ON;
  166. } else {
  167. /*
  168. * Not Present
  169. */
  170. info("Card not present on Slot(%d)\n", ctrl->first_slot + hp_slot);
  171. taskInfo->event_type = INT_PRESENCE_OFF;
  172. }
  173. if (rc)
  174. up(&event_semaphore); /* signal event thread that new event is posted */
  175. return rc;
  176. }
  177. u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
  178. {
  179. struct controller *ctrl = (struct controller *) inst_id;
  180. struct slot *p_slot;
  181. u8 rc = 0;
  182. struct pci_func *func;
  183. struct event_info *taskInfo;
  184. /* power fault */
  185. dbg("pciehp: Power fault interrupt received.\n");
  186. func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
  187. /* this is the structure that tells the worker thread
  188. * what to do
  189. */
  190. taskInfo = &(ctrl->event_queue[ctrl->next_event]);
  191. ctrl->next_event = (ctrl->next_event + 1) % 10;
  192. taskInfo->hp_slot = hp_slot;
  193. rc++;
  194. p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
  195. if ( !(p_slot->hpc_ops->query_power_fault(p_slot))) {
  196. /*
  197. * power fault Cleared
  198. */
  199. info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot);
  200. func->status = 0x00;
  201. taskInfo->event_type = INT_POWER_FAULT_CLEAR;
  202. } else {
  203. /*
  204. * power fault
  205. */
  206. info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot);
  207. taskInfo->event_type = INT_POWER_FAULT;
  208. /* set power fault status for this board */
  209. func->status = 0xFF;
  210. info("power fault bit %x set\n", hp_slot);
  211. }
  212. if (rc)
  213. up(&event_semaphore); /* signal event thread that new event is posted */
  214. return rc;
  215. }
  216. /**
  217. * sort_by_size: sort nodes by their length, smallest first.
  218. *
  219. * @head: list to sort
  220. */
  221. static int sort_by_size(struct pci_resource **head)
  222. {
  223. struct pci_resource *current_res;
  224. struct pci_resource *next_res;
  225. int out_of_order = 1;
  226. if (!(*head))
  227. return 1;
  228. if (!((*head)->next))
  229. return 0;
  230. while (out_of_order) {
  231. out_of_order = 0;
  232. /* Special case for swapping list head */
  233. if (((*head)->next) &&
  234. ((*head)->length > (*head)->next->length)) {
  235. out_of_order++;
  236. current_res = *head;
  237. *head = (*head)->next;
  238. current_res->next = (*head)->next;
  239. (*head)->next = current_res;
  240. }
  241. current_res = *head;
  242. while (current_res->next && current_res->next->next) {
  243. if (current_res->next->length > current_res->next->next->length) {
  244. out_of_order++;
  245. next_res = current_res->next;
  246. current_res->next = current_res->next->next;
  247. current_res = current_res->next;
  248. next_res->next = current_res->next;
  249. current_res->next = next_res;
  250. } else
  251. current_res = current_res->next;
  252. }
  253. } /* End of out_of_order loop */
  254. return 0;
  255. }
  256. /*
  257. * sort_by_max_size
  258. *
  259. * Sorts nodes on the list by their length.
  260. * Largest first.
  261. *
  262. */
  263. static int sort_by_max_size(struct pci_resource **head)
  264. {
  265. struct pci_resource *current_res;
  266. struct pci_resource *next_res;
  267. int out_of_order = 1;
  268. if (!(*head))
  269. return 1;
  270. if (!((*head)->next))
  271. return 0;
  272. while (out_of_order) {
  273. out_of_order = 0;
  274. /* Special case for swapping list head */
  275. if (((*head)->next) &&
  276. ((*head)->length < (*head)->next->length)) {
  277. out_of_order++;
  278. current_res = *head;
  279. *head = (*head)->next;
  280. current_res->next = (*head)->next;
  281. (*head)->next = current_res;
  282. }
  283. current_res = *head;
  284. while (current_res->next && current_res->next->next) {
  285. if (current_res->next->length < current_res->next->next->length) {
  286. out_of_order++;
  287. next_res = current_res->next;
  288. current_res->next = current_res->next->next;
  289. current_res = current_res->next;
  290. next_res->next = current_res->next;
  291. current_res->next = next_res;
  292. } else
  293. current_res = current_res->next;
  294. }
  295. } /* End of out_of_order loop */
  296. return 0;
  297. }
  298. /**
  299. * do_pre_bridge_resource_split: return one unused resource node
  300. * @head: list to scan
  301. *
  302. */
  303. static struct pci_resource *
  304. do_pre_bridge_resource_split(struct pci_resource **head,
  305. struct pci_resource **orig_head, u32 alignment)
  306. {
  307. struct pci_resource *prevnode = NULL;
  308. struct pci_resource *node;
  309. struct pci_resource *split_node;
  310. u32 rc;
  311. u32 temp_dword;
  312. dbg("do_pre_bridge_resource_split\n");
  313. if (!(*head) || !(*orig_head))
  314. return NULL;
  315. rc = pciehp_resource_sort_and_combine(head);
  316. if (rc)
  317. return NULL;
  318. if ((*head)->base != (*orig_head)->base)
  319. return NULL;
  320. if ((*head)->length == (*orig_head)->length)
  321. return NULL;
  322. /* If we got here, there the bridge requires some of the resource, but
  323. * we may be able to split some off of the front
  324. */
  325. node = *head;
  326. if (node->length & (alignment -1)) {
  327. /* this one isn't an aligned length, so we'll make a new entry
  328. * and split it up.
  329. */
  330. split_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
  331. if (!split_node)
  332. return NULL;
  333. temp_dword = (node->length | (alignment-1)) + 1 - alignment;
  334. split_node->base = node->base;
  335. split_node->length = temp_dword;
  336. node->length -= temp_dword;
  337. node->base += split_node->length;
  338. /* Put it in the list */
  339. *head = split_node;
  340. split_node->next = node;
  341. }
  342. if (node->length < alignment)
  343. return NULL;
  344. /* Now unlink it */
  345. if (*head == node) {
  346. *head = node->next;
  347. } else {
  348. prevnode = *head;
  349. while (prevnode->next != node)
  350. prevnode = prevnode->next;
  351. prevnode->next = node->next;
  352. }
  353. node->next = NULL;
  354. return node;
  355. }
  356. /**
  357. * do_bridge_resource_split: return one unused resource node
  358. * @head: list to scan
  359. *
  360. */
  361. static struct pci_resource *
  362. do_bridge_resource_split(struct pci_resource **head, u32 alignment)
  363. {
  364. struct pci_resource *prevnode = NULL;
  365. struct pci_resource *node;
  366. u32 rc;
  367. u32 temp_dword;
  368. if (!(*head))
  369. return NULL;
  370. rc = pciehp_resource_sort_and_combine(head);
  371. if (rc)
  372. return NULL;
  373. node = *head;
  374. while (node->next) {
  375. prevnode = node;
  376. node = node->next;
  377. kfree(prevnode);
  378. }
  379. if (node->length < alignment) {
  380. kfree(node);
  381. return NULL;
  382. }
  383. if (node->base & (alignment - 1)) {
  384. /* Short circuit if adjusted size is too small */
  385. temp_dword = (node->base | (alignment-1)) + 1;
  386. if ((node->length - (temp_dword - node->base)) < alignment) {
  387. kfree(node);
  388. return NULL;
  389. }
  390. node->length -= (temp_dword - node->base);
  391. node->base = temp_dword;
  392. }
  393. if (node->length & (alignment - 1)) {
  394. /* There's stuff in use after this node */
  395. kfree(node);
  396. return NULL;
  397. }
  398. return node;
  399. }
  400. /*
  401. * get_io_resource
  402. *
  403. * this function sorts the resource list by size and then
  404. * returns the first node of "size" length that is not in the
  405. * ISA aliasing window. If it finds a node larger than "size"
  406. * it will split it up.
  407. *
  408. * size must be a power of two.
  409. */
  410. static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size)
  411. {
  412. struct pci_resource *prevnode;
  413. struct pci_resource *node;
  414. struct pci_resource *split_node = NULL;
  415. u32 temp_dword;
  416. if (!(*head))
  417. return NULL;
  418. if ( pciehp_resource_sort_and_combine(head) )
  419. return NULL;
  420. if ( sort_by_size(head) )
  421. return NULL;
  422. for (node = *head; node; node = node->next) {
  423. if (node->length < size)
  424. continue;
  425. if (node->base & (size - 1)) {
  426. /* this one isn't base aligned properly
  427. so we'll make a new entry and split it up */
  428. temp_dword = (node->base | (size-1)) + 1;
  429. /*/ Short circuit if adjusted size is too small */
  430. if ((node->length - (temp_dword - node->base)) < size)
  431. continue;
  432. split_node = kmalloc(sizeof(struct pci_resource),
  433. GFP_KERNEL);
  434. if (!split_node)
  435. return NULL;
  436. split_node->base = node->base;
  437. split_node->length = temp_dword - node->base;
  438. node->base = temp_dword;
  439. node->length -= split_node->length;
  440. /* Put it in the list */
  441. split_node->next = node->next;
  442. node->next = split_node;
  443. } /* End of non-aligned base */
  444. /* Don't need to check if too small since we already did */
  445. if (node->length > size) {
  446. /* this one is longer than we need
  447. so we'll make a new entry and split it up */
  448. split_node = kmalloc(sizeof(struct pci_resource),
  449. GFP_KERNEL);
  450. if (!split_node)
  451. return NULL;
  452. split_node->base = node->base + size;
  453. split_node->length = node->length - size;
  454. node->length = size;
  455. /* Put it in the list */
  456. split_node->next = node->next;
  457. node->next = split_node;
  458. } /* End of too big on top end */
  459. /* For IO make sure it's not in the ISA aliasing space */
  460. if (node->base & 0x300L)
  461. continue;
  462. /* If we got here, then it is the right size
  463. Now take it out of the list */
  464. if (*head == node) {
  465. *head = node->next;
  466. } else {
  467. prevnode = *head;
  468. while (prevnode->next != node)
  469. prevnode = prevnode->next;
  470. prevnode->next = node->next;
  471. }
  472. node->next = NULL;
  473. /* Stop looping */
  474. break;
  475. }
  476. return node;
  477. }
  478. /*
  479. * get_max_resource
  480. *
  481. * Gets the largest node that is at least "size" big from the
  482. * list pointed to by head. It aligns the node on top and bottom
  483. * to "size" alignment before returning it.
  484. * J.I. modified to put max size limits of; 64M->32M->16M->8M->4M->1M
  485. * This is needed to avoid allocating entire ACPI _CRS res to one child bridge/slot.
  486. */
  487. static struct pci_resource *get_max_resource(struct pci_resource **head, u32 size)
  488. {
  489. struct pci_resource *max;
  490. struct pci_resource *temp;
  491. struct pci_resource *split_node;
  492. u32 temp_dword;
  493. u32 max_size[] = { 0x4000000, 0x2000000, 0x1000000, 0x0800000, 0x0400000, 0x0200000, 0x0100000, 0x00 };
  494. int i;
  495. if (!(*head))
  496. return NULL;
  497. if (pciehp_resource_sort_and_combine(head))
  498. return NULL;
  499. if (sort_by_max_size(head))
  500. return NULL;
  501. for (max = *head;max; max = max->next) {
  502. /* If not big enough we could probably just bail,
  503. instead we'll continue to the next. */
  504. if (max->length < size)
  505. continue;
  506. if (max->base & (size - 1)) {
  507. /* this one isn't base aligned properly
  508. so we'll make a new entry and split it up */
  509. temp_dword = (max->base | (size-1)) + 1;
  510. /* Short circuit if adjusted size is too small */
  511. if ((max->length - (temp_dword - max->base)) < size)
  512. continue;
  513. split_node = kmalloc(sizeof(struct pci_resource),
  514. GFP_KERNEL);
  515. if (!split_node)
  516. return NULL;
  517. split_node->base = max->base;
  518. split_node->length = temp_dword - max->base;
  519. max->base = temp_dword;
  520. max->length -= split_node->length;
  521. /* Put it next in the list */
  522. split_node->next = max->next;
  523. max->next = split_node;
  524. }
  525. if ((max->base + max->length) & (size - 1)) {
  526. /* this one isn't end aligned properly at the top
  527. so we'll make a new entry and split it up */
  528. split_node = kmalloc(sizeof(struct pci_resource),
  529. GFP_KERNEL);
  530. if (!split_node)
  531. return NULL;
  532. temp_dword = ((max->base + max->length) & ~(size - 1));
  533. split_node->base = temp_dword;
  534. split_node->length = max->length + max->base
  535. - split_node->base;
  536. max->length -= split_node->length;
  537. /* Put it in the list */
  538. split_node->next = max->next;
  539. max->next = split_node;
  540. }
  541. /* Make sure it didn't shrink too much when we aligned it */
  542. if (max->length < size)
  543. continue;
  544. for ( i = 0; max_size[i] > size; i++) {
  545. if (max->length > max_size[i]) {
  546. split_node = kmalloc(sizeof(struct pci_resource),
  547. GFP_KERNEL);
  548. if (!split_node)
  549. break; /* return NULL; */
  550. split_node->base = max->base + max_size[i];
  551. split_node->length = max->length - max_size[i];
  552. max->length = max_size[i];
  553. /* Put it next in the list */
  554. split_node->next = max->next;
  555. max->next = split_node;
  556. break;
  557. }
  558. }
  559. /* Now take it out of the list */
  560. temp = (struct pci_resource*) *head;
  561. if (temp == max) {
  562. *head = max->next;
  563. } else {
  564. while (temp && temp->next != max) {
  565. temp = temp->next;
  566. }
  567. temp->next = max->next;
  568. }
  569. max->next = NULL;
  570. return max;
  571. }
  572. /* If we get here, we couldn't find one */
  573. return NULL;
  574. }
  575. /*
  576. * get_resource
  577. *
  578. * this function sorts the resource list by size and then
  579. * returns the first node of "size" length. If it finds a node
  580. * larger than "size" it will split it up.
  581. *
  582. * size must be a power of two.
  583. */
  584. static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
  585. {
  586. struct pci_resource *prevnode;
  587. struct pci_resource *node;
  588. struct pci_resource *split_node;
  589. u32 temp_dword;
  590. if (!(*head))
  591. return NULL;
  592. if ( pciehp_resource_sort_and_combine(head) )
  593. return NULL;
  594. if ( sort_by_size(head) )
  595. return NULL;
  596. for (node = *head; node; node = node->next) {
  597. dbg("%s: req_size =0x%x node=%p, base=0x%x, length=0x%x\n",
  598. __FUNCTION__, size, node, node->base, node->length);
  599. if (node->length < size)
  600. continue;
  601. if (node->base & (size - 1)) {
  602. dbg("%s: not aligned\n", __FUNCTION__);
  603. /* this one isn't base aligned properly
  604. so we'll make a new entry and split it up */
  605. temp_dword = (node->base | (size-1)) + 1;
  606. /* Short circuit if adjusted size is too small */
  607. if ((node->length - (temp_dword - node->base)) < size)
  608. continue;
  609. split_node = kmalloc(sizeof(struct pci_resource),
  610. GFP_KERNEL);
  611. if (!split_node)
  612. return NULL;
  613. split_node->base = node->base;
  614. split_node->length = temp_dword - node->base;
  615. node->base = temp_dword;
  616. node->length -= split_node->length;
  617. /* Put it in the list */
  618. split_node->next = node->next;
  619. node->next = split_node;
  620. } /* End of non-aligned base */
  621. /* Don't need to check if too small since we already did */
  622. if (node->length > size) {
  623. dbg("%s: too big\n", __FUNCTION__);
  624. /* this one is longer than we need
  625. so we'll make a new entry and split it up */
  626. split_node = kmalloc(sizeof(struct pci_resource),
  627. GFP_KERNEL);
  628. if (!split_node)
  629. return NULL;
  630. split_node->base = node->base + size;
  631. split_node->length = node->length - size;
  632. node->length = size;
  633. /* Put it in the list */
  634. split_node->next = node->next;
  635. node->next = split_node;
  636. } /* End of too big on top end */
  637. dbg("%s: got one!!!\n", __FUNCTION__);
  638. /* If we got here, then it is the right size
  639. Now take it out of the list */
  640. if (*head == node) {
  641. *head = node->next;
  642. } else {
  643. prevnode = *head;
  644. while (prevnode->next != node)
  645. prevnode = prevnode->next;
  646. prevnode->next = node->next;
  647. }
  648. node->next = NULL;
  649. /* Stop looping */
  650. break;
  651. }
  652. return node;
  653. }
  654. /*
  655. * pciehp_resource_sort_and_combine
  656. *
  657. * Sorts all of the nodes in the list in ascending order by
  658. * their base addresses. Also does garbage collection by
  659. * combining adjacent nodes.
  660. *
  661. * returns 0 if success
  662. */
  663. int pciehp_resource_sort_and_combine(struct pci_resource **head)
  664. {
  665. struct pci_resource *node1;
  666. struct pci_resource *node2;
  667. int out_of_order = 1;
  668. dbg("%s: head = %p, *head = %p\n", __FUNCTION__, head, *head);
  669. if (!(*head))
  670. return 1;
  671. dbg("*head->next = %p\n",(*head)->next);
  672. if (!(*head)->next)
  673. return 0; /* only one item on the list, already sorted! */
  674. dbg("*head->base = 0x%x\n",(*head)->base);
  675. dbg("*head->next->base = 0x%x\n",(*head)->next->base);
  676. while (out_of_order) {
  677. out_of_order = 0;
  678. /* Special case for swapping list head */
  679. if (((*head)->next) &&
  680. ((*head)->base > (*head)->next->base)) {
  681. node1 = *head;
  682. (*head) = (*head)->next;
  683. node1->next = (*head)->next;
  684. (*head)->next = node1;
  685. out_of_order++;
  686. }
  687. node1 = (*head);
  688. while (node1->next && node1->next->next) {
  689. if (node1->next->base > node1->next->next->base) {
  690. out_of_order++;
  691. node2 = node1->next;
  692. node1->next = node1->next->next;
  693. node1 = node1->next;
  694. node2->next = node1->next;
  695. node1->next = node2;
  696. } else
  697. node1 = node1->next;
  698. }
  699. } /* End of out_of_order loop */
  700. node1 = *head;
  701. while (node1 && node1->next) {
  702. if ((node1->base + node1->length) == node1->next->base) {
  703. /* Combine */
  704. dbg("8..\n");
  705. node1->length += node1->next->length;
  706. node2 = node1->next;
  707. node1->next = node1->next->next;
  708. kfree(node2);
  709. } else
  710. node1 = node1->next;
  711. }
  712. return 0;
  713. }
  714. /**
  715. * pciehp_slot_create - Creates a node and adds it to the proper bus.
  716. * @busnumber - bus where new node is to be located
  717. *
  718. * Returns pointer to the new node or NULL if unsuccessful
  719. */
  720. struct pci_func *pciehp_slot_create(u8 busnumber)
  721. {
  722. struct pci_func *new_slot;
  723. struct pci_func *next;
  724. dbg("%s: busnumber %x\n", __FUNCTION__, busnumber);
  725. new_slot = kmalloc(sizeof(struct pci_func), GFP_KERNEL);
  726. if (new_slot == NULL)
  727. return new_slot;
  728. memset(new_slot, 0, sizeof(struct pci_func));
  729. new_slot->next = NULL;
  730. new_slot->configured = 1;
  731. if (pciehp_slot_list[busnumber] == NULL) {
  732. pciehp_slot_list[busnumber] = new_slot;
  733. } else {
  734. next = pciehp_slot_list[busnumber];
  735. while (next->next != NULL)
  736. next = next->next;
  737. next->next = new_slot;
  738. }
  739. return new_slot;
  740. }
  741. /**
  742. * slot_remove - Removes a node from the linked list of slots.
  743. * @old_slot: slot to remove
  744. *
  745. * Returns 0 if successful, !0 otherwise.
  746. */
  747. static int slot_remove(struct pci_func * old_slot)
  748. {
  749. struct pci_func *next;
  750. if (old_slot == NULL)
  751. return 1;
  752. next = pciehp_slot_list[old_slot->bus];
  753. if (next == NULL)
  754. return 1;
  755. if (next == old_slot) {
  756. pciehp_slot_list[old_slot->bus] = old_slot->next;
  757. pciehp_destroy_board_resources(old_slot);
  758. kfree(old_slot);
  759. return 0;
  760. }
  761. while ((next->next != old_slot) && (next->next != NULL)) {
  762. next = next->next;
  763. }
  764. if (next->next == old_slot) {
  765. next->next = old_slot->next;
  766. pciehp_destroy_board_resources(old_slot);
  767. kfree(old_slot);
  768. return 0;
  769. } else
  770. return 2;
  771. }
  772. /**
  773. * bridge_slot_remove - Removes a node from the linked list of slots.
  774. * @bridge: bridge to remove
  775. *
  776. * Returns 0 if successful, !0 otherwise.
  777. */
  778. static int bridge_slot_remove(struct pci_func *bridge)
  779. {
  780. u8 subordinateBus, secondaryBus;
  781. u8 tempBus;
  782. struct pci_func *next;
  783. if (bridge == NULL)
  784. return 1;
  785. secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
  786. subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
  787. for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
  788. next = pciehp_slot_list[tempBus];
  789. while (!slot_remove(next)) {
  790. next = pciehp_slot_list[tempBus];
  791. }
  792. }
  793. next = pciehp_slot_list[bridge->bus];
  794. if (next == NULL) {
  795. return 1;
  796. }
  797. if (next == bridge) {
  798. pciehp_slot_list[bridge->bus] = bridge->next;
  799. kfree(bridge);
  800. return 0;
  801. }
  802. while ((next->next != bridge) && (next->next != NULL)) {
  803. next = next->next;
  804. }
  805. if (next->next == bridge) {
  806. next->next = bridge->next;
  807. kfree(bridge);
  808. return 0;
  809. } else
  810. return 2;
  811. }
  812. /**
  813. * pciehp_slot_find - Looks for a node by bus, and device, multiple functions accessed
  814. * @bus: bus to find
  815. * @device: device to find
  816. * @index: is 0 for first function found, 1 for the second...
  817. *
  818. * Returns pointer to the node if successful, %NULL otherwise.
  819. */
  820. struct pci_func *pciehp_slot_find(u8 bus, u8 device, u8 index)
  821. {
  822. int found = -1;
  823. struct pci_func *func;
  824. func = pciehp_slot_list[bus];
  825. dbg("%s: bus %x device %x index %x\n",
  826. __FUNCTION__, bus, device, index);
  827. if (func != NULL) {
  828. dbg("%s: func-> bus %x device %x function %x pci_dev %p\n",
  829. __FUNCTION__, func->bus, func->device, func->function,
  830. func->pci_dev);
  831. } else
  832. dbg("%s: func == NULL\n", __FUNCTION__);
  833. if ((func == NULL) || ((func->device == device) && (index == 0)))
  834. return func;
  835. if (func->device == device)
  836. found++;
  837. while (func->next != NULL) {
  838. func = func->next;
  839. dbg("%s: In while loop, func-> bus %x device %x function %x pci_dev %p\n",
  840. __FUNCTION__, func->bus, func->device, func->function,
  841. func->pci_dev);
  842. if (func->device == device)
  843. found++;
  844. dbg("%s: while loop, found %d, index %d\n", __FUNCTION__,
  845. found, index);
  846. if ((found == index) || (func->function == index)) {
  847. dbg("%s: Found bus %x dev %x func %x\n", __FUNCTION__,
  848. func->bus, func->device, func->function);
  849. return func;
  850. }
  851. }
  852. return NULL;
  853. }
  854. static int is_bridge(struct pci_func * func)
  855. {
  856. /* Check the header type */
  857. if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
  858. return 1;
  859. else
  860. return 0;
  861. }
  862. /* The following routines constitute the bulk of the
  863. hotplug controller logic
  864. */
  865. static void set_slot_off(struct controller *ctrl, struct slot * pslot)
  866. {
  867. /* Wait for exclusive access to hardware */
  868. down(&ctrl->crit_sect);
  869. /* turn off slot, turn on Amber LED, turn off Green LED if supported*/
  870. if (POWER_CTRL(ctrl->ctrlcap)) {
  871. if (pslot->hpc_ops->power_off_slot(pslot)) {
  872. err("%s: Issue of Slot Power Off command failed\n", __FUNCTION__);
  873. up(&ctrl->crit_sect);
  874. return;
  875. }
  876. wait_for_ctrl_irq (ctrl);
  877. }
  878. if (PWR_LED(ctrl->ctrlcap)) {
  879. pslot->hpc_ops->green_led_off(pslot);
  880. wait_for_ctrl_irq (ctrl);
  881. }
  882. if (ATTN_LED(ctrl->ctrlcap)) {
  883. if (pslot->hpc_ops->set_attention_status(pslot, 1)) {
  884. err("%s: Issue of Set Attention Led command failed\n", __FUNCTION__);
  885. up(&ctrl->crit_sect);
  886. return;
  887. }
  888. wait_for_ctrl_irq (ctrl);
  889. }
  890. /* Done with exclusive hardware access */
  891. up(&ctrl->crit_sect);
  892. }
  893. /**
  894. * board_added - Called after a board has been added to the system.
  895. *
  896. * Turns power on for the board
  897. * Configures board
  898. *
  899. */
  900. static u32 board_added(struct pci_func * func, struct controller * ctrl)
  901. {
  902. u8 hp_slot;
  903. int index;
  904. u32 temp_register = 0xFFFFFFFF;
  905. u32 rc = 0;
  906. struct pci_func *new_func = NULL;
  907. struct slot *p_slot;
  908. struct resource_lists res_lists;
  909. p_slot = pciehp_find_slot(ctrl, func->device);
  910. hp_slot = func->device - ctrl->slot_device_offset;
  911. dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n", __FUNCTION__, func->device, ctrl->slot_device_offset, hp_slot);
  912. /* Wait for exclusive access to hardware */
  913. down(&ctrl->crit_sect);
  914. if (POWER_CTRL(ctrl->ctrlcap)) {
  915. /* Power on slot */
  916. rc = p_slot->hpc_ops->power_on_slot(p_slot);
  917. if (rc) {
  918. up(&ctrl->crit_sect);
  919. return -1;
  920. }
  921. /* Wait for the command to complete */
  922. wait_for_ctrl_irq (ctrl);
  923. }
  924. if (PWR_LED(ctrl->ctrlcap)) {
  925. p_slot->hpc_ops->green_led_blink(p_slot);
  926. /* Wait for the command to complete */
  927. wait_for_ctrl_irq (ctrl);
  928. }
  929. /* Done with exclusive hardware access */
  930. up(&ctrl->crit_sect);
  931. /* Wait for ~1 second */
  932. dbg("%s: before long_delay\n", __FUNCTION__);
  933. wait_for_ctrl_irq (ctrl);
  934. dbg("%s: afterlong_delay\n", __FUNCTION__);
  935. /* Check link training status */
  936. rc = p_slot->hpc_ops->check_lnk_status(ctrl);
  937. if (rc) {
  938. err("%s: Failed to check link status\n", __FUNCTION__);
  939. set_slot_off(ctrl, p_slot);
  940. return rc;
  941. }
  942. dbg("%s: func status = %x\n", __FUNCTION__, func->status);
  943. /* Check for a power fault */
  944. if (func->status == 0xFF) {
  945. /* power fault occurred, but it was benign */
  946. temp_register = 0xFFFFFFFF;
  947. dbg("%s: temp register set to %x by power fault\n", __FUNCTION__, temp_register);
  948. rc = POWER_FAILURE;
  949. func->status = 0;
  950. } else {
  951. /* Get vendor/device ID u32 */
  952. rc = pci_bus_read_config_dword (ctrl->pci_dev->subordinate, PCI_DEVFN(func->device, func->function),
  953. PCI_VENDOR_ID, &temp_register);
  954. dbg("%s: pci_bus_read_config_dword returns %d\n", __FUNCTION__, rc);
  955. dbg("%s: temp_register is %x\n", __FUNCTION__, temp_register);
  956. if (rc != 0) {
  957. /* Something's wrong here */
  958. temp_register = 0xFFFFFFFF;
  959. dbg("%s: temp register set to %x by error\n", __FUNCTION__, temp_register);
  960. }
  961. /* Preset return code. It will be changed later if things go okay. */
  962. rc = NO_ADAPTER_PRESENT;
  963. }
  964. /* All F's is an empty slot or an invalid board */
  965. if (temp_register != 0xFFFFFFFF) { /* Check for a board in the slot */
  966. res_lists.io_head = ctrl->io_head;
  967. res_lists.mem_head = ctrl->mem_head;
  968. res_lists.p_mem_head = ctrl->p_mem_head;
  969. res_lists.bus_head = ctrl->bus_head;
  970. res_lists.irqs = NULL;
  971. rc = configure_new_device(ctrl, func, 0, &res_lists, 0, 0);
  972. dbg("%s: back from configure_new_device\n", __FUNCTION__);
  973. ctrl->io_head = res_lists.io_head;
  974. ctrl->mem_head = res_lists.mem_head;
  975. ctrl->p_mem_head = res_lists.p_mem_head;
  976. ctrl->bus_head = res_lists.bus_head;
  977. pciehp_resource_sort_and_combine(&(ctrl->mem_head));
  978. pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
  979. pciehp_resource_sort_and_combine(&(ctrl->io_head));
  980. pciehp_resource_sort_and_combine(&(ctrl->bus_head));
  981. if (rc) {
  982. set_slot_off(ctrl, p_slot);
  983. return rc;
  984. }
  985. pciehp_save_slot_config(ctrl, func);
  986. func->status = 0;
  987. func->switch_save = 0x10;
  988. func->is_a_board = 0x01;
  989. /* next, we will instantiate the linux pci_dev structures
  990. * (with appropriate driver notification, if already present)
  991. */
  992. index = 0;
  993. do {
  994. new_func = pciehp_slot_find(ctrl->slot_bus, func->device, index++);
  995. if (new_func && !new_func->pci_dev) {
  996. dbg("%s:call pci_hp_configure_dev, func %x\n",
  997. __FUNCTION__, index);
  998. pciehp_configure_device(ctrl, new_func);
  999. }
  1000. } while (new_func);
  1001. /*
  1002. * Some PCI Express root ports require fixup after hot-plug operation.
  1003. */
  1004. if (pcie_mch_quirk)
  1005. pci_fixup_device(pci_fixup_final, ctrl->pci_dev);
  1006. if (PWR_LED(ctrl->ctrlcap)) {
  1007. /* Wait for exclusive access to hardware */
  1008. down(&ctrl->crit_sect);
  1009. p_slot->hpc_ops->green_led_on(p_slot);
  1010. /* Wait for the command to complete */
  1011. wait_for_ctrl_irq (ctrl);
  1012. /* Done with exclusive hardware access */
  1013. up(&ctrl->crit_sect);
  1014. }
  1015. } else {
  1016. set_slot_off(ctrl, p_slot);
  1017. return -1;
  1018. }
  1019. return 0;
  1020. }
  1021. /**
  1022. * remove_board - Turns off slot and LED's
  1023. *
  1024. */
  1025. static u32 remove_board(struct pci_func *func, struct controller *ctrl)
  1026. {
  1027. int index;
  1028. u8 skip = 0;
  1029. u8 device;
  1030. u8 hp_slot;
  1031. u32 rc;
  1032. struct resource_lists res_lists;
  1033. struct pci_func *temp_func;
  1034. struct slot *p_slot;
  1035. if (func == NULL)
  1036. return 1;
  1037. if (pciehp_unconfigure_device(func))
  1038. return 1;
  1039. device = func->device;
  1040. hp_slot = func->device - ctrl->slot_device_offset;
  1041. p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
  1042. dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot);
  1043. if ((ctrl->add_support) &&
  1044. !(func->bus_head || func->mem_head || func->p_mem_head || func->io_head)) {
  1045. /* Here we check to see if we've saved any of the board's
  1046. * resources already. If so, we'll skip the attempt to
  1047. * determine what's being used.
  1048. */
  1049. index = 0;
  1050. temp_func = func;
  1051. while ((temp_func = pciehp_slot_find(temp_func->bus, temp_func->device, index++))) {
  1052. if (temp_func->bus_head || temp_func->mem_head
  1053. || temp_func->p_mem_head || temp_func->io_head) {
  1054. skip = 1;
  1055. break;
  1056. }
  1057. }
  1058. if (!skip)
  1059. rc = pciehp_save_used_resources(ctrl, func, DISABLE_CARD);
  1060. }
  1061. /* Change status to shutdown */
  1062. if (func->is_a_board)
  1063. func->status = 0x01;
  1064. func->configured = 0;
  1065. /* Wait for exclusive access to hardware */
  1066. down(&ctrl->crit_sect);
  1067. if (POWER_CTRL(ctrl->ctrlcap)) {
  1068. /* power off slot */
  1069. rc = p_slot->hpc_ops->power_off_slot(p_slot);
  1070. if (rc) {
  1071. err("%s: Issue of Slot Disable command failed\n", __FUNCTION__);
  1072. up(&ctrl->crit_sect);
  1073. return rc;
  1074. }
  1075. /* Wait for the command to complete */
  1076. wait_for_ctrl_irq (ctrl);
  1077. }
  1078. if (PWR_LED(ctrl->ctrlcap)) {
  1079. /* turn off Green LED */
  1080. p_slot->hpc_ops->green_led_off(p_slot);
  1081. /* Wait for the command to complete */
  1082. wait_for_ctrl_irq (ctrl);
  1083. }
  1084. /* Done with exclusive hardware access */
  1085. up(&ctrl->crit_sect);
  1086. if (ctrl->add_support) {
  1087. while (func) {
  1088. res_lists.io_head = ctrl->io_head;
  1089. res_lists.mem_head = ctrl->mem_head;
  1090. res_lists.p_mem_head = ctrl->p_mem_head;
  1091. res_lists.bus_head = ctrl->bus_head;
  1092. dbg("Returning resources to ctlr lists for (B/D/F) = (%#x/%#x/%#x)\n",
  1093. func->bus, func->device, func->function);
  1094. pciehp_return_board_resources(func, &res_lists);
  1095. ctrl->io_head = res_lists.io_head;
  1096. ctrl->mem_head = res_lists.mem_head;
  1097. ctrl->p_mem_head = res_lists.p_mem_head;
  1098. ctrl->bus_head = res_lists.bus_head;
  1099. pciehp_resource_sort_and_combine(&(ctrl->mem_head));
  1100. pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
  1101. pciehp_resource_sort_and_combine(&(ctrl->io_head));
  1102. pciehp_resource_sort_and_combine(&(ctrl->bus_head));
  1103. if (is_bridge(func)) {
  1104. dbg("PCI Bridge Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
  1105. ctrl->seg, func->bus, func->device, func->function);
  1106. bridge_slot_remove(func);
  1107. } else {
  1108. dbg("PCI Function Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
  1109. ctrl->seg, func->bus, func->device, func->function);
  1110. slot_remove(func);
  1111. }
  1112. func = pciehp_slot_find(ctrl->slot_bus, device, 0);
  1113. }
  1114. /* Setup slot structure with entry for empty slot */
  1115. func = pciehp_slot_create(ctrl->slot_bus);
  1116. if (func == NULL) {
  1117. return 1;
  1118. }
  1119. func->bus = ctrl->slot_bus;
  1120. func->device = device;
  1121. func->function = 0;
  1122. func->configured = 0;
  1123. func->switch_save = 0x10;
  1124. func->is_a_board = 0;
  1125. }
  1126. return 0;
  1127. }
  1128. static void pushbutton_helper_thread(unsigned long data)
  1129. {
  1130. pushbutton_pending = data;
  1131. up(&event_semaphore);
  1132. }
  1133. /**
  1134. * pciehp_pushbutton_thread
  1135. *
  1136. * Scheduled procedure to handle blocking stuff for the pushbuttons
  1137. * Handles all pending events and exits.
  1138. *
  1139. */
  1140. static void pciehp_pushbutton_thread(unsigned long slot)
  1141. {
  1142. struct slot *p_slot = (struct slot *) slot;
  1143. u8 getstatus;
  1144. pushbutton_pending = 0;
  1145. if (!p_slot) {
  1146. dbg("%s: Error! slot NULL\n", __FUNCTION__);
  1147. return;
  1148. }
  1149. p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
  1150. if (getstatus) {
  1151. p_slot->state = POWEROFF_STATE;
  1152. dbg("In power_down_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
  1153. pciehp_disable_slot(p_slot);
  1154. p_slot->state = STATIC_STATE;
  1155. } else {
  1156. p_slot->state = POWERON_STATE;
  1157. dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
  1158. if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) {
  1159. /* Wait for exclusive access to hardware */
  1160. down(&p_slot->ctrl->crit_sect);
  1161. p_slot->hpc_ops->green_led_off(p_slot);
  1162. /* Wait for the command to complete */
  1163. wait_for_ctrl_irq (p_slot->ctrl);
  1164. /* Done with exclusive hardware access */
  1165. up(&p_slot->ctrl->crit_sect);
  1166. }
  1167. p_slot->state = STATIC_STATE;
  1168. }
  1169. return;
  1170. }
  1171. /**
  1172. * pciehp_surprise_rm_thread
  1173. *
  1174. * Scheduled procedure to handle blocking stuff for the surprise removal
  1175. * Handles all pending events and exits.
  1176. *
  1177. */
  1178. static void pciehp_surprise_rm_thread(unsigned long slot)
  1179. {
  1180. struct slot *p_slot = (struct slot *) slot;
  1181. u8 getstatus;
  1182. surprise_rm_pending = 0;
  1183. if (!p_slot) {
  1184. dbg("%s: Error! slot NULL\n", __FUNCTION__);
  1185. return;
  1186. }
  1187. p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
  1188. if (!getstatus) {
  1189. p_slot->state = POWEROFF_STATE;
  1190. dbg("In removing board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
  1191. pciehp_disable_slot(p_slot);
  1192. p_slot->state = STATIC_STATE;
  1193. } else {
  1194. p_slot->state = POWERON_STATE;
  1195. dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
  1196. if (pciehp_enable_slot(p_slot) && PWR_LED(p_slot->ctrl->ctrlcap)) {
  1197. /* Wait for exclusive access to hardware */
  1198. down(&p_slot->ctrl->crit_sect);
  1199. p_slot->hpc_ops->green_led_off(p_slot);
  1200. /* Wait for the command to complete */
  1201. wait_for_ctrl_irq (p_slot->ctrl);
  1202. /* Done with exclusive hardware access */
  1203. up(&p_slot->ctrl->crit_sect);
  1204. }
  1205. p_slot->state = STATIC_STATE;
  1206. }
  1207. return;
  1208. }
  1209. /* this is the main worker thread */
  1210. static int event_thread(void* data)
  1211. {
  1212. struct controller *ctrl;
  1213. lock_kernel();
  1214. daemonize("pciehpd_event");
  1215. unlock_kernel();
  1216. while (1) {
  1217. dbg("!!!!event_thread sleeping\n");
  1218. down_interruptible (&event_semaphore);
  1219. dbg("event_thread woken finished = %d\n", event_finished);
  1220. if (event_finished || signal_pending(current))
  1221. break;
  1222. /* Do stuff here */
  1223. if (pushbutton_pending)
  1224. pciehp_pushbutton_thread(pushbutton_pending);
  1225. else if (surprise_rm_pending)
  1226. pciehp_surprise_rm_thread(surprise_rm_pending);
  1227. else
  1228. for (ctrl = pciehp_ctrl_list; ctrl; ctrl=ctrl->next)
  1229. interrupt_event_handler(ctrl);
  1230. }
  1231. dbg("event_thread signals exit\n");
  1232. up(&event_exit);
  1233. return 0;
  1234. }
  1235. int pciehp_event_start_thread(void)
  1236. {
  1237. int pid;
  1238. /* initialize our semaphores */
  1239. init_MUTEX_LOCKED(&event_exit);
  1240. event_finished=0;
  1241. init_MUTEX_LOCKED(&event_semaphore);
  1242. pid = kernel_thread(event_thread, NULL, 0);
  1243. if (pid < 0) {
  1244. err ("Can't start up our event thread\n");
  1245. return -1;
  1246. }
  1247. dbg("Our event thread pid = %d\n", pid);
  1248. return 0;
  1249. }
  1250. void pciehp_event_stop_thread(void)
  1251. {
  1252. event_finished = 1;
  1253. dbg("event_thread finish command given\n");
  1254. up(&event_semaphore);
  1255. dbg("wait for event_thread to exit\n");
  1256. down(&event_exit);
  1257. }
  1258. static int update_slot_info(struct slot *slot)
  1259. {
  1260. struct hotplug_slot_info *info;
  1261. /* char buffer[SLOT_NAME_SIZE]; */
  1262. int result;
  1263. info = kmalloc(sizeof(struct hotplug_slot_info), GFP_KERNEL);
  1264. if (!info)
  1265. return -ENOMEM;
  1266. /* make_slot_name (&buffer[0], SLOT_NAME_SIZE, slot); */
  1267. slot->hpc_ops->get_power_status(slot, &(info->power_status));
  1268. slot->hpc_ops->get_attention_status(slot, &(info->attention_status));
  1269. slot->hpc_ops->get_latch_status(slot, &(info->latch_status));
  1270. slot->hpc_ops->get_adapter_status(slot, &(info->adapter_status));
  1271. /* result = pci_hp_change_slot_info(buffer, info); */
  1272. result = pci_hp_change_slot_info(slot->hotplug_slot, info);
  1273. kfree (info);
  1274. return result;
  1275. }
  1276. static void interrupt_event_handler(struct controller *ctrl)
  1277. {
  1278. int loop = 0;
  1279. int change = 1;
  1280. struct pci_func *func;
  1281. u8 hp_slot;
  1282. u8 getstatus;
  1283. struct slot *p_slot;
  1284. while (change) {
  1285. change = 0;
  1286. for (loop = 0; loop < 10; loop++) {
  1287. if (ctrl->event_queue[loop].event_type != 0) {
  1288. hp_slot = ctrl->event_queue[loop].hp_slot;
  1289. func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
  1290. p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
  1291. dbg("hp_slot %d, func %p, p_slot %p\n", hp_slot, func, p_slot);
  1292. if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) {
  1293. dbg("button cancel\n");
  1294. del_timer(&p_slot->task_event);
  1295. switch (p_slot->state) {
  1296. case BLINKINGOFF_STATE:
  1297. /* Wait for exclusive access to hardware */
  1298. down(&ctrl->crit_sect);
  1299. if (PWR_LED(ctrl->ctrlcap)) {
  1300. p_slot->hpc_ops->green_led_on(p_slot);
  1301. /* Wait for the command to complete */
  1302. wait_for_ctrl_irq (ctrl);
  1303. }
  1304. if (ATTN_LED(ctrl->ctrlcap)) {
  1305. p_slot->hpc_ops->set_attention_status(p_slot, 0);
  1306. /* Wait for the command to complete */
  1307. wait_for_ctrl_irq (ctrl);
  1308. }
  1309. /* Done with exclusive hardware access */
  1310. up(&ctrl->crit_sect);
  1311. break;
  1312. case BLINKINGON_STATE:
  1313. /* Wait for exclusive access to hardware */
  1314. down(&ctrl->crit_sect);
  1315. if (PWR_LED(ctrl->ctrlcap)) {
  1316. p_slot->hpc_ops->green_led_off(p_slot);
  1317. /* Wait for the command to complete */
  1318. wait_for_ctrl_irq (ctrl);
  1319. }
  1320. if (ATTN_LED(ctrl->ctrlcap)){
  1321. p_slot->hpc_ops->set_attention_status(p_slot, 0);
  1322. /* Wait for the command to complete */
  1323. wait_for_ctrl_irq (ctrl);
  1324. }
  1325. /* Done with exclusive hardware access */
  1326. up(&ctrl->crit_sect);
  1327. break;
  1328. default:
  1329. warn("Not a valid state\n");
  1330. return;
  1331. }
  1332. info(msg_button_cancel, p_slot->number);
  1333. p_slot->state = STATIC_STATE;
  1334. }
  1335. /* ***********Button Pressed (No action on 1st press...) */
  1336. else if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
  1337. if (ATTN_BUTTN(ctrl->ctrlcap)) {
  1338. dbg("Button pressed\n");
  1339. p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
  1340. if (getstatus) {
  1341. /* slot is on */
  1342. dbg("slot is on\n");
  1343. p_slot->state = BLINKINGOFF_STATE;
  1344. info(msg_button_off, p_slot->number);
  1345. } else {
  1346. /* slot is off */
  1347. dbg("slot is off\n");
  1348. p_slot->state = BLINKINGON_STATE;
  1349. info(msg_button_on, p_slot->number);
  1350. }
  1351. /* Wait for exclusive access to hardware */
  1352. down(&ctrl->crit_sect);
  1353. /* blink green LED and turn off amber */
  1354. if (PWR_LED(ctrl->ctrlcap)) {
  1355. p_slot->hpc_ops->green_led_blink(p_slot);
  1356. /* Wait for the command to complete */
  1357. wait_for_ctrl_irq (ctrl);
  1358. }
  1359. if (ATTN_LED(ctrl->ctrlcap)) {
  1360. p_slot->hpc_ops->set_attention_status(p_slot, 0);
  1361. /* Wait for the command to complete */
  1362. wait_for_ctrl_irq (ctrl);
  1363. }
  1364. /* Done with exclusive hardware access */
  1365. up(&ctrl->crit_sect);
  1366. init_timer(&p_slot->task_event);
  1367. p_slot->task_event.expires = jiffies + 5 * HZ; /* 5 second delay */
  1368. p_slot->task_event.function = (void (*)(unsigned long)) pushbutton_helper_thread;
  1369. p_slot->task_event.data = (unsigned long) p_slot;
  1370. dbg("add_timer p_slot = %p\n", (void *) p_slot);
  1371. add_timer(&p_slot->task_event);
  1372. }
  1373. }
  1374. /***********POWER FAULT********************/
  1375. else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
  1376. if (POWER_CTRL(ctrl->ctrlcap)) {
  1377. dbg("power fault\n");
  1378. /* Wait for exclusive access to hardware */
  1379. down(&ctrl->crit_sect);
  1380. if (ATTN_LED(ctrl->ctrlcap)) {
  1381. p_slot->hpc_ops->set_attention_status(p_slot, 1);
  1382. wait_for_ctrl_irq (ctrl);
  1383. }
  1384. if (PWR_LED(ctrl->ctrlcap)) {
  1385. p_slot->hpc_ops->green_led_off(p_slot);
  1386. wait_for_ctrl_irq (ctrl);
  1387. }
  1388. /* Done with exclusive hardware access */
  1389. up(&ctrl->crit_sect);
  1390. }
  1391. }
  1392. /***********SURPRISE REMOVAL********************/
  1393. else if ((ctrl->event_queue[loop].event_type == INT_PRESENCE_ON) ||
  1394. (ctrl->event_queue[loop].event_type == INT_PRESENCE_OFF)) {
  1395. if (HP_SUPR_RM(ctrl->ctrlcap)) {
  1396. dbg("Surprise Removal\n");
  1397. if (p_slot) {
  1398. surprise_rm_pending = (unsigned long) p_slot;
  1399. up(&event_semaphore);
  1400. update_slot_info(p_slot);
  1401. }
  1402. }
  1403. } else {
  1404. /* refresh notification */
  1405. if (p_slot)
  1406. update_slot_info(p_slot);
  1407. }
  1408. ctrl->event_queue[loop].event_type = 0;
  1409. change = 1;
  1410. }
  1411. } /* End of FOR loop */
  1412. }
  1413. }
  1414. int pciehp_enable_slot(struct slot *p_slot)
  1415. {
  1416. u8 getstatus = 0;
  1417. int rc;
  1418. struct pci_func *func;
  1419. func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
  1420. if (!func) {
  1421. dbg("%s: Error! slot NULL\n", __FUNCTION__);
  1422. return 1;
  1423. }
  1424. /* Check to see if (latch closed, card present, power off) */
  1425. down(&p_slot->ctrl->crit_sect);
  1426. rc = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
  1427. if (rc || !getstatus) {
  1428. info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number);
  1429. up(&p_slot->ctrl->crit_sect);
  1430. return 1;
  1431. }
  1432. if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
  1433. rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
  1434. if (rc || getstatus) {
  1435. info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number);
  1436. up(&p_slot->ctrl->crit_sect);
  1437. return 1;
  1438. }
  1439. }
  1440. if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
  1441. rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
  1442. if (rc || getstatus) {
  1443. info("%s: already enabled on slot(%x)\n", __FUNCTION__, p_slot->number);
  1444. up(&p_slot->ctrl->crit_sect);
  1445. return 1;
  1446. }
  1447. }
  1448. up(&p_slot->ctrl->crit_sect);
  1449. slot_remove(func);
  1450. func = pciehp_slot_create(p_slot->bus);
  1451. if (func == NULL)
  1452. return 1;
  1453. func->bus = p_slot->bus;
  1454. func->device = p_slot->device;
  1455. func->function = 0;
  1456. func->configured = 0;
  1457. func->is_a_board = 1;
  1458. /* We have to save the presence info for these slots */
  1459. p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
  1460. p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
  1461. func->switch_save = !getstatus? 0x10:0;
  1462. rc = board_added(func, p_slot->ctrl);
  1463. if (rc) {
  1464. if (is_bridge(func))
  1465. bridge_slot_remove(func);
  1466. else
  1467. slot_remove(func);
  1468. /* Setup slot structure with entry for empty slot */
  1469. func = pciehp_slot_create(p_slot->bus);
  1470. if (func == NULL)
  1471. return 1; /* Out of memory */
  1472. func->bus = p_slot->bus;
  1473. func->device = p_slot->device;
  1474. func->function = 0;
  1475. func->configured = 0;
  1476. func->is_a_board = 1;
  1477. /* We have to save the presence info for these slots */
  1478. p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
  1479. p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
  1480. func->switch_save = !getstatus? 0x10:0;
  1481. }
  1482. if (p_slot)
  1483. update_slot_info(p_slot);
  1484. return rc;
  1485. }
  1486. int pciehp_disable_slot(struct slot *p_slot)
  1487. {
  1488. u8 class_code, header_type, BCR;
  1489. u8 index = 0;
  1490. u8 getstatus = 0;
  1491. u32 rc = 0;
  1492. int ret = 0;
  1493. unsigned int devfn;
  1494. struct pci_bus *pci_bus = p_slot->ctrl->pci_dev->subordinate;
  1495. struct pci_func *func;
  1496. if (!p_slot->ctrl)
  1497. return 1;
  1498. /* Check to see if (latch closed, card present, power on) */
  1499. down(&p_slot->ctrl->crit_sect);
  1500. if (!HP_SUPR_RM(p_slot->ctrl->ctrlcap)) {
  1501. ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
  1502. if (ret || !getstatus) {
  1503. info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number);
  1504. up(&p_slot->ctrl->crit_sect);
  1505. return 1;
  1506. }
  1507. }
  1508. if (MRL_SENS(p_slot->ctrl->ctrlcap)) {
  1509. ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
  1510. if (ret || getstatus) {
  1511. info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number);
  1512. up(&p_slot->ctrl->crit_sect);
  1513. return 1;
  1514. }
  1515. }
  1516. if (POWER_CTRL(p_slot->ctrl->ctrlcap)) {
  1517. ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
  1518. if (ret || !getstatus) {
  1519. info("%s: already disabled slot(%x)\n", __FUNCTION__, p_slot->number);
  1520. up(&p_slot->ctrl->crit_sect);
  1521. return 1;
  1522. }
  1523. }
  1524. up(&p_slot->ctrl->crit_sect);
  1525. func = pciehp_slot_find(p_slot->bus, p_slot->device, index++);
  1526. /* Make sure there are no video controllers here
  1527. * for all func of p_slot
  1528. */
  1529. while (func && !rc) {
  1530. pci_bus->number = func->bus;
  1531. devfn = PCI_DEVFN(func->device, func->function);
  1532. /* Check the Class Code */
  1533. rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
  1534. if (rc)
  1535. return rc;
  1536. if (class_code == PCI_BASE_CLASS_DISPLAY) {
  1537. /* Display/Video adapter (not supported) */
  1538. rc = REMOVE_NOT_SUPPORTED;
  1539. } else {
  1540. /* See if it's a bridge */
  1541. rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
  1542. if (rc)
  1543. return rc;
  1544. /* If it's a bridge, check the VGA Enable bit */
  1545. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
  1546. rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
  1547. if (rc)
  1548. return rc;
  1549. /* If the VGA Enable bit is set, remove isn't supported */
  1550. if (BCR & PCI_BRIDGE_CTL_VGA) {
  1551. rc = REMOVE_NOT_SUPPORTED;
  1552. }
  1553. }
  1554. }
  1555. func = pciehp_slot_find(p_slot->bus, p_slot->device, index++);
  1556. }
  1557. func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
  1558. if ((func != NULL) && !rc) {
  1559. rc = remove_board(func, p_slot->ctrl);
  1560. } else if (!rc)
  1561. rc = 1;
  1562. if (p_slot)
  1563. update_slot_info(p_slot);
  1564. return rc;
  1565. }
  1566. /**
  1567. * configure_new_device - Configures the PCI header information of one board.
  1568. *
  1569. * @ctrl: pointer to controller structure
  1570. * @func: pointer to function structure
  1571. * @behind_bridge: 1 if this is a recursive call, 0 if not
  1572. * @resources: pointer to set of resource lists
  1573. *
  1574. * Returns 0 if success
  1575. *
  1576. */
  1577. static u32 configure_new_device(struct controller * ctrl, struct pci_func * func,
  1578. u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev)
  1579. {
  1580. u8 temp_byte, function, max_functions, stop_it;
  1581. int rc;
  1582. u32 ID;
  1583. struct pci_func *new_slot;
  1584. struct pci_bus lpci_bus, *pci_bus;
  1585. int index;
  1586. new_slot = func;
  1587. dbg("%s\n", __FUNCTION__);
  1588. memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
  1589. pci_bus = &lpci_bus;
  1590. pci_bus->number = func->bus;
  1591. /* Check for Multi-function device */
  1592. rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
  1593. if (rc) {
  1594. dbg("%s: rc = %d\n", __FUNCTION__, rc);
  1595. return rc;
  1596. }
  1597. if (temp_byte & 0x80) /* Multi-function device */
  1598. max_functions = 8;
  1599. else
  1600. max_functions = 1;
  1601. function = 0;
  1602. do {
  1603. rc = configure_new_function(ctrl, new_slot, behind_bridge,
  1604. resources, bridge_bus, bridge_dev);
  1605. if (rc) {
  1606. dbg("configure_new_function failed: %d\n", rc);
  1607. index = 0;
  1608. while (new_slot) {
  1609. new_slot = pciehp_slot_find(new_slot->bus,
  1610. new_slot->device, index++);
  1611. if (new_slot)
  1612. pciehp_return_board_resources(new_slot,
  1613. resources);
  1614. }
  1615. return rc;
  1616. }
  1617. function++;
  1618. stop_it = 0;
  1619. /* The following loop skips to the next present function
  1620. * and creates a board structure
  1621. */
  1622. while ((function < max_functions) && (!stop_it)) {
  1623. pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
  1624. if (ID == 0xFFFFFFFF) { /* There's nothing there. */
  1625. function++;
  1626. } else { /* There's something there */
  1627. /* Setup slot structure. */
  1628. new_slot = pciehp_slot_create(func->bus);
  1629. if (new_slot == NULL) {
  1630. /* Out of memory */
  1631. return 1;
  1632. }
  1633. new_slot->bus = func->bus;
  1634. new_slot->device = func->device;
  1635. new_slot->function = function;
  1636. new_slot->is_a_board = 1;
  1637. new_slot->status = 0;
  1638. stop_it++;
  1639. }
  1640. }
  1641. } while (function < max_functions);
  1642. dbg("returning from %s\n", __FUNCTION__);
  1643. return 0;
  1644. }
  1645. /*
  1646. * Configuration logic that involves the hotplug data structures and
  1647. * their bookkeeping
  1648. */
  1649. /**
  1650. * configure_bridge: fill bridge's registers, either configure or disable it.
  1651. */
  1652. static int
  1653. configure_bridge(struct pci_bus *pci_bus, unsigned int devfn,
  1654. struct pci_resource *mem_node,
  1655. struct pci_resource **hold_mem_node,
  1656. int base_addr, int limit_addr)
  1657. {
  1658. u16 temp_word;
  1659. u32 rc;
  1660. if (mem_node) {
  1661. memcpy(*hold_mem_node, mem_node, sizeof(struct pci_resource));
  1662. mem_node->next = NULL;
  1663. /* set Mem base and Limit registers */
  1664. RES_CHECK(mem_node->base, 16);
  1665. temp_word = (u16)(mem_node->base >> 16);
  1666. rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
  1667. RES_CHECK(mem_node->base + mem_node->length - 1, 16);
  1668. temp_word = (u16)((mem_node->base + mem_node->length - 1) >> 16);
  1669. rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
  1670. } else {
  1671. temp_word = 0xFFFF;
  1672. rc = pci_bus_write_config_word(pci_bus, devfn, base_addr, temp_word);
  1673. temp_word = 0x0000;
  1674. rc = pci_bus_write_config_word(pci_bus, devfn, limit_addr, temp_word);
  1675. kfree(*hold_mem_node);
  1676. *hold_mem_node = NULL;
  1677. }
  1678. return rc;
  1679. }
  1680. static int
  1681. configure_new_bridge(struct controller *ctrl, struct pci_func *func,
  1682. u8 behind_bridge, struct resource_lists *resources,
  1683. struct pci_bus *pci_bus)
  1684. {
  1685. int cloop;
  1686. u8 temp_byte;
  1687. u8 device;
  1688. u16 temp_word;
  1689. u32 rc;
  1690. u32 ID;
  1691. unsigned int devfn;
  1692. struct pci_resource *mem_node;
  1693. struct pci_resource *p_mem_node;
  1694. struct pci_resource *io_node;
  1695. struct pci_resource *bus_node;
  1696. struct pci_resource *hold_mem_node;
  1697. struct pci_resource *hold_p_mem_node;
  1698. struct pci_resource *hold_IO_node;
  1699. struct pci_resource *hold_bus_node;
  1700. struct irq_mapping irqs;
  1701. struct pci_func *new_slot;
  1702. struct resource_lists temp_resources;
  1703. devfn = PCI_DEVFN(func->device, func->function);
  1704. /* set Primary bus */
  1705. dbg("set Primary bus = 0x%x\n", func->bus);
  1706. rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
  1707. if (rc)
  1708. return rc;
  1709. /* find range of busses to use */
  1710. bus_node = get_max_resource(&resources->bus_head, 1L);
  1711. /* If we don't have any busses to allocate, we can't continue */
  1712. if (!bus_node) {
  1713. err("Got NO bus resource to use\n");
  1714. return -ENOMEM;
  1715. }
  1716. dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length);
  1717. /* set Secondary bus */
  1718. temp_byte = (u8)bus_node->base;
  1719. dbg("set Secondary bus = 0x%x\n", temp_byte);
  1720. rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
  1721. if (rc)
  1722. return rc;
  1723. /* set subordinate bus */
  1724. temp_byte = (u8)(bus_node->base + bus_node->length - 1);
  1725. dbg("set subordinate bus = 0x%x\n", temp_byte);
  1726. rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
  1727. if (rc)
  1728. return rc;
  1729. /* Set HP parameters (Cache Line Size, Latency Timer) */
  1730. rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
  1731. if (rc)
  1732. return rc;
  1733. /* Setup the IO, memory, and prefetchable windows */
  1734. io_node = get_max_resource(&(resources->io_head), 0x1000L);
  1735. if (io_node) {
  1736. dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base,
  1737. io_node->length, io_node->next);
  1738. }
  1739. mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
  1740. if (mem_node) {
  1741. dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base,
  1742. mem_node->length, mem_node->next);
  1743. }
  1744. if (resources->p_mem_head)
  1745. p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L);
  1746. else {
  1747. /*
  1748. * In some platform implementation, MEM and PMEM are not
  1749. * distinguished, and hence ACPI _CRS has only MEM entries
  1750. * for both MEM and PMEM.
  1751. */
  1752. dbg("using MEM for PMEM\n");
  1753. p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
  1754. }
  1755. if (p_mem_node) {
  1756. dbg("p_mem_node(base, len, next) (%x, %x, %p)\n", p_mem_node->base,
  1757. p_mem_node->length, p_mem_node->next);
  1758. }
  1759. /* set up the IRQ info */
  1760. if (!resources->irqs) {
  1761. irqs.barber_pole = 0;
  1762. irqs.interrupt[0] = 0;
  1763. irqs.interrupt[1] = 0;
  1764. irqs.interrupt[2] = 0;
  1765. irqs.interrupt[3] = 0;
  1766. irqs.valid_INT = 0;
  1767. } else {
  1768. irqs.barber_pole = resources->irqs->barber_pole;
  1769. irqs.interrupt[0] = resources->irqs->interrupt[0];
  1770. irqs.interrupt[1] = resources->irqs->interrupt[1];
  1771. irqs.interrupt[2] = resources->irqs->interrupt[2];
  1772. irqs.interrupt[3] = resources->irqs->interrupt[3];
  1773. irqs.valid_INT = resources->irqs->valid_INT;
  1774. }
  1775. /* set up resource lists that are now aligned on top and bottom
  1776. * for anything behind the bridge.
  1777. */
  1778. temp_resources.bus_head = bus_node;
  1779. temp_resources.io_head = io_node;
  1780. temp_resources.mem_head = mem_node;
  1781. temp_resources.p_mem_head = p_mem_node;
  1782. temp_resources.irqs = &irqs;
  1783. /* Make copies of the nodes we are going to pass down so that
  1784. * if there is a problem,we can just use these to free resources
  1785. */
  1786. hold_bus_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
  1787. hold_IO_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
  1788. hold_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
  1789. hold_p_mem_node = kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
  1790. if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
  1791. kfree(hold_bus_node);
  1792. kfree(hold_IO_node);
  1793. kfree(hold_mem_node);
  1794. kfree(hold_p_mem_node);
  1795. return 1;
  1796. }
  1797. memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
  1798. bus_node->base += 1;
  1799. bus_node->length -= 1;
  1800. bus_node->next = NULL;
  1801. /* If we have IO resources copy them and fill in the bridge's
  1802. * IO range registers
  1803. */
  1804. if (io_node) {
  1805. memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
  1806. io_node->next = NULL;
  1807. /* set IO base and Limit registers */
  1808. RES_CHECK(io_node->base, 8);
  1809. temp_byte = (u8)(io_node->base >> 8);
  1810. rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
  1811. RES_CHECK(io_node->base + io_node->length - 1, 8);
  1812. temp_byte = (u8)((io_node->base + io_node->length - 1) >> 8);
  1813. rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
  1814. } else {
  1815. kfree(hold_IO_node);
  1816. hold_IO_node = NULL;
  1817. }
  1818. /* If we have memory resources copy them and fill in the bridge's
  1819. * memory range registers. Otherwise, fill in the range
  1820. * registers with values that disable them.
  1821. */
  1822. rc = configure_bridge(pci_bus, devfn, mem_node, &hold_mem_node,
  1823. PCI_MEMORY_BASE, PCI_MEMORY_LIMIT);
  1824. /* If we have prefetchable memory resources copy them and
  1825. * fill in the bridge's memory range registers. Otherwise,
  1826. * fill in the range registers with values that disable them.
  1827. */
  1828. rc = configure_bridge(pci_bus, devfn, p_mem_node, &hold_p_mem_node,
  1829. PCI_PREF_MEMORY_BASE, PCI_PREF_MEMORY_LIMIT);
  1830. /* Adjust this to compensate for extra adjustment in first loop */
  1831. irqs.barber_pole--;
  1832. rc = 0;
  1833. /* Here we actually find the devices and configure them */
  1834. for (device = 0; (device <= 0x1F) && !rc; device++) {
  1835. irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
  1836. ID = 0xFFFFFFFF;
  1837. pci_bus->number = hold_bus_node->base;
  1838. pci_bus_read_config_dword (pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
  1839. pci_bus->number = func->bus;
  1840. if (ID != 0xFFFFFFFF) { /* device Present */
  1841. /* Setup slot structure. */
  1842. new_slot = pciehp_slot_create(hold_bus_node->base);
  1843. if (new_slot == NULL) {
  1844. /* Out of memory */
  1845. rc = -ENOMEM;
  1846. continue;
  1847. }
  1848. new_slot->bus = hold_bus_node->base;
  1849. new_slot->device = device;
  1850. new_slot->function = 0;
  1851. new_slot->is_a_board = 1;
  1852. new_slot->status = 0;
  1853. rc = configure_new_device(ctrl, new_slot, 1,
  1854. &temp_resources, func->bus,
  1855. func->device);
  1856. dbg("configure_new_device rc=0x%x\n",rc);
  1857. } /* End of IF (device in slot?) */
  1858. } /* End of FOR loop */
  1859. if (rc) {
  1860. pciehp_destroy_resource_list(&temp_resources);
  1861. return_resource(&(resources->bus_head), hold_bus_node);
  1862. return_resource(&(resources->io_head), hold_IO_node);
  1863. return_resource(&(resources->mem_head), hold_mem_node);
  1864. return_resource(&(resources->p_mem_head), hold_p_mem_node);
  1865. return(rc);
  1866. }
  1867. /* save the interrupt routing information */
  1868. if (resources->irqs) {
  1869. resources->irqs->interrupt[0] = irqs.interrupt[0];
  1870. resources->irqs->interrupt[1] = irqs.interrupt[1];
  1871. resources->irqs->interrupt[2] = irqs.interrupt[2];
  1872. resources->irqs->interrupt[3] = irqs.interrupt[3];
  1873. resources->irqs->valid_INT = irqs.valid_INT;
  1874. } else if (!behind_bridge) {
  1875. /* We need to hook up the interrupts here */
  1876. for (cloop = 0; cloop < 4; cloop++) {
  1877. if (irqs.valid_INT & (0x01 << cloop)) {
  1878. rc = pciehp_set_irq(func->bus, func->device,
  1879. 0x0A + cloop, irqs.interrupt[cloop]);
  1880. if (rc) {
  1881. pciehp_destroy_resource_list (&temp_resources);
  1882. return_resource(&(resources->bus_head), hold_bus_node);
  1883. return_resource(&(resources->io_head), hold_IO_node);
  1884. return_resource(&(resources->mem_head), hold_mem_node);
  1885. return_resource(&(resources->p_mem_head), hold_p_mem_node);
  1886. return rc;
  1887. }
  1888. }
  1889. } /* end of for loop */
  1890. }
  1891. /* Return unused bus resources
  1892. * First use the temporary node to store information for the board
  1893. */
  1894. if (hold_bus_node && bus_node && temp_resources.bus_head) {
  1895. hold_bus_node->length = bus_node->base - hold_bus_node->base;
  1896. hold_bus_node->next = func->bus_head;
  1897. func->bus_head = hold_bus_node;
  1898. temp_byte = (u8)(temp_resources.bus_head->base - 1);
  1899. /* set subordinate bus */
  1900. dbg("re-set subordinate bus = 0x%x\n", temp_byte);
  1901. rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
  1902. if (temp_resources.bus_head->length == 0) {
  1903. kfree(temp_resources.bus_head);
  1904. temp_resources.bus_head = NULL;
  1905. } else {
  1906. dbg("return bus res of b:d(0x%x:%x) base:len(0x%x:%x)\n",
  1907. func->bus, func->device, temp_resources.bus_head->base, temp_resources.bus_head->length);
  1908. return_resource(&(resources->bus_head), temp_resources.bus_head);
  1909. }
  1910. }
  1911. /* If we have IO space available and there is some left,
  1912. * return the unused portion
  1913. */
  1914. if (hold_IO_node && temp_resources.io_head) {
  1915. io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
  1916. &hold_IO_node, 0x1000);
  1917. /* Check if we were able to split something off */
  1918. if (io_node) {
  1919. hold_IO_node->base = io_node->base + io_node->length;
  1920. RES_CHECK(hold_IO_node->base, 8);
  1921. temp_byte = (u8)((hold_IO_node->base) >> 8);
  1922. rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
  1923. return_resource(&(resources->io_head), io_node);
  1924. }
  1925. io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
  1926. /* Check if we were able to split something off */
  1927. if (io_node) {
  1928. /* First use the temporary node to store information for the board */
  1929. hold_IO_node->length = io_node->base - hold_IO_node->base;
  1930. /* If we used any, add it to the board's list */
  1931. if (hold_IO_node->length) {
  1932. hold_IO_node->next = func->io_head;
  1933. func->io_head = hold_IO_node;
  1934. RES_CHECK(io_node->base - 1, 8);
  1935. temp_byte = (u8)((io_node->base - 1) >> 8);
  1936. rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
  1937. return_resource(&(resources->io_head), io_node);
  1938. } else {
  1939. /* it doesn't need any IO */
  1940. temp_byte = 0x00;
  1941. rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
  1942. return_resource(&(resources->io_head), io_node);
  1943. kfree(hold_IO_node);
  1944. }
  1945. } else {
  1946. /* it used most of the range */
  1947. hold_IO_node->next = func->io_head;
  1948. func->io_head = hold_IO_node;
  1949. }
  1950. } else if (hold_IO_node) {
  1951. /* it used the whole range */
  1952. hold_IO_node->next = func->io_head;
  1953. func->io_head = hold_IO_node;
  1954. }
  1955. /* If we have memory space available and there is some left,
  1956. * return the unused portion
  1957. */
  1958. if (hold_mem_node && temp_resources.mem_head) {
  1959. mem_node = do_pre_bridge_resource_split(&(temp_resources.mem_head), &hold_mem_node, 0x100000L);
  1960. /* Check if we were able to split something off */
  1961. if (mem_node) {
  1962. hold_mem_node->base = mem_node->base + mem_node->length;
  1963. RES_CHECK(hold_mem_node->base, 16);
  1964. temp_word = (u16)((hold_mem_node->base) >> 16);
  1965. rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
  1966. return_resource(&(resources->mem_head), mem_node);
  1967. }
  1968. mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000L);
  1969. /* Check if we were able to split something off */
  1970. if (mem_node) {
  1971. /* First use the temporary node to store information for the board */
  1972. hold_mem_node->length = mem_node->base - hold_mem_node->base;
  1973. if (hold_mem_node->length) {
  1974. hold_mem_node->next = func->mem_head;
  1975. func->mem_head = hold_mem_node;
  1976. /* configure end address */
  1977. RES_CHECK(mem_node->base - 1, 16);
  1978. temp_word = (u16)((mem_node->base - 1) >> 16);
  1979. rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
  1980. /* Return unused resources to the pool */
  1981. return_resource(&(resources->mem_head), mem_node);
  1982. } else {
  1983. /* it doesn't need any Mem */
  1984. temp_word = 0x0000;
  1985. rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
  1986. return_resource(&(resources->mem_head), mem_node);
  1987. kfree(hold_mem_node);
  1988. }
  1989. } else {
  1990. /* it used most of the range */
  1991. hold_mem_node->next = func->mem_head;
  1992. func->mem_head = hold_mem_node;
  1993. }
  1994. } else if (hold_mem_node) {
  1995. /* it used the whole range */
  1996. hold_mem_node->next = func->mem_head;
  1997. func->mem_head = hold_mem_node;
  1998. }
  1999. /* If we have prefetchable memory space available and there is some
  2000. * left at the end, return the unused portion
  2001. */
  2002. if (hold_p_mem_node && temp_resources.p_mem_head) {
  2003. p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
  2004. &hold_p_mem_node, 0x100000L);
  2005. /* Check if we were able to split something off */
  2006. if (p_mem_node) {
  2007. hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
  2008. RES_CHECK(hold_p_mem_node->base, 16);
  2009. temp_word = (u16)((hold_p_mem_node->base) >> 16);
  2010. rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
  2011. return_resource(&(resources->p_mem_head), p_mem_node);
  2012. }
  2013. p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000L);
  2014. /* Check if we were able to split something off */
  2015. if (p_mem_node) {
  2016. /* First use the temporary node to store information for the board */
  2017. hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
  2018. /* If we used any, add it to the board's list */
  2019. if (hold_p_mem_node->length) {
  2020. hold_p_mem_node->next = func->p_mem_head;
  2021. func->p_mem_head = hold_p_mem_node;
  2022. RES_CHECK(p_mem_node->base - 1, 16);
  2023. temp_word = (u16)((p_mem_node->base - 1) >> 16);
  2024. rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
  2025. return_resource(&(resources->p_mem_head), p_mem_node);
  2026. } else {
  2027. /* it doesn't need any PMem */
  2028. temp_word = 0x0000;
  2029. rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
  2030. return_resource(&(resources->p_mem_head), p_mem_node);
  2031. kfree(hold_p_mem_node);
  2032. }
  2033. } else {
  2034. /* it used the most of the range */
  2035. hold_p_mem_node->next = func->p_mem_head;
  2036. func->p_mem_head = hold_p_mem_node;
  2037. }
  2038. } else if (hold_p_mem_node) {
  2039. /* it used the whole range */
  2040. hold_p_mem_node->next = func->p_mem_head;
  2041. func->p_mem_head = hold_p_mem_node;
  2042. }
  2043. /* We should be configuring an IRQ and the bridge's base address
  2044. * registers if it needs them. Although we have never seen such
  2045. * a device
  2046. */
  2047. pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
  2048. dbg("PCI Bridge Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
  2049. return rc;
  2050. }
  2051. /**
  2052. * configure_new_function - Configures the PCI header information of one device
  2053. *
  2054. * @ctrl: pointer to controller structure
  2055. * @func: pointer to function structure
  2056. * @behind_bridge: 1 if this is a recursive call, 0 if not
  2057. * @resources: pointer to set of resource lists
  2058. *
  2059. * Calls itself recursively for bridged devices.
  2060. * Returns 0 if success
  2061. *
  2062. */
  2063. static int
  2064. configure_new_function(struct controller *ctrl, struct pci_func *func,
  2065. u8 behind_bridge, struct resource_lists *resources,
  2066. u8 bridge_bus, u8 bridge_dev)
  2067. {
  2068. int cloop;
  2069. u8 temp_byte;
  2070. u8 class_code;
  2071. u16 temp_word;
  2072. u32 rc;
  2073. u32 temp_register;
  2074. u32 base;
  2075. unsigned int devfn;
  2076. struct pci_resource *mem_node;
  2077. struct pci_resource *io_node;
  2078. struct pci_bus lpci_bus, *pci_bus;
  2079. memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
  2080. pci_bus = &lpci_bus;
  2081. pci_bus->number = func->bus;
  2082. devfn = PCI_DEVFN(func->device, func->function);
  2083. /* Check for Bridge */
  2084. rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
  2085. if (rc)
  2086. return rc;
  2087. dbg("%s: bus %x dev %x func %x temp_byte = %x\n", __FUNCTION__,
  2088. func->bus, func->device, func->function, temp_byte);
  2089. if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
  2090. rc = configure_new_bridge(ctrl, func, behind_bridge, resources,
  2091. pci_bus);
  2092. if (rc)
  2093. return rc;
  2094. } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
  2095. /* Standard device */
  2096. u64 base64;
  2097. rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
  2098. if (class_code == PCI_BASE_CLASS_DISPLAY)
  2099. return DEVICE_TYPE_NOT_SUPPORTED;
  2100. /* Figure out IO and memory needs */
  2101. for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
  2102. temp_register = 0xFFFFFFFF;
  2103. rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
  2104. rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
  2105. dbg("Bar[%x]=0x%x on bus:dev:func(0x%x:%x:%x)\n", cloop, temp_register,
  2106. func->bus, func->device, func->function);
  2107. if (!temp_register)
  2108. continue;
  2109. base64 = 0L;
  2110. if (temp_register & PCI_BASE_ADDRESS_SPACE_IO) {
  2111. /* Map IO */
  2112. /* set base = amount of IO space */
  2113. base = temp_register & 0xFFFFFFFC;
  2114. base = ~base + 1;
  2115. dbg("NEED IO length(0x%x)\n", base);
  2116. io_node = get_io_resource(&(resources->io_head),(ulong)base);
  2117. /* allocate the resource to the board */
  2118. if (io_node) {
  2119. dbg("Got IO base=0x%x(length=0x%x)\n", io_node->base, io_node->length);
  2120. base = (u32)io_node->base;
  2121. io_node->next = func->io_head;
  2122. func->io_head = io_node;
  2123. } else {
  2124. err("Got NO IO resource(length=0x%x)\n", base);
  2125. return -ENOMEM;
  2126. }
  2127. } else { /* map MEM */
  2128. int prefetchable = 1;
  2129. struct pci_resource **res_node = &func->p_mem_head;
  2130. char *res_type_str = "PMEM";
  2131. u32 temp_register2;
  2132. if (!(temp_register & PCI_BASE_ADDRESS_MEM_PREFETCH)) {
  2133. prefetchable = 0;
  2134. res_node = &func->mem_head;
  2135. res_type_str++;
  2136. }
  2137. base = temp_register & 0xFFFFFFF0;
  2138. base = ~base + 1;
  2139. switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
  2140. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2141. dbg("NEED 32 %s bar=0x%x(length=0x%x)\n", res_type_str, temp_register, base);
  2142. if (prefetchable && resources->p_mem_head)
  2143. mem_node=get_resource(&(resources->p_mem_head), (ulong)base);
  2144. else {
  2145. if (prefetchable)
  2146. dbg("using MEM for PMEM\n");
  2147. mem_node = get_resource(&(resources->mem_head), (ulong)base);
  2148. }
  2149. /* allocate the resource to the board */
  2150. if (mem_node) {
  2151. base = (u32)mem_node->base;
  2152. mem_node->next = *res_node;
  2153. *res_node = mem_node;
  2154. dbg("Got 32 %s base=0x%x(length=0x%x)\n", res_type_str, mem_node->base,
  2155. mem_node->length);
  2156. } else {
  2157. err("Got NO 32 %s resource(length=0x%x)\n", res_type_str, base);
  2158. return -ENOMEM;
  2159. }
  2160. break;
  2161. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2162. rc = pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
  2163. dbg("NEED 64 %s bar=0x%x:%x(length=0x%x)\n", res_type_str, temp_register2,
  2164. temp_register, base);
  2165. if (prefetchable && resources->p_mem_head)
  2166. mem_node = get_resource(&(resources->p_mem_head), (ulong)base);
  2167. else {
  2168. if (prefetchable)
  2169. dbg("using MEM for PMEM\n");
  2170. mem_node = get_resource(&(resources->mem_head), (ulong)base);
  2171. }
  2172. /* allocate the resource to the board */
  2173. if (mem_node) {
  2174. base64 = mem_node->base;
  2175. mem_node->next = *res_node;
  2176. *res_node = mem_node;
  2177. dbg("Got 64 %s base=0x%x:%x(length=%x)\n", res_type_str, (u32)(base64 >> 32),
  2178. (u32)base64, mem_node->length);
  2179. } else {
  2180. err("Got NO 64 %s resource(length=0x%x)\n", res_type_str, base);
  2181. return -ENOMEM;
  2182. }
  2183. break;
  2184. default:
  2185. dbg("reserved BAR type=0x%x\n", temp_register);
  2186. break;
  2187. }
  2188. }
  2189. if (base64) {
  2190. rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
  2191. cloop += 4;
  2192. base64 >>= 32;
  2193. if (base64) {
  2194. dbg("%s: high dword of base64(0x%x) set to 0\n", __FUNCTION__, (u32)base64);
  2195. base64 = 0x0L;
  2196. }
  2197. rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
  2198. } else {
  2199. rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
  2200. }
  2201. } /* End of base register loop */
  2202. /* disable ROM base Address */
  2203. temp_word = 0x00L;
  2204. rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word);
  2205. /* Set HP parameters (Cache Line Size, Latency Timer) */
  2206. rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
  2207. if (rc)
  2208. return rc;
  2209. pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_NORMAL);
  2210. dbg("PCI function Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device,
  2211. func->function);
  2212. } /* End of Not-A-Bridge else */
  2213. else {
  2214. /* It's some strange type of PCI adapter (Cardbus?) */
  2215. return DEVICE_TYPE_NOT_SUPPORTED;
  2216. }
  2217. func->configured = 1;
  2218. return 0;
  2219. }